drivers/pci/hotplug/pciehp.h

   1 /*
   2  * PCI Express Hot Plug Controller Driver
   3  *
   4  * Copyright (C) 1995,2001 Compaq Computer Corporation
   5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
   6  * Copyright (C) 2001 IBM Corp.
   7  * Copyright (C) 2003-2004 Intel Corporation
   8  *
   9  * All rights reserved.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or (at
  14  * your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  19  * NON INFRINGEMENT.  See the GNU General Public License for more
  20  * details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25  *
  26  * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
  27  *
  28  */
  29 #ifndef _PCIEHP_H
  30 #define _PCIEHP_H
  31
  32 #include <linux/types.h>
  33 #include <linux/pci.h>
  34 #include <linux/pci_hotplug.h>
  35 #include <linux/delay.h>
  36 #include <linux/sched.h>                /* signal_pending() */
  37 #include <linux/pcieport_if.h>
  38 #include <linux/mutex.h>
  39
  40 #define MY_NAME "pciehp"
  41
  42 extern int pciehp_poll_mode;
  43 extern int pciehp_poll_time;
  44 extern int pciehp_debug;
  45 extern int pciehp_force;
  46 extern struct workqueue_struct *pciehp_wq;
  47
  48 #define dbg(format, arg...)                                             \
  49 do {                                                                    \
  50         if (pciehp_debug)                                               \
  51                 printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg);     \
  52 } while (0)
  53 #define err(format, arg...)                                             \
  54         printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
  55 #define info(format, arg...)                                            \
  56         printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
  57 #define warn(format, arg...)                                            \
  58         printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
  59
  60 #define ctrl_dbg(ctrl, format, arg...)                                  \
  61         do {                                                            \
  62                 if (pciehp_debug)                                       \
  63                         dev_printk(KERN_DEBUG, &ctrl->pcie->device,     \
  64                                         format, ## arg);                \
  65         } while (0)
  66 #define ctrl_err(ctrl, format, arg...)                                  \
  67         dev_err(&ctrl->pcie->device, format, ## arg)
  68 #define ctrl_info(ctrl, format, arg...)                                 \
  69         dev_info(&ctrl->pcie->device, format, ## arg)
  70 #define ctrl_warn(ctrl, format, arg...)                                 \
  71         dev_warn(&ctrl->pcie->device, format, ## arg)
  72
  73 #define SLOT_NAME_SIZE 10
  74 struct slot {
  75         u8 state;
  76         struct controller *ctrl;
  77         struct hotplug_slot *hotplug_slot;
  78         struct delayed_work work;       /* work for button event */
  79         struct mutex lock;
  80 };
  81
  82 struct event_info {
  83         u32 event_type;
  84         struct slot *p_slot;
  85         struct work_struct work;
  86 };
  87
  88 struct controller {
  89         struct mutex ctrl_lock;         /* controller lock */
  90         struct pcie_device *pcie;       /* PCI Express port service */
  91         struct slot *slot;
  92         wait_queue_head_t queue;        /* sleep & wake process */
  93         u32 slot_cap;
  94         u8 cap_base;
  95         struct timer_list poll_timer;
  96         unsigned int cmd_busy:1;
  97         unsigned int no_cmd_complete:1;
  98         unsigned int link_active_reporting:1;
  99         unsigned int notification_enabled:1;
 100         unsigned int power_fault_detected;
 101 };
 102
 103 #define INT_BUTTON_IGNORE               0
 104 #define INT_PRESENCE_ON                 1
 105 #define INT_PRESENCE_OFF                2
 106 #define INT_SWITCH_CLOSE                3
 107 #define INT_SWITCH_OPEN                 4
 108 #define INT_POWER_FAULT                 5
 109 #define INT_POWER_FAULT_CLEAR           6
 110 #define INT_BUTTON_PRESS                7
 111 #define INT_BUTTON_RELEASE              8
 112 #define INT_BUTTON_CANCEL               9
 113
 114 #define STATIC_STATE                    0
 115 #define BLINKINGON_STATE                1
 116 #define BLINKINGOFF_STATE               2
 117 #define POWERON_STATE                   3
 118 #define POWEROFF_STATE                  4
 119
 120 #define ATTN_BUTTN(ctrl)        ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
 121 #define POWER_CTRL(ctrl)        ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
 122 #define MRL_SENS(ctrl)          ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
 123 #define ATTN_LED(ctrl)          ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
 124 #define PWR_LED(ctrl)           ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
 125 #define HP_SUPR_RM(ctrl)        ((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS)
 126 #define EMI(ctrl)               ((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP)
 127 #define NO_CMD_CMPL(ctrl)       ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
 128 #define PSN(ctrl)               ((ctrl)->slot_cap >> 19)
 129
 130 extern int pciehp_sysfs_enable_slot(struct slot *slot);
 131 extern int pciehp_sysfs_disable_slot(struct slot *slot);
 132 extern u8 pciehp_handle_attention_button(struct slot *p_slot);
 133 extern u8 pciehp_handle_switch_change(struct slot *p_slot);
 134 extern u8 pciehp_handle_presence_change(struct slot *p_slot);
 135 extern u8 pciehp_handle_power_fault(struct slot *p_slot);
 136 extern int pciehp_configure_device(struct slot *p_slot);
 137 extern int pciehp_unconfigure_device(struct slot *p_slot);
 138 extern void pciehp_queue_pushbutton_work(struct work_struct *work);
 139 struct controller *pcie_init(struct pcie_device *dev);
 140 int pcie_init_notification(struct controller *ctrl);
 141 int pciehp_enable_slot(struct slot *p_slot);
 142 int pciehp_disable_slot(struct slot *p_slot);
 143 int pcie_enable_notification(struct controller *ctrl);
 144 int pciehp_power_on_slot(struct slot *slot);
 145 int pciehp_power_off_slot(struct slot *slot);
 146 int pciehp_get_power_status(struct slot *slot, u8 *status);
 147 int pciehp_get_attention_status(struct slot *slot, u8 *status);
 148
 149 int pciehp_set_attention_status(struct slot *slot, u8 status);
 150 int pciehp_get_latch_status(struct slot *slot, u8 *status);
 151 int pciehp_get_adapter_status(struct slot *slot, u8 *status);
 152 int pciehp_get_max_link_speed(struct slot *slot, enum pci_bus_speed *speed);
 153 int pciehp_get_max_link_width(struct slot *slot, enum pcie_link_width *val);
 154 int pciehp_get_cur_link_speed(struct slot *slot, enum pci_bus_speed *speed);
 155 int pciehp_get_cur_link_width(struct slot *slot, enum pcie_link_width *val);
 156 int pciehp_query_power_fault(struct slot *slot);
 157 void pciehp_green_led_on(struct slot *slot);
 158 void pciehp_green_led_off(struct slot *slot);
 159 void pciehp_green_led_blink(struct slot *slot);
 160 int pciehp_check_link_status(struct controller *ctrl);
 161 void pciehp_release_ctrl(struct controller *ctrl);
 162
 163 static inline const char *slot_name(struct slot *slot)
 164 {
 165         return hotplug_slot_name(slot->hotplug_slot);
 166 }
 167
 168 #ifdef CONFIG_ACPI
 169 #include <acpi/acpi.h>
 170 #include <acpi/acpi_bus.h>
 171 #include <linux/pci-acpi.h>
 172
 173 extern void __init pciehp_acpi_slot_detection_init(void);
 174 extern int pciehp_acpi_slot_detection_check(struct pci_dev *dev);
 175
 176 static inline void pciehp_firmware_init(void)
 177 {
 178         pciehp_acpi_slot_detection_init();
 179 }
 180
 181 static inline int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev)
 182 {
 183         int retval;
 184         u32 flags = (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL |
 185                      OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
 186         retval = acpi_get_hp_hw_control_from_firmware(dev, flags);
 187         if (retval)
 188                 return retval;
 189         return pciehp_acpi_slot_detection_check(dev);
 190 }
 191 #else
 192 #define pciehp_firmware_init()                          do {} while (0)
 193 #define pciehp_get_hp_hw_control_from_firmware(dev)     0
 194 #endif                          /* CONFIG_ACPI */
 195 #endif                          /* _PCIEHP_H */