drivers/s390/net/ctcm_fsms.h

   1 /*
   2  * drivers/s390/net/ctcm_fsms.h
   3  *
   4  * Copyright IBM Corp. 2001, 2007
   5  * Authors:     Fritz Elfert (felfert@millenux.com)
   6  *              Peter Tiedemann (ptiedem@de.ibm.com)
   7  *      MPC additions :
   8  *              Belinda Thompson (belindat@us.ibm.com)
   9  *              Andy Richter (richtera@us.ibm.com)
  10  */
  11 #ifndef _CTCM_FSMS_H_
  12 #define _CTCM_FSMS_H_
  13
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/kernel.h>
  17 #include <linux/slab.h>
  18 #include <linux/errno.h>
  19 #include <linux/types.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/timer.h>
  22 #include <linux/bitops.h>
  23
  24 #include <linux/signal.h>
  25 #include <linux/string.h>
  26
  27 #include <linux/ip.h>
  28 #include <linux/if_arp.h>
  29 #include <linux/tcp.h>
  30 #include <linux/skbuff.h>
  31 #include <linux/ctype.h>
  32 #include <net/dst.h>
  33
  34 #include <linux/io.h>
  35 #include <asm/ccwdev.h>
  36 #include <asm/ccwgroup.h>
  37 #include <linux/uaccess.h>
  38
  39 #include <asm/idals.h>
  40
  41 #include "fsm.h"
  42 #include "cu3088.h"
  43 #include "ctcm_main.h"
  44
  45 /*
  46  * Definitions for the channel statemachine(s) for ctc and ctcmpc
  47  *
  48  * To allow better kerntyping, prefix-less definitions for channel states
  49  * and channel events have been replaced :
  50  * ch_event... -> ctc_ch_event...
  51  * CH_EVENT... -> CTC_EVENT...
  52  * ch_state... -> ctc_ch_state...
  53  * CH_STATE... -> CTC_STATE...
  54  */
  55 /*
  56  * Events of the channel statemachine(s) for ctc and ctcmpc
  57  */
  58 enum ctc_ch_events {
  59         /*
  60          * Events, representing return code of
  61          * I/O operations (ccw_device_start, ccw_device_halt et al.)
  62          */
  63         CTC_EVENT_IO_SUCCESS,
  64         CTC_EVENT_IO_EBUSY,
  65         CTC_EVENT_IO_ENODEV,
  66         CTC_EVENT_IO_UNKNOWN,
  67
  68         CTC_EVENT_ATTNBUSY,
  69         CTC_EVENT_ATTN,
  70         CTC_EVENT_BUSY,
  71         /*
  72          * Events, representing unit-check
  73          */
  74         CTC_EVENT_UC_RCRESET,
  75         CTC_EVENT_UC_RSRESET,
  76         CTC_EVENT_UC_TXTIMEOUT,
  77         CTC_EVENT_UC_TXPARITY,
  78         CTC_EVENT_UC_HWFAIL,
  79         CTC_EVENT_UC_RXPARITY,
  80         CTC_EVENT_UC_ZERO,
  81         CTC_EVENT_UC_UNKNOWN,
  82         /*
  83          * Events, representing subchannel-check
  84          */
  85         CTC_EVENT_SC_UNKNOWN,
  86         /*
  87          * Events, representing machine checks
  88          */
  89         CTC_EVENT_MC_FAIL,
  90         CTC_EVENT_MC_GOOD,
  91         /*
  92          * Event, representing normal IRQ
  93          */
  94         CTC_EVENT_IRQ,
  95         CTC_EVENT_FINSTAT,
  96         /*
  97          * Event, representing timer expiry.
  98          */
  99         CTC_EVENT_TIMER,
 100         /*
 101          * Events, representing commands from upper levels.
 102          */
 103         CTC_EVENT_START,
 104         CTC_EVENT_STOP,
 105         CTC_NR_EVENTS,
 106         /*
 107          * additional MPC events
 108          */
 109         CTC_EVENT_SEND_XID = CTC_NR_EVENTS,
 110         CTC_EVENT_RSWEEP_TIMER,
 111         /*
 112          * MUST be always the last element!!
 113          */
 114         CTC_MPC_NR_EVENTS,
 115 };
 116
 117 /*
 118  * States of the channel statemachine(s) for ctc and ctcmpc.
 119  */
 120 enum ctc_ch_states {
 121         /*
 122          * Channel not assigned to any device,
 123          * initial state, direction invalid
 124          */
 125         CTC_STATE_IDLE,
 126         /*
 127          * Channel assigned but not operating
 128          */
 129         CTC_STATE_STOPPED,
 130         CTC_STATE_STARTWAIT,
 131         CTC_STATE_STARTRETRY,
 132         CTC_STATE_SETUPWAIT,
 133         CTC_STATE_RXINIT,
 134         CTC_STATE_TXINIT,
 135         CTC_STATE_RX,
 136         CTC_STATE_TX,
 137         CTC_STATE_RXIDLE,
 138         CTC_STATE_TXIDLE,
 139         CTC_STATE_RXERR,
 140         CTC_STATE_TXERR,
 141         CTC_STATE_TERM,
 142         CTC_STATE_DTERM,
 143         CTC_STATE_NOTOP,
 144         CTC_NR_STATES,     /* MUST be the last element of non-expanded states */
 145         /*
 146          * additional MPC states
 147          */
 148         CH_XID0_PENDING = CTC_NR_STATES,
 149         CH_XID0_INPROGRESS,
 150         CH_XID7_PENDING,
 151         CH_XID7_PENDING1,
 152         CH_XID7_PENDING2,
 153         CH_XID7_PENDING3,
 154         CH_XID7_PENDING4,
 155         CTC_MPC_NR_STATES, /* MUST be the last element of expanded mpc states */
 156 };
 157
 158 extern const char *ctc_ch_event_names[];
 159
 160 extern const char *ctc_ch_state_names[];
 161
 162 void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg);
 163 void ctcm_purge_skb_queue(struct sk_buff_head *q);
 164 void fsm_action_nop(fsm_instance *fi, int event, void *arg);
 165
 166 /*
 167  * ----- non-static actions for ctcm channel statemachine -----
 168  *
 169  */
 170 void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg);
 171
 172 /*
 173  * ----- FSM (state/event/action) of the ctcm channel statemachine -----
 174  */
 175 extern const fsm_node ch_fsm[];
 176 extern int ch_fsm_len;
 177
 178
 179 /*
 180  * ----- non-static actions for ctcmpc channel statemachine ----
 181  *
 182  */
 183 /* shared :
 184 void ctcm_chx_txidle(fsm_instance * fi, int event, void *arg);
 185  */
 186 void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg);
 187
 188 /*
 189  * ----- FSM (state/event/action) of the ctcmpc channel statemachine -----
 190  */
 191 extern const fsm_node ctcmpc_ch_fsm[];
 192 extern int mpc_ch_fsm_len;
 193
 194 /*
 195  * Definitions for the device interface statemachine for ctc and mpc
 196  */
 197
 198 /*
 199  * States of the device interface statemachine.
 200  */
 201 enum dev_states {
 202         DEV_STATE_STOPPED,
 203         DEV_STATE_STARTWAIT_RXTX,
 204         DEV_STATE_STARTWAIT_RX,
 205         DEV_STATE_STARTWAIT_TX,
 206         DEV_STATE_STOPWAIT_RXTX,
 207         DEV_STATE_STOPWAIT_RX,
 208         DEV_STATE_STOPWAIT_TX,
 209         DEV_STATE_RUNNING,
 210         /*
 211          * MUST be always the last element!!
 212          */
 213         CTCM_NR_DEV_STATES
 214 };
 215
 216 extern const char *dev_state_names[];
 217
 218 /*
 219  * Events of the device interface statemachine.
 220  * ctcm and ctcmpc
 221  */
 222 enum dev_events {
 223         DEV_EVENT_START,
 224         DEV_EVENT_STOP,
 225         DEV_EVENT_RXUP,
 226         DEV_EVENT_TXUP,
 227         DEV_EVENT_RXDOWN,
 228         DEV_EVENT_TXDOWN,
 229         DEV_EVENT_RESTART,
 230         /*
 231          * MUST be always the last element!!
 232          */
 233         CTCM_NR_DEV_EVENTS
 234 };
 235
 236 extern const char *dev_event_names[];
 237
 238 /*
 239  * Actions for the device interface statemachine.
 240  * ctc and ctcmpc
 241  */
 242 /*
 243 static void dev_action_start(fsm_instance * fi, int event, void *arg);
 244 static void dev_action_stop(fsm_instance * fi, int event, void *arg);
 245 static void dev_action_restart(fsm_instance *fi, int event, void *arg);
 246 static void dev_action_chup(fsm_instance * fi, int event, void *arg);
 247 static void dev_action_chdown(fsm_instance * fi, int event, void *arg);
 248 */
 249
 250 /*
 251  * The (state/event/action) fsm table of the device interface statemachine.
 252  * ctcm and ctcmpc
 253  */
 254 extern const fsm_node dev_fsm[];
 255 extern int dev_fsm_len;
 256
 257
 258 /*
 259  * Definitions for the MPC Group statemachine
 260  */
 261
 262 /*
 263  * MPC Group Station FSM States
 264
 265 State Name              When In This State
 266 ======================  =======================================
 267 MPCG_STATE_RESET        Initial State When Driver Loaded
 268                         We receive and send NOTHING
 269
 270 MPCG_STATE_INOP         INOP Received.
 271                         Group level non-recoverable error
 272
 273 MPCG_STATE_READY        XID exchanges for at least 1 write and
 274                         1 read channel have completed.
 275                         Group is ready for data transfer.
 276
 277 States from ctc_mpc_alloc_channel
 278 ==============================================================
 279 MPCG_STATE_XID2INITW    Awaiting XID2(0) Initiation
 280                               ATTN from other side will start
 281                               XID negotiations.
 282                               Y-side protocol only.
 283
 284 MPCG_STATE_XID2INITX    XID2(0) negotiations are in progress.
 285                               At least 1, but not all, XID2(0)'s
 286                               have been received from partner.
 287
 288 MPCG_STATE_XID7INITW    XID2(0) complete
 289                               No XID2(7)'s have yet been received.
 290                               XID2(7) negotiations pending.
 291
 292 MPCG_STATE_XID7INITX    XID2(7) negotiations in progress.
 293                               At least 1, but not all, XID2(7)'s
 294                               have been received from partner.
 295
 296 MPCG_STATE_XID7INITF    XID2(7) negotiations complete.
 297                               Transitioning to READY.
 298
 299 MPCG_STATE_READY              Ready for Data Transfer.
 300
 301
 302 States from ctc_mpc_establish_connectivity call
 303 ==============================================================
 304 MPCG_STATE_XID0IOWAIT   Initiating XID2(0) negotiations.
 305                               X-side protocol only.
 306                               ATTN-BUSY from other side will convert
 307                               this to Y-side protocol and the
 308                               ctc_mpc_alloc_channel flow will begin.
 309
 310 MPCG_STATE_XID0IOWAIX   XID2(0) negotiations are in progress.
 311                               At least 1, but not all, XID2(0)'s
 312                               have been received from partner.
 313
 314 MPCG_STATE_XID7INITI    XID2(0) complete
 315                               No XID2(7)'s have yet been received.
 316                               XID2(7) negotiations pending.
 317
 318 MPCG_STATE_XID7INITZ    XID2(7) negotiations in progress.
 319                               At least 1, but not all, XID2(7)'s
 320                               have been received from partner.
 321
 322 MPCG_STATE_XID7INITF    XID2(7) negotiations complete.
 323                               Transitioning to READY.
 324
 325 MPCG_STATE_READY              Ready for Data Transfer.
 326
 327 */
 328
 329 enum mpcg_events {
 330         MPCG_EVENT_INOP,
 331         MPCG_EVENT_DISCONC,
 332         MPCG_EVENT_XID0DO,
 333         MPCG_EVENT_XID2,
 334         MPCG_EVENT_XID2DONE,
 335         MPCG_EVENT_XID7DONE,
 336         MPCG_EVENT_TIMER,
 337         MPCG_EVENT_DOIO,
 338         MPCG_NR_EVENTS,
 339 };
 340
 341 enum mpcg_states {
 342         MPCG_STATE_RESET,
 343         MPCG_STATE_INOP,
 344         MPCG_STATE_XID2INITW,
 345         MPCG_STATE_XID2INITX,
 346         MPCG_STATE_XID7INITW,
 347         MPCG_STATE_XID7INITX,
 348         MPCG_STATE_XID0IOWAIT,
 349         MPCG_STATE_XID0IOWAIX,
 350         MPCG_STATE_XID7INITI,
 351         MPCG_STATE_XID7INITZ,
 352         MPCG_STATE_XID7INITF,
 353         MPCG_STATE_FLOWC,
 354         MPCG_STATE_READY,
 355         MPCG_NR_STATES,
 356 };
 357
 358 #endif
 359 /* --- This is the END my friend --- */