[ARM] pxa: update defconfig for Verdex Pro
[linux-2.6/verdex.git] / drivers / usb / host / ehci-q.c
blob00ad9ce392ed6871c35a31b429865909874f33e5
1 /*
2 * Copyright (C) 2001-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
41 /*-------------------------------------------------------------------------*/
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
45 static int
46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 size_t len, int token, int maxpacket)
49 int i, count;
50 u64 addr = buf;
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
57 count = len;
58 else {
59 buf += 0x1000;
60 buf &= ~0x0fff;
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
64 addr = buf;
65 qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67 (u32)(addr >> 32));
68 buf += 0x1000;
69 if ((count + 0x1000) < len)
70 count += 0x1000;
71 else
72 count = len;
75 /* short packets may only terminate transfers */
76 if (count != len)
77 count -= (count % maxpacket);
79 qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80 qtd->length = count;
82 return count;
85 /*-------------------------------------------------------------------------*/
87 static inline void
88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
90 struct ehci_qh_hw *hw = qh->hw;
92 /* writes to an active overlay are unsafe */
93 BUG_ON(qh->qh_state != QH_STATE_IDLE);
95 hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
96 hw->hw_alt_next = EHCI_LIST_END(ehci);
98 /* Except for control endpoints, we make hardware maintain data
99 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
100 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
101 * ever clear it.
103 if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
104 unsigned is_out, epnum;
106 is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
107 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
108 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
109 hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
110 usb_settoggle (qh->dev, epnum, is_out, 1);
114 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
115 wmb ();
116 hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
119 /* if it weren't for a common silicon quirk (writing the dummy into the qh
120 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
121 * recovery (including urb dequeue) would need software changes to a QH...
123 static void
124 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
126 struct ehci_qtd *qtd;
128 if (list_empty (&qh->qtd_list))
129 qtd = qh->dummy;
130 else {
131 qtd = list_entry (qh->qtd_list.next,
132 struct ehci_qtd, qtd_list);
133 /* first qtd may already be partially processed */
134 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current)
135 qtd = NULL;
138 if (qtd)
139 qh_update (ehci, qh, qtd);
142 /*-------------------------------------------------------------------------*/
144 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
146 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
147 struct usb_host_endpoint *ep)
149 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
150 struct ehci_qh *qh = ep->hcpriv;
151 unsigned long flags;
153 spin_lock_irqsave(&ehci->lock, flags);
154 qh->clearing_tt = 0;
155 if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
156 && HC_IS_RUNNING(hcd->state))
157 qh_link_async(ehci, qh);
158 spin_unlock_irqrestore(&ehci->lock, flags);
161 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
162 struct urb *urb, u32 token)
165 /* If an async split transaction gets an error or is unlinked,
166 * the TT buffer may be left in an indeterminate state. We
167 * have to clear the TT buffer.
169 * Note: this routine is never called for Isochronous transfers.
171 if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
172 #ifdef DEBUG
173 struct usb_device *tt = urb->dev->tt->hub;
174 dev_dbg(&tt->dev,
175 "clear tt buffer port %d, a%d ep%d t%08x\n",
176 urb->dev->ttport, urb->dev->devnum,
177 usb_pipeendpoint(urb->pipe), token);
178 #endif /* DEBUG */
179 if (!ehci_is_TDI(ehci)
180 || urb->dev->tt->hub !=
181 ehci_to_hcd(ehci)->self.root_hub) {
182 if (usb_hub_clear_tt_buffer(urb) == 0)
183 qh->clearing_tt = 1;
184 } else {
186 /* REVISIT ARC-derived cores don't clear the root
187 * hub TT buffer in this way...
193 static int qtd_copy_status (
194 struct ehci_hcd *ehci,
195 struct urb *urb,
196 size_t length,
197 u32 token
200 int status = -EINPROGRESS;
202 /* count IN/OUT bytes, not SETUP (even short packets) */
203 if (likely (QTD_PID (token) != 2))
204 urb->actual_length += length - QTD_LENGTH (token);
206 /* don't modify error codes */
207 if (unlikely(urb->unlinked))
208 return status;
210 /* force cleanup after short read; not always an error */
211 if (unlikely (IS_SHORT_READ (token)))
212 status = -EREMOTEIO;
214 /* serious "can't proceed" faults reported by the hardware */
215 if (token & QTD_STS_HALT) {
216 if (token & QTD_STS_BABBLE) {
217 /* FIXME "must" disable babbling device's port too */
218 status = -EOVERFLOW;
219 /* CERR nonzero + halt --> stall */
220 } else if (QTD_CERR(token)) {
221 status = -EPIPE;
223 /* In theory, more than one of the following bits can be set
224 * since they are sticky and the transaction is retried.
225 * Which to test first is rather arbitrary.
227 } else if (token & QTD_STS_MMF) {
228 /* fs/ls interrupt xfer missed the complete-split */
229 status = -EPROTO;
230 } else if (token & QTD_STS_DBE) {
231 status = (QTD_PID (token) == 1) /* IN ? */
232 ? -ENOSR /* hc couldn't read data */
233 : -ECOMM; /* hc couldn't write data */
234 } else if (token & QTD_STS_XACT) {
235 /* timeout, bad CRC, wrong PID, etc */
236 ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
237 urb->dev->devpath,
238 usb_pipeendpoint(urb->pipe),
239 usb_pipein(urb->pipe) ? "in" : "out");
240 status = -EPROTO;
241 } else { /* unknown */
242 status = -EPROTO;
245 ehci_vdbg (ehci,
246 "dev%d ep%d%s qtd token %08x --> status %d\n",
247 usb_pipedevice (urb->pipe),
248 usb_pipeendpoint (urb->pipe),
249 usb_pipein (urb->pipe) ? "in" : "out",
250 token, status);
253 return status;
256 static void
257 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
258 __releases(ehci->lock)
259 __acquires(ehci->lock)
261 if (likely (urb->hcpriv != NULL)) {
262 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
264 /* S-mask in a QH means it's an interrupt urb */
265 if ((qh->hw->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
267 /* ... update hc-wide periodic stats (for usbfs) */
268 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
270 qh_put (qh);
273 if (unlikely(urb->unlinked)) {
274 COUNT(ehci->stats.unlink);
275 } else {
276 /* report non-error and short read status as zero */
277 if (status == -EINPROGRESS || status == -EREMOTEIO)
278 status = 0;
279 COUNT(ehci->stats.complete);
282 #ifdef EHCI_URB_TRACE
283 ehci_dbg (ehci,
284 "%s %s urb %p ep%d%s status %d len %d/%d\n",
285 __func__, urb->dev->devpath, urb,
286 usb_pipeendpoint (urb->pipe),
287 usb_pipein (urb->pipe) ? "in" : "out",
288 status,
289 urb->actual_length, urb->transfer_buffer_length);
290 #endif
292 /* complete() can reenter this HCD */
293 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
294 spin_unlock (&ehci->lock);
295 usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
296 spin_lock (&ehci->lock);
299 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
300 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
302 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
305 * Process and free completed qtds for a qh, returning URBs to drivers.
306 * Chases up to qh->hw_current. Returns number of completions called,
307 * indicating how much "real" work we did.
309 static unsigned
310 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
312 struct ehci_qtd *last, *end = qh->dummy;
313 struct list_head *entry, *tmp;
314 int last_status;
315 int stopped;
316 unsigned count = 0;
317 u8 state;
318 const __le32 halt = HALT_BIT(ehci);
319 struct ehci_qh_hw *hw = qh->hw;
321 if (unlikely (list_empty (&qh->qtd_list)))
322 return count;
324 /* completions (or tasks on other cpus) must never clobber HALT
325 * till we've gone through and cleaned everything up, even when
326 * they add urbs to this qh's queue or mark them for unlinking.
328 * NOTE: unlinking expects to be done in queue order.
330 * It's a bug for qh->qh_state to be anything other than
331 * QH_STATE_IDLE, unless our caller is scan_async() or
332 * scan_periodic().
334 state = qh->qh_state;
335 qh->qh_state = QH_STATE_COMPLETING;
336 stopped = (state == QH_STATE_IDLE);
338 rescan:
339 last = NULL;
340 last_status = -EINPROGRESS;
341 qh->needs_rescan = 0;
343 /* remove de-activated QTDs from front of queue.
344 * after faults (including short reads), cleanup this urb
345 * then let the queue advance.
346 * if queue is stopped, handles unlinks.
348 list_for_each_safe (entry, tmp, &qh->qtd_list) {
349 struct ehci_qtd *qtd;
350 struct urb *urb;
351 u32 token = 0;
353 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
354 urb = qtd->urb;
356 /* clean up any state from previous QTD ...*/
357 if (last) {
358 if (likely (last->urb != urb)) {
359 ehci_urb_done(ehci, last->urb, last_status);
360 count++;
361 last_status = -EINPROGRESS;
363 ehci_qtd_free (ehci, last);
364 last = NULL;
367 /* ignore urbs submitted during completions we reported */
368 if (qtd == end)
369 break;
371 /* hardware copies qtd out of qh overlay */
372 rmb ();
373 token = hc32_to_cpu(ehci, qtd->hw_token);
375 /* always clean up qtds the hc de-activated */
376 retry_xacterr:
377 if ((token & QTD_STS_ACTIVE) == 0) {
379 /* on STALL, error, and short reads this urb must
380 * complete and all its qtds must be recycled.
382 if ((token & QTD_STS_HALT) != 0) {
384 /* retry transaction errors until we
385 * reach the software xacterr limit
387 if ((token & QTD_STS_XACT) &&
388 QTD_CERR(token) == 0 &&
389 ++qh->xacterrs < QH_XACTERR_MAX &&
390 !urb->unlinked) {
391 ehci_dbg(ehci,
392 "detected XactErr len %zu/%zu retry %d\n",
393 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
395 /* reset the token in the qtd and the
396 * qh overlay (which still contains
397 * the qtd) so that we pick up from
398 * where we left off
400 token &= ~QTD_STS_HALT;
401 token |= QTD_STS_ACTIVE |
402 (EHCI_TUNE_CERR << 10);
403 qtd->hw_token = cpu_to_hc32(ehci,
404 token);
405 wmb();
406 hw->hw_token = cpu_to_hc32(ehci,
407 token);
408 goto retry_xacterr;
410 stopped = 1;
412 /* magic dummy for some short reads; qh won't advance.
413 * that silicon quirk can kick in with this dummy too.
415 * other short reads won't stop the queue, including
416 * control transfers (status stage handles that) or
417 * most other single-qtd reads ... the queue stops if
418 * URB_SHORT_NOT_OK was set so the driver submitting
419 * the urbs could clean it up.
421 } else if (IS_SHORT_READ (token)
422 && !(qtd->hw_alt_next
423 & EHCI_LIST_END(ehci))) {
424 stopped = 1;
425 goto halt;
428 /* stop scanning when we reach qtds the hc is using */
429 } else if (likely (!stopped
430 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
431 break;
433 /* scan the whole queue for unlinks whenever it stops */
434 } else {
435 stopped = 1;
437 /* cancel everything if we halt, suspend, etc */
438 if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))
439 last_status = -ESHUTDOWN;
441 /* this qtd is active; skip it unless a previous qtd
442 * for its urb faulted, or its urb was canceled.
444 else if (last_status == -EINPROGRESS && !urb->unlinked)
445 continue;
447 /* qh unlinked; token in overlay may be most current */
448 if (state == QH_STATE_IDLE
449 && cpu_to_hc32(ehci, qtd->qtd_dma)
450 == hw->hw_current) {
451 token = hc32_to_cpu(ehci, hw->hw_token);
453 /* An unlink may leave an incomplete
454 * async transaction in the TT buffer.
455 * We have to clear it.
457 ehci_clear_tt_buffer(ehci, qh, urb, token);
460 /* force halt for unlinked or blocked qh, so we'll
461 * patch the qh later and so that completions can't
462 * activate it while we "know" it's stopped.
464 if ((halt & hw->hw_token) == 0) {
465 halt:
466 hw->hw_token |= halt;
467 wmb ();
471 /* unless we already know the urb's status, collect qtd status
472 * and update count of bytes transferred. in common short read
473 * cases with only one data qtd (including control transfers),
474 * queue processing won't halt. but with two or more qtds (for
475 * example, with a 32 KB transfer), when the first qtd gets a
476 * short read the second must be removed by hand.
478 if (last_status == -EINPROGRESS) {
479 last_status = qtd_copy_status(ehci, urb,
480 qtd->length, token);
481 if (last_status == -EREMOTEIO
482 && (qtd->hw_alt_next
483 & EHCI_LIST_END(ehci)))
484 last_status = -EINPROGRESS;
486 /* As part of low/full-speed endpoint-halt processing
487 * we must clear the TT buffer (11.17.5).
489 if (unlikely(last_status != -EINPROGRESS &&
490 last_status != -EREMOTEIO))
491 ehci_clear_tt_buffer(ehci, qh, urb, token);
494 /* if we're removing something not at the queue head,
495 * patch the hardware queue pointer.
497 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
498 last = list_entry (qtd->qtd_list.prev,
499 struct ehci_qtd, qtd_list);
500 last->hw_next = qtd->hw_next;
503 /* remove qtd; it's recycled after possible urb completion */
504 list_del (&qtd->qtd_list);
505 last = qtd;
507 /* reinit the xacterr counter for the next qtd */
508 qh->xacterrs = 0;
511 /* last urb's completion might still need calling */
512 if (likely (last != NULL)) {
513 ehci_urb_done(ehci, last->urb, last_status);
514 count++;
515 ehci_qtd_free (ehci, last);
518 /* Do we need to rescan for URBs dequeued during a giveback? */
519 if (unlikely(qh->needs_rescan)) {
520 /* If the QH is already unlinked, do the rescan now. */
521 if (state == QH_STATE_IDLE)
522 goto rescan;
524 /* Otherwise we have to wait until the QH is fully unlinked.
525 * Our caller will start an unlink if qh->needs_rescan is
526 * set. But if an unlink has already started, nothing needs
527 * to be done.
529 if (state != QH_STATE_LINKED)
530 qh->needs_rescan = 0;
533 /* restore original state; caller must unlink or relink */
534 qh->qh_state = state;
536 /* be sure the hardware's done with the qh before refreshing
537 * it after fault cleanup, or recovering from silicon wrongly
538 * overlaying the dummy qtd (which reduces DMA chatter).
540 if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
541 switch (state) {
542 case QH_STATE_IDLE:
543 qh_refresh(ehci, qh);
544 break;
545 case QH_STATE_LINKED:
546 /* We won't refresh a QH that's linked (after the HC
547 * stopped the queue). That avoids a race:
548 * - HC reads first part of QH;
549 * - CPU updates that first part and the token;
550 * - HC reads rest of that QH, including token
551 * Result: HC gets an inconsistent image, and then
552 * DMAs to/from the wrong memory (corrupting it).
554 * That should be rare for interrupt transfers,
555 * except maybe high bandwidth ...
558 /* Tell the caller to start an unlink */
559 qh->needs_rescan = 1;
560 break;
561 /* otherwise, unlink already started */
565 return count;
568 /*-------------------------------------------------------------------------*/
570 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
571 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
572 // ... and packet size, for any kind of endpoint descriptor
573 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
576 * reverse of qh_urb_transaction: free a list of TDs.
577 * used for cleanup after errors, before HC sees an URB's TDs.
579 static void qtd_list_free (
580 struct ehci_hcd *ehci,
581 struct urb *urb,
582 struct list_head *qtd_list
584 struct list_head *entry, *temp;
586 list_for_each_safe (entry, temp, qtd_list) {
587 struct ehci_qtd *qtd;
589 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
590 list_del (&qtd->qtd_list);
591 ehci_qtd_free (ehci, qtd);
596 * create a list of filled qtds for this URB; won't link into qh.
598 static struct list_head *
599 qh_urb_transaction (
600 struct ehci_hcd *ehci,
601 struct urb *urb,
602 struct list_head *head,
603 gfp_t flags
605 struct ehci_qtd *qtd, *qtd_prev;
606 dma_addr_t buf;
607 int len, maxpacket;
608 int is_input;
609 u32 token;
612 * URBs map to sequences of QTDs: one logical transaction
614 qtd = ehci_qtd_alloc (ehci, flags);
615 if (unlikely (!qtd))
616 return NULL;
617 list_add_tail (&qtd->qtd_list, head);
618 qtd->urb = urb;
620 token = QTD_STS_ACTIVE;
621 token |= (EHCI_TUNE_CERR << 10);
622 /* for split transactions, SplitXState initialized to zero */
624 len = urb->transfer_buffer_length;
625 is_input = usb_pipein (urb->pipe);
626 if (usb_pipecontrol (urb->pipe)) {
627 /* SETUP pid */
628 qtd_fill(ehci, qtd, urb->setup_dma,
629 sizeof (struct usb_ctrlrequest),
630 token | (2 /* "setup" */ << 8), 8);
632 /* ... and always at least one more pid */
633 token ^= QTD_TOGGLE;
634 qtd_prev = qtd;
635 qtd = ehci_qtd_alloc (ehci, flags);
636 if (unlikely (!qtd))
637 goto cleanup;
638 qtd->urb = urb;
639 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
640 list_add_tail (&qtd->qtd_list, head);
642 /* for zero length DATA stages, STATUS is always IN */
643 if (len == 0)
644 token |= (1 /* "in" */ << 8);
648 * data transfer stage: buffer setup
650 buf = urb->transfer_dma;
652 if (is_input)
653 token |= (1 /* "in" */ << 8);
654 /* else it's already initted to "out" pid (0 << 8) */
656 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
659 * buffer gets wrapped in one or more qtds;
660 * last one may be "short" (including zero len)
661 * and may serve as a control status ack
663 for (;;) {
664 int this_qtd_len;
666 this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
667 len -= this_qtd_len;
668 buf += this_qtd_len;
671 * short reads advance to a "magic" dummy instead of the next
672 * qtd ... that forces the queue to stop, for manual cleanup.
673 * (this will usually be overridden later.)
675 if (is_input)
676 qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
678 /* qh makes control packets use qtd toggle; maybe switch it */
679 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
680 token ^= QTD_TOGGLE;
682 if (likely (len <= 0))
683 break;
685 qtd_prev = qtd;
686 qtd = ehci_qtd_alloc (ehci, flags);
687 if (unlikely (!qtd))
688 goto cleanup;
689 qtd->urb = urb;
690 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
691 list_add_tail (&qtd->qtd_list, head);
695 * unless the caller requires manual cleanup after short reads,
696 * have the alt_next mechanism keep the queue running after the
697 * last data qtd (the only one, for control and most other cases).
699 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
700 || usb_pipecontrol (urb->pipe)))
701 qtd->hw_alt_next = EHCI_LIST_END(ehci);
704 * control requests may need a terminating data "status" ack;
705 * bulk ones may need a terminating short packet (zero length).
707 if (likely (urb->transfer_buffer_length != 0)) {
708 int one_more = 0;
710 if (usb_pipecontrol (urb->pipe)) {
711 one_more = 1;
712 token ^= 0x0100; /* "in" <--> "out" */
713 token |= QTD_TOGGLE; /* force DATA1 */
714 } else if (usb_pipebulk (urb->pipe)
715 && (urb->transfer_flags & URB_ZERO_PACKET)
716 && !(urb->transfer_buffer_length % maxpacket)) {
717 one_more = 1;
719 if (one_more) {
720 qtd_prev = qtd;
721 qtd = ehci_qtd_alloc (ehci, flags);
722 if (unlikely (!qtd))
723 goto cleanup;
724 qtd->urb = urb;
725 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
726 list_add_tail (&qtd->qtd_list, head);
728 /* never any data in such packets */
729 qtd_fill(ehci, qtd, 0, 0, token, 0);
733 /* by default, enable interrupt on urb completion */
734 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
735 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
736 return head;
738 cleanup:
739 qtd_list_free (ehci, urb, head);
740 return NULL;
743 /*-------------------------------------------------------------------------*/
745 // Would be best to create all qh's from config descriptors,
746 // when each interface/altsetting is established. Unlink
747 // any previous qh and cancel its urbs first; endpoints are
748 // implicitly reset then (data toggle too).
749 // That'd mean updating how usbcore talks to HCDs. (2.7?)
753 * Each QH holds a qtd list; a QH is used for everything except iso.
755 * For interrupt urbs, the scheduler must set the microframe scheduling
756 * mask(s) each time the QH gets scheduled. For highspeed, that's
757 * just one microframe in the s-mask. For split interrupt transactions
758 * there are additional complications: c-mask, maybe FSTNs.
760 static struct ehci_qh *
761 qh_make (
762 struct ehci_hcd *ehci,
763 struct urb *urb,
764 gfp_t flags
766 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
767 u32 info1 = 0, info2 = 0;
768 int is_input, type;
769 int maxp = 0;
770 struct usb_tt *tt = urb->dev->tt;
771 struct ehci_qh_hw *hw;
773 if (!qh)
774 return qh;
777 * init endpoint/device data for this QH
779 info1 |= usb_pipeendpoint (urb->pipe) << 8;
780 info1 |= usb_pipedevice (urb->pipe) << 0;
782 is_input = usb_pipein (urb->pipe);
783 type = usb_pipetype (urb->pipe);
784 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
786 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
787 * acts like up to 3KB, but is built from smaller packets.
789 if (max_packet(maxp) > 1024) {
790 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
791 goto done;
794 /* Compute interrupt scheduling parameters just once, and save.
795 * - allowing for high bandwidth, how many nsec/uframe are used?
796 * - split transactions need a second CSPLIT uframe; same question
797 * - splits also need a schedule gap (for full/low speed I/O)
798 * - qh has a polling interval
800 * For control/bulk requests, the HC or TT handles these.
802 if (type == PIPE_INTERRUPT) {
803 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
804 is_input, 0,
805 hb_mult(maxp) * max_packet(maxp)));
806 qh->start = NO_FRAME;
808 if (urb->dev->speed == USB_SPEED_HIGH) {
809 qh->c_usecs = 0;
810 qh->gap_uf = 0;
812 qh->period = urb->interval >> 3;
813 if (qh->period == 0 && urb->interval != 1) {
814 /* NOTE interval 2 or 4 uframes could work.
815 * But interval 1 scheduling is simpler, and
816 * includes high bandwidth.
818 dbg ("intr period %d uframes, NYET!",
819 urb->interval);
820 goto done;
822 } else {
823 int think_time;
825 /* gap is f(FS/LS transfer times) */
826 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
827 is_input, 0, maxp) / (125 * 1000);
829 /* FIXME this just approximates SPLIT/CSPLIT times */
830 if (is_input) { // SPLIT, gap, CSPLIT+DATA
831 qh->c_usecs = qh->usecs + HS_USECS (0);
832 qh->usecs = HS_USECS (1);
833 } else { // SPLIT+DATA, gap, CSPLIT
834 qh->usecs += HS_USECS (1);
835 qh->c_usecs = HS_USECS (0);
838 think_time = tt ? tt->think_time : 0;
839 qh->tt_usecs = NS_TO_US (think_time +
840 usb_calc_bus_time (urb->dev->speed,
841 is_input, 0, max_packet (maxp)));
842 qh->period = urb->interval;
846 /* support for tt scheduling, and access to toggles */
847 qh->dev = urb->dev;
849 /* using TT? */
850 switch (urb->dev->speed) {
851 case USB_SPEED_LOW:
852 info1 |= (1 << 12); /* EPS "low" */
853 /* FALL THROUGH */
855 case USB_SPEED_FULL:
856 /* EPS 0 means "full" */
857 if (type != PIPE_INTERRUPT)
858 info1 |= (EHCI_TUNE_RL_TT << 28);
859 if (type == PIPE_CONTROL) {
860 info1 |= (1 << 27); /* for TT */
861 info1 |= 1 << 14; /* toggle from qtd */
863 info1 |= maxp << 16;
865 info2 |= (EHCI_TUNE_MULT_TT << 30);
867 /* Some Freescale processors have an erratum in which the
868 * port number in the queue head was 0..N-1 instead of 1..N.
870 if (ehci_has_fsl_portno_bug(ehci))
871 info2 |= (urb->dev->ttport-1) << 23;
872 else
873 info2 |= urb->dev->ttport << 23;
875 /* set the address of the TT; for TDI's integrated
876 * root hub tt, leave it zeroed.
878 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
879 info2 |= tt->hub->devnum << 16;
881 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
883 break;
885 case USB_SPEED_HIGH: /* no TT involved */
886 info1 |= (2 << 12); /* EPS "high" */
887 if (type == PIPE_CONTROL) {
888 info1 |= (EHCI_TUNE_RL_HS << 28);
889 info1 |= 64 << 16; /* usb2 fixed maxpacket */
890 info1 |= 1 << 14; /* toggle from qtd */
891 info2 |= (EHCI_TUNE_MULT_HS << 30);
892 } else if (type == PIPE_BULK) {
893 info1 |= (EHCI_TUNE_RL_HS << 28);
894 /* The USB spec says that high speed bulk endpoints
895 * always use 512 byte maxpacket. But some device
896 * vendors decided to ignore that, and MSFT is happy
897 * to help them do so. So now people expect to use
898 * such nonconformant devices with Linux too; sigh.
900 info1 |= max_packet(maxp) << 16;
901 info2 |= (EHCI_TUNE_MULT_HS << 30);
902 } else { /* PIPE_INTERRUPT */
903 info1 |= max_packet (maxp) << 16;
904 info2 |= hb_mult (maxp) << 30;
906 break;
907 default:
908 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
909 done:
910 qh_put (qh);
911 return NULL;
914 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
916 /* init as live, toggle clear, advance to dummy */
917 qh->qh_state = QH_STATE_IDLE;
918 hw = qh->hw;
919 hw->hw_info1 = cpu_to_hc32(ehci, info1);
920 hw->hw_info2 = cpu_to_hc32(ehci, info2);
921 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
922 qh_refresh (ehci, qh);
923 return qh;
926 /*-------------------------------------------------------------------------*/
928 /* move qh (and its qtds) onto async queue; maybe enable queue. */
930 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
932 __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
933 struct ehci_qh *head;
935 /* Don't link a QH if there's a Clear-TT-Buffer pending */
936 if (unlikely(qh->clearing_tt))
937 return;
939 WARN_ON(qh->qh_state != QH_STATE_IDLE);
941 /* (re)start the async schedule? */
942 head = ehci->async;
943 timer_action_done (ehci, TIMER_ASYNC_OFF);
944 if (!head->qh_next.qh) {
945 u32 cmd = ehci_readl(ehci, &ehci->regs->command);
947 if (!(cmd & CMD_ASE)) {
948 /* in case a clear of CMD_ASE didn't take yet */
949 (void)handshake(ehci, &ehci->regs->status,
950 STS_ASS, 0, 150);
951 cmd |= CMD_ASE | CMD_RUN;
952 ehci_writel(ehci, cmd, &ehci->regs->command);
953 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
954 /* posted write need not be known to HC yet ... */
958 /* clear halt and/or toggle; and maybe recover from silicon quirk */
959 qh_refresh(ehci, qh);
961 /* splice right after start */
962 qh->qh_next = head->qh_next;
963 qh->hw->hw_next = head->hw->hw_next;
964 wmb ();
966 head->qh_next.qh = qh;
967 head->hw->hw_next = dma;
969 qh_get(qh);
970 qh->xacterrs = 0;
971 qh->qh_state = QH_STATE_LINKED;
972 /* qtd completions reported later by interrupt */
975 /*-------------------------------------------------------------------------*/
978 * For control/bulk/interrupt, return QH with these TDs appended.
979 * Allocates and initializes the QH if necessary.
980 * Returns null if it can't allocate a QH it needs to.
981 * If the QH has TDs (urbs) already, that's great.
983 static struct ehci_qh *qh_append_tds (
984 struct ehci_hcd *ehci,
985 struct urb *urb,
986 struct list_head *qtd_list,
987 int epnum,
988 void **ptr
991 struct ehci_qh *qh = NULL;
992 __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
994 qh = (struct ehci_qh *) *ptr;
995 if (unlikely (qh == NULL)) {
996 /* can't sleep here, we have ehci->lock... */
997 qh = qh_make (ehci, urb, GFP_ATOMIC);
998 *ptr = qh;
1000 if (likely (qh != NULL)) {
1001 struct ehci_qtd *qtd;
1003 if (unlikely (list_empty (qtd_list)))
1004 qtd = NULL;
1005 else
1006 qtd = list_entry (qtd_list->next, struct ehci_qtd,
1007 qtd_list);
1009 /* control qh may need patching ... */
1010 if (unlikely (epnum == 0)) {
1012 /* usb_reset_device() briefly reverts to address 0 */
1013 if (usb_pipedevice (urb->pipe) == 0)
1014 qh->hw->hw_info1 &= ~qh_addr_mask;
1017 /* just one way to queue requests: swap with the dummy qtd.
1018 * only hc or qh_refresh() ever modify the overlay.
1020 if (likely (qtd != NULL)) {
1021 struct ehci_qtd *dummy;
1022 dma_addr_t dma;
1023 __hc32 token;
1025 /* to avoid racing the HC, use the dummy td instead of
1026 * the first td of our list (becomes new dummy). both
1027 * tds stay deactivated until we're done, when the
1028 * HC is allowed to fetch the old dummy (4.10.2).
1030 token = qtd->hw_token;
1031 qtd->hw_token = HALT_BIT(ehci);
1032 wmb ();
1033 dummy = qh->dummy;
1035 dma = dummy->qtd_dma;
1036 *dummy = *qtd;
1037 dummy->qtd_dma = dma;
1039 list_del (&qtd->qtd_list);
1040 list_add (&dummy->qtd_list, qtd_list);
1041 list_splice_tail(qtd_list, &qh->qtd_list);
1043 ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1044 qh->dummy = qtd;
1046 /* hc must see the new dummy at list end */
1047 dma = qtd->qtd_dma;
1048 qtd = list_entry (qh->qtd_list.prev,
1049 struct ehci_qtd, qtd_list);
1050 qtd->hw_next = QTD_NEXT(ehci, dma);
1052 /* let the hc process these next qtds */
1053 wmb ();
1054 dummy->hw_token = token;
1056 urb->hcpriv = qh_get (qh);
1059 return qh;
1062 /*-------------------------------------------------------------------------*/
1064 static int
1065 submit_async (
1066 struct ehci_hcd *ehci,
1067 struct urb *urb,
1068 struct list_head *qtd_list,
1069 gfp_t mem_flags
1071 struct ehci_qtd *qtd;
1072 int epnum;
1073 unsigned long flags;
1074 struct ehci_qh *qh = NULL;
1075 int rc;
1077 qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
1078 epnum = urb->ep->desc.bEndpointAddress;
1080 #ifdef EHCI_URB_TRACE
1081 ehci_dbg (ehci,
1082 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1083 __func__, urb->dev->devpath, urb,
1084 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1085 urb->transfer_buffer_length,
1086 qtd, urb->ep->hcpriv);
1087 #endif
1089 spin_lock_irqsave (&ehci->lock, flags);
1090 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1091 &ehci_to_hcd(ehci)->flags))) {
1092 rc = -ESHUTDOWN;
1093 goto done;
1095 rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1096 if (unlikely(rc))
1097 goto done;
1099 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1100 if (unlikely(qh == NULL)) {
1101 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1102 rc = -ENOMEM;
1103 goto done;
1106 /* Control/bulk operations through TTs don't need scheduling,
1107 * the HC and TT handle it when the TT has a buffer ready.
1109 if (likely (qh->qh_state == QH_STATE_IDLE))
1110 qh_link_async(ehci, qh);
1111 done:
1112 spin_unlock_irqrestore (&ehci->lock, flags);
1113 if (unlikely (qh == NULL))
1114 qtd_list_free (ehci, urb, qtd_list);
1115 return rc;
1118 /*-------------------------------------------------------------------------*/
1120 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
1122 static void end_unlink_async (struct ehci_hcd *ehci)
1124 struct ehci_qh *qh = ehci->reclaim;
1125 struct ehci_qh *next;
1127 iaa_watchdog_done(ehci);
1129 // qh->hw_next = cpu_to_hc32(qh->qh_dma);
1130 qh->qh_state = QH_STATE_IDLE;
1131 qh->qh_next.qh = NULL;
1132 qh_put (qh); // refcount from reclaim
1134 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1135 next = qh->reclaim;
1136 ehci->reclaim = next;
1137 qh->reclaim = NULL;
1139 qh_completions (ehci, qh);
1141 if (!list_empty (&qh->qtd_list)
1142 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
1143 qh_link_async (ehci, qh);
1144 else {
1145 /* it's not free to turn the async schedule on/off; leave it
1146 * active but idle for a while once it empties.
1148 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1149 && ehci->async->qh_next.qh == NULL)
1150 timer_action (ehci, TIMER_ASYNC_OFF);
1152 qh_put(qh); /* refcount from async list */
1154 if (next) {
1155 ehci->reclaim = NULL;
1156 start_unlink_async (ehci, next);
1160 /* makes sure the async qh will become idle */
1161 /* caller must own ehci->lock */
1163 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1165 int cmd = ehci_readl(ehci, &ehci->regs->command);
1166 struct ehci_qh *prev;
1168 #ifdef DEBUG
1169 assert_spin_locked(&ehci->lock);
1170 if (ehci->reclaim
1171 || (qh->qh_state != QH_STATE_LINKED
1172 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1174 BUG ();
1175 #endif
1177 /* stop async schedule right now? */
1178 if (unlikely (qh == ehci->async)) {
1179 /* can't get here without STS_ASS set */
1180 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1181 && !ehci->reclaim) {
1182 /* ... and CMD_IAAD clear */
1183 ehci_writel(ehci, cmd & ~CMD_ASE,
1184 &ehci->regs->command);
1185 wmb ();
1186 // handshake later, if we need to
1187 timer_action_done (ehci, TIMER_ASYNC_OFF);
1189 return;
1192 qh->qh_state = QH_STATE_UNLINK;
1193 ehci->reclaim = qh = qh_get (qh);
1195 prev = ehci->async;
1196 while (prev->qh_next.qh != qh)
1197 prev = prev->qh_next.qh;
1199 prev->hw->hw_next = qh->hw->hw_next;
1200 prev->qh_next = qh->qh_next;
1201 wmb ();
1203 /* If the controller isn't running, we don't have to wait for it */
1204 if (unlikely(!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) {
1205 /* if (unlikely (qh->reclaim != 0))
1206 * this will recurse, probably not much
1208 end_unlink_async (ehci);
1209 return;
1212 cmd |= CMD_IAAD;
1213 ehci_writel(ehci, cmd, &ehci->regs->command);
1214 (void)ehci_readl(ehci, &ehci->regs->command);
1215 iaa_watchdog_start(ehci);
1218 /*-------------------------------------------------------------------------*/
1220 static void scan_async (struct ehci_hcd *ehci)
1222 struct ehci_qh *qh;
1223 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1225 ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
1226 timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1227 rescan:
1228 qh = ehci->async->qh_next.qh;
1229 if (likely (qh != NULL)) {
1230 do {
1231 /* clean any finished work for this qh */
1232 if (!list_empty (&qh->qtd_list)
1233 && qh->stamp != ehci->stamp) {
1234 int temp;
1236 /* unlinks could happen here; completion
1237 * reporting drops the lock. rescan using
1238 * the latest schedule, but don't rescan
1239 * qhs we already finished (no looping).
1241 qh = qh_get (qh);
1242 qh->stamp = ehci->stamp;
1243 temp = qh_completions (ehci, qh);
1244 if (qh->needs_rescan)
1245 unlink_async(ehci, qh);
1246 qh_put (qh);
1247 if (temp != 0) {
1248 goto rescan;
1252 /* unlink idle entries, reducing DMA usage as well
1253 * as HCD schedule-scanning costs. delay for any qh
1254 * we just scanned, there's a not-unusual case that it
1255 * doesn't stay idle for long.
1256 * (plus, avoids some kind of re-activation race.)
1258 if (list_empty(&qh->qtd_list)
1259 && qh->qh_state == QH_STATE_LINKED) {
1260 if (!ehci->reclaim
1261 && ((ehci->stamp - qh->stamp) & 0x1fff)
1262 >= (EHCI_SHRINK_FRAMES * 8))
1263 start_unlink_async(ehci, qh);
1264 else
1265 action = TIMER_ASYNC_SHRINK;
1268 qh = qh->qh_next.qh;
1269 } while (qh);
1271 if (action == TIMER_ASYNC_SHRINK)
1272 timer_action (ehci, TIMER_ASYNC_SHRINK);