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[ARM] pxa: update defconfig for Verdex Pro
[linux-2.6/verdex.git] / sound / pci / ice1712 / ice1712.c
blobd74033a2cfbe900553acfff24249127f97057098
1 /*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 /*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26 */
27
28 /*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50 #include <linux/io.h>
51 #include <linux/delay.h>
52 #include <linux/interrupt.h>
53 #include <linux/init.h>
54 #include <linux/pci.h>
55 #include <linux/dma-mapping.h>
56 #include <linux/slab.h>
57 #include <linux/moduleparam.h>
58 #include <linux/mutex.h>
59
60 #include <sound/core.h>
61 #include <sound/cs8427.h>
62 #include <sound/info.h>
63 #include <sound/initval.h>
64 #include <sound/tlv.h>
65
66 #include <sound/asoundef.h>
67
68 #include "ice1712.h"
69
70 /* lowlevel routines */
71 #include "delta.h"
72 #include "ews.h"
73 #include "hoontech.h"
74
75 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
76 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
77 MODULE_LICENSE("GPL");
78 MODULE_SUPPORTED_DEVICE("{"
79 HOONTECH_DEVICE_DESC
80 DELTA_DEVICE_DESC
81 EWS_DEVICE_DESC
82 "{ICEnsemble,Generic ICE1712},"
83 "{ICEnsemble,Generic Envy24}}");
84
85 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
86 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
87 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
88 static char *model[SNDRV_CARDS];
89 static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
90 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
91 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
92
93 module_param_array(index, int, NULL, 0444);
94 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
95 module_param_array(id, charp, NULL, 0444);
96 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
97 module_param_array(enable, bool, NULL, 0444);
98 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
99 module_param_array(omni, bool, NULL, 0444);
100 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
101 module_param_array(cs8427_timeout, int, NULL, 0444);
102 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
103 module_param_array(model, charp, NULL, 0444);
104 MODULE_PARM_DESC(model, "Use the given board model.");
105 module_param_array(dxr_enable, int, NULL, 0444);
106 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
107
108
109 static const struct pci_device_id snd_ice1712_ids[] = {
110 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
111 { 0, }
112 };
113
114 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
115
116 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
117 static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
118
119 static int PRO_RATE_LOCKED;
120 static int PRO_RATE_RESET = 1;
121 static unsigned int PRO_RATE_DEFAULT = 44100;
122
123 /*
124 * Basic I/O
125 */
126
127 /* check whether the clock mode is spdif-in */
128 static inline int is_spdif_master(struct snd_ice1712 *ice)
129 {
130 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
131 }
132
133 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
134 {
135 return is_spdif_master(ice) || PRO_RATE_LOCKED;
136 }
137
138 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
139 {
140 outb((channel << 4) | addr, ICEDS(ice, INDEX));
141 outl(data, ICEDS(ice, DATA));
142 }
143
144 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
145 {
146 outb((channel << 4) | addr, ICEDS(ice, INDEX));
147 return inl(ICEDS(ice, DATA));
148 }
149
150 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
151 unsigned short reg,
152 unsigned short val)
153 {
154 struct snd_ice1712 *ice = ac97->private_data;
155 int tm;
156 unsigned char old_cmd = 0;
157
158 for (tm = 0; tm < 0x10000; tm++) {
159 old_cmd = inb(ICEREG(ice, AC97_CMD));
160 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
161 continue;
162 if (!(old_cmd & ICE1712_AC97_READY))
163 continue;
164 break;
165 }
166 outb(reg, ICEREG(ice, AC97_INDEX));
167 outw(val, ICEREG(ice, AC97_DATA));
168 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
169 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
170 for (tm = 0; tm < 0x10000; tm++)
171 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
172 break;
173 }
174
175 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
176 unsigned short reg)
177 {
178 struct snd_ice1712 *ice = ac97->private_data;
179 int tm;
180 unsigned char old_cmd = 0;
181
182 for (tm = 0; tm < 0x10000; tm++) {
183 old_cmd = inb(ICEREG(ice, AC97_CMD));
184 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
185 continue;
186 if (!(old_cmd & ICE1712_AC97_READY))
187 continue;
188 break;
189 }
190 outb(reg, ICEREG(ice, AC97_INDEX));
191 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
192 for (tm = 0; tm < 0x10000; tm++)
193 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
194 break;
195 if (tm >= 0x10000) /* timeout */
196 return ~0;
197 return inw(ICEREG(ice, AC97_DATA));
198 }
199
200 /*
201 * pro ac97 section
202 */
203
204 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
205 unsigned short reg,
206 unsigned short val)
207 {
208 struct snd_ice1712 *ice = ac97->private_data;
209 int tm;
210 unsigned char old_cmd = 0;
211
212 for (tm = 0; tm < 0x10000; tm++) {
213 old_cmd = inb(ICEMT(ice, AC97_CMD));
214 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
215 continue;
216 if (!(old_cmd & ICE1712_AC97_READY))
217 continue;
218 break;
219 }
220 outb(reg, ICEMT(ice, AC97_INDEX));
221 outw(val, ICEMT(ice, AC97_DATA));
222 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
223 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
224 for (tm = 0; tm < 0x10000; tm++)
225 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
226 break;
227 }
228
229
230 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
231 unsigned short reg)
232 {
233 struct snd_ice1712 *ice = ac97->private_data;
234 int tm;
235 unsigned char old_cmd = 0;
236
237 for (tm = 0; tm < 0x10000; tm++) {
238 old_cmd = inb(ICEMT(ice, AC97_CMD));
239 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
240 continue;
241 if (!(old_cmd & ICE1712_AC97_READY))
242 continue;
243 break;
244 }
245 outb(reg, ICEMT(ice, AC97_INDEX));
246 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
247 for (tm = 0; tm < 0x10000; tm++)
248 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
249 break;
250 if (tm >= 0x10000) /* timeout */
251 return ~0;
252 return inw(ICEMT(ice, AC97_DATA));
253 }
254
255 /*
256 * consumer ac97 digital mix
257 */
258 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
259
260 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
261 {
262 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
263
264 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
265 return 0;
266 }
267
268 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
269 {
270 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
271 unsigned char val, nval;
272
273 spin_lock_irq(&ice->reg_lock);
274 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
275 nval = val & ~ICE1712_ROUTE_AC97;
276 if (ucontrol->value.integer.value[0])
277 nval |= ICE1712_ROUTE_AC97;
278 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
279 spin_unlock_irq(&ice->reg_lock);
280 return val != nval;
281 }
282
283 static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
284 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
285 .name = "Digital Mixer To AC97",
286 .info = snd_ice1712_digmix_route_ac97_info,
287 .get = snd_ice1712_digmix_route_ac97_get,
288 .put = snd_ice1712_digmix_route_ac97_put,
289 };
290
291
292 /*
293 * gpio operations
294 */
295 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
296 {
297 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
298 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
299 }
300
301 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
302 {
303 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
304 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
305 }
306
307 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
308 {
309 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
310 }
311
312 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
313 {
314 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
315 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
316 }
317
318 /*
319 *
320 * CS8427 interface
321 *
322 */
323
324 /*
325 * change the input clock selection
326 * spdif_clock = 1 - IEC958 input, 0 - Envy24
327 */
328 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
329 {
330 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
331 unsigned char val, nval;
332 int res = 0;
333
334 snd_i2c_lock(ice->i2c);
335 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
336 snd_i2c_unlock(ice->i2c);
337 return -EIO;
338 }
339 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
340 snd_i2c_unlock(ice->i2c);
341 return -EIO;
342 }
343 nval = val & 0xf0;
344 if (spdif_clock)
345 nval |= 0x01;
346 else
347 nval |= 0x04;
348 if (val != nval) {
349 reg[1] = nval;
350 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
351 res = -EIO;
352 } else {
353 res++;
354 }
355 }
356 snd_i2c_unlock(ice->i2c);
357 return res;
358 }
359
360 /*
361 * spdif callbacks
362 */
363 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
364 {
365 snd_cs8427_iec958_active(ice->cs8427, 1);
366 }
367
368 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
369 {
370 snd_cs8427_iec958_active(ice->cs8427, 0);
371 }
372
373 static void setup_cs8427(struct snd_ice1712 *ice, int rate)
374 {
375 snd_cs8427_iec958_pcm(ice->cs8427, rate);
376 }
377
378 /*
379 * create and initialize callbacks for cs8427 interface
380 */
381 int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
382 {
383 int err;
384
385 err = snd_cs8427_create(ice->i2c, addr,
386 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
387 if (err < 0) {
388 snd_printk(KERN_ERR "CS8427 initialization failed\n");
389 return err;
390 }
391 ice->spdif.ops.open = open_cs8427;
392 ice->spdif.ops.close = close_cs8427;
393 ice->spdif.ops.setup_rate = setup_cs8427;
394 return 0;
395 }
396
397 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
398 {
399 /* change CS8427 clock source too */
400 if (ice->cs8427)
401 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
402 /* notify ak4524 chip as well */
403 if (spdif_is_master) {
404 unsigned int i;
405 for (i = 0; i < ice->akm_codecs; i++) {
406 if (ice->akm[i].ops.set_rate_val)
407 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
408 }
409 }
410 }
411
412 /*
413 * Interrupt handler
414 */
415
416 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
417 {
418 struct snd_ice1712 *ice = dev_id;
419 unsigned char status;
420 int handled = 0;
421
422 while (1) {
423 status = inb(ICEREG(ice, IRQSTAT));
424 if (status == 0)
425 break;
426 handled = 1;
427 if (status & ICE1712_IRQ_MPU1) {
428 if (ice->rmidi[0])
429 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
430 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
431 status &= ~ICE1712_IRQ_MPU1;
432 }
433 if (status & ICE1712_IRQ_TIMER)
434 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
435 if (status & ICE1712_IRQ_MPU2) {
436 if (ice->rmidi[1])
437 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
438 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
439 status &= ~ICE1712_IRQ_MPU2;
440 }
441 if (status & ICE1712_IRQ_PROPCM) {
442 unsigned char mtstat = inb(ICEMT(ice, IRQ));
443 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
444 if (ice->playback_pro_substream)
445 snd_pcm_period_elapsed(ice->playback_pro_substream);
446 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
447 }
448 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
449 if (ice->capture_pro_substream)
450 snd_pcm_period_elapsed(ice->capture_pro_substream);
451 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
452 }
453 }
454 if (status & ICE1712_IRQ_FM)
455 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
456 if (status & ICE1712_IRQ_PBKDS) {
457 u32 idx;
458 u16 pbkstatus;
459 struct snd_pcm_substream *substream;
460 pbkstatus = inw(ICEDS(ice, INTSTAT));
461 /* printk(KERN_DEBUG "pbkstatus = 0x%x\n", pbkstatus); */
462 for (idx = 0; idx < 6; idx++) {
463 if ((pbkstatus & (3 << (idx * 2))) == 0)
464 continue;
465 substream = ice->playback_con_substream_ds[idx];
466 if (substream != NULL)
467 snd_pcm_period_elapsed(substream);
468 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
469 }
470 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
471 }
472 if (status & ICE1712_IRQ_CONCAP) {
473 if (ice->capture_con_substream)
474 snd_pcm_period_elapsed(ice->capture_con_substream);
475 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
476 }
477 if (status & ICE1712_IRQ_CONPBK) {
478 if (ice->playback_con_substream)
479 snd_pcm_period_elapsed(ice->playback_con_substream);
480 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
481 }
482 }
483 return IRQ_RETVAL(handled);
484 }
485
486
487 /*
488 * PCM part - misc
489 */
490
491 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
492 struct snd_pcm_hw_params *hw_params)
493 {
494 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
495 }
496
497 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
498 {
499 return snd_pcm_lib_free_pages(substream);
500 }
501
502 /*
503 * PCM part - consumer I/O
504 */
505
506 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
507 int cmd)
508 {
509 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
510 int result = 0;
511 u32 tmp;
512
513 spin_lock(&ice->reg_lock);
514 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
515 if (cmd == SNDRV_PCM_TRIGGER_START) {
516 tmp |= 1;
517 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
518 tmp &= ~1;
519 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
520 tmp |= 2;
521 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
522 tmp &= ~2;
523 } else {
524 result = -EINVAL;
525 }
526 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
527 spin_unlock(&ice->reg_lock);
528 return result;
529 }
530
531 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
532 int cmd)
533 {
534 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
535 int result = 0;
536 u32 tmp;
537
538 spin_lock(&ice->reg_lock);
539 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
540 if (cmd == SNDRV_PCM_TRIGGER_START) {
541 tmp |= 1;
542 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
543 tmp &= ~1;
544 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
545 tmp |= 2;
546 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
547 tmp &= ~2;
548 } else {
549 result = -EINVAL;
550 }
551 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
552 spin_unlock(&ice->reg_lock);
553 return result;
554 }
555
556 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
557 int cmd)
558 {
559 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
560 int result = 0;
561 u8 tmp;
562
563 spin_lock(&ice->reg_lock);
564 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
565 if (cmd == SNDRV_PCM_TRIGGER_START) {
566 tmp |= 1;
567 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
568 tmp &= ~1;
569 } else {
570 result = -EINVAL;
571 }
572 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
573 spin_unlock(&ice->reg_lock);
574 return result;
575 }
576
577 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
578 {
579 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
580 struct snd_pcm_runtime *runtime = substream->runtime;
581 u32 period_size, buf_size, rate, tmp;
582
583 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
584 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
585 tmp = 0x0000;
586 if (snd_pcm_format_width(runtime->format) == 16)
587 tmp |= 0x10;
588 if (runtime->channels == 2)
589 tmp |= 0x08;
590 rate = (runtime->rate * 8192) / 375;
591 if (rate > 0x000fffff)
592 rate = 0x000fffff;
593 spin_lock_irq(&ice->reg_lock);
594 outb(0, ice->ddma_port + 15);
595 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
596 outl(runtime->dma_addr, ice->ddma_port + 0);
597 outw(buf_size, ice->ddma_port + 4);
598 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
599 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
600 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
601 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
602 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
603 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
604 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
605 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
606 spin_unlock_irq(&ice->reg_lock);
607 return 0;
608 }
609
610 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
611 {
612 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
613 struct snd_pcm_runtime *runtime = substream->runtime;
614 u32 period_size, buf_size, rate, tmp, chn;
615
616 period_size = snd_pcm_lib_period_bytes(substream) - 1;
617 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
618 tmp = 0x0064;
619 if (snd_pcm_format_width(runtime->format) == 16)
620 tmp &= ~0x04;
621 if (runtime->channels == 2)
622 tmp |= 0x08;
623 rate = (runtime->rate * 8192) / 375;
624 if (rate > 0x000fffff)
625 rate = 0x000fffff;
626 ice->playback_con_active_buf[substream->number] = 0;
627 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
628 chn = substream->number * 2;
629 spin_lock_irq(&ice->reg_lock);
630 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
631 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
632 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
633 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
634 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
635 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
636 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
637 if (runtime->channels == 2) {
638 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
639 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
640 }
641 spin_unlock_irq(&ice->reg_lock);
642 return 0;
643 }
644
645 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
646 {
647 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
648 struct snd_pcm_runtime *runtime = substream->runtime;
649 u32 period_size, buf_size;
650 u8 tmp;
651
652 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
653 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
654 tmp = 0x06;
655 if (snd_pcm_format_width(runtime->format) == 16)
656 tmp &= ~0x04;
657 if (runtime->channels == 2)
658 tmp &= ~0x02;
659 spin_lock_irq(&ice->reg_lock);
660 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
661 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
662 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
663 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
664 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
665 spin_unlock_irq(&ice->reg_lock);
666 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
667 return 0;
668 }
669
670 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
671 {
672 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
673 struct snd_pcm_runtime *runtime = substream->runtime;
674 size_t ptr;
675
676 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
677 return 0;
678 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
679 if (ptr == runtime->buffer_size)
680 ptr = 0;
681 return bytes_to_frames(substream->runtime, ptr);
682 }
683
684 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
685 {
686 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
687 u8 addr;
688 size_t ptr;
689
690 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
691 return 0;
692 if (ice->playback_con_active_buf[substream->number])
693 addr = ICE1712_DSC_ADDR1;
694 else
695 addr = ICE1712_DSC_ADDR0;
696 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
697 ice->playback_con_virt_addr[substream->number];
698 if (ptr == substream->runtime->buffer_size)
699 ptr = 0;
700 return bytes_to_frames(substream->runtime, ptr);
701 }
702
703 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
704 {
705 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
706 size_t ptr;
707
708 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
709 return 0;
710 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
711 if (ptr == substream->runtime->buffer_size)
712 ptr = 0;
713 return bytes_to_frames(substream->runtime, ptr);
714 }
715
716 static const struct snd_pcm_hardware snd_ice1712_playback = {
717 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
718 SNDRV_PCM_INFO_BLOCK_TRANSFER |
719 SNDRV_PCM_INFO_MMAP_VALID |
720 SNDRV_PCM_INFO_PAUSE),
721 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
722 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
723 .rate_min = 4000,
724 .rate_max = 48000,
725 .channels_min = 1,
726 .channels_max = 2,
727 .buffer_bytes_max = (64*1024),
728 .period_bytes_min = 64,
729 .period_bytes_max = (64*1024),
730 .periods_min = 1,
731 .periods_max = 1024,
732 .fifo_size = 0,
733 };
734
735 static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
736 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
737 SNDRV_PCM_INFO_BLOCK_TRANSFER |
738 SNDRV_PCM_INFO_MMAP_VALID |
739 SNDRV_PCM_INFO_PAUSE),
740 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
741 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
742 .rate_min = 4000,
743 .rate_max = 48000,
744 .channels_min = 1,
745 .channels_max = 2,
746 .buffer_bytes_max = (128*1024),
747 .period_bytes_min = 64,
748 .period_bytes_max = (128*1024),
749 .periods_min = 2,
750 .periods_max = 2,
751 .fifo_size = 0,
752 };
753
754 static const struct snd_pcm_hardware snd_ice1712_capture = {
755 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
756 SNDRV_PCM_INFO_BLOCK_TRANSFER |
757 SNDRV_PCM_INFO_MMAP_VALID),
758 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
759 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
760 .rate_min = 4000,
761 .rate_max = 48000,
762 .channels_min = 1,
763 .channels_max = 2,
764 .buffer_bytes_max = (64*1024),
765 .period_bytes_min = 64,
766 .period_bytes_max = (64*1024),
767 .periods_min = 1,
768 .periods_max = 1024,
769 .fifo_size = 0,
770 };
771
772 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
773 {
774 struct snd_pcm_runtime *runtime = substream->runtime;
775 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
776
777 ice->playback_con_substream = substream;
778 runtime->hw = snd_ice1712_playback;
779 return 0;
780 }
781
782 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
783 {
784 struct snd_pcm_runtime *runtime = substream->runtime;
785 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
786 u32 tmp;
787
788 ice->playback_con_substream_ds[substream->number] = substream;
789 runtime->hw = snd_ice1712_playback_ds;
790 spin_lock_irq(&ice->reg_lock);
791 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
792 outw(tmp, ICEDS(ice, INTMASK));
793 spin_unlock_irq(&ice->reg_lock);
794 return 0;
795 }
796
797 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
798 {
799 struct snd_pcm_runtime *runtime = substream->runtime;
800 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
801
802 ice->capture_con_substream = substream;
803 runtime->hw = snd_ice1712_capture;
804 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
805 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
806 runtime->hw.rate_min = 48000;
807 return 0;
808 }
809
810 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
811 {
812 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
813
814 ice->playback_con_substream = NULL;
815 return 0;
816 }
817
818 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
819 {
820 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
821 u32 tmp;
822
823 spin_lock_irq(&ice->reg_lock);
824 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
825 outw(tmp, ICEDS(ice, INTMASK));
826 spin_unlock_irq(&ice->reg_lock);
827 ice->playback_con_substream_ds[substream->number] = NULL;
828 return 0;
829 }
830
831 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
832 {
833 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
834
835 ice->capture_con_substream = NULL;
836 return 0;
837 }
838
839 static struct snd_pcm_ops snd_ice1712_playback_ops = {
840 .open = snd_ice1712_playback_open,
841 .close = snd_ice1712_playback_close,
842 .ioctl = snd_pcm_lib_ioctl,
843 .hw_params = snd_ice1712_hw_params,
844 .hw_free = snd_ice1712_hw_free,
845 .prepare = snd_ice1712_playback_prepare,
846 .trigger = snd_ice1712_playback_trigger,
847 .pointer = snd_ice1712_playback_pointer,
848 };
849
850 static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
851 .open = snd_ice1712_playback_ds_open,
852 .close = snd_ice1712_playback_ds_close,
853 .ioctl = snd_pcm_lib_ioctl,
854 .hw_params = snd_ice1712_hw_params,
855 .hw_free = snd_ice1712_hw_free,
856 .prepare = snd_ice1712_playback_ds_prepare,
857 .trigger = snd_ice1712_playback_ds_trigger,
858 .pointer = snd_ice1712_playback_ds_pointer,
859 };
860
861 static struct snd_pcm_ops snd_ice1712_capture_ops = {
862 .open = snd_ice1712_capture_open,
863 .close = snd_ice1712_capture_close,
864 .ioctl = snd_pcm_lib_ioctl,
865 .hw_params = snd_ice1712_hw_params,
866 .hw_free = snd_ice1712_hw_free,
867 .prepare = snd_ice1712_capture_prepare,
868 .trigger = snd_ice1712_capture_trigger,
869 .pointer = snd_ice1712_capture_pointer,
870 };
871
872 static int __devinit snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
873 {
874 struct snd_pcm *pcm;
875 int err;
876
877 if (rpcm)
878 *rpcm = NULL;
879 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
880 if (err < 0)
881 return err;
882
883 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
884 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
885
886 pcm->private_data = ice;
887 pcm->info_flags = 0;
888 strcpy(pcm->name, "ICE1712 consumer");
889 ice->pcm = pcm;
890
891 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
892 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
893
894 if (rpcm)
895 *rpcm = pcm;
896
897 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
898
899 return 0;
900 }
901
902 static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
903 {
904 struct snd_pcm *pcm;
905 int err;
906
907 if (rpcm)
908 *rpcm = NULL;
909 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
910 if (err < 0)
911 return err;
912
913 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
914
915 pcm->private_data = ice;
916 pcm->info_flags = 0;
917 strcpy(pcm->name, "ICE1712 consumer (DS)");
918 ice->pcm_ds = pcm;
919
920 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
921 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
922
923 if (rpcm)
924 *rpcm = pcm;
925
926 return 0;
927 }
928
929 /*
930 * PCM code - professional part (multitrack)
931 */
932
933 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
934 32000, 44100, 48000, 64000, 88200, 96000 };
935
936 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
937 .count = ARRAY_SIZE(rates),
938 .list = rates,
939 .mask = 0,
940 };
941
942 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
943 int cmd)
944 {
945 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
946 switch (cmd) {
947 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
948 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
949 {
950 unsigned int what;
951 unsigned int old;
952 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
953 return -EINVAL;
954 what = ICE1712_PLAYBACK_PAUSE;
955 snd_pcm_trigger_done(substream, substream);
956 spin_lock(&ice->reg_lock);
957 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
958 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
959 old |= what;
960 else
961 old &= ~what;
962 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
963 spin_unlock(&ice->reg_lock);
964 break;
965 }
966 case SNDRV_PCM_TRIGGER_START:
967 case SNDRV_PCM_TRIGGER_STOP:
968 {
969 unsigned int what = 0;
970 unsigned int old;
971 struct snd_pcm_substream *s;
972
973 snd_pcm_group_for_each_entry(s, substream) {
974 if (s == ice->playback_pro_substream) {
975 what |= ICE1712_PLAYBACK_START;
976 snd_pcm_trigger_done(s, substream);
977 } else if (s == ice->capture_pro_substream) {
978 what |= ICE1712_CAPTURE_START_SHADOW;
979 snd_pcm_trigger_done(s, substream);
980 }
981 }
982 spin_lock(&ice->reg_lock);
983 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
984 if (cmd == SNDRV_PCM_TRIGGER_START)
985 old |= what;
986 else
987 old &= ~what;
988 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
989 spin_unlock(&ice->reg_lock);
990 break;
991 }
992 default:
993 return -EINVAL;
994 }
995 return 0;
996 }
997
998 /*
999 */
1000 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1001 {
1002 unsigned long flags;
1003 unsigned char val, old;
1004 unsigned int i;
1005
1006 switch (rate) {
1007 case 8000: val = 6; break;
1008 case 9600: val = 3; break;
1009 case 11025: val = 10; break;
1010 case 12000: val = 2; break;
1011 case 16000: val = 5; break;
1012 case 22050: val = 9; break;
1013 case 24000: val = 1; break;
1014 case 32000: val = 4; break;
1015 case 44100: val = 8; break;
1016 case 48000: val = 0; break;
1017 case 64000: val = 15; break;
1018 case 88200: val = 11; break;
1019 case 96000: val = 7; break;
1020 default:
1021 snd_BUG();
1022 val = 0;
1023 rate = 48000;
1024 break;
1025 }
1026
1027 spin_lock_irqsave(&ice->reg_lock, flags);
1028 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1029 ICE1712_PLAYBACK_PAUSE|
1030 ICE1712_PLAYBACK_START)) {
1031 __out:
1032 spin_unlock_irqrestore(&ice->reg_lock, flags);
1033 return;
1034 }
1035 if (!force && is_pro_rate_locked(ice))
1036 goto __out;
1037
1038 old = inb(ICEMT(ice, RATE));
1039 if (!force && old == val)
1040 goto __out;
1041 outb(val, ICEMT(ice, RATE));
1042 spin_unlock_irqrestore(&ice->reg_lock, flags);
1043
1044 if (ice->gpio.set_pro_rate)
1045 ice->gpio.set_pro_rate(ice, rate);
1046 for (i = 0; i < ice->akm_codecs; i++) {
1047 if (ice->akm[i].ops.set_rate_val)
1048 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1049 }
1050 if (ice->spdif.ops.setup_rate)
1051 ice->spdif.ops.setup_rate(ice, rate);
1052 }
1053
1054 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1055 {
1056 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1057
1058 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1059 spin_lock_irq(&ice->reg_lock);
1060 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1061 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1062 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1063 spin_unlock_irq(&ice->reg_lock);
1064
1065 return 0;
1066 }
1067
1068 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1069 struct snd_pcm_hw_params *hw_params)
1070 {
1071 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1072
1073 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1074 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1075 }
1076
1077 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1078 {
1079 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1080
1081 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1082 spin_lock_irq(&ice->reg_lock);
1083 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1084 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1085 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1086 spin_unlock_irq(&ice->reg_lock);
1087 return 0;
1088 }
1089
1090 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1091 struct snd_pcm_hw_params *hw_params)
1092 {
1093 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1094
1095 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1096 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1097 }
1098
1099 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1100 {
1101 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1102 size_t ptr;
1103
1104 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1105 return 0;
1106 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1107 if (ptr == substream->runtime->buffer_size)
1108 ptr = 0;
1109 return bytes_to_frames(substream->runtime, ptr);
1110 }
1111
1112 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1113 {
1114 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1115 size_t ptr;
1116
1117 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1118 return 0;
1119 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1120 if (ptr == substream->runtime->buffer_size)
1121 ptr = 0;
1122 return bytes_to_frames(substream->runtime, ptr);
1123 }
1124
1125 static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1126 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1127 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1128 SNDRV_PCM_INFO_MMAP_VALID |
1129 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1130 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1131 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1132 .rate_min = 4000,
1133 .rate_max = 96000,
1134 .channels_min = 10,
1135 .channels_max = 10,
1136 .buffer_bytes_max = (256*1024),
1137 .period_bytes_min = 10 * 4 * 2,
1138 .period_bytes_max = 131040,
1139 .periods_min = 1,
1140 .periods_max = 1024,
1141 .fifo_size = 0,
1142 };
1143
1144 static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1145 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1146 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1147 SNDRV_PCM_INFO_MMAP_VALID |
1148 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1149 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1150 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1151 .rate_min = 4000,
1152 .rate_max = 96000,
1153 .channels_min = 12,
1154 .channels_max = 12,
1155 .buffer_bytes_max = (256*1024),
1156 .period_bytes_min = 12 * 4 * 2,
1157 .period_bytes_max = 131040,
1158 .periods_min = 1,
1159 .periods_max = 1024,
1160 .fifo_size = 0,
1161 };
1162
1163 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1164 {
1165 struct snd_pcm_runtime *runtime = substream->runtime;
1166 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1167
1168 ice->playback_pro_substream = substream;
1169 runtime->hw = snd_ice1712_playback_pro;
1170 snd_pcm_set_sync(substream);
1171 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1172 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1173
1174 if (ice->spdif.ops.open)
1175 ice->spdif.ops.open(ice, substream);
1176
1177 return 0;
1178 }
1179
1180 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1181 {
1182 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1183 struct snd_pcm_runtime *runtime = substream->runtime;
1184
1185 ice->capture_pro_substream = substream;
1186 runtime->hw = snd_ice1712_capture_pro;
1187 snd_pcm_set_sync(substream);
1188 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1189 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1190 return 0;
1191 }
1192
1193 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1194 {
1195 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1196
1197 if (PRO_RATE_RESET)
1198 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1199 ice->playback_pro_substream = NULL;
1200 if (ice->spdif.ops.close)
1201 ice->spdif.ops.close(ice, substream);
1202
1203 return 0;
1204 }
1205
1206 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1207 {
1208 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1209
1210 if (PRO_RATE_RESET)
1211 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1212 ice->capture_pro_substream = NULL;
1213 return 0;
1214 }
1215
1216 static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1217 .open = snd_ice1712_playback_pro_open,
1218 .close = snd_ice1712_playback_pro_close,
1219 .ioctl = snd_pcm_lib_ioctl,
1220 .hw_params = snd_ice1712_playback_pro_hw_params,
1221 .hw_free = snd_ice1712_hw_free,
1222 .prepare = snd_ice1712_playback_pro_prepare,
1223 .trigger = snd_ice1712_pro_trigger,
1224 .pointer = snd_ice1712_playback_pro_pointer,
1225 };
1226
1227 static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1228 .open = snd_ice1712_capture_pro_open,
1229 .close = snd_ice1712_capture_pro_close,
1230 .ioctl = snd_pcm_lib_ioctl,
1231 .hw_params = snd_ice1712_capture_pro_hw_params,
1232 .hw_free = snd_ice1712_hw_free,
1233 .prepare = snd_ice1712_capture_pro_prepare,
1234 .trigger = snd_ice1712_pro_trigger,
1235 .pointer = snd_ice1712_capture_pro_pointer,
1236 };
1237
1238 static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1239 {
1240 struct snd_pcm *pcm;
1241 int err;
1242
1243 if (rpcm)
1244 *rpcm = NULL;
1245 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1246 if (err < 0)
1247 return err;
1248
1249 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1250 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1251
1252 pcm->private_data = ice;
1253 pcm->info_flags = 0;
1254 strcpy(pcm->name, "ICE1712 multi");
1255
1256 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1257 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1258
1259 ice->pcm_pro = pcm;
1260 if (rpcm)
1261 *rpcm = pcm;
1262
1263 if (ice->cs8427) {
1264 /* assign channels to iec958 */
1265 err = snd_cs8427_iec958_build(ice->cs8427,
1266 pcm->streams[0].substream,
1267 pcm->streams[1].substream);
1268 if (err < 0)
1269 return err;
1270 }
1271
1272 err = snd_ice1712_build_pro_mixer(ice);
1273 if (err < 0)
1274 return err;
1275 return 0;
1276 }
1277
1278 /*
1279 * Mixer section
1280 */
1281
1282 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1283 {
1284 unsigned int vol = ice->pro_volumes[index];
1285 unsigned short val = 0;
1286
1287 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1288 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1289 outb(index, ICEMT(ice, MONITOR_INDEX));
1290 outw(val, ICEMT(ice, MONITOR_VOLUME));
1291 }
1292
1293 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1294
1295 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1296 {
1297 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1298 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1299 kcontrol->private_value;
1300
1301 spin_lock_irq(&ice->reg_lock);
1302 ucontrol->value.integer.value[0] =
1303 !((ice->pro_volumes[priv_idx] >> 15) & 1);
1304 ucontrol->value.integer.value[1] =
1305 !((ice->pro_volumes[priv_idx] >> 31) & 1);
1306 spin_unlock_irq(&ice->reg_lock);
1307 return 0;
1308 }
1309
1310 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1311 {
1312 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1313 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1314 kcontrol->private_value;
1315 unsigned int nval, change;
1316
1317 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1318 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1319 spin_lock_irq(&ice->reg_lock);
1320 nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1321 change = nval != ice->pro_volumes[priv_idx];
1322 ice->pro_volumes[priv_idx] = nval;
1323 snd_ice1712_update_volume(ice, priv_idx);
1324 spin_unlock_irq(&ice->reg_lock);
1325 return change;
1326 }
1327
1328 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1329 {
1330 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1331 uinfo->count = 2;
1332 uinfo->value.integer.min = 0;
1333 uinfo->value.integer.max = 96;
1334 return 0;
1335 }
1336
1337 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1338 {
1339 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1340 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1341 kcontrol->private_value;
1342
1343 spin_lock_irq(&ice->reg_lock);
1344 ucontrol->value.integer.value[0] =
1345 (ice->pro_volumes[priv_idx] >> 0) & 127;
1346 ucontrol->value.integer.value[1] =
1347 (ice->pro_volumes[priv_idx] >> 16) & 127;
1348 spin_unlock_irq(&ice->reg_lock);
1349 return 0;
1350 }
1351
1352 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1353 {
1354 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1355 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1356 kcontrol->private_value;
1357 unsigned int nval, change;
1358
1359 nval = (ucontrol->value.integer.value[0] & 127) |
1360 ((ucontrol->value.integer.value[1] & 127) << 16);
1361 spin_lock_irq(&ice->reg_lock);
1362 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1363 change = nval != ice->pro_volumes[priv_idx];
1364 ice->pro_volumes[priv_idx] = nval;
1365 snd_ice1712_update_volume(ice, priv_idx);
1366 spin_unlock_irq(&ice->reg_lock);
1367 return change;
1368 }
1369
1370 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1371
1372 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
1373 {
1374 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1375 .name = "Multi Playback Switch",
1376 .info = snd_ice1712_pro_mixer_switch_info,
1377 .get = snd_ice1712_pro_mixer_switch_get,
1378 .put = snd_ice1712_pro_mixer_switch_put,
1379 .private_value = 0,
1380 .count = 10,
1381 },
1382 {
1383 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1384 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1385 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1386 .name = "Multi Playback Volume",
1387 .info = snd_ice1712_pro_mixer_volume_info,
1388 .get = snd_ice1712_pro_mixer_volume_get,
1389 .put = snd_ice1712_pro_mixer_volume_put,
1390 .private_value = 0,
1391 .count = 10,
1392 .tlv = { .p = db_scale_playback }
1393 },
1394 };
1395
1396 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
1397 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1398 .name = "H/W Multi Capture Switch",
1399 .info = snd_ice1712_pro_mixer_switch_info,
1400 .get = snd_ice1712_pro_mixer_switch_get,
1401 .put = snd_ice1712_pro_mixer_switch_put,
1402 .private_value = 10,
1403 };
1404
1405 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
1406 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1407 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1408 .info = snd_ice1712_pro_mixer_switch_info,
1409 .get = snd_ice1712_pro_mixer_switch_get,
1410 .put = snd_ice1712_pro_mixer_switch_put,
1411 .private_value = 18,
1412 .count = 2,
1413 };
1414
1415 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
1416 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1417 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1418 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1419 .name = "H/W Multi Capture Volume",
1420 .info = snd_ice1712_pro_mixer_volume_info,
1421 .get = snd_ice1712_pro_mixer_volume_get,
1422 .put = snd_ice1712_pro_mixer_volume_put,
1423 .private_value = 10,
1424 .tlv = { .p = db_scale_playback }
1425 };
1426
1427 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
1428 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1429 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1430 .info = snd_ice1712_pro_mixer_volume_info,
1431 .get = snd_ice1712_pro_mixer_volume_get,
1432 .put = snd_ice1712_pro_mixer_volume_put,
1433 .private_value = 18,
1434 .count = 2,
1435 };
1436
1437 static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1438 {
1439 struct snd_card *card = ice->card;
1440 unsigned int idx;
1441 int err;
1442
1443 /* multi-channel mixer */
1444 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1445 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1446 if (err < 0)
1447 return err;
1448 }
1449
1450 if (ice->num_total_adcs > 0) {
1451 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1452 tmp.count = ice->num_total_adcs;
1453 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1454 if (err < 0)
1455 return err;
1456 }
1457
1458 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1459 if (err < 0)
1460 return err;
1461
1462 if (ice->num_total_adcs > 0) {
1463 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1464 tmp.count = ice->num_total_adcs;
1465 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1466 if (err < 0)
1467 return err;
1468 }
1469
1470 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1471 if (err < 0)
1472 return err;
1473
1474 /* initialize volumes */
1475 for (idx = 0; idx < 10; idx++) {
1476 ice->pro_volumes[idx] = 0x80008000; /* mute */
1477 snd_ice1712_update_volume(ice, idx);
1478 }
1479 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1480 ice->pro_volumes[idx] = 0x80008000; /* mute */
1481 snd_ice1712_update_volume(ice, idx);
1482 }
1483 for (idx = 18; idx < 20; idx++) {
1484 ice->pro_volumes[idx] = 0x80008000; /* mute */
1485 snd_ice1712_update_volume(ice, idx);
1486 }
1487 return 0;
1488 }
1489
1490 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1491 {
1492 struct snd_ice1712 *ice = ac97->private_data;
1493 ice->ac97 = NULL;
1494 }
1495
1496 static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1497 {
1498 int err, bus_num = 0;
1499 struct snd_ac97_template ac97;
1500 struct snd_ac97_bus *pbus;
1501 static struct snd_ac97_bus_ops con_ops = {
1502 .write = snd_ice1712_ac97_write,
1503 .read = snd_ice1712_ac97_read,
1504 };
1505 static struct snd_ac97_bus_ops pro_ops = {
1506 .write = snd_ice1712_pro_ac97_write,
1507 .read = snd_ice1712_pro_ac97_read,
1508 };
1509
1510 if (ice_has_con_ac97(ice)) {
1511 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1512 if (err < 0)
1513 return err;
1514 memset(&ac97, 0, sizeof(ac97));
1515 ac97.private_data = ice;
1516 ac97.private_free = snd_ice1712_mixer_free_ac97;
1517 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1518 if (err < 0)
1519 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1520 else {
1521 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice));
1522 if (err < 0)
1523 return err;
1524 return 0;
1525 }
1526 }
1527
1528 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1529 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1530 if (err < 0)
1531 return err;
1532 memset(&ac97, 0, sizeof(ac97));
1533 ac97.private_data = ice;
1534 ac97.private_free = snd_ice1712_mixer_free_ac97;
1535 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1536 if (err < 0)
1537 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1538 else
1539 return 0;
1540 }
1541 /* I2S mixer only */
1542 strcat(ice->card->mixername, "ICE1712 - multitrack");
1543 return 0;
1544 }
1545
1546 /*
1547 *
1548 */
1549
1550 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1551 {
1552 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1553 }
1554
1555 static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1556 struct snd_info_buffer *buffer)
1557 {
1558 struct snd_ice1712 *ice = entry->private_data;
1559 unsigned int idx;
1560
1561 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1562 snd_iprintf(buffer, "EEPROM:\n");
1563
1564 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1565 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1566 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1567 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1568 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1569 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1570 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1571 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1572 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1573 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1574 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1575 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1576 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1577 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1578 for (idx = 0; idx < 4; idx++)
1579 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1580 for (idx = 0; idx < 4; idx++)
1581 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1582 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1583 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1584
1585 snd_iprintf(buffer, "\nRegisters:\n");
1586 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1587 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1588 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1589 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1590 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1591 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1592 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1593 }
1594
1595 static void __devinit snd_ice1712_proc_init(struct snd_ice1712 *ice)
1596 {
1597 struct snd_info_entry *entry;
1598
1599 if (!snd_card_proc_new(ice->card, "ice1712", &entry))
1600 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1601 }
1602
1603 /*
1604 *
1605 */
1606
1607 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1608 struct snd_ctl_elem_info *uinfo)
1609 {
1610 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1611 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1612 return 0;
1613 }
1614
1615 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1616 struct snd_ctl_elem_value *ucontrol)
1617 {
1618 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1619
1620 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1621 return 0;
1622 }
1623
1624 static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
1625 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1626 .name = "ICE1712 EEPROM",
1627 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1628 .info = snd_ice1712_eeprom_info,
1629 .get = snd_ice1712_eeprom_get
1630 };
1631
1632 /*
1633 */
1634 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1635 struct snd_ctl_elem_info *uinfo)
1636 {
1637 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1638 uinfo->count = 1;
1639 return 0;
1640 }
1641
1642 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1643 struct snd_ctl_elem_value *ucontrol)
1644 {
1645 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1646 if (ice->spdif.ops.default_get)
1647 ice->spdif.ops.default_get(ice, ucontrol);
1648 return 0;
1649 }
1650
1651 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1652 struct snd_ctl_elem_value *ucontrol)
1653 {
1654 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1655 if (ice->spdif.ops.default_put)
1656 return ice->spdif.ops.default_put(ice, ucontrol);
1657 return 0;
1658 }
1659
1660 static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
1661 {
1662 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1663 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1664 .info = snd_ice1712_spdif_info,
1665 .get = snd_ice1712_spdif_default_get,
1666 .put = snd_ice1712_spdif_default_put
1667 };
1668
1669 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1670 struct snd_ctl_elem_value *ucontrol)
1671 {
1672 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1673 if (ice->spdif.ops.default_get) {
1674 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1675 IEC958_AES0_PROFESSIONAL |
1676 IEC958_AES0_CON_NOT_COPYRIGHT |
1677 IEC958_AES0_CON_EMPHASIS;
1678 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1679 IEC958_AES1_CON_CATEGORY;
1680 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1681 } else {
1682 ucontrol->value.iec958.status[0] = 0xff;
1683 ucontrol->value.iec958.status[1] = 0xff;
1684 ucontrol->value.iec958.status[2] = 0xff;
1685 ucontrol->value.iec958.status[3] = 0xff;
1686 ucontrol->value.iec958.status[4] = 0xff;
1687 }
1688 return 0;
1689 }
1690
1691 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1692 struct snd_ctl_elem_value *ucontrol)
1693 {
1694 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1695 if (ice->spdif.ops.default_get) {
1696 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1697 IEC958_AES0_PROFESSIONAL |
1698 IEC958_AES0_PRO_FS |
1699 IEC958_AES0_PRO_EMPHASIS;
1700 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1701 } else {
1702 ucontrol->value.iec958.status[0] = 0xff;
1703 ucontrol->value.iec958.status[1] = 0xff;
1704 ucontrol->value.iec958.status[2] = 0xff;
1705 ucontrol->value.iec958.status[3] = 0xff;
1706 ucontrol->value.iec958.status[4] = 0xff;
1707 }
1708 return 0;
1709 }
1710
1711 static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
1712 {
1713 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1714 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1715 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1716 .info = snd_ice1712_spdif_info,
1717 .get = snd_ice1712_spdif_maskc_get,
1718 };
1719
1720 static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
1721 {
1722 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1723 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1724 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1725 .info = snd_ice1712_spdif_info,
1726 .get = snd_ice1712_spdif_maskp_get,
1727 };
1728
1729 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1730 struct snd_ctl_elem_value *ucontrol)
1731 {
1732 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1733 if (ice->spdif.ops.stream_get)
1734 ice->spdif.ops.stream_get(ice, ucontrol);
1735 return 0;
1736 }
1737
1738 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1739 struct snd_ctl_elem_value *ucontrol)
1740 {
1741 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1742 if (ice->spdif.ops.stream_put)
1743 return ice->spdif.ops.stream_put(ice, ucontrol);
1744 return 0;
1745 }
1746
1747 static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
1748 {
1749 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1750 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1751 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1752 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1753 .info = snd_ice1712_spdif_info,
1754 .get = snd_ice1712_spdif_stream_get,
1755 .put = snd_ice1712_spdif_stream_put
1756 };
1757
1758 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1759 struct snd_ctl_elem_value *ucontrol)
1760 {
1761 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1762 unsigned char mask = kcontrol->private_value & 0xff;
1763 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1764
1765 snd_ice1712_save_gpio_status(ice);
1766 ucontrol->value.integer.value[0] =
1767 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1768 snd_ice1712_restore_gpio_status(ice);
1769 return 0;
1770 }
1771
1772 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1773 struct snd_ctl_elem_value *ucontrol)
1774 {
1775 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1776 unsigned char mask = kcontrol->private_value & 0xff;
1777 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1778 unsigned int val, nval;
1779
1780 if (kcontrol->private_value & (1 << 31))
1781 return -EPERM;
1782 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1783 snd_ice1712_save_gpio_status(ice);
1784 val = snd_ice1712_gpio_read(ice);
1785 nval |= val & ~mask;
1786 if (val != nval)
1787 snd_ice1712_gpio_write(ice, nval);
1788 snd_ice1712_restore_gpio_status(ice);
1789 return val != nval;
1790 }
1791
1792 /*
1793 * rate
1794 */
1795 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1796 struct snd_ctl_elem_info *uinfo)
1797 {
1798 static const char * const texts[] = {
1799 "8000", /* 0: 6 */
1800 "9600", /* 1: 3 */
1801 "11025", /* 2: 10 */
1802 "12000", /* 3: 2 */
1803 "16000", /* 4: 5 */
1804 "22050", /* 5: 9 */
1805 "24000", /* 6: 1 */
1806 "32000", /* 7: 4 */
1807 "44100", /* 8: 8 */
1808 "48000", /* 9: 0 */
1809 "64000", /* 10: 15 */
1810 "88200", /* 11: 11 */
1811 "96000", /* 12: 7 */
1812 "IEC958 Input", /* 13: -- */
1813 };
1814 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1815 uinfo->count = 1;
1816 uinfo->value.enumerated.items = 14;
1817 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1818 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1819 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1820 return 0;
1821 }
1822
1823 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1824 struct snd_ctl_elem_value *ucontrol)
1825 {
1826 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1827 static const unsigned char xlate[16] = {
1828 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1829 };
1830 unsigned char val;
1831
1832 spin_lock_irq(&ice->reg_lock);
1833 if (is_spdif_master(ice)) {
1834 ucontrol->value.enumerated.item[0] = 13;
1835 } else {
1836 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1837 if (val == 255) {
1838 snd_BUG();
1839 val = 0;
1840 }
1841 ucontrol->value.enumerated.item[0] = val;
1842 }
1843 spin_unlock_irq(&ice->reg_lock);
1844 return 0;
1845 }
1846
1847 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1848 struct snd_ctl_elem_value *ucontrol)
1849 {
1850 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1851 static const unsigned int xrate[13] = {
1852 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1853 32000, 44100, 48000, 64000, 88200, 96000
1854 };
1855 unsigned char oval;
1856 int change = 0;
1857
1858 spin_lock_irq(&ice->reg_lock);
1859 oval = inb(ICEMT(ice, RATE));
1860 if (ucontrol->value.enumerated.item[0] == 13) {
1861 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1862 } else {
1863 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1864 spin_unlock_irq(&ice->reg_lock);
1865 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1866 spin_lock_irq(&ice->reg_lock);
1867 }
1868 change = inb(ICEMT(ice, RATE)) != oval;
1869 spin_unlock_irq(&ice->reg_lock);
1870
1871 if ((oval & ICE1712_SPDIF_MASTER) !=
1872 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1873 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1874
1875 return change;
1876 }
1877
1878 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
1879 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1880 .name = "Multi Track Internal Clock",
1881 .info = snd_ice1712_pro_internal_clock_info,
1882 .get = snd_ice1712_pro_internal_clock_get,
1883 .put = snd_ice1712_pro_internal_clock_put
1884 };
1885
1886 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1887 struct snd_ctl_elem_info *uinfo)
1888 {
1889 static const char * const texts[] = {
1890 "8000", /* 0: 6 */
1891 "9600", /* 1: 3 */
1892 "11025", /* 2: 10 */
1893 "12000", /* 3: 2 */
1894 "16000", /* 4: 5 */
1895 "22050", /* 5: 9 */
1896 "24000", /* 6: 1 */
1897 "32000", /* 7: 4 */
1898 "44100", /* 8: 8 */
1899 "48000", /* 9: 0 */
1900 "64000", /* 10: 15 */
1901 "88200", /* 11: 11 */
1902 "96000", /* 12: 7 */
1903 /* "IEC958 Input", 13: -- */
1904 };
1905 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1906 uinfo->count = 1;
1907 uinfo->value.enumerated.items = 13;
1908 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1909 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1910 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1911 return 0;
1912 }
1913
1914 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1915 struct snd_ctl_elem_value *ucontrol)
1916 {
1917 int val;
1918 static const unsigned int xrate[13] = {
1919 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1920 32000, 44100, 48000, 64000, 88200, 96000
1921 };
1922
1923 for (val = 0; val < 13; val++) {
1924 if (xrate[val] == PRO_RATE_DEFAULT)
1925 break;
1926 }
1927
1928 ucontrol->value.enumerated.item[0] = val;
1929 return 0;
1930 }
1931
1932 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1933 struct snd_ctl_elem_value *ucontrol)
1934 {
1935 static const unsigned int xrate[13] = {
1936 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1937 32000, 44100, 48000, 64000, 88200, 96000
1938 };
1939 unsigned char oval;
1940 int change = 0;
1941
1942 oval = PRO_RATE_DEFAULT;
1943 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1944 change = PRO_RATE_DEFAULT != oval;
1945
1946 return change;
1947 }
1948
1949 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
1950 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1951 .name = "Multi Track Internal Clock Default",
1952 .info = snd_ice1712_pro_internal_clock_default_info,
1953 .get = snd_ice1712_pro_internal_clock_default_get,
1954 .put = snd_ice1712_pro_internal_clock_default_put
1955 };
1956
1957 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1958
1959 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1960 struct snd_ctl_elem_value *ucontrol)
1961 {
1962 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1963 return 0;
1964 }
1965
1966 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1967 struct snd_ctl_elem_value *ucontrol)
1968 {
1969 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1970 int change = 0, nval;
1971
1972 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1973 spin_lock_irq(&ice->reg_lock);
1974 change = PRO_RATE_LOCKED != nval;
1975 PRO_RATE_LOCKED = nval;
1976 spin_unlock_irq(&ice->reg_lock);
1977 return change;
1978 }
1979
1980 static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
1981 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1982 .name = "Multi Track Rate Locking",
1983 .info = snd_ice1712_pro_rate_locking_info,
1984 .get = snd_ice1712_pro_rate_locking_get,
1985 .put = snd_ice1712_pro_rate_locking_put
1986 };
1987
1988 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
1989
1990 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1991 struct snd_ctl_elem_value *ucontrol)
1992 {
1993 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
1994 return 0;
1995 }
1996
1997 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1998 struct snd_ctl_elem_value *ucontrol)
1999 {
2000 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2001 int change = 0, nval;
2002
2003 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2004 spin_lock_irq(&ice->reg_lock);
2005 change = PRO_RATE_RESET != nval;
2006 PRO_RATE_RESET = nval;
2007 spin_unlock_irq(&ice->reg_lock);
2008 return change;
2009 }
2010
2011 static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
2012 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2013 .name = "Multi Track Rate Reset",
2014 .info = snd_ice1712_pro_rate_reset_info,
2015 .get = snd_ice1712_pro_rate_reset_get,
2016 .put = snd_ice1712_pro_rate_reset_put
2017 };
2018
2019 /*
2020 * routing
2021 */
2022 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2023 struct snd_ctl_elem_info *uinfo)
2024 {
2025 static const char * const texts[] = {
2026 "PCM Out", /* 0 */
2027 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2028 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2029 "IEC958 In L", "IEC958 In R", /* 9-10 */
2030 "Digital Mixer", /* 11 - optional */
2031 };
2032
2033 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2034 uinfo->count = 1;
2035 uinfo->value.enumerated.items =
2036 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
2037 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2038 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2039 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2040 return 0;
2041 }
2042
2043 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2044 struct snd_ctl_elem_value *ucontrol)
2045 {
2046 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2047 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2048 unsigned int val, cval;
2049
2050 spin_lock_irq(&ice->reg_lock);
2051 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2052 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2053 spin_unlock_irq(&ice->reg_lock);
2054
2055 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2056 val &= 3;
2057 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2058 if (val == 1 && idx < 2)
2059 ucontrol->value.enumerated.item[0] = 11;
2060 else if (val == 2)
2061 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2062 else if (val == 3)
2063 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2064 else
2065 ucontrol->value.enumerated.item[0] = 0;
2066 return 0;
2067 }
2068
2069 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2070 struct snd_ctl_elem_value *ucontrol)
2071 {
2072 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2073 int change, shift;
2074 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2075 unsigned int val, old_val, nval;
2076
2077 /* update PSDOUT */
2078 if (ucontrol->value.enumerated.item[0] >= 11)
2079 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2080 else if (ucontrol->value.enumerated.item[0] >= 9)
2081 nval = 3; /* spdif in */
2082 else if (ucontrol->value.enumerated.item[0] >= 1)
2083 nval = 2; /* analog in */
2084 else
2085 nval = 0; /* pcm */
2086 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2087 spin_lock_irq(&ice->reg_lock);
2088 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2089 val &= ~(0x03 << shift);
2090 val |= nval << shift;
2091 change = val != old_val;
2092 if (change)
2093 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2094 spin_unlock_irq(&ice->reg_lock);
2095 if (nval < 2) /* dig mixer of pcm */
2096 return change;
2097
2098 /* update CAPTURE */
2099 spin_lock_irq(&ice->reg_lock);
2100 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2101 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2102 if (nval == 2) { /* analog in */
2103 nval = ucontrol->value.enumerated.item[0] - 1;
2104 val &= ~(0x07 << shift);
2105 val |= nval << shift;
2106 } else { /* spdif in */
2107 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2108 val &= ~(0x08 << shift);
2109 val |= nval << shift;
2110 }
2111 if (val != old_val) {
2112 change = 1;
2113 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2114 }
2115 spin_unlock_irq(&ice->reg_lock);
2116 return change;
2117 }
2118
2119 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2120 struct snd_ctl_elem_value *ucontrol)
2121 {
2122 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2123 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2124 unsigned int val, cval;
2125 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2126 cval = (val >> (idx * 4 + 8)) & 0x0f;
2127 val = (val >> (idx * 2)) & 0x03;
2128 if (val == 1)
2129 ucontrol->value.enumerated.item[0] = 11;
2130 else if (val == 2)
2131 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2132 else if (val == 3)
2133 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2134 else
2135 ucontrol->value.enumerated.item[0] = 0;
2136 return 0;
2137 }
2138
2139 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2140 struct snd_ctl_elem_value *ucontrol)
2141 {
2142 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2143 int change, shift;
2144 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2145 unsigned int val, old_val, nval;
2146
2147 /* update SPDOUT */
2148 spin_lock_irq(&ice->reg_lock);
2149 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2150 if (ucontrol->value.enumerated.item[0] >= 11)
2151 nval = 1;
2152 else if (ucontrol->value.enumerated.item[0] >= 9)
2153 nval = 3;
2154 else if (ucontrol->value.enumerated.item[0] >= 1)
2155 nval = 2;
2156 else
2157 nval = 0;
2158 shift = idx * 2;
2159 val &= ~(0x03 << shift);
2160 val |= nval << shift;
2161 shift = idx * 4 + 8;
2162 if (nval == 2) {
2163 nval = ucontrol->value.enumerated.item[0] - 1;
2164 val &= ~(0x07 << shift);
2165 val |= nval << shift;
2166 } else if (nval == 3) {
2167 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2168 val &= ~(0x08 << shift);
2169 val |= nval << shift;
2170 }
2171 change = val != old_val;
2172 if (change)
2173 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2174 spin_unlock_irq(&ice->reg_lock);
2175 return change;
2176 }
2177
2178 static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
2179 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2180 .name = "H/W Playback Route",
2181 .info = snd_ice1712_pro_route_info,
2182 .get = snd_ice1712_pro_route_analog_get,
2183 .put = snd_ice1712_pro_route_analog_put,
2184 };
2185
2186 static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
2187 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2188 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2189 .info = snd_ice1712_pro_route_info,
2190 .get = snd_ice1712_pro_route_spdif_get,
2191 .put = snd_ice1712_pro_route_spdif_put,
2192 .count = 2,
2193 };
2194
2195
2196 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2197 struct snd_ctl_elem_info *uinfo)
2198 {
2199 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2200 uinfo->count = 1;
2201 uinfo->value.integer.min = 0;
2202 uinfo->value.integer.max = 255;
2203 return 0;
2204 }
2205
2206 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2207 struct snd_ctl_elem_value *ucontrol)
2208 {
2209 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2210
2211 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2212 return 0;
2213 }
2214
2215 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2216 struct snd_ctl_elem_value *ucontrol)
2217 {
2218 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2219 int change;
2220
2221 spin_lock_irq(&ice->reg_lock);
2222 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2223 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2224 spin_unlock_irq(&ice->reg_lock);
2225 return change;
2226 }
2227
2228 static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
2229 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2230 .name = "Multi Track Volume Rate",
2231 .info = snd_ice1712_pro_volume_rate_info,
2232 .get = snd_ice1712_pro_volume_rate_get,
2233 .put = snd_ice1712_pro_volume_rate_put
2234 };
2235
2236 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2237 struct snd_ctl_elem_info *uinfo)
2238 {
2239 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2240 uinfo->count = 22;
2241 uinfo->value.integer.min = 0;
2242 uinfo->value.integer.max = 255;
2243 return 0;
2244 }
2245
2246 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2247 struct snd_ctl_elem_value *ucontrol)
2248 {
2249 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2250 int idx;
2251
2252 spin_lock_irq(&ice->reg_lock);
2253 for (idx = 0; idx < 22; idx++) {
2254 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2255 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2256 }
2257 spin_unlock_irq(&ice->reg_lock);
2258 return 0;
2259 }
2260
2261 static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
2262 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
2263 .name = "Multi Track Peak",
2264 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2265 .info = snd_ice1712_pro_peak_info,
2266 .get = snd_ice1712_pro_peak_get
2267 };
2268
2269 /*
2270 *
2271 */
2272
2273 /*
2274 * list of available boards
2275 */
2276 static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
2277 snd_ice1712_hoontech_cards,
2278 snd_ice1712_delta_cards,
2279 snd_ice1712_ews_cards,
2280 NULL,
2281 };
2282
2283 static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2284 unsigned char dev,
2285 unsigned char addr)
2286 {
2287 long t = 0x10000;
2288
2289 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2290 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2291 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2292 return inb(ICEREG(ice, I2C_DATA));
2293 }
2294
2295 static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2296 const char *modelname)
2297 {
2298 int dev = 0xa0; /* EEPROM device address */
2299 unsigned int i, size;
2300 struct snd_ice1712_card_info * const *tbl, *c;
2301
2302 if (!modelname || !*modelname) {
2303 ice->eeprom.subvendor = 0;
2304 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2305 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2306 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2307 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2308 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2309 if (ice->eeprom.subvendor == 0 ||
2310 ice->eeprom.subvendor == (unsigned int)-1) {
2311 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2312 u16 vendor, device;
2313 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2314 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2315 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2316 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2317 printk(KERN_ERR "ice1712: No valid ID is found\n");
2318 return -ENXIO;
2319 }
2320 }
2321 }
2322 for (tbl = card_tables; *tbl; tbl++) {
2323 for (c = *tbl; c->subvendor; c++) {
2324 if (modelname && c->model && !strcmp(modelname, c->model)) {
2325 printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2326 ice->eeprom.subvendor = c->subvendor;
2327 } else if (c->subvendor != ice->eeprom.subvendor)
2328 continue;
2329 if (!c->eeprom_size || !c->eeprom_data)
2330 goto found;
2331 /* if the EEPROM is given by the driver, use it */
2332 snd_printdd("using the defined eeprom..\n");
2333 ice->eeprom.version = 1;
2334 ice->eeprom.size = c->eeprom_size + 6;
2335 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2336 goto read_skipped;
2337 }
2338 }
2339 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2340 ice->eeprom.subvendor);
2341
2342 found:
2343 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2344 if (ice->eeprom.size < 6)
2345 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2346 else if (ice->eeprom.size > 32) {
2347 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
2348 return -EIO;
2349 }
2350 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2351 if (ice->eeprom.version != 1) {
2352 snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2353 ice->eeprom.version);
2354 /* return -EIO; */
2355 }
2356 size = ice->eeprom.size - 6;
2357 for (i = 0; i < size; i++)
2358 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2359
2360 read_skipped:
2361 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2362 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2363 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2364
2365 return 0;
2366 }
2367
2368
2369
2370 static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
2371 {
2372 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2373 udelay(200);
2374 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2375 udelay(200);
2376 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2377 !ice->dxr_enable)
2378 /* Set eeprom value to limit active ADCs and DACs to 6;
2379 * Also disable AC97 as no hardware in standard 6fire card/box
2380 * Note: DXR extensions are not currently supported
2381 */
2382 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2383 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2384 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2385 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2386 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2387 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2388 ice->gpio.write_mask = ice->eeprom.gpiomask;
2389 ice->gpio.direction = ice->eeprom.gpiodir;
2390 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2391 ice->eeprom.gpiomask);
2392 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2393 ice->eeprom.gpiodir);
2394 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2395 ice->eeprom.gpiostate);
2396 } else {
2397 ice->gpio.write_mask = 0xc0;
2398 ice->gpio.direction = 0xff;
2399 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2400 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2401 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2402 ICE1712_STDSP24_CLOCK_BIT);
2403 }
2404 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2405 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2406 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2407 udelay(100);
2408 outb(0, ICEREG(ice, AC97_CMD));
2409 udelay(200);
2410 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2411 }
2412 snd_ice1712_set_pro_rate(ice, 48000, 1);
2413
2414 return 0;
2415 }
2416
2417 int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2418 {
2419 int err;
2420 struct snd_kcontrol *kctl;
2421
2422 if (snd_BUG_ON(!ice->pcm_pro))
2423 return -EIO;
2424 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2425 if (err < 0)
2426 return err;
2427 kctl->id.device = ice->pcm_pro->device;
2428 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2429 if (err < 0)
2430 return err;
2431 kctl->id.device = ice->pcm_pro->device;
2432 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2433 if (err < 0)
2434 return err;
2435 kctl->id.device = ice->pcm_pro->device;
2436 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2437 if (err < 0)
2438 return err;
2439 kctl->id.device = ice->pcm_pro->device;
2440 ice->spdif.stream_ctl = kctl;
2441 return 0;
2442 }
2443
2444
2445 static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
2446 {
2447 int err;
2448
2449 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2450 if (err < 0)
2451 return err;
2452 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2453 if (err < 0)
2454 return err;
2455 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2456 if (err < 0)
2457 return err;
2458
2459 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2460 if (err < 0)
2461 return err;
2462 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2463 if (err < 0)
2464 return err;
2465
2466 if (ice->num_total_dacs > 0) {
2467 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
2468 tmp.count = ice->num_total_dacs;
2469 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2470 if (err < 0)
2471 return err;
2472 }
2473
2474 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2475 if (err < 0)
2476 return err;
2477
2478 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2479 if (err < 0)
2480 return err;
2481 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2482 if (err < 0)
2483 return err;
2484
2485 return 0;
2486 }
2487
2488 static int snd_ice1712_free(struct snd_ice1712 *ice)
2489 {
2490 if (!ice->port)
2491 goto __hw_end;
2492 /* mask all interrupts */
2493 outb(0xc0, ICEMT(ice, IRQ));
2494 outb(0xff, ICEREG(ice, IRQMASK));
2495 /* --- */
2496 __hw_end:
2497 if (ice->irq >= 0)
2498 free_irq(ice->irq, ice);
2499
2500 if (ice->port)
2501 pci_release_regions(ice->pci);
2502 snd_ice1712_akm4xxx_free(ice);
2503 pci_disable_device(ice->pci);
2504 kfree(ice->spec);
2505 kfree(ice);
2506 return 0;
2507 }
2508
2509 static int snd_ice1712_dev_free(struct snd_device *device)
2510 {
2511 struct snd_ice1712 *ice = device->device_data;
2512 return snd_ice1712_free(ice);
2513 }
2514
2515 static int __devinit snd_ice1712_create(struct snd_card *card,
2516 struct pci_dev *pci,
2517 const char *modelname,
2518 int omni,
2519 int cs8427_timeout,
2520 int dxr_enable,
2521 struct snd_ice1712 **r_ice1712)
2522 {
2523 struct snd_ice1712 *ice;
2524 int err;
2525 static struct snd_device_ops ops = {
2526 .dev_free = snd_ice1712_dev_free,
2527 };
2528
2529 *r_ice1712 = NULL;
2530
2531 /* enable PCI device */
2532 err = pci_enable_device(pci);
2533 if (err < 0)
2534 return err;
2535 /* check, if we can restrict PCI DMA transfers to 28 bits */
2536 if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2537 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
2538 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2539 pci_disable_device(pci);
2540 return -ENXIO;
2541 }
2542
2543 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2544 if (ice == NULL) {
2545 pci_disable_device(pci);
2546 return -ENOMEM;
2547 }
2548 ice->omni = omni ? 1 : 0;
2549 if (cs8427_timeout < 1)
2550 cs8427_timeout = 1;
2551 else if (cs8427_timeout > 1000)
2552 cs8427_timeout = 1000;
2553 ice->cs8427_timeout = cs8427_timeout;
2554 ice->dxr_enable = dxr_enable;
2555 spin_lock_init(&ice->reg_lock);
2556 mutex_init(&ice->gpio_mutex);
2557 mutex_init(&ice->i2c_mutex);
2558 mutex_init(&ice->open_mutex);
2559 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2560 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2561 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2562 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2563
2564 ice->spdif.cs8403_bits =
2565 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2566 0x10 | /* no emphasis */
2567 0x20); /* PCM encoder/decoder */
2568 ice->card = card;
2569 ice->pci = pci;
2570 ice->irq = -1;
2571 pci_set_master(pci);
2572 pci_write_config_word(ice->pci, 0x40, 0x807f);
2573 pci_write_config_word(ice->pci, 0x42, 0x0006);
2574 snd_ice1712_proc_init(ice);
2575 synchronize_irq(pci->irq);
2576
2577 err = pci_request_regions(pci, "ICE1712");
2578 if (err < 0) {
2579 kfree(ice);
2580 pci_disable_device(pci);
2581 return err;
2582 }
2583 ice->port = pci_resource_start(pci, 0);
2584 ice->ddma_port = pci_resource_start(pci, 1);
2585 ice->dmapath_port = pci_resource_start(pci, 2);
2586 ice->profi_port = pci_resource_start(pci, 3);
2587
2588 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
2589 "ICE1712", ice)) {
2590 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2591 snd_ice1712_free(ice);
2592 return -EIO;
2593 }
2594
2595 ice->irq = pci->irq;
2596
2597 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2598 snd_ice1712_free(ice);
2599 return -EIO;
2600 }
2601 if (snd_ice1712_chip_init(ice) < 0) {
2602 snd_ice1712_free(ice);
2603 return -EIO;
2604 }
2605
2606 /* unmask used interrupts */
2607 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2608 ICE1712_IRQ_MPU2 : 0) |
2609 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2610 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2611 ICEREG(ice, IRQMASK));
2612 outb(0x00, ICEMT(ice, IRQ));
2613
2614 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2615 if (err < 0) {
2616 snd_ice1712_free(ice);
2617 return err;
2618 }
2619
2620 snd_card_set_dev(card, &pci->dev);
2621
2622 *r_ice1712 = ice;
2623 return 0;
2624 }
2625
2626
2627 /*
2628 *
2629 * Registration
2630 *
2631 */
2632
2633 static struct snd_ice1712_card_info no_matched __devinitdata;
2634
2635 static int __devinit snd_ice1712_probe(struct pci_dev *pci,
2636 const struct pci_device_id *pci_id)
2637 {
2638 static int dev;
2639 struct snd_card *card;
2640 struct snd_ice1712 *ice;
2641 int pcm_dev = 0, err;
2642 struct snd_ice1712_card_info * const *tbl, *c;
2643
2644 if (dev >= SNDRV_CARDS)
2645 return -ENODEV;
2646 if (!enable[dev]) {
2647 dev++;
2648 return -ENOENT;
2649 }
2650
2651 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2652 if (err < 0)
2653 return err;
2654
2655 strcpy(card->driver, "ICE1712");
2656 strcpy(card->shortname, "ICEnsemble ICE1712");
2657
2658 err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2659 cs8427_timeout[dev], dxr_enable[dev], &ice);
2660 if (err < 0) {
2661 snd_card_free(card);
2662 return err;
2663 }
2664
2665 for (tbl = card_tables; *tbl; tbl++) {
2666 for (c = *tbl; c->subvendor; c++) {
2667 if (c->subvendor == ice->eeprom.subvendor) {
2668 strcpy(card->shortname, c->name);
2669 if (c->driver) /* specific driver? */
2670 strcpy(card->driver, c->driver);
2671 if (c->chip_init) {
2672 err = c->chip_init(ice);
2673 if (err < 0) {
2674 snd_card_free(card);
2675 return err;
2676 }
2677 }
2678 goto __found;
2679 }
2680 }
2681 }
2682 c = &no_matched;
2683 __found:
2684
2685 err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
2686 if (err < 0) {
2687 snd_card_free(card);
2688 return err;
2689 }
2690
2691 if (ice_has_con_ac97(ice)) {
2692 err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
2693 if (err < 0) {
2694 snd_card_free(card);
2695 return err;
2696 }
2697 }
2698
2699 err = snd_ice1712_ac97_mixer(ice);
2700 if (err < 0) {
2701 snd_card_free(card);
2702 return err;
2703 }
2704
2705 err = snd_ice1712_build_controls(ice);
2706 if (err < 0) {
2707 snd_card_free(card);
2708 return err;
2709 }
2710
2711 if (c->build_controls) {
2712 err = c->build_controls(ice);
2713 if (err < 0) {
2714 snd_card_free(card);
2715 return err;
2716 }
2717 }
2718
2719 if (ice_has_con_ac97(ice)) {
2720 err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
2721 if (err < 0) {
2722 snd_card_free(card);
2723 return err;
2724 }
2725 }
2726
2727 if (!c->no_mpu401) {
2728 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2729 ICEREG(ice, MPU1_CTRL),
2730 (c->mpu401_1_info_flags | MPU401_INFO_INTEGRATED),
2731 ice->irq, 0, &ice->rmidi[0]);
2732 if (err < 0) {
2733 snd_card_free(card);
2734 return err;
2735 }
2736 if (c->mpu401_1_name)
2737 /* Prefered name available in card_info */
2738 snprintf(ice->rmidi[0]->name,
2739 sizeof(ice->rmidi[0]->name),
2740 "%s %d", c->mpu401_1_name, card->number);
2741
2742 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2743 /* 2nd port used */
2744 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2745 ICEREG(ice, MPU2_CTRL),
2746 (c->mpu401_2_info_flags | MPU401_INFO_INTEGRATED),
2747 ice->irq, 0, &ice->rmidi[1]);
2748
2749 if (err < 0) {
2750 snd_card_free(card);
2751 return err;
2752 }
2753 if (c->mpu401_2_name)
2754 /* Prefered name available in card_info */
2755 snprintf(ice->rmidi[1]->name,
2756 sizeof(ice->rmidi[1]->name),
2757 "%s %d", c->mpu401_2_name,
2758 card->number);
2759 }
2760 }
2761
2762 snd_ice1712_set_input_clock_source(ice, 0);
2763
2764 sprintf(card->longname, "%s at 0x%lx, irq %i",
2765 card->shortname, ice->port, ice->irq);
2766
2767 err = snd_card_register(card);
2768 if (err < 0) {
2769 snd_card_free(card);
2770 return err;
2771 }
2772 pci_set_drvdata(pci, card);
2773 dev++;
2774 return 0;
2775 }
2776
2777 static void __devexit snd_ice1712_remove(struct pci_dev *pci)
2778 {
2779 snd_card_free(pci_get_drvdata(pci));
2780 pci_set_drvdata(pci, NULL);
2781 }
2782
2783 static struct pci_driver driver = {
2784 .name = "ICE1712",
2785 .id_table = snd_ice1712_ids,
2786 .probe = snd_ice1712_probe,
2787 .remove = __devexit_p(snd_ice1712_remove),
2788 };
2789
2790 static int __init alsa_card_ice1712_init(void)
2791 {
2792 return pci_register_driver(&driver);
2793 }
2794
2795 static void __exit alsa_card_ice1712_exit(void)
2796 {
2797 pci_unregister_driver(&driver);
2798 }
2799
2800 module_init(alsa_card_ice1712_init)
2801 module_exit(alsa_card_ice1712_exit)
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