2 * Driver for the IDT RC32434 (Korina) on-chip ethernet controller.
4 * Copyright 2004 IDT Inc. (rischelp@idt.com)
5 * Copyright 2006 Felix Fietkau <nbd@openwrt.org>
6 * Copyright 2008 Florian Fainelli <florian@openwrt.org>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 * Writing to a DMA status register:
30 * When writing to the status register, you should mask the bit you have
31 * been testing the status register with. Both Tx and Rx DMA registers
32 * should stick to this procedure.
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/moduleparam.h>
38 #include <linux/sched.h>
39 #include <linux/ctype.h>
40 #include <linux/types.h>
41 #include <linux/interrupt.h>
42 #include <linux/init.h>
43 #include <linux/ioport.h>
45 #include <linux/slab.h>
46 #include <linux/string.h>
47 #include <linux/delay.h>
48 #include <linux/netdevice.h>
49 #include <linux/etherdevice.h>
50 #include <linux/skbuff.h>
51 #include <linux/errno.h>
52 #include <linux/platform_device.h>
53 #include <linux/mii.h>
54 #include <linux/ethtool.h>
55 #include <linux/crc32.h>
57 #include <asm/bootinfo.h>
58 #include <asm/system.h>
59 #include <asm/bitops.h>
60 #include <asm/pgtable.h>
61 #include <asm/segment.h>
65 #include <asm/mach-rc32434/rb.h>
66 #include <asm/mach-rc32434/rc32434.h>
67 #include <asm/mach-rc32434/eth.h>
68 #include <asm/mach-rc32434/dma_v.h>
70 #define DRV_NAME "korina"
71 #define DRV_VERSION "0.10"
72 #define DRV_RELDATE "04Mar2008"
74 #define STATION_ADDRESS_HIGH(dev) (((dev)->dev_addr[0] << 8) | \
76 #define STATION_ADDRESS_LOW(dev) (((dev)->dev_addr[2] << 24) | \
77 ((dev)->dev_addr[3] << 16) | \
78 ((dev)->dev_addr[4] << 8) | \
81 #define MII_CLOCK 1250000 /* no more than 2.5MHz */
83 /* the following must be powers of two */
84 #define KORINA_NUM_RDS 64 /* number of receive descriptors */
85 #define KORINA_NUM_TDS 64 /* number of transmit descriptors */
87 /* KORINA_RBSIZE is the hardware's default maximum receive
88 * frame size in bytes. Having this hardcoded means that there
89 * is no support for MTU sizes greater than 1500. */
90 #define KORINA_RBSIZE 1536 /* size of one resource buffer = Ether MTU */
91 #define KORINA_RDS_MASK (KORINA_NUM_RDS - 1)
92 #define KORINA_TDS_MASK (KORINA_NUM_TDS - 1)
93 #define RD_RING_SIZE (KORINA_NUM_RDS * sizeof(struct dma_desc))
94 #define TD_RING_SIZE (KORINA_NUM_TDS * sizeof(struct dma_desc))
96 #define TX_TIMEOUT (6000 * HZ / 1000)
98 enum chain_status
{ desc_filled
, desc_empty
};
99 #define IS_DMA_FINISHED(X) (((X) & (DMA_DESC_FINI)) != 0)
100 #define IS_DMA_DONE(X) (((X) & (DMA_DESC_DONE)) != 0)
101 #define RCVPKT_LENGTH(X) (((X) & ETH_RX_LEN) >> ETH_RX_LEN_BIT)
103 /* Information that need to be kept for each board. */
104 struct korina_private
{
105 struct eth_regs
*eth_regs
;
106 struct dma_reg
*rx_dma_regs
;
107 struct dma_reg
*tx_dma_regs
;
108 struct dma_desc
*td_ring
; /* transmit descriptor ring */
109 struct dma_desc
*rd_ring
; /* receive descriptor ring */
111 struct sk_buff
*tx_skb
[KORINA_NUM_TDS
];
112 struct sk_buff
*rx_skb
[KORINA_NUM_RDS
];
117 enum chain_status rx_chain_status
;
122 enum chain_status tx_chain_status
;
131 spinlock_t lock
; /* NIC xmit lock */
135 struct napi_struct napi
;
136 struct mii_if_info mii_if
;
137 struct net_device
*dev
;
141 extern unsigned int idt_cpu_freq
;
143 static inline void korina_start_dma(struct dma_reg
*ch
, u32 dma_addr
)
145 writel(0, &ch
->dmandptr
);
146 writel(dma_addr
, &ch
->dmadptr
);
149 static inline void korina_abort_dma(struct net_device
*dev
,
152 if (readl(&ch
->dmac
) & DMA_CHAN_RUN_BIT
) {
153 writel(0x10, &ch
->dmac
);
155 while (!(readl(&ch
->dmas
) & DMA_STAT_HALT
))
156 dev
->trans_start
= jiffies
;
158 writel(0, &ch
->dmas
);
161 writel(0, &ch
->dmadptr
);
162 writel(0, &ch
->dmandptr
);
165 static inline void korina_chain_dma(struct dma_reg
*ch
, u32 dma_addr
)
167 writel(dma_addr
, &ch
->dmandptr
);
170 static void korina_abort_tx(struct net_device
*dev
)
172 struct korina_private
*lp
= netdev_priv(dev
);
174 korina_abort_dma(dev
, lp
->tx_dma_regs
);
177 static void korina_abort_rx(struct net_device
*dev
)
179 struct korina_private
*lp
= netdev_priv(dev
);
181 korina_abort_dma(dev
, lp
->rx_dma_regs
);
184 static void korina_start_rx(struct korina_private
*lp
,
187 korina_start_dma(lp
->rx_dma_regs
, CPHYSADDR(rd
));
190 static void korina_chain_rx(struct korina_private
*lp
,
193 korina_chain_dma(lp
->rx_dma_regs
, CPHYSADDR(rd
));
196 /* transmit packet */
197 static int korina_send_packet(struct sk_buff
*skb
, struct net_device
*dev
)
199 struct korina_private
*lp
= netdev_priv(dev
);
205 spin_lock_irqsave(&lp
->lock
, flags
);
207 td
= &lp
->td_ring
[lp
->tx_chain_tail
];
209 /* stop queue when full, drop pkts if queue already full */
210 if (lp
->tx_count
>= (KORINA_NUM_TDS
- 2)) {
213 if (lp
->tx_count
== (KORINA_NUM_TDS
- 2))
214 netif_stop_queue(dev
);
216 dev
->stats
.tx_dropped
++;
217 dev_kfree_skb_any(skb
);
218 spin_unlock_irqrestore(&lp
->lock
, flags
);
220 return NETDEV_TX_BUSY
;
226 lp
->tx_skb
[lp
->tx_chain_tail
] = skb
;
229 dma_cache_wback((u32
)skb
->data
, skb
->len
);
231 /* Setup the transmit descriptor. */
232 dma_cache_inv((u32
) td
, sizeof(*td
));
233 td
->ca
= CPHYSADDR(skb
->data
);
234 chain_index
= (lp
->tx_chain_tail
- 1) &
237 if (readl(&(lp
->tx_dma_regs
->dmandptr
)) == 0) {
238 if (lp
->tx_chain_status
== desc_empty
) {
240 td
->control
= DMA_COUNT(length
) |
241 DMA_DESC_COF
| DMA_DESC_IOF
;
243 lp
->tx_chain_tail
= chain_index
;
245 writel(CPHYSADDR(&lp
->td_ring
[lp
->tx_chain_head
]),
246 &lp
->tx_dma_regs
->dmandptr
);
247 /* Move head to tail */
248 lp
->tx_chain_head
= lp
->tx_chain_tail
;
251 td
->control
= DMA_COUNT(length
) |
252 DMA_DESC_COF
| DMA_DESC_IOF
;
254 lp
->td_ring
[chain_index
].control
&=
257 lp
->td_ring
[chain_index
].link
= CPHYSADDR(td
);
259 lp
->tx_chain_tail
= chain_index
;
261 writel(CPHYSADDR(&lp
->td_ring
[lp
->tx_chain_head
]),
262 &(lp
->tx_dma_regs
->dmandptr
));
263 /* Move head to tail */
264 lp
->tx_chain_head
= lp
->tx_chain_tail
;
265 lp
->tx_chain_status
= desc_empty
;
268 if (lp
->tx_chain_status
== desc_empty
) {
270 td
->control
= DMA_COUNT(length
) |
271 DMA_DESC_COF
| DMA_DESC_IOF
;
273 lp
->tx_chain_tail
= chain_index
;
274 lp
->tx_chain_status
= desc_filled
;
275 netif_stop_queue(dev
);
278 td
->control
= DMA_COUNT(length
) |
279 DMA_DESC_COF
| DMA_DESC_IOF
;
280 lp
->td_ring
[chain_index
].control
&=
282 lp
->td_ring
[chain_index
].link
= CPHYSADDR(td
);
283 lp
->tx_chain_tail
= chain_index
;
286 dma_cache_wback((u32
) td
, sizeof(*td
));
288 dev
->trans_start
= jiffies
;
289 spin_unlock_irqrestore(&lp
->lock
, flags
);
294 static int mdio_read(struct net_device
*dev
, int mii_id
, int reg
)
296 struct korina_private
*lp
= netdev_priv(dev
);
299 mii_id
= ((lp
->rx_irq
== 0x2c ? 1 : 0) << 8);
301 writel(0, &lp
->eth_regs
->miimcfg
);
302 writel(0, &lp
->eth_regs
->miimcmd
);
303 writel(mii_id
| reg
, &lp
->eth_regs
->miimaddr
);
304 writel(ETH_MII_CMD_SCN
, &lp
->eth_regs
->miimcmd
);
306 ret
= (int)(readl(&lp
->eth_regs
->miimrdd
));
310 static void mdio_write(struct net_device
*dev
, int mii_id
, int reg
, int val
)
312 struct korina_private
*lp
= netdev_priv(dev
);
314 mii_id
= ((lp
->rx_irq
== 0x2c ? 1 : 0) << 8);
316 writel(0, &lp
->eth_regs
->miimcfg
);
317 writel(1, &lp
->eth_regs
->miimcmd
);
318 writel(mii_id
| reg
, &lp
->eth_regs
->miimaddr
);
319 writel(ETH_MII_CMD_SCN
, &lp
->eth_regs
->miimcmd
);
320 writel(val
, &lp
->eth_regs
->miimwtd
);
323 /* Ethernet Rx DMA interrupt */
324 static irqreturn_t
korina_rx_dma_interrupt(int irq
, void *dev_id
)
326 struct net_device
*dev
= dev_id
;
327 struct korina_private
*lp
= netdev_priv(dev
);
331 dmas
= readl(&lp
->rx_dma_regs
->dmas
);
332 if (dmas
& (DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
)) {
333 netif_rx_schedule_prep(&lp
->napi
);
335 dmasm
= readl(&lp
->rx_dma_regs
->dmasm
);
336 writel(dmasm
| (DMA_STAT_DONE
|
337 DMA_STAT_HALT
| DMA_STAT_ERR
),
338 &lp
->rx_dma_regs
->dmasm
);
340 if (dmas
& DMA_STAT_ERR
)
341 printk(KERN_ERR DRV_NAME
"%s: DMA error\n", dev
->name
);
343 retval
= IRQ_HANDLED
;
350 static int korina_rx(struct net_device
*dev
, int limit
)
352 struct korina_private
*lp
= netdev_priv(dev
);
353 struct dma_desc
*rd
= &lp
->rd_ring
[lp
->rx_next_done
];
354 struct sk_buff
*skb
, *skb_new
;
356 u32 devcs
, pkt_len
, dmas
, rx_free_desc
;
359 dma_cache_inv((u32
)rd
, sizeof(*rd
));
361 for (count
= 0; count
< limit
; count
++) {
365 /* Update statistics counters */
366 if (devcs
& ETH_RX_CRC
)
367 dev
->stats
.rx_crc_errors
++;
368 if (devcs
& ETH_RX_LOR
)
369 dev
->stats
.rx_length_errors
++;
370 if (devcs
& ETH_RX_LE
)
371 dev
->stats
.rx_length_errors
++;
372 if (devcs
& ETH_RX_OVR
)
373 dev
->stats
.rx_over_errors
++;
374 if (devcs
& ETH_RX_CV
)
375 dev
->stats
.rx_frame_errors
++;
376 if (devcs
& ETH_RX_CES
)
377 dev
->stats
.rx_length_errors
++;
378 if (devcs
& ETH_RX_MP
)
379 dev
->stats
.multicast
++;
381 if ((devcs
& ETH_RX_LD
) != ETH_RX_LD
) {
382 /* check that this is a whole packet
383 * WARNING: DMA_FD bit incorrectly set
384 * in Rc32434 (errata ref #077) */
385 dev
->stats
.rx_errors
++;
386 dev
->stats
.rx_dropped
++;
389 while ((rx_free_desc
= KORINA_RBSIZE
- (u32
)DMA_COUNT(rd
->control
)) != 0) {
390 /* init the var. used for the later
391 * operations within the while loop */
393 pkt_len
= RCVPKT_LENGTH(devcs
);
394 skb
= lp
->rx_skb
[lp
->rx_next_done
];
396 if ((devcs
& ETH_RX_ROK
)) {
397 /* must be the (first and) last
399 pkt_buf
= (u8
*)lp
->rx_skb
[lp
->rx_next_done
]->data
;
401 /* invalidate the cache */
402 dma_cache_inv((unsigned long)pkt_buf
, pkt_len
- 4);
404 /* Malloc up new buffer. */
405 skb_new
= netdev_alloc_skb(dev
, KORINA_RBSIZE
+ 2);
409 /* Do not count the CRC */
410 skb_put(skb
, pkt_len
- 4);
411 skb
->protocol
= eth_type_trans(skb
, dev
);
413 /* Pass the packet to upper layers */
414 netif_receive_skb(skb
);
415 dev
->stats
.rx_packets
++;
416 dev
->stats
.rx_bytes
+= pkt_len
;
418 /* Update the mcast stats */
419 if (devcs
& ETH_RX_MP
)
420 dev
->stats
.multicast
++;
422 lp
->rx_skb
[lp
->rx_next_done
] = skb_new
;
427 /* Restore descriptor's curr_addr */
429 rd
->ca
= CPHYSADDR(skb_new
->data
);
431 rd
->ca
= CPHYSADDR(skb
->data
);
433 rd
->control
= DMA_COUNT(KORINA_RBSIZE
) |
434 DMA_DESC_COD
| DMA_DESC_IOD
;
435 lp
->rd_ring
[(lp
->rx_next_done
- 1) &
436 KORINA_RDS_MASK
].control
&=
439 lp
->rx_next_done
= (lp
->rx_next_done
+ 1) & KORINA_RDS_MASK
;
440 dma_cache_wback((u32
)rd
, sizeof(*rd
));
441 rd
= &lp
->rd_ring
[lp
->rx_next_done
];
442 writel(~DMA_STAT_DONE
, &lp
->rx_dma_regs
->dmas
);
446 dmas
= readl(&lp
->rx_dma_regs
->dmas
);
448 if (dmas
& DMA_STAT_HALT
) {
449 writel(~(DMA_STAT_HALT
| DMA_STAT_ERR
),
450 &lp
->rx_dma_regs
->dmas
);
454 skb
= lp
->rx_skb
[lp
->rx_next_done
];
455 rd
->ca
= CPHYSADDR(skb
->data
);
456 dma_cache_wback((u32
)rd
, sizeof(*rd
));
457 korina_chain_rx(lp
, rd
);
463 static int korina_poll(struct napi_struct
*napi
, int budget
)
465 struct korina_private
*lp
=
466 container_of(napi
, struct korina_private
, napi
);
467 struct net_device
*dev
= lp
->dev
;
470 work_done
= korina_rx(dev
, budget
);
471 if (work_done
< budget
) {
472 netif_rx_complete(napi
);
474 writel(readl(&lp
->rx_dma_regs
->dmasm
) &
475 ~(DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
),
476 &lp
->rx_dma_regs
->dmasm
);
482 * Set or clear the multicast filter for this adaptor.
484 static void korina_multicast_list(struct net_device
*dev
)
486 struct korina_private
*lp
= netdev_priv(dev
);
488 struct dev_mc_list
*dmi
= dev
->mc_list
;
489 u32 recognise
= ETH_ARC_AB
; /* always accept broadcasts */
492 /* Set promiscuous mode */
493 if (dev
->flags
& IFF_PROMISC
)
494 recognise
|= ETH_ARC_PRO
;
496 else if ((dev
->flags
& IFF_ALLMULTI
) || (dev
->mc_count
> 4))
497 /* All multicast and broadcast */
498 recognise
|= ETH_ARC_AM
;
500 /* Build the hash table */
501 if (dev
->mc_count
> 4) {
505 for (i
= 0; i
< 4; i
++)
508 for (i
= 0; i
< dev
->mc_count
; i
++) {
509 char *addrs
= dmi
->dmi_addr
;
516 crc
= ether_crc_le(6, addrs
);
518 hash_table
[crc
>> 4] |= 1 << (15 - (crc
& 0xf));
520 /* Accept filtered multicast */
521 recognise
|= ETH_ARC_AFM
;
523 /* Fill the MAC hash tables with their values */
524 writel((u32
)(hash_table
[1] << 16 | hash_table
[0]),
525 &lp
->eth_regs
->ethhash0
);
526 writel((u32
)(hash_table
[3] << 16 | hash_table
[2]),
527 &lp
->eth_regs
->ethhash1
);
530 spin_lock_irqsave(&lp
->lock
, flags
);
531 writel(recognise
, &lp
->eth_regs
->etharc
);
532 spin_unlock_irqrestore(&lp
->lock
, flags
);
535 static void korina_tx(struct net_device
*dev
)
537 struct korina_private
*lp
= netdev_priv(dev
);
538 struct dma_desc
*td
= &lp
->td_ring
[lp
->tx_next_done
];
542 spin_lock(&lp
->lock
);
544 /* Process all desc that are done */
545 while (IS_DMA_FINISHED(td
->control
)) {
546 if (lp
->tx_full
== 1) {
547 netif_wake_queue(dev
);
551 devcs
= lp
->td_ring
[lp
->tx_next_done
].devcs
;
552 if ((devcs
& (ETH_TX_FD
| ETH_TX_LD
)) !=
553 (ETH_TX_FD
| ETH_TX_LD
)) {
554 dev
->stats
.tx_errors
++;
555 dev
->stats
.tx_dropped
++;
557 /* Should never happen */
558 printk(KERN_ERR DRV_NAME
"%s: split tx ignored\n",
560 } else if (devcs
& ETH_TX_TOK
) {
561 dev
->stats
.tx_packets
++;
562 dev
->stats
.tx_bytes
+=
563 lp
->tx_skb
[lp
->tx_next_done
]->len
;
565 dev
->stats
.tx_errors
++;
566 dev
->stats
.tx_dropped
++;
569 if (devcs
& ETH_TX_UND
)
570 dev
->stats
.tx_fifo_errors
++;
572 /* Oversized frame */
573 if (devcs
& ETH_TX_OF
)
574 dev
->stats
.tx_aborted_errors
++;
576 /* Excessive deferrals */
577 if (devcs
& ETH_TX_ED
)
578 dev
->stats
.tx_carrier_errors
++;
580 /* Collisions: medium busy */
581 if (devcs
& ETH_TX_EC
)
582 dev
->stats
.collisions
++;
585 if (devcs
& ETH_TX_LC
)
586 dev
->stats
.tx_window_errors
++;
589 /* We must always free the original skb */
590 if (lp
->tx_skb
[lp
->tx_next_done
]) {
591 dev_kfree_skb_any(lp
->tx_skb
[lp
->tx_next_done
]);
592 lp
->tx_skb
[lp
->tx_next_done
] = NULL
;
595 lp
->td_ring
[lp
->tx_next_done
].control
= DMA_DESC_IOF
;
596 lp
->td_ring
[lp
->tx_next_done
].devcs
= ETH_TX_FD
| ETH_TX_LD
;
597 lp
->td_ring
[lp
->tx_next_done
].link
= 0;
598 lp
->td_ring
[lp
->tx_next_done
].ca
= 0;
601 /* Go on to next transmission */
602 lp
->tx_next_done
= (lp
->tx_next_done
+ 1) & KORINA_TDS_MASK
;
603 td
= &lp
->td_ring
[lp
->tx_next_done
];
607 /* Clear the DMA status register */
608 dmas
= readl(&lp
->tx_dma_regs
->dmas
);
609 writel(~dmas
, &lp
->tx_dma_regs
->dmas
);
611 writel(readl(&lp
->tx_dma_regs
->dmasm
) &
612 ~(DMA_STAT_FINI
| DMA_STAT_ERR
),
613 &lp
->tx_dma_regs
->dmasm
);
615 spin_unlock(&lp
->lock
);
619 korina_tx_dma_interrupt(int irq
, void *dev_id
)
621 struct net_device
*dev
= dev_id
;
622 struct korina_private
*lp
= netdev_priv(dev
);
626 dmas
= readl(&lp
->tx_dma_regs
->dmas
);
628 if (dmas
& (DMA_STAT_FINI
| DMA_STAT_ERR
)) {
631 dmasm
= readl(&lp
->tx_dma_regs
->dmasm
);
632 writel(dmasm
| (DMA_STAT_FINI
| DMA_STAT_ERR
),
633 &lp
->tx_dma_regs
->dmasm
);
635 if (lp
->tx_chain_status
== desc_filled
&&
636 (readl(&(lp
->tx_dma_regs
->dmandptr
)) == 0)) {
637 writel(CPHYSADDR(&lp
->td_ring
[lp
->tx_chain_head
]),
638 &(lp
->tx_dma_regs
->dmandptr
));
639 lp
->tx_chain_status
= desc_empty
;
640 lp
->tx_chain_head
= lp
->tx_chain_tail
;
641 dev
->trans_start
= jiffies
;
643 if (dmas
& DMA_STAT_ERR
)
644 printk(KERN_ERR DRV_NAME
"%s: DMA error\n", dev
->name
);
646 retval
= IRQ_HANDLED
;
654 static void korina_check_media(struct net_device
*dev
, unsigned int init_media
)
656 struct korina_private
*lp
= netdev_priv(dev
);
658 mii_check_media(&lp
->mii_if
, 0, init_media
);
660 if (lp
->mii_if
.full_duplex
)
661 writel(readl(&lp
->eth_regs
->ethmac2
) | ETH_MAC2_FD
,
662 &lp
->eth_regs
->ethmac2
);
664 writel(readl(&lp
->eth_regs
->ethmac2
) & ~ETH_MAC2_FD
,
665 &lp
->eth_regs
->ethmac2
);
668 static void korina_set_carrier(struct mii_if_info
*mii
)
670 if (mii
->force_media
) {
671 /* autoneg is off: Link is always assumed to be up */
672 if (!netif_carrier_ok(mii
->dev
))
673 netif_carrier_on(mii
->dev
);
674 } else /* Let MMI library update carrier status */
675 korina_check_media(mii
->dev
, 0);
678 static int korina_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
680 struct korina_private
*lp
= netdev_priv(dev
);
681 struct mii_ioctl_data
*data
= if_mii(rq
);
684 if (!netif_running(dev
))
686 spin_lock_irq(&lp
->lock
);
687 rc
= generic_mii_ioctl(&lp
->mii_if
, data
, cmd
, NULL
);
688 spin_unlock_irq(&lp
->lock
);
689 korina_set_carrier(&lp
->mii_if
);
694 /* ethtool helpers */
695 static void netdev_get_drvinfo(struct net_device
*dev
,
696 struct ethtool_drvinfo
*info
)
698 struct korina_private
*lp
= netdev_priv(dev
);
700 strcpy(info
->driver
, DRV_NAME
);
701 strcpy(info
->version
, DRV_VERSION
);
702 strcpy(info
->bus_info
, lp
->dev
->name
);
705 static int netdev_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
707 struct korina_private
*lp
= netdev_priv(dev
);
710 spin_lock_irq(&lp
->lock
);
711 rc
= mii_ethtool_gset(&lp
->mii_if
, cmd
);
712 spin_unlock_irq(&lp
->lock
);
717 static int netdev_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
719 struct korina_private
*lp
= netdev_priv(dev
);
722 spin_lock_irq(&lp
->lock
);
723 rc
= mii_ethtool_sset(&lp
->mii_if
, cmd
);
724 spin_unlock_irq(&lp
->lock
);
725 korina_set_carrier(&lp
->mii_if
);
730 static u32
netdev_get_link(struct net_device
*dev
)
732 struct korina_private
*lp
= netdev_priv(dev
);
734 return mii_link_ok(&lp
->mii_if
);
737 static struct ethtool_ops netdev_ethtool_ops
= {
738 .get_drvinfo
= netdev_get_drvinfo
,
739 .get_settings
= netdev_get_settings
,
740 .set_settings
= netdev_set_settings
,
741 .get_link
= netdev_get_link
,
744 static void korina_alloc_ring(struct net_device
*dev
)
746 struct korina_private
*lp
= netdev_priv(dev
);
749 /* Initialize the transmit descriptors */
750 for (i
= 0; i
< KORINA_NUM_TDS
; i
++) {
751 lp
->td_ring
[i
].control
= DMA_DESC_IOF
;
752 lp
->td_ring
[i
].devcs
= ETH_TX_FD
| ETH_TX_LD
;
753 lp
->td_ring
[i
].ca
= 0;
754 lp
->td_ring
[i
].link
= 0;
756 lp
->tx_next_done
= lp
->tx_chain_head
= lp
->tx_chain_tail
=
757 lp
->tx_full
= lp
->tx_count
= 0;
758 lp
->tx_chain_status
= desc_empty
;
760 /* Initialize the receive descriptors */
761 for (i
= 0; i
< KORINA_NUM_RDS
; i
++) {
762 struct sk_buff
*skb
= lp
->rx_skb
[i
];
764 skb
= dev_alloc_skb(KORINA_RBSIZE
+ 2);
769 lp
->rd_ring
[i
].control
= DMA_DESC_IOD
|
770 DMA_COUNT(KORINA_RBSIZE
);
771 lp
->rd_ring
[i
].devcs
= 0;
772 lp
->rd_ring
[i
].ca
= CPHYSADDR(skb
->data
);
773 lp
->rd_ring
[i
].link
= CPHYSADDR(&lp
->rd_ring
[i
+1]);
777 lp
->rd_ring
[i
].link
= CPHYSADDR(&lp
->rd_ring
[0]);
778 lp
->rx_next_done
= 0;
780 lp
->rd_ring
[i
].control
|= DMA_DESC_COD
;
781 lp
->rx_chain_head
= 0;
782 lp
->rx_chain_tail
= 0;
783 lp
->rx_chain_status
= desc_empty
;
786 static void korina_free_ring(struct net_device
*dev
)
788 struct korina_private
*lp
= netdev_priv(dev
);
791 for (i
= 0; i
< KORINA_NUM_RDS
; i
++) {
792 lp
->rd_ring
[i
].control
= 0;
794 dev_kfree_skb_any(lp
->rx_skb
[i
]);
795 lp
->rx_skb
[i
] = NULL
;
798 for (i
= 0; i
< KORINA_NUM_TDS
; i
++) {
799 lp
->td_ring
[i
].control
= 0;
801 dev_kfree_skb_any(lp
->tx_skb
[i
]);
802 lp
->tx_skb
[i
] = NULL
;
807 * Initialize the RC32434 ethernet controller.
809 static int korina_init(struct net_device
*dev
)
811 struct korina_private
*lp
= netdev_priv(dev
);
814 korina_abort_tx(dev
);
815 korina_abort_rx(dev
);
817 /* reset ethernet logic */
818 writel(0, &lp
->eth_regs
->ethintfc
);
819 while ((readl(&lp
->eth_regs
->ethintfc
) & ETH_INT_FC_RIP
))
820 dev
->trans_start
= jiffies
;
822 /* Enable Ethernet Interface */
823 writel(ETH_INT_FC_EN
, &lp
->eth_regs
->ethintfc
);
826 korina_alloc_ring(dev
);
828 writel(0, &lp
->rx_dma_regs
->dmas
);
830 korina_start_rx(lp
, &lp
->rd_ring
[0]);
832 writel(readl(&lp
->tx_dma_regs
->dmasm
) &
833 ~(DMA_STAT_FINI
| DMA_STAT_ERR
),
834 &lp
->tx_dma_regs
->dmasm
);
835 writel(readl(&lp
->rx_dma_regs
->dmasm
) &
836 ~(DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
),
837 &lp
->rx_dma_regs
->dmasm
);
839 /* Accept only packets destined for this Ethernet device address */
840 writel(ETH_ARC_AB
, &lp
->eth_regs
->etharc
);
842 /* Set all Ether station address registers to their initial values */
843 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal0
);
844 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah0
);
846 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal1
);
847 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah1
);
849 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal2
);
850 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah2
);
852 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal3
);
853 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah3
);
856 /* Frame Length Checking, Pad Enable, CRC Enable, Full Duplex set */
857 writel(ETH_MAC2_PE
| ETH_MAC2_CEN
| ETH_MAC2_FD
,
858 &lp
->eth_regs
->ethmac2
);
860 /* Back to back inter-packet-gap */
861 writel(0x15, &lp
->eth_regs
->ethipgt
);
862 /* Non - Back to back inter-packet-gap */
863 writel(0x12, &lp
->eth_regs
->ethipgr
);
865 /* Management Clock Prescaler Divisor
866 * Clock independent setting */
867 writel(((idt_cpu_freq
) / MII_CLOCK
+ 1) & ~1,
868 &lp
->eth_regs
->ethmcp
);
870 /* don't transmit until fifo contains 48b */
871 writel(48, &lp
->eth_regs
->ethfifott
);
873 writel(ETH_MAC1_RE
, &lp
->eth_regs
->ethmac1
);
875 napi_enable(&lp
->napi
);
876 netif_start_queue(dev
);
882 * Restart the RC32434 ethernet controller.
883 * FIXME: check the return status where we call it
885 static int korina_restart(struct net_device
*dev
)
887 struct korina_private
*lp
= netdev_priv(dev
);
893 disable_irq(lp
->rx_irq
);
894 disable_irq(lp
->tx_irq
);
895 disable_irq(lp
->ovr_irq
);
896 disable_irq(lp
->und_irq
);
898 writel(readl(&lp
->tx_dma_regs
->dmasm
) |
899 DMA_STAT_FINI
| DMA_STAT_ERR
,
900 &lp
->tx_dma_regs
->dmasm
);
901 writel(readl(&lp
->rx_dma_regs
->dmasm
) |
902 DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
,
903 &lp
->rx_dma_regs
->dmasm
);
905 korina_free_ring(dev
);
907 ret
= korina_init(dev
);
909 printk(KERN_ERR DRV_NAME
"%s: cannot restart device\n",
913 korina_multicast_list(dev
);
915 enable_irq(lp
->und_irq
);
916 enable_irq(lp
->ovr_irq
);
917 enable_irq(lp
->tx_irq
);
918 enable_irq(lp
->rx_irq
);
923 static void korina_clear_and_restart(struct net_device
*dev
, u32 value
)
925 struct korina_private
*lp
= netdev_priv(dev
);
927 netif_stop_queue(dev
);
928 writel(value
, &lp
->eth_regs
->ethintfc
);
932 /* Ethernet Tx Underflow interrupt */
933 static irqreturn_t
korina_und_interrupt(int irq
, void *dev_id
)
935 struct net_device
*dev
= dev_id
;
936 struct korina_private
*lp
= netdev_priv(dev
);
939 spin_lock(&lp
->lock
);
941 und
= readl(&lp
->eth_regs
->ethintfc
);
943 if (und
& ETH_INT_FC_UND
)
944 korina_clear_and_restart(dev
, und
& ~ETH_INT_FC_UND
);
946 spin_unlock(&lp
->lock
);
951 static void korina_tx_timeout(struct net_device
*dev
)
953 struct korina_private
*lp
= netdev_priv(dev
);
956 spin_lock_irqsave(&lp
->lock
, flags
);
958 spin_unlock_irqrestore(&lp
->lock
, flags
);
961 /* Ethernet Rx Overflow interrupt */
963 korina_ovr_interrupt(int irq
, void *dev_id
)
965 struct net_device
*dev
= dev_id
;
966 struct korina_private
*lp
= netdev_priv(dev
);
969 spin_lock(&lp
->lock
);
970 ovr
= readl(&lp
->eth_regs
->ethintfc
);
972 if (ovr
& ETH_INT_FC_OVR
)
973 korina_clear_and_restart(dev
, ovr
& ~ETH_INT_FC_OVR
);
975 spin_unlock(&lp
->lock
);
980 #ifdef CONFIG_NET_POLL_CONTROLLER
981 static void korina_poll_controller(struct net_device
*dev
)
983 disable_irq(dev
->irq
);
984 korina_tx_dma_interrupt(dev
->irq
, dev
);
985 enable_irq(dev
->irq
);
989 static int korina_open(struct net_device
*dev
)
991 struct korina_private
*lp
= netdev_priv(dev
);
995 ret
= korina_init(dev
);
997 printk(KERN_ERR DRV_NAME
"%s: cannot open device\n", dev
->name
);
1001 /* Install the interrupt handler
1002 * that handles the Done Finished
1003 * Ovr and Und Events */
1004 ret
= request_irq(lp
->rx_irq
, &korina_rx_dma_interrupt
,
1005 IRQF_SHARED
| IRQF_DISABLED
, "Korina ethernet Rx", dev
);
1007 printk(KERN_ERR DRV_NAME
"%s: unable to get Rx DMA IRQ %d\n",
1008 dev
->name
, lp
->rx_irq
);
1011 ret
= request_irq(lp
->tx_irq
, &korina_tx_dma_interrupt
,
1012 IRQF_SHARED
| IRQF_DISABLED
, "Korina ethernet Tx", dev
);
1014 printk(KERN_ERR DRV_NAME
"%s: unable to get Tx DMA IRQ %d\n",
1015 dev
->name
, lp
->tx_irq
);
1016 goto err_free_rx_irq
;
1019 /* Install handler for overrun error. */
1020 ret
= request_irq(lp
->ovr_irq
, &korina_ovr_interrupt
,
1021 IRQF_SHARED
| IRQF_DISABLED
, "Ethernet Overflow", dev
);
1023 printk(KERN_ERR DRV_NAME
"%s: unable to get OVR IRQ %d\n",
1024 dev
->name
, lp
->ovr_irq
);
1025 goto err_free_tx_irq
;
1028 /* Install handler for underflow error. */
1029 ret
= request_irq(lp
->und_irq
, &korina_und_interrupt
,
1030 IRQF_SHARED
| IRQF_DISABLED
, "Ethernet Underflow", dev
);
1032 printk(KERN_ERR DRV_NAME
"%s: unable to get UND IRQ %d\n",
1033 dev
->name
, lp
->und_irq
);
1034 goto err_free_ovr_irq
;
1040 free_irq(lp
->ovr_irq
, dev
);
1042 free_irq(lp
->tx_irq
, dev
);
1044 free_irq(lp
->rx_irq
, dev
);
1046 korina_free_ring(dev
);
1050 static int korina_close(struct net_device
*dev
)
1052 struct korina_private
*lp
= netdev_priv(dev
);
1055 /* Disable interrupts */
1056 disable_irq(lp
->rx_irq
);
1057 disable_irq(lp
->tx_irq
);
1058 disable_irq(lp
->ovr_irq
);
1059 disable_irq(lp
->und_irq
);
1061 korina_abort_tx(dev
);
1062 tmp
= readl(&lp
->tx_dma_regs
->dmasm
);
1063 tmp
= tmp
| DMA_STAT_FINI
| DMA_STAT_ERR
;
1064 writel(tmp
, &lp
->tx_dma_regs
->dmasm
);
1066 korina_abort_rx(dev
);
1067 tmp
= readl(&lp
->rx_dma_regs
->dmasm
);
1068 tmp
= tmp
| DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
;
1069 writel(tmp
, &lp
->rx_dma_regs
->dmasm
);
1071 korina_free_ring(dev
);
1073 free_irq(lp
->rx_irq
, dev
);
1074 free_irq(lp
->tx_irq
, dev
);
1075 free_irq(lp
->ovr_irq
, dev
);
1076 free_irq(lp
->und_irq
, dev
);
1081 static int korina_probe(struct platform_device
*pdev
)
1083 struct korina_device
*bif
= platform_get_drvdata(pdev
);
1084 struct korina_private
*lp
;
1085 struct net_device
*dev
;
1089 dev
= alloc_etherdev(sizeof(struct korina_private
));
1091 printk(KERN_ERR DRV_NAME
": alloc_etherdev failed\n");
1094 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1095 lp
= netdev_priv(dev
);
1098 memcpy(dev
->dev_addr
, bif
->mac
, 6);
1100 lp
->rx_irq
= platform_get_irq_byname(pdev
, "korina_rx");
1101 lp
->tx_irq
= platform_get_irq_byname(pdev
, "korina_tx");
1102 lp
->ovr_irq
= platform_get_irq_byname(pdev
, "korina_ovr");
1103 lp
->und_irq
= platform_get_irq_byname(pdev
, "korina_und");
1105 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "korina_regs");
1106 dev
->base_addr
= r
->start
;
1107 lp
->eth_regs
= ioremap_nocache(r
->start
, r
->end
- r
->start
);
1108 if (!lp
->eth_regs
) {
1109 printk(KERN_ERR DRV_NAME
"cannot remap registers\n");
1114 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "korina_dma_rx");
1115 lp
->rx_dma_regs
= ioremap_nocache(r
->start
, r
->end
- r
->start
);
1116 if (!lp
->rx_dma_regs
) {
1117 printk(KERN_ERR DRV_NAME
"cannot remap Rx DMA registers\n");
1119 goto probe_err_dma_rx
;
1122 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "korina_dma_tx");
1123 lp
->tx_dma_regs
= ioremap_nocache(r
->start
, r
->end
- r
->start
);
1124 if (!lp
->tx_dma_regs
) {
1125 printk(KERN_ERR DRV_NAME
"cannot remap Tx DMA registers\n");
1127 goto probe_err_dma_tx
;
1130 lp
->td_ring
= kmalloc(TD_RING_SIZE
+ RD_RING_SIZE
, GFP_KERNEL
);
1132 printk(KERN_ERR DRV_NAME
"cannot allocate descriptors\n");
1134 goto probe_err_td_ring
;
1137 dma_cache_inv((unsigned long)(lp
->td_ring
),
1138 TD_RING_SIZE
+ RD_RING_SIZE
);
1140 /* now convert TD_RING pointer to KSEG1 */
1141 lp
->td_ring
= (struct dma_desc
*)KSEG1ADDR(lp
->td_ring
);
1142 lp
->rd_ring
= &lp
->td_ring
[KORINA_NUM_TDS
];
1144 spin_lock_init(&lp
->lock
);
1145 /* just use the rx dma irq */
1146 dev
->irq
= lp
->rx_irq
;
1149 dev
->open
= korina_open
;
1150 dev
->stop
= korina_close
;
1151 dev
->hard_start_xmit
= korina_send_packet
;
1152 dev
->set_multicast_list
= &korina_multicast_list
;
1153 dev
->ethtool_ops
= &netdev_ethtool_ops
;
1154 dev
->tx_timeout
= korina_tx_timeout
;
1155 dev
->watchdog_timeo
= TX_TIMEOUT
;
1156 dev
->do_ioctl
= &korina_ioctl
;
1157 #ifdef CONFIG_NET_POLL_CONTROLLER
1158 dev
->poll_controller
= korina_poll_controller
;
1160 netif_napi_add(dev
, &lp
->napi
, korina_poll
, 64);
1162 lp
->phy_addr
= (((lp
->rx_irq
== 0x2c? 1:0) << 8) | 0x05);
1163 lp
->mii_if
.dev
= dev
;
1164 lp
->mii_if
.mdio_read
= mdio_read
;
1165 lp
->mii_if
.mdio_write
= mdio_write
;
1166 lp
->mii_if
.phy_id
= lp
->phy_addr
;
1167 lp
->mii_if
.phy_id_mask
= 0x1f;
1168 lp
->mii_if
.reg_num_mask
= 0x1f;
1170 rc
= register_netdev(dev
);
1172 printk(KERN_ERR DRV_NAME
1173 ": cannot register net device %d\n", rc
);
1174 goto probe_err_register
;
1182 iounmap(lp
->tx_dma_regs
);
1184 iounmap(lp
->rx_dma_regs
);
1186 iounmap(lp
->eth_regs
);
1192 static int korina_remove(struct platform_device
*pdev
)
1194 struct korina_device
*bif
= platform_get_drvdata(pdev
);
1195 struct korina_private
*lp
= netdev_priv(bif
->dev
);
1197 iounmap(lp
->eth_regs
);
1198 iounmap(lp
->rx_dma_regs
);
1199 iounmap(lp
->tx_dma_regs
);
1201 platform_set_drvdata(pdev
, NULL
);
1202 unregister_netdev(bif
->dev
);
1203 free_netdev(bif
->dev
);
1208 static struct platform_driver korina_driver
= {
1209 .driver
.name
= "korina",
1210 .probe
= korina_probe
,
1211 .remove
= korina_remove
,
1214 static int __init
korina_init_module(void)
1216 return platform_driver_register(&korina_driver
);
1219 static void korina_cleanup_module(void)
1221 return platform_driver_unregister(&korina_driver
);
1224 module_init(korina_init_module
);
1225 module_exit(korina_cleanup_module
);
1227 MODULE_AUTHOR("Philip Rischel <rischelp@idt.com>");
1228 MODULE_AUTHOR("Felix Fietkau <nbd@openwrt.org>");
1229 MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
1230 MODULE_DESCRIPTION("IDT RC32434 (Korina) Ethernet driver");
1231 MODULE_LICENSE("GPL");