2 * Common prep/chrp pci routines. -- Cort
5 #include <linux/config.h>
6 #include <linux/kernel.h>
8 #include <linux/delay.h>
9 #include <linux/string.h>
10 #include <linux/init.h>
11 #include <linux/capability.h>
12 #include <linux/sched.h>
13 #include <linux/errno.h>
14 #include <linux/bootmem.h>
16 #include <asm/processor.h>
19 #include <asm/sections.h>
20 #include <asm/pci-bridge.h>
21 #include <asm/byteorder.h>
23 #include <asm/uaccess.h>
24 #include <asm/machdep.h>
29 #define DBG(x...) printk(x)
34 unsigned long isa_io_base
= 0;
35 unsigned long isa_mem_base
= 0;
36 unsigned long pci_dram_offset
= 0;
37 int pcibios_assign_bus_offset
= 1;
39 void pcibios_make_OF_bus_map(void);
41 static int pci_relocate_bridge_resource(struct pci_bus
*bus
, int i
);
42 static int probe_resource(struct pci_bus
*parent
, struct resource
*pr
,
43 struct resource
*res
, struct resource
**conflict
);
44 static void update_bridge_base(struct pci_bus
*bus
, int i
);
45 static void pcibios_fixup_resources(struct pci_dev
* dev
);
46 static void fixup_broken_pcnet32(struct pci_dev
* dev
);
47 static int reparent_resources(struct resource
*parent
, struct resource
*res
);
48 static void fixup_cpc710_pci64(struct pci_dev
* dev
);
50 static u8
* pci_to_OF_bus_map
;
53 /* By default, we don't re-assign bus numbers.
55 int pci_assign_all_buses
;
57 struct pci_controller
* hose_head
;
58 struct pci_controller
** hose_tail
= &hose_head
;
60 static int pci_bus_count
;
63 fixup_broken_pcnet32(struct pci_dev
* dev
)
65 if ((dev
->class>>8 == PCI_CLASS_NETWORK_ETHERNET
)) {
66 dev
->vendor
= PCI_VENDOR_ID_AMD
;
67 pci_write_config_word(dev
, PCI_VENDOR_ID
, PCI_VENDOR_ID_AMD
);
70 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT
, PCI_ANY_ID
, fixup_broken_pcnet32
);
73 fixup_cpc710_pci64(struct pci_dev
* dev
)
75 /* Hide the PCI64 BARs from the kernel as their content doesn't
76 * fit well in the resource management
78 dev
->resource
[0].start
= dev
->resource
[0].end
= 0;
79 dev
->resource
[0].flags
= 0;
80 dev
->resource
[1].start
= dev
->resource
[1].end
= 0;
81 dev
->resource
[1].flags
= 0;
83 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM
, PCI_DEVICE_ID_IBM_CPC710_PCI64
, fixup_cpc710_pci64
);
86 pcibios_fixup_resources(struct pci_dev
*dev
)
88 struct pci_controller
* hose
= (struct pci_controller
*)dev
->sysdata
;
93 printk(KERN_ERR
"No hose for PCI dev %s!\n", pci_name(dev
));
96 for (i
= 0; i
< DEVICE_COUNT_RESOURCE
; i
++) {
97 struct resource
*res
= dev
->resource
+ i
;
100 if (res
->end
== 0xffffffff) {
101 DBG("PCI:%s Resource %d [%08lx-%08lx] is unassigned\n",
102 pci_name(dev
), i
, res
->start
, res
->end
);
103 res
->end
-= res
->start
;
105 res
->flags
|= IORESOURCE_UNSET
;
109 if (res
->flags
& IORESOURCE_MEM
) {
110 offset
= hose
->pci_mem_offset
;
111 } else if (res
->flags
& IORESOURCE_IO
) {
112 offset
= (unsigned long) hose
->io_base_virt
116 res
->start
+= offset
;
119 printk("Fixup res %d (%lx) of dev %s: %lx -> %lx\n",
120 i
, res
->flags
, pci_name(dev
),
121 res
->start
- offset
, res
->start
);
126 /* Call machine specific resource fixup */
127 if (ppc_md
.pcibios_fixup_resources
)
128 ppc_md
.pcibios_fixup_resources(dev
);
130 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID
, PCI_ANY_ID
, pcibios_fixup_resources
);
132 void pcibios_resource_to_bus(struct pci_dev
*dev
, struct pci_bus_region
*region
,
133 struct resource
*res
)
135 unsigned long offset
= 0;
136 struct pci_controller
*hose
= dev
->sysdata
;
138 if (hose
&& res
->flags
& IORESOURCE_IO
)
139 offset
= (unsigned long)hose
->io_base_virt
- isa_io_base
;
140 else if (hose
&& res
->flags
& IORESOURCE_MEM
)
141 offset
= hose
->pci_mem_offset
;
142 region
->start
= res
->start
- offset
;
143 region
->end
= res
->end
- offset
;
145 EXPORT_SYMBOL(pcibios_resource_to_bus
);
147 void pcibios_bus_to_resource(struct pci_dev
*dev
, struct resource
*res
,
148 struct pci_bus_region
*region
)
150 unsigned long offset
= 0;
151 struct pci_controller
*hose
= dev
->sysdata
;
153 if (hose
&& res
->flags
& IORESOURCE_IO
)
154 offset
= (unsigned long)hose
->io_base_virt
- isa_io_base
;
155 else if (hose
&& res
->flags
& IORESOURCE_MEM
)
156 offset
= hose
->pci_mem_offset
;
157 res
->start
= region
->start
+ offset
;
158 res
->end
= region
->end
+ offset
;
160 EXPORT_SYMBOL(pcibios_bus_to_resource
);
163 * We need to avoid collisions with `mirrored' VGA ports
164 * and other strange ISA hardware, so we always want the
165 * addresses to be allocated in the 0x000-0x0ff region
168 * Why? Because some silly external IO cards only decode
169 * the low 10 bits of the IO address. The 0x00-0xff region
170 * is reserved for motherboard devices that decode all 16
171 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
172 * but we want to try to avoid allocating at 0x2900-0x2bff
173 * which might have be mirrored at 0x0100-0x03ff..
175 void pcibios_align_resource(void *data
, struct resource
*res
, unsigned long size
,
178 struct pci_dev
*dev
= data
;
180 if (res
->flags
& IORESOURCE_IO
) {
181 unsigned long start
= res
->start
;
184 printk(KERN_ERR
"PCI: I/O Region %s/%d too large"
185 " (%ld bytes)\n", pci_name(dev
),
186 dev
->resource
- res
, size
);
190 start
= (start
+ 0x3ff) & ~0x3ff;
195 EXPORT_SYMBOL(pcibios_align_resource
);
198 * Handle resources of PCI devices. If the world were perfect, we could
199 * just allocate all the resource regions and do nothing more. It isn't.
200 * On the other hand, we cannot just re-allocate all devices, as it would
201 * require us to know lots of host bridge internals. So we attempt to
202 * keep as much of the original configuration as possible, but tweak it
203 * when it's found to be wrong.
205 * Known BIOS problems we have to work around:
206 * - I/O or memory regions not configured
207 * - regions configured, but not enabled in the command register
208 * - bogus I/O addresses above 64K used
209 * - expansion ROMs left enabled (this may sound harmless, but given
210 * the fact the PCI specs explicitly allow address decoders to be
211 * shared between expansion ROMs and other resource regions, it's
212 * at least dangerous)
215 * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
216 * This gives us fixed barriers on where we can allocate.
217 * (2) Allocate resources for all enabled devices. If there is
218 * a collision, just mark the resource as unallocated. Also
219 * disable expansion ROMs during this step.
220 * (3) Try to allocate resources for disabled devices. If the
221 * resources were assigned correctly, everything goes well,
222 * if they weren't, they won't disturb allocation of other
224 * (4) Assign new addresses to resources which were either
225 * not configured at all or misconfigured. If explicitly
226 * requested by the user, configure expansion ROM address
231 pcibios_allocate_bus_resources(struct list_head
*bus_list
)
235 struct resource
*res
, *pr
;
237 /* Depth-First Search on bus tree */
238 list_for_each_entry(bus
, bus_list
, node
) {
239 for (i
= 0; i
< 4; ++i
) {
240 if ((res
= bus
->resource
[i
]) == NULL
|| !res
->flags
241 || res
->start
> res
->end
)
243 if (bus
->parent
== NULL
)
244 pr
= (res
->flags
& IORESOURCE_IO
)?
245 &ioport_resource
: &iomem_resource
;
247 pr
= pci_find_parent_resource(bus
->self
, res
);
249 /* this happens when the generic PCI
250 * code (wrongly) decides that this
251 * bridge is transparent -- paulus
257 DBG("PCI: bridge rsrc %lx..%lx (%lx), parent %p\n",
258 res
->start
, res
->end
, res
->flags
, pr
);
260 if (request_resource(pr
, res
) == 0)
263 * Must be a conflict with an existing entry.
264 * Move that entry (or entries) under the
265 * bridge resource and try again.
267 if (reparent_resources(pr
, res
) == 0)
270 printk(KERN_ERR
"PCI: Cannot allocate resource region "
271 "%d of PCI bridge %d\n", i
, bus
->number
);
272 if (pci_relocate_bridge_resource(bus
, i
))
273 bus
->resource
[i
] = NULL
;
275 pcibios_allocate_bus_resources(&bus
->children
);
280 * Reparent resource children of pr that conflict with res
281 * under res, and make res replace those children.
284 reparent_resources(struct resource
*parent
, struct resource
*res
)
286 struct resource
*p
, **pp
;
287 struct resource
**firstpp
= NULL
;
289 for (pp
= &parent
->child
; (p
= *pp
) != NULL
; pp
= &p
->sibling
) {
290 if (p
->end
< res
->start
)
292 if (res
->end
< p
->start
)
294 if (p
->start
< res
->start
|| p
->end
> res
->end
)
295 return -1; /* not completely contained */
300 return -1; /* didn't find any conflicting entries? */
301 res
->parent
= parent
;
302 res
->child
= *firstpp
;
306 for (p
= res
->child
; p
!= NULL
; p
= p
->sibling
) {
308 DBG(KERN_INFO
"PCI: reparented %s [%lx..%lx] under %s\n",
309 p
->name
, p
->start
, p
->end
, res
->name
);
315 * A bridge has been allocated a range which is outside the range
316 * of its parent bridge, so it needs to be moved.
319 pci_relocate_bridge_resource(struct pci_bus
*bus
, int i
)
321 struct resource
*res
, *pr
, *conflict
;
322 unsigned long try, size
;
324 struct pci_bus
*parent
= bus
->parent
;
326 if (parent
== NULL
) {
327 /* shouldn't ever happen */
328 printk(KERN_ERR
"PCI: can't move host bridge resource\n");
331 res
= bus
->resource
[i
];
335 for (j
= 0; j
< 4; j
++) {
336 struct resource
*r
= parent
->resource
[j
];
339 if ((res
->flags
^ r
->flags
) & (IORESOURCE_IO
| IORESOURCE_MEM
))
341 if (!((res
->flags
^ r
->flags
) & IORESOURCE_PREFETCH
)) {
345 if (res
->flags
& IORESOURCE_PREFETCH
)
350 size
= res
->end
- res
->start
;
351 if (pr
->start
> pr
->end
|| size
> pr
->end
- pr
->start
)
355 res
->start
= try - size
;
357 if (probe_resource(bus
->parent
, pr
, res
, &conflict
) == 0)
359 if (conflict
->start
<= pr
->start
+ size
)
361 try = conflict
->start
- 1;
363 if (request_resource(pr
, res
)) {
364 DBG(KERN_ERR
"PCI: huh? couldn't move to %lx..%lx\n",
365 res
->start
, res
->end
);
366 return -1; /* "can't happen" */
368 update_bridge_base(bus
, i
);
369 printk(KERN_INFO
"PCI: bridge %d resource %d moved to %lx..%lx\n",
370 bus
->number
, i
, res
->start
, res
->end
);
375 probe_resource(struct pci_bus
*parent
, struct resource
*pr
,
376 struct resource
*res
, struct resource
**conflict
)
383 for (r
= pr
->child
; r
!= NULL
; r
= r
->sibling
) {
384 if (r
->end
>= res
->start
&& res
->end
>= r
->start
) {
389 list_for_each_entry(bus
, &parent
->children
, node
) {
390 for (i
= 0; i
< 4; ++i
) {
391 if ((r
= bus
->resource
[i
]) == NULL
)
393 if (!r
->flags
|| r
->start
> r
->end
|| r
== res
)
395 if (pci_find_parent_resource(bus
->self
, r
) != pr
)
397 if (r
->end
>= res
->start
&& res
->end
>= r
->start
) {
403 list_for_each_entry(dev
, &parent
->devices
, bus_list
) {
404 for (i
= 0; i
< 6; ++i
) {
405 r
= &dev
->resource
[i
];
406 if (!r
->flags
|| (r
->flags
& IORESOURCE_UNSET
))
408 if (pci_find_parent_resource(dev
, r
) != pr
)
410 if (r
->end
>= res
->start
&& res
->end
>= r
->start
) {
420 update_bridge_base(struct pci_bus
*bus
, int i
)
422 struct resource
*res
= bus
->resource
[i
];
423 u8 io_base_lo
, io_limit_lo
;
424 u16 mem_base
, mem_limit
;
426 unsigned long start
, end
, off
;
427 struct pci_dev
*dev
= bus
->self
;
428 struct pci_controller
*hose
= dev
->sysdata
;
431 printk("update_bridge_base: no hose?\n");
434 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
435 pci_write_config_word(dev
, PCI_COMMAND
,
436 cmd
& ~(PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
));
437 if (res
->flags
& IORESOURCE_IO
) {
438 off
= (unsigned long) hose
->io_base_virt
- isa_io_base
;
439 start
= res
->start
- off
;
440 end
= res
->end
- off
;
441 io_base_lo
= (start
>> 8) & PCI_IO_RANGE_MASK
;
442 io_limit_lo
= (end
>> 8) & PCI_IO_RANGE_MASK
;
444 pci_write_config_word(dev
, PCI_IO_BASE_UPPER16
,
446 pci_write_config_word(dev
, PCI_IO_LIMIT_UPPER16
,
448 io_base_lo
|= PCI_IO_RANGE_TYPE_32
;
450 io_base_lo
|= PCI_IO_RANGE_TYPE_16
;
451 pci_write_config_byte(dev
, PCI_IO_BASE
, io_base_lo
);
452 pci_write_config_byte(dev
, PCI_IO_LIMIT
, io_limit_lo
);
454 } else if ((res
->flags
& (IORESOURCE_MEM
| IORESOURCE_PREFETCH
))
456 off
= hose
->pci_mem_offset
;
457 mem_base
= ((res
->start
- off
) >> 16) & PCI_MEMORY_RANGE_MASK
;
458 mem_limit
= ((res
->end
- off
) >> 16) & PCI_MEMORY_RANGE_MASK
;
459 pci_write_config_word(dev
, PCI_MEMORY_BASE
, mem_base
);
460 pci_write_config_word(dev
, PCI_MEMORY_LIMIT
, mem_limit
);
462 } else if ((res
->flags
& (IORESOURCE_MEM
| IORESOURCE_PREFETCH
))
463 == (IORESOURCE_MEM
| IORESOURCE_PREFETCH
)) {
464 off
= hose
->pci_mem_offset
;
465 mem_base
= ((res
->start
- off
) >> 16) & PCI_PREF_RANGE_MASK
;
466 mem_limit
= ((res
->end
- off
) >> 16) & PCI_PREF_RANGE_MASK
;
467 pci_write_config_word(dev
, PCI_PREF_MEMORY_BASE
, mem_base
);
468 pci_write_config_word(dev
, PCI_PREF_MEMORY_LIMIT
, mem_limit
);
471 DBG(KERN_ERR
"PCI: ugh, bridge %s res %d has flags=%lx\n",
472 pci_name(dev
), i
, res
->flags
);
474 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);
477 static inline void alloc_resource(struct pci_dev
*dev
, int idx
)
479 struct resource
*pr
, *r
= &dev
->resource
[idx
];
481 DBG("PCI:%s: Resource %d: %08lx-%08lx (f=%lx)\n",
482 pci_name(dev
), idx
, r
->start
, r
->end
, r
->flags
);
483 pr
= pci_find_parent_resource(dev
, r
);
484 if (!pr
|| request_resource(pr
, r
) < 0) {
485 printk(KERN_ERR
"PCI: Cannot allocate resource region %d"
486 " of device %s\n", idx
, pci_name(dev
));
488 DBG("PCI: parent is %p: %08lx-%08lx (f=%lx)\n",
489 pr
, pr
->start
, pr
->end
, pr
->flags
);
490 /* We'll assign a new address later */
491 r
->flags
|= IORESOURCE_UNSET
;
498 pcibios_allocate_resources(int pass
)
500 struct pci_dev
*dev
= NULL
;
505 for_each_pci_dev(dev
) {
506 pci_read_config_word(dev
, PCI_COMMAND
, &command
);
507 for (idx
= 0; idx
< 6; idx
++) {
508 r
= &dev
->resource
[idx
];
509 if (r
->parent
) /* Already allocated */
511 if (!r
->flags
|| (r
->flags
& IORESOURCE_UNSET
))
512 continue; /* Not assigned at all */
513 if (r
->flags
& IORESOURCE_IO
)
514 disabled
= !(command
& PCI_COMMAND_IO
);
516 disabled
= !(command
& PCI_COMMAND_MEMORY
);
517 if (pass
== disabled
)
518 alloc_resource(dev
, idx
);
522 r
= &dev
->resource
[PCI_ROM_RESOURCE
];
523 if (r
->flags
& IORESOURCE_ROM_ENABLE
) {
524 /* Turn the ROM off, leave the resource region, but keep it unregistered. */
526 DBG("PCI: Switching off ROM of %s\n", pci_name(dev
));
527 r
->flags
&= ~IORESOURCE_ROM_ENABLE
;
528 pci_read_config_dword(dev
, dev
->rom_base_reg
, ®
);
529 pci_write_config_dword(dev
, dev
->rom_base_reg
,
530 reg
& ~PCI_ROM_ADDRESS_ENABLE
);
536 pcibios_assign_resources(void)
538 struct pci_dev
*dev
= NULL
;
542 for_each_pci_dev(dev
) {
543 int class = dev
->class >> 8;
545 /* Don't touch classless devices and host bridges */
546 if (!class || class == PCI_CLASS_BRIDGE_HOST
)
549 for (idx
= 0; idx
< 6; idx
++) {
550 r
= &dev
->resource
[idx
];
553 * We shall assign a new address to this resource,
554 * either because the BIOS (sic) forgot to do so
555 * or because we have decided the old address was
556 * unusable for some reason.
558 if ((r
->flags
& IORESOURCE_UNSET
) && r
->end
&&
559 (!ppc_md
.pcibios_enable_device_hook
||
560 !ppc_md
.pcibios_enable_device_hook(dev
, 1))) {
561 r
->flags
&= ~IORESOURCE_UNSET
;
562 pci_assign_resource(dev
, idx
);
566 #if 0 /* don't assign ROMs */
567 r
= &dev
->resource
[PCI_ROM_RESOURCE
];
571 pci_assign_resource(dev
, PCI_ROM_RESOURCE
);
578 pcibios_enable_resources(struct pci_dev
*dev
, int mask
)
584 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
586 for (idx
=0; idx
<6; idx
++) {
587 /* Only set up the requested stuff */
588 if (!(mask
& (1<<idx
)))
591 r
= &dev
->resource
[idx
];
592 if (r
->flags
& IORESOURCE_UNSET
) {
593 printk(KERN_ERR
"PCI: Device %s not available because of resource collisions\n", pci_name(dev
));
596 if (r
->flags
& IORESOURCE_IO
)
597 cmd
|= PCI_COMMAND_IO
;
598 if (r
->flags
& IORESOURCE_MEM
)
599 cmd
|= PCI_COMMAND_MEMORY
;
601 if (dev
->resource
[PCI_ROM_RESOURCE
].start
)
602 cmd
|= PCI_COMMAND_MEMORY
;
603 if (cmd
!= old_cmd
) {
604 printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev
), old_cmd
, cmd
);
605 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);
610 static int next_controller_index
;
612 struct pci_controller
* __init
613 pcibios_alloc_controller(void)
615 struct pci_controller
*hose
;
617 hose
= (struct pci_controller
*)alloc_bootmem(sizeof(*hose
));
618 memset(hose
, 0, sizeof(struct pci_controller
));
621 hose_tail
= &hose
->next
;
623 hose
->index
= next_controller_index
++;
630 * Functions below are used on OpenFirmware machines.
633 make_one_node_map(struct device_node
* node
, u8 pci_bus
)
638 if (pci_bus
>= pci_bus_count
)
640 bus_range
= (int *) get_property(node
, "bus-range", &len
);
641 if (bus_range
== NULL
|| len
< 2 * sizeof(int)) {
642 printk(KERN_WARNING
"Can't get bus-range for %s, "
643 "assuming it starts at 0\n", node
->full_name
);
644 pci_to_OF_bus_map
[pci_bus
] = 0;
646 pci_to_OF_bus_map
[pci_bus
] = bus_range
[0];
648 for (node
=node
->child
; node
!= 0;node
= node
->sibling
) {
650 unsigned int *class_code
, *reg
;
652 class_code
= (unsigned int *) get_property(node
, "class-code", NULL
);
653 if (!class_code
|| ((*class_code
>> 8) != PCI_CLASS_BRIDGE_PCI
&&
654 (*class_code
>> 8) != PCI_CLASS_BRIDGE_CARDBUS
))
656 reg
= (unsigned int *)get_property(node
, "reg", NULL
);
659 dev
= pci_find_slot(pci_bus
, ((reg
[0] >> 8) & 0xff));
660 if (!dev
|| !dev
->subordinate
)
662 make_one_node_map(node
, dev
->subordinate
->number
);
667 pcibios_make_OF_bus_map(void)
670 struct pci_controller
* hose
;
673 pci_to_OF_bus_map
= (u8
*)kmalloc(pci_bus_count
, GFP_KERNEL
);
674 if (!pci_to_OF_bus_map
) {
675 printk(KERN_ERR
"Can't allocate OF bus map !\n");
679 /* We fill the bus map with invalid values, that helps
682 for (i
=0; i
<pci_bus_count
; i
++)
683 pci_to_OF_bus_map
[i
] = 0xff;
685 /* For each hose, we begin searching bridges */
686 for(hose
=hose_head
; hose
; hose
=hose
->next
) {
687 struct device_node
* node
;
688 node
= (struct device_node
*)hose
->arch_data
;
691 make_one_node_map(node
, hose
->first_busno
);
693 of_prop_map
= get_property(find_path_device("/"), "pci-OF-bus-map", NULL
);
695 memcpy(of_prop_map
, pci_to_OF_bus_map
, pci_bus_count
);
697 printk("PCI->OF bus map:\n");
698 for (i
=0; i
<pci_bus_count
; i
++) {
699 if (pci_to_OF_bus_map
[i
] == 0xff)
701 printk("%d -> %d\n", i
, pci_to_OF_bus_map
[i
]);
706 typedef int (*pci_OF_scan_iterator
)(struct device_node
* node
, void* data
);
708 static struct device_node
*
709 scan_OF_pci_childs(struct device_node
* node
, pci_OF_scan_iterator filter
, void* data
)
711 struct device_node
* sub_node
;
713 for (; node
!= 0;node
= node
->sibling
) {
714 unsigned int *class_code
;
716 if (filter(node
, data
))
719 /* For PCI<->PCI bridges or CardBus bridges, we go down
720 * Note: some OFs create a parent node "multifunc-device" as
721 * a fake root for all functions of a multi-function device,
722 * we go down them as well.
724 class_code
= (unsigned int *) get_property(node
, "class-code", NULL
);
725 if ((!class_code
|| ((*class_code
>> 8) != PCI_CLASS_BRIDGE_PCI
&&
726 (*class_code
>> 8) != PCI_CLASS_BRIDGE_CARDBUS
)) &&
727 strcmp(node
->name
, "multifunc-device"))
729 sub_node
= scan_OF_pci_childs(node
->child
, filter
, data
);
737 scan_OF_pci_childs_iterator(struct device_node
* node
, void* data
)
740 u8
* fdata
= (u8
*)data
;
742 reg
= (unsigned int *) get_property(node
, "reg", NULL
);
743 if (reg
&& ((reg
[0] >> 8) & 0xff) == fdata
[1]
744 && ((reg
[0] >> 16) & 0xff) == fdata
[0])
749 static struct device_node
*
750 scan_OF_childs_for_device(struct device_node
* node
, u8 bus
, u8 dev_fn
)
752 u8 filter_data
[2] = {bus
, dev_fn
};
754 return scan_OF_pci_childs(node
, scan_OF_pci_childs_iterator
, filter_data
);
758 * Scans the OF tree for a device node matching a PCI device
761 pci_busdev_to_OF_node(struct pci_bus
*bus
, int devfn
)
763 struct pci_controller
*hose
;
764 struct device_node
*node
;
770 /* Lookup the hose */
772 hose
= pci_bus_to_hose(busnr
);
776 /* Check it has an OF node associated */
777 node
= (struct device_node
*) hose
->arch_data
;
781 /* Fixup bus number according to what OF think it is. */
782 if (pci_to_OF_bus_map
)
783 busnr
= pci_to_OF_bus_map
[busnr
];
787 /* Now, lookup childs of the hose */
788 return scan_OF_childs_for_device(node
->child
, busnr
, devfn
);
790 EXPORT_SYMBOL(pci_busdev_to_OF_node
);
793 pci_device_to_OF_node(struct pci_dev
*dev
)
795 return pci_busdev_to_OF_node(dev
->bus
, dev
->devfn
);
797 EXPORT_SYMBOL(pci_device_to_OF_node
);
799 /* This routine is meant to be used early during boot, when the
800 * PCI bus numbers have not yet been assigned, and you need to
801 * issue PCI config cycles to an OF device.
802 * It could also be used to "fix" RTAS config cycles if you want
803 * to set pci_assign_all_buses to 1 and still use RTAS for PCI
806 struct pci_controller
* pci_find_hose_for_OF_device(struct device_node
* node
)
811 struct pci_controller
* hose
;
812 for (hose
=hose_head
;hose
;hose
=hose
->next
)
813 if (hose
->arch_data
== node
)
821 find_OF_pci_device_filter(struct device_node
* node
, void* data
)
823 return ((void *)node
== data
);
827 * Returns the PCI device matching a given OF node
830 pci_device_from_OF_node(struct device_node
* node
, u8
* bus
, u8
* devfn
)
833 struct pci_controller
* hose
;
834 struct pci_dev
* dev
= NULL
;
838 /* Make sure it's really a PCI device */
839 hose
= pci_find_hose_for_OF_device(node
);
840 if (!hose
|| !hose
->arch_data
)
842 if (!scan_OF_pci_childs(((struct device_node
*)hose
->arch_data
)->child
,
843 find_OF_pci_device_filter
, (void *)node
))
845 reg
= (unsigned int *) get_property(node
, "reg", NULL
);
848 *bus
= (reg
[0] >> 16) & 0xff;
849 *devfn
= ((reg
[0] >> 8) & 0xff);
851 /* Ok, here we need some tweak. If we have already renumbered
852 * all busses, we can't rely on the OF bus number any more.
853 * the pci_to_OF_bus_map is not enough as several PCI busses
854 * may match the same OF bus number.
856 if (!pci_to_OF_bus_map
)
859 for_each_pci_dev(dev
)
860 if (pci_to_OF_bus_map
[dev
->bus
->number
] == *bus
&&
861 dev
->devfn
== *devfn
) {
862 *bus
= dev
->bus
->number
;
869 EXPORT_SYMBOL(pci_device_from_OF_node
);
872 pci_process_bridge_OF_ranges(struct pci_controller
*hose
,
873 struct device_node
*dev
, int primary
)
875 static unsigned int static_lc_ranges
[256] __initdata
;
876 unsigned int *dt_ranges
, *lc_ranges
, *ranges
, *prev
;
878 int rlen
= 0, orig_rlen
;
880 struct resource
*res
;
881 int np
, na
= prom_n_addr_cells(dev
);
884 /* First we try to merge ranges to fix a problem with some pmacs
885 * that can have more than 3 ranges, fortunately using contiguous
888 dt_ranges
= (unsigned int *) get_property(dev
, "ranges", &rlen
);
891 /* Sanity check, though hopefully that never happens */
892 if (rlen
> sizeof(static_lc_ranges
)) {
893 printk(KERN_WARNING
"OF ranges property too large !\n");
894 rlen
= sizeof(static_lc_ranges
);
896 lc_ranges
= static_lc_ranges
;
897 memcpy(lc_ranges
, dt_ranges
, rlen
);
900 /* Let's work on a copy of the "ranges" property instead of damaging
901 * the device-tree image in memory
905 while ((rlen
-= np
* sizeof(unsigned int)) >= 0) {
907 if (prev
[0] == ranges
[0] && prev
[1] == ranges
[1] &&
908 (prev
[2] + prev
[na
+4]) == ranges
[2] &&
909 (prev
[na
+2] + prev
[na
+4]) == ranges
[na
+2]) {
910 prev
[na
+4] += ranges
[na
+4];
921 * The ranges property is laid out as an array of elements,
922 * each of which comprises:
923 * cells 0 - 2: a PCI address
924 * cells 3 or 3+4: a CPU physical address
925 * (size depending on dev->n_addr_cells)
926 * cells 4+5 or 5+6: the size of the range
930 while (ranges
&& (rlen
-= np
* sizeof(unsigned int)) >= 0) {
933 switch ((ranges
[0] >> 24) & 0x3) {
934 case 1: /* I/O space */
937 hose
->io_base_phys
= ranges
[na
+2];
938 /* limit I/O space to 16MB */
939 if (size
> 0x01000000)
941 hose
->io_base_virt
= ioremap(ranges
[na
+2], size
);
943 isa_io_base
= (unsigned long) hose
->io_base_virt
;
944 res
= &hose
->io_resource
;
945 res
->flags
= IORESOURCE_IO
;
946 res
->start
= ranges
[2];
947 DBG("PCI: IO 0x%lx -> 0x%lx\n",
948 res
->start
, res
->start
+ size
- 1);
950 case 2: /* memory space */
952 if (ranges
[1] == 0 && ranges
[2] == 0
953 && ranges
[na
+4] <= (16 << 20)) {
954 /* 1st 16MB, i.e. ISA memory area */
956 isa_mem_base
= ranges
[na
+2];
959 while (memno
< 3 && hose
->mem_resources
[memno
].flags
)
962 hose
->pci_mem_offset
= ranges
[na
+2] - ranges
[2];
964 res
= &hose
->mem_resources
[memno
];
965 res
->flags
= IORESOURCE_MEM
;
966 if(ranges
[0] & 0x40000000)
967 res
->flags
|= IORESOURCE_PREFETCH
;
968 res
->start
= ranges
[na
+2];
969 DBG("PCI: MEM[%d] 0x%lx -> 0x%lx\n", memno
,
970 res
->start
, res
->start
+ size
- 1);
975 res
->name
= dev
->full_name
;
976 res
->end
= res
->start
+ size
- 1;
985 /* We create the "pci-OF-bus-map" property now so it appears in the
989 pci_create_OF_bus_map(void)
991 struct property
* of_prop
;
993 of_prop
= (struct property
*) alloc_bootmem(sizeof(struct property
) + 256);
994 if (of_prop
&& find_path_device("/")) {
995 memset(of_prop
, -1, sizeof(struct property
) + 256);
996 of_prop
->name
= "pci-OF-bus-map";
997 of_prop
->length
= 256;
998 of_prop
->value
= (unsigned char *)&of_prop
[1];
999 prom_add_property(find_path_device("/"), of_prop
);
1003 static ssize_t
pci_show_devspec(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1005 struct pci_dev
*pdev
;
1006 struct device_node
*np
;
1008 pdev
= to_pci_dev (dev
);
1009 np
= pci_device_to_OF_node(pdev
);
1010 if (np
== NULL
|| np
->full_name
== NULL
)
1012 return sprintf(buf
, "%s", np
->full_name
);
1014 static DEVICE_ATTR(devspec
, S_IRUGO
, pci_show_devspec
, NULL
);
1016 #else /* CONFIG_PPC_OF */
1017 void pcibios_make_OF_bus_map(void)
1020 #endif /* CONFIG_PPC_OF */
1022 /* Add sysfs properties */
1023 void pcibios_add_platform_entries(struct pci_dev
*pdev
)
1025 #ifdef CONFIG_PPC_OF
1026 device_create_file(&pdev
->dev
, &dev_attr_devspec
);
1027 #endif /* CONFIG_PPC_OF */
1034 struct pci_controller
*hose
;
1035 struct pci_bus
*bus
;
1038 printk(KERN_INFO
"PCI: Probing PCI hardware\n");
1040 /* Scan all of the recorded PCI controllers. */
1041 for (next_busno
= 0, hose
= hose_head
; hose
; hose
= hose
->next
) {
1042 if (pci_assign_all_buses
)
1043 hose
->first_busno
= next_busno
;
1044 hose
->last_busno
= 0xff;
1045 bus
= pci_scan_bus(hose
->first_busno
, hose
->ops
, hose
);
1046 hose
->last_busno
= bus
->subordinate
;
1047 if (pci_assign_all_buses
|| next_busno
<= hose
->last_busno
)
1048 next_busno
= hose
->last_busno
+ pcibios_assign_bus_offset
;
1050 pci_bus_count
= next_busno
;
1052 /* OpenFirmware based machines need a map of OF bus
1053 * numbers vs. kernel bus numbers since we may have to
1056 if (pci_assign_all_buses
&& have_of
)
1057 pcibios_make_OF_bus_map();
1059 /* Do machine dependent PCI interrupt routing */
1060 if (ppc_md
.pci_swizzle
&& ppc_md
.pci_map_irq
)
1061 pci_fixup_irqs(ppc_md
.pci_swizzle
, ppc_md
.pci_map_irq
);
1063 /* Call machine dependent fixup */
1064 if (ppc_md
.pcibios_fixup
)
1065 ppc_md
.pcibios_fixup();
1067 /* Allocate and assign resources */
1068 pcibios_allocate_bus_resources(&pci_root_buses
);
1069 pcibios_allocate_resources(0);
1070 pcibios_allocate_resources(1);
1071 pcibios_assign_resources();
1073 /* Call machine dependent post-init code */
1074 if (ppc_md
.pcibios_after_init
)
1075 ppc_md
.pcibios_after_init();
1080 subsys_initcall(pcibios_init
);
1082 unsigned char __init
1083 common_swizzle(struct pci_dev
*dev
, unsigned char *pinp
)
1085 struct pci_controller
*hose
= dev
->sysdata
;
1087 if (dev
->bus
->number
!= hose
->first_busno
) {
1090 pin
= bridge_swizzle(pin
, PCI_SLOT(dev
->devfn
));
1091 /* Move up the chain of bridges. */
1092 dev
= dev
->bus
->self
;
1093 } while (dev
->bus
->self
);
1096 /* The slot is the idsel of the last bridge. */
1098 return PCI_SLOT(dev
->devfn
);
1101 unsigned long resource_fixup(struct pci_dev
* dev
, struct resource
* res
,
1102 unsigned long start
, unsigned long size
)
1107 void __init
pcibios_fixup_bus(struct pci_bus
*bus
)
1109 struct pci_controller
*hose
= (struct pci_controller
*) bus
->sysdata
;
1110 unsigned long io_offset
;
1111 struct resource
*res
;
1114 io_offset
= (unsigned long)hose
->io_base_virt
- isa_io_base
;
1115 if (bus
->parent
== NULL
) {
1116 /* This is a host bridge - fill in its resources */
1119 bus
->resource
[0] = res
= &hose
->io_resource
;
1122 printk(KERN_ERR
"I/O resource not set for host"
1123 " bridge %d\n", hose
->index
);
1125 res
->end
= IO_SPACE_LIMIT
;
1126 res
->flags
= IORESOURCE_IO
;
1128 res
->start
+= io_offset
;
1129 res
->end
+= io_offset
;
1131 for (i
= 0; i
< 3; ++i
) {
1132 res
= &hose
->mem_resources
[i
];
1136 printk(KERN_ERR
"Memory resource not set for "
1137 "host bridge %d\n", hose
->index
);
1138 res
->start
= hose
->pci_mem_offset
;
1140 res
->flags
= IORESOURCE_MEM
;
1142 bus
->resource
[i
+1] = res
;
1145 /* This is a subordinate bridge */
1146 pci_read_bridge_bases(bus
);
1148 for (i
= 0; i
< 4; ++i
) {
1149 if ((res
= bus
->resource
[i
]) == NULL
)
1153 if (io_offset
&& (res
->flags
& IORESOURCE_IO
)) {
1154 res
->start
+= io_offset
;
1155 res
->end
+= io_offset
;
1156 } else if (hose
->pci_mem_offset
1157 && (res
->flags
& IORESOURCE_MEM
)) {
1158 res
->start
+= hose
->pci_mem_offset
;
1159 res
->end
+= hose
->pci_mem_offset
;
1164 if (ppc_md
.pcibios_fixup_bus
)
1165 ppc_md
.pcibios_fixup_bus(bus
);
1168 char __init
*pcibios_setup(char *str
)
1173 /* the next one is stolen from the alpha port... */
1175 pcibios_update_irq(struct pci_dev
*dev
, int irq
)
1177 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, irq
);
1178 /* XXX FIXME - update OF device tree node interrupt property */
1181 int pcibios_enable_device(struct pci_dev
*dev
, int mask
)
1187 if (ppc_md
.pcibios_enable_device_hook
)
1188 if (ppc_md
.pcibios_enable_device_hook(dev
, 0))
1191 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
1193 for (idx
=0; idx
<6; idx
++) {
1194 r
= &dev
->resource
[idx
];
1195 if (r
->flags
& IORESOURCE_UNSET
) {
1196 printk(KERN_ERR
"PCI: Device %s not available because of resource collisions\n", pci_name(dev
));
1199 if (r
->flags
& IORESOURCE_IO
)
1200 cmd
|= PCI_COMMAND_IO
;
1201 if (r
->flags
& IORESOURCE_MEM
)
1202 cmd
|= PCI_COMMAND_MEMORY
;
1204 if (cmd
!= old_cmd
) {
1205 printk("PCI: Enabling device %s (%04x -> %04x)\n",
1206 pci_name(dev
), old_cmd
, cmd
);
1207 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);
1212 struct pci_controller
*
1213 pci_bus_to_hose(int bus
)
1215 struct pci_controller
* hose
= hose_head
;
1217 for (; hose
; hose
= hose
->next
)
1218 if (bus
>= hose
->first_busno
&& bus
<= hose
->last_busno
)
1224 pci_bus_io_base(unsigned int bus
)
1226 struct pci_controller
*hose
;
1228 hose
= pci_bus_to_hose(bus
);
1231 return hose
->io_base_virt
;
1235 pci_bus_io_base_phys(unsigned int bus
)
1237 struct pci_controller
*hose
;
1239 hose
= pci_bus_to_hose(bus
);
1242 return hose
->io_base_phys
;
1246 pci_bus_mem_base_phys(unsigned int bus
)
1248 struct pci_controller
*hose
;
1250 hose
= pci_bus_to_hose(bus
);
1253 return hose
->pci_mem_offset
;
1257 pci_resource_to_bus(struct pci_dev
*pdev
, struct resource
*res
)
1259 /* Hack alert again ! See comments in chrp_pci.c
1261 struct pci_controller
* hose
=
1262 (struct pci_controller
*)pdev
->sysdata
;
1263 if (hose
&& res
->flags
& IORESOURCE_MEM
)
1264 return res
->start
- hose
->pci_mem_offset
;
1265 /* We may want to do something with IOs here... */
1270 static struct resource
*__pci_mmap_make_offset(struct pci_dev
*dev
,
1271 unsigned long *offset
,
1272 enum pci_mmap_state mmap_state
)
1274 struct pci_controller
*hose
= pci_bus_to_hose(dev
->bus
->number
);
1275 unsigned long io_offset
= 0;
1279 return NULL
; /* should never happen */
1281 /* If memory, add on the PCI bridge address offset */
1282 if (mmap_state
== pci_mmap_mem
) {
1283 *offset
+= hose
->pci_mem_offset
;
1284 res_bit
= IORESOURCE_MEM
;
1286 io_offset
= hose
->io_base_virt
- ___IO_BASE
;
1287 *offset
+= io_offset
;
1288 res_bit
= IORESOURCE_IO
;
1292 * Check that the offset requested corresponds to one of the
1293 * resources of the device.
1295 for (i
= 0; i
<= PCI_ROM_RESOURCE
; i
++) {
1296 struct resource
*rp
= &dev
->resource
[i
];
1297 int flags
= rp
->flags
;
1299 /* treat ROM as memory (should be already) */
1300 if (i
== PCI_ROM_RESOURCE
)
1301 flags
|= IORESOURCE_MEM
;
1303 /* Active and same type? */
1304 if ((flags
& res_bit
) == 0)
1307 /* In the range of this resource? */
1308 if (*offset
< (rp
->start
& PAGE_MASK
) || *offset
> rp
->end
)
1311 /* found it! construct the final physical address */
1312 if (mmap_state
== pci_mmap_io
)
1313 *offset
+= hose
->io_base_phys
- io_offset
;
1321 * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
1324 static pgprot_t
__pci_mmap_set_pgprot(struct pci_dev
*dev
, struct resource
*rp
,
1325 pgprot_t protection
,
1326 enum pci_mmap_state mmap_state
,
1329 unsigned long prot
= pgprot_val(protection
);
1331 /* Write combine is always 0 on non-memory space mappings. On
1332 * memory space, if the user didn't pass 1, we check for a
1333 * "prefetchable" resource. This is a bit hackish, but we use
1334 * this to workaround the inability of /sysfs to provide a write
1337 if (mmap_state
!= pci_mmap_mem
)
1339 else if (write_combine
== 0) {
1340 if (rp
->flags
& IORESOURCE_PREFETCH
)
1344 /* XXX would be nice to have a way to ask for write-through */
1345 prot
|= _PAGE_NO_CACHE
;
1347 prot
&= ~_PAGE_GUARDED
;
1349 prot
|= _PAGE_GUARDED
;
1351 printk("PCI map for %s:%lx, prot: %lx\n", pci_name(dev
), rp
->start
,
1354 return __pgprot(prot
);
1358 * This one is used by /dev/mem and fbdev who have no clue about the
1359 * PCI device, it tries to find the PCI device first and calls the
1362 pgprot_t
pci_phys_mem_access_prot(struct file
*file
,
1365 pgprot_t protection
)
1367 struct pci_dev
*pdev
= NULL
;
1368 struct resource
*found
= NULL
;
1369 unsigned long prot
= pgprot_val(protection
);
1370 unsigned long offset
= pfn
<< PAGE_SHIFT
;
1373 if (page_is_ram(pfn
))
1376 prot
|= _PAGE_NO_CACHE
| _PAGE_GUARDED
;
1378 for_each_pci_dev(pdev
) {
1379 for (i
= 0; i
<= PCI_ROM_RESOURCE
; i
++) {
1380 struct resource
*rp
= &pdev
->resource
[i
];
1381 int flags
= rp
->flags
;
1383 /* Active and same type? */
1384 if ((flags
& IORESOURCE_MEM
) == 0)
1386 /* In the range of this resource? */
1387 if (offset
< (rp
->start
& PAGE_MASK
) ||
1397 if (found
->flags
& IORESOURCE_PREFETCH
)
1398 prot
&= ~_PAGE_GUARDED
;
1402 DBG("non-PCI map for %lx, prot: %lx\n", offset
, prot
);
1404 return __pgprot(prot
);
1409 * Perform the actual remap of the pages for a PCI device mapping, as
1410 * appropriate for this architecture. The region in the process to map
1411 * is described by vm_start and vm_end members of VMA, the base physical
1412 * address is found in vm_pgoff.
1413 * The pci device structure is provided so that architectures may make mapping
1414 * decisions on a per-device or per-bus basis.
1416 * Returns a negative error code on failure, zero on success.
1418 int pci_mmap_page_range(struct pci_dev
*dev
, struct vm_area_struct
*vma
,
1419 enum pci_mmap_state mmap_state
,
1422 unsigned long offset
= vma
->vm_pgoff
<< PAGE_SHIFT
;
1423 struct resource
*rp
;
1426 rp
= __pci_mmap_make_offset(dev
, &offset
, mmap_state
);
1430 vma
->vm_pgoff
= offset
>> PAGE_SHIFT
;
1431 vma
->vm_flags
|= VM_SHM
| VM_LOCKED
| VM_IO
;
1432 vma
->vm_page_prot
= __pci_mmap_set_pgprot(dev
, rp
,
1434 mmap_state
, write_combine
);
1436 ret
= remap_pfn_range(vma
, vma
->vm_start
, vma
->vm_pgoff
,
1437 vma
->vm_end
- vma
->vm_start
, vma
->vm_page_prot
);
1442 /* Obsolete functions. Should be removed once the symbios driver
1446 phys_to_bus(unsigned long pa
)
1448 struct pci_controller
*hose
;
1451 for (hose
= hose_head
; hose
; hose
= hose
->next
) {
1452 for (i
= 0; i
< 3; ++i
) {
1453 if (pa
>= hose
->mem_resources
[i
].start
1454 && pa
<= hose
->mem_resources
[i
].end
) {
1456 * XXX the hose->pci_mem_offset really
1457 * only applies to mem_resources[0].
1458 * We need a way to store an offset for
1459 * the others. -- paulus
1462 pa
-= hose
->pci_mem_offset
;
1467 /* hmmm, didn't find it */
1472 pci_phys_to_bus(unsigned long pa
, int busnr
)
1474 struct pci_controller
* hose
= pci_bus_to_hose(busnr
);
1477 return pa
- hose
->pci_mem_offset
;
1481 pci_bus_to_phys(unsigned int ba
, int busnr
)
1483 struct pci_controller
* hose
= pci_bus_to_hose(busnr
);
1486 return ba
+ hose
->pci_mem_offset
;
1489 /* Provide information on locations of various I/O regions in physical
1490 * memory. Do this on a per-card basis so that we choose the right
1492 * Note that the returned IO or memory base is a physical address
1495 long sys_pciconfig_iobase(long which
, unsigned long bus
, unsigned long devfn
)
1497 struct pci_controller
* hose
;
1498 long result
= -EOPNOTSUPP
;
1500 hose
= pci_bus_to_hose(bus
);
1505 case IOBASE_BRIDGE_NUMBER
:
1506 return (long)hose
->first_busno
;
1508 return (long)hose
->pci_mem_offset
;
1510 return (long)hose
->io_base_phys
;
1512 return (long)isa_io_base
;
1513 case IOBASE_ISA_MEM
:
1514 return (long)isa_mem_base
;
1520 void pci_resource_to_user(const struct pci_dev
*dev
, int bar
,
1521 const struct resource
*rsrc
,
1522 u64
*start
, u64
*end
)
1524 struct pci_controller
*hose
= pci_bus_to_hose(dev
->bus
->number
);
1525 unsigned long offset
= 0;
1530 if (rsrc
->flags
& IORESOURCE_IO
)
1531 offset
= ___IO_BASE
- hose
->io_base_virt
+ hose
->io_base_phys
;
1533 *start
= rsrc
->start
+ offset
;
1534 *end
= rsrc
->end
+ offset
;
1538 pci_init_resource(struct resource
*res
, unsigned long start
, unsigned long end
,
1539 int flags
, char *name
)
1546 res
->sibling
= NULL
;
1550 void __iomem
*pci_iomap(struct pci_dev
*dev
, int bar
, unsigned long max
)
1552 unsigned long start
= pci_resource_start(dev
, bar
);
1553 unsigned long len
= pci_resource_len(dev
, bar
);
1554 unsigned long flags
= pci_resource_flags(dev
, bar
);
1558 if (max
&& len
> max
)
1560 if (flags
& IORESOURCE_IO
)
1561 return ioport_map(start
, len
);
1562 if (flags
& IORESOURCE_MEM
)
1563 /* Not checking IORESOURCE_CACHEABLE because PPC does
1564 * not currently distinguish between ioremap and
1567 return ioremap(start
, len
);
1572 void pci_iounmap(struct pci_dev
*dev
, void __iomem
*addr
)
1576 EXPORT_SYMBOL(pci_iomap
);
1577 EXPORT_SYMBOL(pci_iounmap
);
1579 unsigned long pci_address_to_pio(phys_addr_t address
)
1581 struct pci_controller
* hose
= hose_head
;
1583 for (; hose
; hose
= hose
->next
) {
1584 unsigned int size
= hose
->io_resource
.end
-
1585 hose
->io_resource
.start
+ 1;
1586 if (address
>= hose
->io_base_phys
&&
1587 address
< (hose
->io_base_phys
+ size
)) {
1588 unsigned long base
=
1589 (unsigned long)hose
->io_base_virt
- _IO_BASE
;
1590 return base
+ (address
- hose
->io_base_phys
);
1593 return (unsigned int)-1;
1595 EXPORT_SYMBOL(pci_address_to_pio
);
1598 * Null PCI config access functions, for the case when we can't
1601 #define NULL_PCI_OP(rw, size, type) \
1603 null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
1605 return PCIBIOS_DEVICE_NOT_FOUND; \
1609 null_read_config(struct pci_bus
*bus
, unsigned int devfn
, int offset
,
1612 return PCIBIOS_DEVICE_NOT_FOUND
;
1616 null_write_config(struct pci_bus
*bus
, unsigned int devfn
, int offset
,
1619 return PCIBIOS_DEVICE_NOT_FOUND
;
1622 static struct pci_ops null_pci_ops
=
1629 * These functions are used early on before PCI scanning is done
1630 * and all of the pci_dev and pci_bus structures have been created.
1632 static struct pci_bus
*
1633 fake_pci_bus(struct pci_controller
*hose
, int busnr
)
1635 static struct pci_bus bus
;
1638 hose
= pci_bus_to_hose(busnr
);
1640 printk(KERN_ERR
"Can't find hose for PCI bus %d!\n", busnr
);
1644 bus
.ops
= hose
? hose
->ops
: &null_pci_ops
;
1648 #define EARLY_PCI_OP(rw, size, type) \
1649 int early_##rw##_config_##size(struct pci_controller *hose, int bus, \
1650 int devfn, int offset, type value) \
1652 return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \
1653 devfn, offset, value); \
1656 EARLY_PCI_OP(read
, byte
, u8
*)
1657 EARLY_PCI_OP(read
, word
, u16
*)
1658 EARLY_PCI_OP(read
, dword
, u32
*)
1659 EARLY_PCI_OP(write
, byte
, u8
)
1660 EARLY_PCI_OP(write
, word
, u16
)
1661 EARLY_PCI_OP(write
, dword
, u32
)