4 #include <linux/config.h>
9 #include <linux/mm.h> /* for struct page */
11 /* Can be used to override the logic in pci_scan_bus for skipping
12 already-configured bus numbers - to be used for buggy BIOSes
13 or architectures with incomplete PCI setup by the loader */
16 extern unsigned int pcibios_assign_all_busses(void);
18 #define pcibios_assign_all_busses() 0
20 #define pcibios_scan_all_fns(a, b) 0
22 extern unsigned long pci_mem_start
;
23 #define PCIBIOS_MIN_IO 0x1000
24 #define PCIBIOS_MIN_MEM (pci_mem_start)
26 #define PCIBIOS_MIN_CARDBUS_IO 0x4000
28 void pcibios_config_init(void);
29 struct pci_bus
* pcibios_scan_root(int bus
);
30 extern int (*pci_config_read
)(int seg
, int bus
, int dev
, int fn
, int reg
, int len
, u32
*value
);
31 extern int (*pci_config_write
)(int seg
, int bus
, int dev
, int fn
, int reg
, int len
, u32 value
);
33 void pcibios_set_master(struct pci_dev
*dev
);
34 void pcibios_penalize_isa_irq(int irq
, int active
);
35 struct irq_routing_table
*pcibios_get_irq_routing_table(void);
36 int pcibios_set_irq_routing(struct pci_dev
*dev
, int pin
, int irq
);
38 #include <linux/types.h>
39 #include <linux/slab.h>
40 #include <asm/scatterlist.h>
41 #include <linux/string.h>
43 #include <linux/dma-mapping.h> /* for have_iommu */
45 extern int iommu_setup(char *opt
);
47 /* The PCI address space does equal the physical memory
48 * address space. The networking and block device layers use
49 * this boolean for bounce buffer decisions
51 * On AMD64 it mostly equals, but we set it to zero if a hardware
52 * IOMMU (gart) of sotware IOMMU (swiotlb) is available.
54 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
56 #ifdef CONFIG_GART_IOMMU
59 * x86-64 always supports DAC, but sometimes it is useful to force
60 * devices through the IOMMU to get automatic sg list merging.
63 extern int iommu_sac_force
;
64 #define pci_dac_dma_supported(pci_dev, mask) (!iommu_sac_force)
66 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
68 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
70 #define pci_unmap_addr(PTR, ADDR_NAME) \
72 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
73 (((PTR)->ADDR_NAME) = (VAL))
74 #define pci_unmap_len(PTR, LEN_NAME) \
76 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
77 (((PTR)->LEN_NAME) = (VAL))
82 #define pci_dac_dma_supported(pci_dev, mask) 1
84 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
85 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
86 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
87 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
88 #define pci_unmap_len(PTR, LEN_NAME) (0)
89 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
93 #include <asm-generic/pci-dma-compat.h>
95 static inline dma64_addr_t
96 pci_dac_page_to_dma(struct pci_dev
*pdev
, struct page
*page
, unsigned long offset
, int direction
)
98 return ((dma64_addr_t
) page_to_phys(page
) +
99 (dma64_addr_t
) offset
);
102 static inline struct page
*
103 pci_dac_dma_to_page(struct pci_dev
*pdev
, dma64_addr_t dma_addr
)
105 return virt_to_page(__va(dma_addr
));
108 static inline unsigned long
109 pci_dac_dma_to_offset(struct pci_dev
*pdev
, dma64_addr_t dma_addr
)
111 return (dma_addr
& ~PAGE_MASK
);
115 pci_dac_dma_sync_single_for_cpu(struct pci_dev
*pdev
, dma64_addr_t dma_addr
, size_t len
, int direction
)
120 pci_dac_dma_sync_single_for_device(struct pci_dev
*pdev
, dma64_addr_t dma_addr
, size_t len
, int direction
)
122 flush_write_buffers();
126 static inline void pci_dma_burst_advice(struct pci_dev
*pdev
,
127 enum pci_dma_burst_strategy
*strat
,
128 unsigned long *strategy_parameter
)
130 *strat
= PCI_DMA_BURST_INFINITY
;
131 *strategy_parameter
= ~0UL;
135 #define HAVE_PCI_MMAP
136 extern int pci_mmap_page_range(struct pci_dev
*dev
, struct vm_area_struct
*vma
,
137 enum pci_mmap_state mmap_state
, int write_combine
);
139 static inline void pcibios_add_platform_entries(struct pci_dev
*dev
)
143 #endif /* __KERNEL__ */
145 /* generic pci stuff */
147 #include <asm-generic/pci.h>
150 #endif /* __x8664_PCI_H */