drivers/char/agp/agp.h

   1 /*
   2  * AGPGART
   3  * Copyright (C) 2004 Silicon Graphics, Inc.
   4  * Copyright (C) 2002-2004 Dave Jones
   5  * Copyright (C) 1999 Jeff Hartmann
   6  * Copyright (C) 1999 Precision Insight, Inc.
   7  * Copyright (C) 1999 Xi Graphics, Inc.
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included
  17  * in all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
  23  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  24  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
  25  * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #ifndef _AGP_BACKEND_PRIV_H
  30 #define _AGP_BACKEND_PRIV_H 1
  31
  32 #include <asm/agp.h>    /* for flush_agp_cache() */
  33
  34 #define PFX "agpgart: "
  35
  36 //#define AGP_DEBUG 1
  37 #ifdef AGP_DEBUG
  38 #define DBG(x,y...) printk (KERN_DEBUG PFX "%s: " x "\n", __FUNCTION__ , ## y)
  39 #else
  40 #define DBG(x,y...) do { } while (0)
  41 #endif
  42
  43 extern struct agp_bridge_data *agp_bridge;
  44
  45 enum aper_size_type {
  46         U8_APER_SIZE,
  47         U16_APER_SIZE,
  48         U32_APER_SIZE,
  49         LVL2_APER_SIZE,
  50         FIXED_APER_SIZE
  51 };
  52
  53 struct gatt_mask {
  54         unsigned long mask;
  55         u32 type;
  56         /* totally device specific, for integrated chipsets that
  57          * might have different types of memory masks.  For other
  58          * devices this will probably be ignored */
  59 };
  60
  61 struct aper_size_info_8 {
  62         int size;
  63         int num_entries;
  64         int page_order;
  65         u8 size_value;
  66 };
  67
  68 struct aper_size_info_16 {
  69         int size;
  70         int num_entries;
  71         int page_order;
  72         u16 size_value;
  73 };
  74
  75 struct aper_size_info_32 {
  76         int size;
  77         int num_entries;
  78         int page_order;
  79         u32 size_value;
  80 };
  81
  82 struct aper_size_info_lvl2 {
  83         int size;
  84         int num_entries;
  85         u32 size_value;
  86 };
  87
  88 struct aper_size_info_fixed {
  89         int size;
  90         int num_entries;
  91         int page_order;
  92 };
  93
  94 struct agp_bridge_driver {
  95         struct module *owner;
  96         void *aperture_sizes;
  97         int num_aperture_sizes;
  98         enum aper_size_type size_type;
  99         int cant_use_aperture;
 100         int needs_scratch_page;
 101         struct gatt_mask *masks;
 102         int (*fetch_size)(void);
 103         int (*configure)(void);
 104         void (*agp_enable)(struct agp_bridge_data *, u32);
 105         void (*cleanup)(void);
 106         void (*tlb_flush)(struct agp_memory *);
 107         unsigned long (*mask_memory)(struct agp_bridge_data *,
 108                 unsigned long, int);
 109         void (*cache_flush)(void);
 110         int (*create_gatt_table)(struct agp_bridge_data *);
 111         int (*free_gatt_table)(struct agp_bridge_data *);
 112         int (*insert_memory)(struct agp_memory *, off_t, int);
 113         int (*remove_memory)(struct agp_memory *, off_t, int);
 114         struct agp_memory *(*alloc_by_type) (size_t, int);
 115         void (*free_by_type)(struct agp_memory *);
 116         void *(*agp_alloc_page)(struct agp_bridge_data *);
 117         void (*agp_destroy_page)(void *);
 118 };
 119
 120 struct agp_bridge_data {
 121         struct agp_version *version;
 122         struct agp_bridge_driver *driver;
 123         struct vm_operations_struct *vm_ops;
 124         void *previous_size;
 125         void *current_size;
 126         void *dev_private_data;
 127         struct pci_dev *dev;
 128         u32 __iomem *gatt_table;
 129         u32 *gatt_table_real;
 130         unsigned long scratch_page;
 131         unsigned long scratch_page_real;
 132         unsigned long gart_bus_addr;
 133         unsigned long gatt_bus_addr;
 134         u32 mode;
 135         enum chipset_type type;
 136         unsigned long *key_list;
 137         atomic_t current_memory_agp;
 138         atomic_t agp_in_use;
 139         int max_memory_agp;     /* in number of pages */
 140         int aperture_size_idx;
 141         int capndx;
 142         int flags;
 143         char major_version;
 144         char minor_version;
 145         struct list_head list;
 146         u32 apbase_config;
 147 };
 148
 149 #define KB(x)   ((x) * 1024)
 150 #define MB(x)   (KB (KB (x)))
 151 #define GB(x)   (MB (KB (x)))
 152
 153 #define A_SIZE_8(x)     ((struct aper_size_info_8 *) x)
 154 #define A_SIZE_16(x)    ((struct aper_size_info_16 *) x)
 155 #define A_SIZE_32(x)    ((struct aper_size_info_32 *) x)
 156 #define A_SIZE_LVL2(x)  ((struct aper_size_info_lvl2 *) x)
 157 #define A_SIZE_FIX(x)   ((struct aper_size_info_fixed *) x)
 158 #define A_IDX8(bridge)  (A_SIZE_8((bridge)->driver->aperture_sizes) + i)
 159 #define A_IDX16(bridge) (A_SIZE_16((bridge)->driver->aperture_sizes) + i)
 160 #define A_IDX32(bridge) (A_SIZE_32((bridge)->driver->aperture_sizes) + i)
 161 #define MAXKEY          (4096 * 32)
 162
 163 #define PGE_EMPTY(b, p) (!(p) || (p) == (unsigned long) (b)->scratch_page)
 164
 165
 166 /* Intel registers */
 167 #define INTEL_APSIZE    0xb4
 168 #define INTEL_ATTBASE   0xb8
 169 #define INTEL_AGPCTRL   0xb0
 170 #define INTEL_NBXCFG    0x50
 171 #define INTEL_ERRSTS    0x91
 172
 173 /* Intel i830 registers */
 174 #define I830_GMCH_CTRL                  0x52
 175 #define I830_GMCH_ENABLED               0x4
 176 #define I830_GMCH_MEM_MASK              0x1
 177 #define I830_GMCH_MEM_64M               0x1
 178 #define I830_GMCH_MEM_128M              0
 179 #define I830_GMCH_GMS_MASK              0x70
 180 #define I830_GMCH_GMS_DISABLED          0x00
 181 #define I830_GMCH_GMS_LOCAL             0x10
 182 #define I830_GMCH_GMS_STOLEN_512        0x20
 183 #define I830_GMCH_GMS_STOLEN_1024       0x30
 184 #define I830_GMCH_GMS_STOLEN_8192       0x40
 185 #define I830_RDRAM_CHANNEL_TYPE         0x03010
 186 #define I830_RDRAM_ND(x)                (((x) & 0x20) >> 5)
 187 #define I830_RDRAM_DDT(x)               (((x) & 0x18) >> 3)
 188
 189 /* This one is for I830MP w. an external graphic card */
 190 #define INTEL_I830_ERRSTS       0x92
 191
 192 /* Intel 855GM/852GM registers */
 193 #define I855_GMCH_GMS_STOLEN_0M         0x0
 194 #define I855_GMCH_GMS_STOLEN_1M         (0x1 << 4)
 195 #define I855_GMCH_GMS_STOLEN_4M         (0x2 << 4)
 196 #define I855_GMCH_GMS_STOLEN_8M         (0x3 << 4)
 197 #define I855_GMCH_GMS_STOLEN_16M        (0x4 << 4)
 198 #define I855_GMCH_GMS_STOLEN_32M        (0x5 << 4)
 199 #define I85X_CAPID                      0x44
 200 #define I85X_VARIANT_MASK               0x7
 201 #define I85X_VARIANT_SHIFT              5
 202 #define I855_GME                        0x0
 203 #define I855_GM                         0x4
 204 #define I852_GME                        0x2
 205 #define I852_GM                         0x5
 206
 207 /* Intel i845 registers */
 208 #define INTEL_I845_AGPM         0x51
 209 #define INTEL_I845_ERRSTS       0xc8
 210
 211 /* Intel i860 registers */
 212 #define INTEL_I860_MCHCFG       0x50
 213 #define INTEL_I860_ERRSTS       0xc8
 214
 215 /* Intel i810 registers */
 216 #define I810_GMADDR             0x10
 217 #define I810_MMADDR             0x14
 218 #define I810_PTE_BASE           0x10000
 219 #define I810_PTE_MAIN_UNCACHED  0x00000000
 220 #define I810_PTE_LOCAL          0x00000002
 221 #define I810_PTE_VALID          0x00000001
 222 #define I810_SMRAM_MISCC        0x70
 223 #define I810_GFX_MEM_WIN_SIZE   0x00010000
 224 #define I810_GFX_MEM_WIN_32M    0x00010000
 225 #define I810_GMS                0x000000c0
 226 #define I810_GMS_DISABLE        0x00000000
 227 #define I810_PGETBL_CTL         0x2020
 228 #define I810_PGETBL_ENABLED     0x00000001
 229 #define I810_DRAM_CTL           0x3000
 230 #define I810_DRAM_ROW_0         0x00000001
 231 #define I810_DRAM_ROW_0_SDRAM   0x00000001
 232
 233 struct agp_device_ids {
 234         unsigned short device_id; /* first, to make table easier to read */
 235         enum chipset_type chipset;
 236         const char *chipset_name;
 237         int (*chipset_setup) (struct pci_dev *pdev);    /* used to override generic */
 238 };
 239
 240 /* Driver registration */
 241 struct agp_bridge_data *agp_alloc_bridge(void);
 242 void agp_put_bridge(struct agp_bridge_data *bridge);
 243 int agp_add_bridge(struct agp_bridge_data *bridge);
 244 void agp_remove_bridge(struct agp_bridge_data *bridge);
 245
 246 /* Frontend routines. */
 247 int agp_frontend_initialize(void);
 248 void agp_frontend_cleanup(void);
 249
 250 /* Generic routines. */
 251 void agp_generic_enable(struct agp_bridge_data *bridge, u32 mode);
 252 int agp_generic_create_gatt_table(struct agp_bridge_data *bridge);
 253 int agp_generic_free_gatt_table(struct agp_bridge_data *bridge);
 254 struct agp_memory *agp_create_memory(int scratch_pages);
 255 int agp_generic_insert_memory(struct agp_memory *mem, off_t pg_start, int type);
 256 int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type);
 257 struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type);
 258 void agp_generic_free_by_type(struct agp_memory *curr);
 259 void *agp_generic_alloc_page(struct agp_bridge_data *bridge);
 260 void agp_generic_destroy_page(void *addr);
 261 void agp_free_key(int key);
 262 int agp_num_entries(void);
 263 u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 mode, u32 command);
 264 void agp_device_command(u32 command, int agp_v3);
 265 int agp_3_5_enable(struct agp_bridge_data *bridge);
 266 void global_cache_flush(void);
 267 void get_agp_version(struct agp_bridge_data *bridge);
 268 unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
 269         unsigned long addr, int type);
 270 struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev);
 271
 272 /* generic routines for agp>=3 */
 273 int agp3_generic_fetch_size(void);
 274 void agp3_generic_tlbflush(struct agp_memory *mem);
 275 int agp3_generic_configure(void);
 276 void agp3_generic_cleanup(void);
 277
 278 /* aperture sizes have been standardised since v3 */
 279 #define AGP_GENERIC_SIZES_ENTRIES 11
 280 extern struct aper_size_info_16 agp3_generic_sizes[];
 281
 282 #define virt_to_gart(x) (phys_to_gart(virt_to_phys(x)))
 283 #define gart_to_virt(x) (phys_to_virt(gart_to_phys(x)))
 284
 285 extern int agp_off;
 286 extern int agp_try_unsupported_boot;
 287
 288 /* Chipset independant registers (from AGP Spec) */
 289 #define AGP_APBASE      0x10
 290
 291 #define AGPSTAT         0x4
 292 #define AGPCMD          0x8
 293 #define AGPNISTAT       0xc
 294 #define AGPCTRL         0x10
 295 #define AGPAPSIZE       0x14
 296 #define AGPNEPG         0x16
 297 #define AGPGARTLO       0x18
 298 #define AGPGARTHI       0x1c
 299 #define AGPNICMD        0x20
 300
 301 #define AGP_MAJOR_VERSION_SHIFT (20)
 302 #define AGP_MINOR_VERSION_SHIFT (16)
 303
 304 #define AGPSTAT_RQ_DEPTH        (0xff000000)
 305 #define AGPSTAT_RQ_DEPTH_SHIFT  24
 306
 307 #define AGPSTAT_CAL_MASK        (1<<12|1<<11|1<<10)
 308 #define AGPSTAT_ARQSZ           (1<<15|1<<14|1<<13)
 309 #define AGPSTAT_ARQSZ_SHIFT     13
 310
 311 #define AGPSTAT_SBA             (1<<9)
 312 #define AGPSTAT_AGP_ENABLE      (1<<8)
 313 #define AGPSTAT_FW              (1<<4)
 314 #define AGPSTAT_MODE_3_0        (1<<3)
 315
 316 #define AGPSTAT2_1X             (1<<0)
 317 #define AGPSTAT2_2X             (1<<1)
 318 #define AGPSTAT2_4X             (1<<2)
 319
 320 #define AGPSTAT3_RSVD           (1<<2)
 321 #define AGPSTAT3_8X             (1<<1)
 322 #define AGPSTAT3_4X             (1)
 323
 324 #define AGPCTRL_APERENB         (1<<8)
 325 #define AGPCTRL_GTLBEN          (1<<7)
 326
 327 #define AGP2_RESERVED_MASK 0x00fffcc8
 328 #define AGP3_RESERVED_MASK 0x00ff00c4
 329
 330 #define AGP_ERRATA_FASTWRITES 1<<0
 331 #define AGP_ERRATA_SBA   1<<1
 332 #define AGP_ERRATA_1X 1<<2
 333
 334 #endif  /* _AGP_BACKEND_PRIV_H */