arch/m68knommu/platform/5307/config.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      linux/arch/m68knommu/platform/5307/config.c
   5  *
   6  *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
   7  *      Copyright (C) 2000, Lineo (www.lineo.com)
   8  */
   9
  10 /***************************************************************************/
  11
  12 #include <linux/config.h>
  13 #include <linux/kernel.h>
  14 #include <linux/sched.h>
  15 #include <linux/param.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <asm/irq.h>
  19 #include <asm/dma.h>
  20 #include <asm/traps.h>
  21 #include <asm/machdep.h>
  22 #include <asm/coldfire.h>
  23 #include <asm/mcftimer.h>
  24 #include <asm/mcfsim.h>
  25 #include <asm/mcfdma.h>
  26 #include <asm/mcfwdebug.h>
  27
  28 /***************************************************************************/
  29
  30 void coldfire_tick(void);
  31 void coldfire_timer_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
  32 unsigned long coldfire_timer_offset(void);
  33 void coldfire_trap_init(void);
  34 void coldfire_reset(void);
  35
  36 extern unsigned int mcf_timervector;
  37 extern unsigned int mcf_profilevector;
  38 extern unsigned int mcf_timerlevel;
  39
  40 /***************************************************************************/
  41
  42 /*
  43  *      Some platforms need software versions of the GPIO data registers.
  44  */
  45 unsigned short ppdata;
  46 unsigned char ledbank = 0xff;
  47
  48 /***************************************************************************/
  49
  50 /*
  51  *      DMA channel base address table.
  52  */
  53 unsigned int   dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
  54         MCF_MBAR + MCFDMA_BASE0,
  55         MCF_MBAR + MCFDMA_BASE1,
  56         MCF_MBAR + MCFDMA_BASE2,
  57         MCF_MBAR + MCFDMA_BASE3,
  58 };
  59
  60 unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
  61
  62 /***************************************************************************/
  63
  64 void mcf_autovector(unsigned int vec)
  65 {
  66         volatile unsigned char  *mbar;
  67
  68         if ((vec >= 25) && (vec <= 31)) {
  69                 mbar = (volatile unsigned char *) MCF_MBAR;
  70                 vec = 0x1 << (vec - 24);
  71                 *(mbar + MCFSIM_AVR) |= vec;
  72                 mcf_setimr(mcf_getimr() & ~vec);
  73         }
  74 }
  75
  76 /***************************************************************************/
  77
  78 void mcf_settimericr(unsigned int timer, unsigned int level)
  79 {
  80         volatile unsigned char *icrp;
  81         unsigned int icr, imr;
  82
  83         if (timer <= 2) {
  84                 switch (timer) {
  85                 case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
  86                 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
  87                 }
  88
  89                 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
  90                 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
  91                 mcf_setimr(mcf_getimr() & ~imr);
  92         }
  93 }
  94
  95 /***************************************************************************/
  96
  97 int mcf_timerirqpending(int timer)
  98 {
  99         unsigned int imr = 0;
 100
 101         switch (timer) {
 102         case 1:  imr = MCFSIM_IMR_TIMER1; break;
 103         case 2:  imr = MCFSIM_IMR_TIMER2; break;
 104         default: break;
 105         }
 106         return (mcf_getipr() & imr);
 107 }
 108
 109 /***************************************************************************/
 110
 111 void config_BSP(char *commandp, int size)
 112 {
 113         mcf_setimr(MCFSIM_IMR_MASKALL);
 114
 115 #if defined(CONFIG_BOOTPARAM)
 116         strncpy(commandp, CONFIG_BOOTPARAM_STRING, size);
 117         commandp[size-1] = 0;
 118 #elif defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
 119       defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
 120       defined(CONFIG_CLEOPATRA)
 121         /* Copy command line from FLASH to local buffer... */
 122         memcpy(commandp, (char *) 0xf0004000, size);
 123         commandp[size-1] = 0;
 124         /* Different timer setup - to prevent device clash */
 125         mcf_timervector = 30;
 126         mcf_profilevector = 31;
 127         mcf_timerlevel = 6;
 128 #else
 129         memset(commandp, 0, size);
 130 #endif
 131
 132         mach_sched_init = coldfire_timer_init;
 133         mach_tick = coldfire_tick;
 134         mach_gettimeoffset = coldfire_timer_offset;
 135         mach_trap_init = coldfire_trap_init;
 136         mach_reset = coldfire_reset;
 137
 138 #ifdef MCF_BDM_DISABLE
 139         /*
 140          * Disable the BDM clocking.  This also turns off most of the rest of
 141          * the BDM device.  This is good for EMC reasons. This option is not
 142          * incompatible with the memory protection option.
 143          */
 144         wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
 145 #endif
 146 }
 147
 148 /***************************************************************************/