[ARM] Support register switch in nommu mode
[linux-2.6/verdex.git] / arch / m68knommu / platform / 5407 / config.c
blobf7c9018b85a75ca7bf100a7b135148e8effe5dc1
1 /***************************************************************************/
3 /*
4 * linux/arch/m68knommu/platform/5407/config.c
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000, Lineo (www.lineo.com)
8 */
10 /***************************************************************************/
12 #include <linux/config.h>
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/param.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <asm/irq.h>
19 #include <asm/dma.h>
20 #include <asm/traps.h>
21 #include <asm/machdep.h>
22 #include <asm/coldfire.h>
23 #include <asm/mcftimer.h>
24 #include <asm/mcfsim.h>
25 #include <asm/mcfdma.h>
27 /***************************************************************************/
29 void coldfire_tick(void);
30 void coldfire_timer_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
31 unsigned long coldfire_timer_offset(void);
32 void coldfire_trap_init(void);
33 void coldfire_reset(void);
35 extern unsigned int mcf_timervector;
36 extern unsigned int mcf_profilevector;
37 extern unsigned int mcf_timerlevel;
39 /***************************************************************************/
42 * DMA channel base address table.
44 unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
45 MCF_MBAR + MCFDMA_BASE0,
46 MCF_MBAR + MCFDMA_BASE1,
47 MCF_MBAR + MCFDMA_BASE2,
48 MCF_MBAR + MCFDMA_BASE3,
51 unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
53 /***************************************************************************/
55 void mcf_autovector(unsigned int vec)
57 volatile unsigned char *mbar;
59 if ((vec >= 25) && (vec <= 31)) {
60 mbar = (volatile unsigned char *) MCF_MBAR;
61 vec = 0x1 << (vec - 24);
62 *(mbar + MCFSIM_AVR) |= vec;
63 mcf_setimr(mcf_getimr() & ~vec);
67 /***************************************************************************/
69 void mcf_settimericr(unsigned int timer, unsigned int level)
71 volatile unsigned char *icrp;
72 unsigned int icr, imr;
74 if (timer <= 2) {
75 switch (timer) {
76 case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
77 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
80 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
81 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
82 mcf_setimr(mcf_getimr() & ~imr);
86 /***************************************************************************/
88 int mcf_timerirqpending(int timer)
90 unsigned int imr = 0;
92 switch (timer) {
93 case 1: imr = MCFSIM_IMR_TIMER1; break;
94 case 2: imr = MCFSIM_IMR_TIMER2; break;
95 default: break;
97 return (mcf_getipr() & imr);
100 /***************************************************************************/
102 void config_BSP(char *commandp, int size)
104 mcf_setimr(MCFSIM_IMR_MASKALL);
106 #if defined(CONFIG_BOOTPARAM)
107 strncpy(commandp, CONFIG_BOOTPARAM_STRING, size);
108 commandp[size-1] = 0;
109 #else
110 memset(commandp, 0, size);
111 #endif
113 #if defined(CONFIG_CLEOPATRA)
114 /* Different timer setup - to prevent device clash */
115 mcf_timervector = 30;
116 mcf_profilevector = 31;
117 mcf_timerlevel = 6;
118 #endif
120 mach_sched_init = coldfire_timer_init;
121 mach_tick = coldfire_tick;
122 mach_gettimeoffset = coldfire_timer_offset;
123 mach_trap_init = coldfire_trap_init;
124 mach_reset = coldfire_reset;
127 /***************************************************************************/