[ARM] Support register switch in nommu mode
[linux-2.6/verdex.git] / arch / powerpc / platforms / iseries / call_pci.h
blob59d4e0ad5cf324796e5ea7e7dd081feef071f476
1 /*
2 * Provides the Hypervisor PCI calls for iSeries Linux Parition.
3 * Copyright (C) 2001 <Wayne G Holm> <IBM Corporation>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the:
17 * Free Software Foundation, Inc.,
18 * 59 Temple Place, Suite 330,
19 * Boston, MA 02111-1307 USA
21 * Change Activity:
22 * Created, Jan 9, 2001
25 #ifndef _PLATFORMS_ISERIES_CALL_PCI_H
26 #define _PLATFORMS_ISERIES_CALL_PCI_H
28 #include <asm/iseries/hv_call_sc.h>
29 #include <asm/iseries/hv_types.h>
32 * DSA == Direct Select Address
33 * this struct must be 64 bits in total
35 struct HvCallPci_DsaAddr {
36 u16 busNumber; /* PHB index? */
37 u8 subBusNumber; /* PCI bus number? */
38 u8 deviceId; /* device and function? */
39 u8 barNumber;
40 u8 reserved[3];
43 union HvDsaMap {
44 u64 DsaAddr;
45 struct HvCallPci_DsaAddr Dsa;
48 struct HvCallPci_LoadReturn {
49 u64 rc;
50 u64 value;
53 enum HvCallPci_DeviceType {
54 HvCallPci_NodeDevice = 1,
55 HvCallPci_SpDevice = 2,
56 HvCallPci_IopDevice = 3,
57 HvCallPci_BridgeDevice = 4,
58 HvCallPci_MultiFunctionDevice = 5,
59 HvCallPci_IoaDevice = 6
63 struct HvCallPci_DeviceInfo {
64 u32 deviceType; /* See DeviceType enum for values */
67 struct HvCallPci_BusUnitInfo {
68 u32 sizeReturned; /* length of data returned */
69 u32 deviceType; /* see DeviceType enum for values */
72 struct HvCallPci_BridgeInfo {
73 struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */
74 u8 subBusNumber; /* Bus number of secondary bus */
75 u8 maxAgents; /* Max idsels on secondary bus */
76 u8 maxSubBusNumber; /* Max Sub Bus */
77 u8 logicalSlotNumber; /* Logical Slot Number for IOA */
82 * Maximum BusUnitInfo buffer size. Provided for clients so
83 * they can allocate a buffer big enough for any type of bus
84 * unit. Increase as needed.
86 enum {HvCallPci_MaxBusUnitInfoSize = 128};
88 struct HvCallPci_BarParms {
89 u64 vaddr;
90 u64 raddr;
91 u64 size;
92 u64 protectStart;
93 u64 protectEnd;
94 u64 relocationOffset;
95 u64 pciAddress;
96 u64 reserved[3];
99 enum HvCallPci_VpdType {
100 HvCallPci_BusVpd = 1,
101 HvCallPci_BusAdapterVpd = 2
104 #define HvCallPciConfigLoad8 HvCallPci + 0
105 #define HvCallPciConfigLoad16 HvCallPci + 1
106 #define HvCallPciConfigLoad32 HvCallPci + 2
107 #define HvCallPciConfigStore8 HvCallPci + 3
108 #define HvCallPciConfigStore16 HvCallPci + 4
109 #define HvCallPciConfigStore32 HvCallPci + 5
110 #define HvCallPciEoi HvCallPci + 16
111 #define HvCallPciGetBarParms HvCallPci + 18
112 #define HvCallPciMaskFisr HvCallPci + 20
113 #define HvCallPciUnmaskFisr HvCallPci + 21
114 #define HvCallPciSetSlotReset HvCallPci + 25
115 #define HvCallPciGetDeviceInfo HvCallPci + 27
116 #define HvCallPciGetCardVpd HvCallPci + 28
117 #define HvCallPciBarLoad8 HvCallPci + 40
118 #define HvCallPciBarLoad16 HvCallPci + 41
119 #define HvCallPciBarLoad32 HvCallPci + 42
120 #define HvCallPciBarLoad64 HvCallPci + 43
121 #define HvCallPciBarStore8 HvCallPci + 44
122 #define HvCallPciBarStore16 HvCallPci + 45
123 #define HvCallPciBarStore32 HvCallPci + 46
124 #define HvCallPciBarStore64 HvCallPci + 47
125 #define HvCallPciMaskInterrupts HvCallPci + 48
126 #define HvCallPciUnmaskInterrupts HvCallPci + 49
127 #define HvCallPciGetBusUnitInfo HvCallPci + 50
129 static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
130 u8 deviceId, u32 offset, u16 *value)
132 struct HvCallPci_DsaAddr dsa;
133 struct HvCallPci_LoadReturn retVal;
135 *((u64*)&dsa) = 0;
137 dsa.busNumber = busNumber;
138 dsa.subBusNumber = subBusNumber;
139 dsa.deviceId = deviceId;
141 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
143 *value = retVal.value;
145 return retVal.rc;
148 static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
149 u8 deviceId, u32 offset, u8 value)
151 struct HvCallPci_DsaAddr dsa;
153 *((u64*)&dsa) = 0;
155 dsa.busNumber = busNumber;
156 dsa.subBusNumber = subBusNumber;
157 dsa.deviceId = deviceId;
159 return HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
162 static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
163 u8 deviceIdParm)
165 struct HvCallPci_DsaAddr dsa;
166 struct HvCallPci_LoadReturn retVal;
168 *((u64*)&dsa) = 0;
170 dsa.busNumber = busNumberParm;
171 dsa.subBusNumber = subBusParm;
172 dsa.deviceId = deviceIdParm;
174 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
176 return retVal.rc;
179 static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
180 u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
182 struct HvCallPci_DsaAddr dsa;
184 *((u64*)&dsa) = 0;
186 dsa.busNumber = busNumberParm;
187 dsa.subBusNumber = subBusParm;
188 dsa.deviceId = deviceIdParm;
189 dsa.barNumber = barNumberParm;
191 return HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
194 static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
195 u8 deviceIdParm, u64 fisrMask)
197 struct HvCallPci_DsaAddr dsa;
199 *((u64*)&dsa) = 0;
201 dsa.busNumber = busNumberParm;
202 dsa.subBusNumber = subBusParm;
203 dsa.deviceId = deviceIdParm;
205 return HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
208 static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
209 u8 deviceIdParm, u64 fisrMask)
211 struct HvCallPci_DsaAddr dsa;
213 *((u64*)&dsa) = 0;
215 dsa.busNumber = busNumberParm;
216 dsa.subBusNumber = subBusParm;
217 dsa.deviceId = deviceIdParm;
219 return HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
222 static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
223 u8 deviceNumberParm, u64 parms, u32 sizeofParms)
225 struct HvCallPci_DsaAddr dsa;
227 *((u64*)&dsa) = 0;
229 dsa.busNumber = busNumberParm;
230 dsa.subBusNumber = subBusParm;
231 dsa.deviceId = deviceNumberParm << 4;
233 return HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
236 static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
237 u8 deviceIdParm, u64 interruptMask)
239 struct HvCallPci_DsaAddr dsa;
241 *((u64*)&dsa) = 0;
243 dsa.busNumber = busNumberParm;
244 dsa.subBusNumber = subBusParm;
245 dsa.deviceId = deviceIdParm;
247 return HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
250 static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
251 u8 deviceIdParm, u64 interruptMask)
253 struct HvCallPci_DsaAddr dsa;
255 *((u64*)&dsa) = 0;
257 dsa.busNumber = busNumberParm;
258 dsa.subBusNumber = subBusParm;
259 dsa.deviceId = deviceIdParm;
261 return HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
264 static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
265 u8 deviceIdParm, u64 parms, u32 sizeofParms)
267 struct HvCallPci_DsaAddr dsa;
269 *((u64*)&dsa) = 0;
271 dsa.busNumber = busNumberParm;
272 dsa.subBusNumber = subBusParm;
273 dsa.deviceId = deviceIdParm;
275 return HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms,
276 sizeofParms);
279 static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
280 u16 sizeParm)
282 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
283 sizeParm, HvCallPci_BusVpd);
284 if (xRc == -1)
285 return -1;
286 else
287 return xRc & 0xFFFF;
290 #endif /* _PLATFORMS_ISERIES_CALL_PCI_H */