arch/powerpc/platforms/iseries/processor_vpd.h

   1 /*
   2  * Copyright (C) 2001  Mike Corrigan IBM Corporation
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  17  */
  18 #ifndef _ISERIES_PROCESSOR_VPD_H
  19 #define _ISERIES_PROCESSOR_VPD_H
  20
  21 #include <asm/types.h>
  22
  23 /*
  24  * This struct maps Processor Vpd that is DMAd to SLIC by CSP
  25  */
  26 struct IoHriProcessorVpd {
  27         u8      xFormat;                // VPD format indicator         x00-x00
  28         u8      xProcStatus:8;          // Processor State              x01-x01
  29         u8      xSecondaryThreadCount;  // Secondary thread cnt         x02-x02
  30         u8      xSrcType:1;             // Src Type                     x03-x03
  31         u8      xSrcSoft:1;             // Src stay soft                ...
  32         u8      xSrcParable:1;          // Src parable                  ...
  33         u8      xRsvd1:5;               // Reserved                     ...
  34         u16     xHvPhysicalProcIndex;   // Hypervisor physical proc index04-x05
  35         u16     xRsvd2;                 // Reserved                     x06-x07
  36         u32     xHwNodeId;              // Hardware node id             x08-x0B
  37         u32     xHwProcId;              // Hardware processor id        x0C-x0F
  38
  39         u32     xTypeNum;               // Card Type/CCIN number        x10-x13
  40         u32     xModelNum;              // Model/Feature number         x14-x17
  41         u64     xSerialNum;             // Serial number                x18-x1F
  42         char    xPartNum[12];           // Book Part or FPU number      x20-x2B
  43         char    xMfgID[4];              // Manufacturing ID             x2C-x2F
  44
  45         u32     xProcFreq;              // Processor Frequency          x30-x33
  46         u32     xTimeBaseFreq;          // Time Base Frequency          x34-x37
  47
  48         u32     xChipEcLevel;           // Chip EC Levels               x38-x3B
  49         u32     xProcIdReg;             // PIR SPR value                x3C-x3F
  50         u32     xPVR;                   // PVR value                    x40-x43
  51         u8      xRsvd3[12];             // Reserved                     x44-x4F
  52
  53         u32     xInstCacheSize;         // Instruction cache size in KB x50-x53
  54         u32     xInstBlockSize;         // Instruction cache block size x54-x57
  55         u32     xDataCacheOperandSize;  // Data cache operand size      x58-x5B
  56         u32     xInstCacheOperandSize;  // Inst cache operand size      x5C-x5F
  57
  58         u32     xDataL1CacheSizeKB;     // L1 data cache size in KB     x60-x63
  59         u32     xDataL1CacheLineSize;   // L1 data cache block size     x64-x67
  60         u64     xRsvd4;                 // Reserved                     x68-x6F
  61
  62         u32     xDataL2CacheSizeKB;     // L2 data cache size in KB     x70-x73
  63         u32     xDataL2CacheLineSize;   // L2 data cache block size     x74-x77
  64         u64     xRsvd5;                 // Reserved                     x78-x7F
  65
  66         u32     xDataL3CacheSizeKB;     // L3 data cache size in KB     x80-x83
  67         u32     xDataL3CacheLineSize;   // L3 data cache block size     x84-x87
  68         u64     xRsvd6;                 // Reserved                     x88-x8F
  69
  70         u64     xFruLabel;              // Card Location Label          x90-x97
  71         u8      xSlotsOnCard;           // Slots on card (0=no slots)   x98-x98
  72         u8      xPartLocFlag;           // Location flag (0-pluggable 1-imbedded) x99-x99
  73         u16     xSlotMapIndex;          // Index in slot map table      x9A-x9B
  74         u8      xSmartCardPortNo;       // Smart card port number       x9C-x9C
  75         u8      xRsvd7;                 // Reserved                     x9D-x9D
  76         u16     xFrameIdAndRackUnit;    // Frame ID and rack unit adr   x9E-x9F
  77
  78         u8      xRsvd8[24];             // Reserved                     xA0-xB7
  79
  80         char    xProcSrc[72];           // CSP format SRC               xB8-xFF
  81 };
  82
  83 extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
  84
  85 #endif /* _ISERIES_PROCESSOR_VPD_H */