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[ARM] Support register switch in nommu mode
[linux-2.6/verdex.git] / arch / powerpc / platforms / powermac / feature.c
blob558dd06920921f04bde22e4084d0347ba73c8209
1 /*
2 * arch/ppc/platforms/pmac_feature.c
3 *
4 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
5 * Ben. Herrenschmidt (benh@kernel.crashing.org)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 *
12 * TODO:
13 *
14 * - Replace mdelay with some schedule loop if possible
15 * - Shorten some obfuscated delays on some routines (like modem
16 * power)
17 * - Refcount some clocks (see darwin)
18 * - Split split split...
19 *
20 */
21 #include <linux/config.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/spinlock.h>
28 #include <linux/adb.h>
29 #include <linux/pmu.h>
30 #include <linux/ioport.h>
31 #include <linux/pci.h>
32 #include <asm/sections.h>
33 #include <asm/errno.h>
34 #include <asm/ohare.h>
35 #include <asm/heathrow.h>
36 #include <asm/keylargo.h>
37 #include <asm/uninorth.h>
38 #include <asm/io.h>
39 #include <asm/prom.h>
40 #include <asm/machdep.h>
41 #include <asm/pmac_feature.h>
42 #include <asm/dbdma.h>
43 #include <asm/pci-bridge.h>
44 #include <asm/pmac_low_i2c.h>
45
46 #undef DEBUG_FEATURE
47
48 #ifdef DEBUG_FEATURE
49 #define DBG(fmt...) printk(KERN_DEBUG fmt)
50 #else
51 #define DBG(fmt...)
52 #endif
53
54 #ifdef CONFIG_6xx
55 extern int powersave_lowspeed;
56 #endif
57
58 extern int powersave_nap;
59 extern struct device_node *k2_skiplist[2];
60
61 /*
62 * We use a single global lock to protect accesses. Each driver has
63 * to take care of its own locking
64 */
65 DEFINE_SPINLOCK(feature_lock);
66
67 #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
68 #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
69
70
71 /*
72 * Instance of some macio stuffs
73 */
74 struct macio_chip macio_chips[MAX_MACIO_CHIPS];
75
76 struct macio_chip *macio_find(struct device_node *child, int type)
77 {
78 while(child) {
79 int i;
80
81 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
82 if (child == macio_chips[i].of_node &&
83 (!type || macio_chips[i].type == type))
84 return &macio_chips[i];
85 child = child->parent;
86 }
87 return NULL;
88 }
89 EXPORT_SYMBOL_GPL(macio_find);
90
91 static const char *macio_names[] =
92 {
93 "Unknown",
94 "Grand Central",
95 "OHare",
96 "OHareII",
97 "Heathrow",
98 "Gatwick",
99 "Paddington",
100 "Keylargo",
101 "Pangea",
102 "Intrepid",
103 "K2",
104 "Shasta",
105 };
106
107
108 struct device_node *uninorth_node;
109 u32 __iomem *uninorth_base;
110
111 static u32 uninorth_rev;
112 static int uninorth_maj;
113 static void __iomem *u3_ht_base;
114
115 /*
116 * For each motherboard family, we have a table of functions pointers
117 * that handle the various features.
118 */
119
120 typedef long (*feature_call)(struct device_node *node, long param, long value);
121
122 struct feature_table_entry {
123 unsigned int selector;
124 feature_call function;
125 };
126
127 struct pmac_mb_def
128 {
129 const char* model_string;
130 const char* model_name;
131 int model_id;
132 struct feature_table_entry* features;
133 unsigned long board_flags;
134 };
135 static struct pmac_mb_def pmac_mb;
136
137 /*
138 * Here are the chip specific feature functions
139 */
140
141 static inline int simple_feature_tweak(struct device_node *node, int type,
142 int reg, u32 mask, int value)
143 {
144 struct macio_chip* macio;
145 unsigned long flags;
146
147 macio = macio_find(node, type);
148 if (!macio)
149 return -ENODEV;
150 LOCK(flags);
151 if (value)
152 MACIO_BIS(reg, mask);
153 else
154 MACIO_BIC(reg, mask);
155 (void)MACIO_IN32(reg);
156 UNLOCK(flags);
157
158 return 0;
159 }
160
161 #ifndef CONFIG_POWER4
162
163 static long ohare_htw_scc_enable(struct device_node *node, long param,
164 long value)
165 {
166 struct macio_chip* macio;
167 unsigned long chan_mask;
168 unsigned long fcr;
169 unsigned long flags;
170 int htw, trans;
171 unsigned long rmask;
172
173 macio = macio_find(node, 0);
174 if (!macio)
175 return -ENODEV;
176 if (!strcmp(node->name, "ch-a"))
177 chan_mask = MACIO_FLAG_SCCA_ON;
178 else if (!strcmp(node->name, "ch-b"))
179 chan_mask = MACIO_FLAG_SCCB_ON;
180 else
181 return -ENODEV;
182
183 htw = (macio->type == macio_heathrow || macio->type == macio_paddington
184 || macio->type == macio_gatwick);
185 /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */
186 trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
187 pmac_mb.model_id != PMAC_TYPE_YIKES);
188 if (value) {
189 #ifdef CONFIG_ADB_PMU
190 if ((param & 0xfff) == PMAC_SCC_IRDA)
191 pmu_enable_irled(1);
192 #endif /* CONFIG_ADB_PMU */
193 LOCK(flags);
194 fcr = MACIO_IN32(OHARE_FCR);
195 /* Check if scc cell need enabling */
196 if (!(fcr & OH_SCC_ENABLE)) {
197 fcr |= OH_SCC_ENABLE;
198 if (htw) {
199 /* Side effect: this will also power up the
200 * modem, but it's too messy to figure out on which
201 * ports this controls the tranceiver and on which
202 * it controls the modem
203 */
204 if (trans)
205 fcr &= ~HRW_SCC_TRANS_EN_N;
206 MACIO_OUT32(OHARE_FCR, fcr);
207 fcr |= (rmask = HRW_RESET_SCC);
208 MACIO_OUT32(OHARE_FCR, fcr);
209 } else {
210 fcr |= (rmask = OH_SCC_RESET);
211 MACIO_OUT32(OHARE_FCR, fcr);
212 }
213 UNLOCK(flags);
214 (void)MACIO_IN32(OHARE_FCR);
215 mdelay(15);
216 LOCK(flags);
217 fcr &= ~rmask;
218 MACIO_OUT32(OHARE_FCR, fcr);
219 }
220 if (chan_mask & MACIO_FLAG_SCCA_ON)
221 fcr |= OH_SCCA_IO;
222 if (chan_mask & MACIO_FLAG_SCCB_ON)
223 fcr |= OH_SCCB_IO;
224 MACIO_OUT32(OHARE_FCR, fcr);
225 macio->flags |= chan_mask;
226 UNLOCK(flags);
227 if (param & PMAC_SCC_FLAG_XMON)
228 macio->flags |= MACIO_FLAG_SCC_LOCKED;
229 } else {
230 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
231 return -EPERM;
232 LOCK(flags);
233 fcr = MACIO_IN32(OHARE_FCR);
234 if (chan_mask & MACIO_FLAG_SCCA_ON)
235 fcr &= ~OH_SCCA_IO;
236 if (chan_mask & MACIO_FLAG_SCCB_ON)
237 fcr &= ~OH_SCCB_IO;
238 MACIO_OUT32(OHARE_FCR, fcr);
239 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
240 fcr &= ~OH_SCC_ENABLE;
241 if (htw && trans)
242 fcr |= HRW_SCC_TRANS_EN_N;
243 MACIO_OUT32(OHARE_FCR, fcr);
244 }
245 macio->flags &= ~(chan_mask);
246 UNLOCK(flags);
247 mdelay(10);
248 #ifdef CONFIG_ADB_PMU
249 if ((param & 0xfff) == PMAC_SCC_IRDA)
250 pmu_enable_irled(0);
251 #endif /* CONFIG_ADB_PMU */
252 }
253 return 0;
254 }
255
256 static long ohare_floppy_enable(struct device_node *node, long param,
257 long value)
258 {
259 return simple_feature_tweak(node, macio_ohare,
260 OHARE_FCR, OH_FLOPPY_ENABLE, value);
261 }
262
263 static long ohare_mesh_enable(struct device_node *node, long param, long value)
264 {
265 return simple_feature_tweak(node, macio_ohare,
266 OHARE_FCR, OH_MESH_ENABLE, value);
267 }
268
269 static long ohare_ide_enable(struct device_node *node, long param, long value)
270 {
271 switch(param) {
272 case 0:
273 /* For some reason, setting the bit in set_initial_features()
274 * doesn't stick. I'm still investigating... --BenH.
275 */
276 if (value)
277 simple_feature_tweak(node, macio_ohare,
278 OHARE_FCR, OH_IOBUS_ENABLE, 1);
279 return simple_feature_tweak(node, macio_ohare,
280 OHARE_FCR, OH_IDE0_ENABLE, value);
281 case 1:
282 return simple_feature_tweak(node, macio_ohare,
283 OHARE_FCR, OH_BAY_IDE_ENABLE, value);
284 default:
285 return -ENODEV;
286 }
287 }
288
289 static long ohare_ide_reset(struct device_node *node, long param, long value)
290 {
291 switch(param) {
292 case 0:
293 return simple_feature_tweak(node, macio_ohare,
294 OHARE_FCR, OH_IDE0_RESET_N, !value);
295 case 1:
296 return simple_feature_tweak(node, macio_ohare,
297 OHARE_FCR, OH_IDE1_RESET_N, !value);
298 default:
299 return -ENODEV;
300 }
301 }
302
303 static long ohare_sleep_state(struct device_node *node, long param, long value)
304 {
305 struct macio_chip* macio = &macio_chips[0];
306
307 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
308 return -EPERM;
309 if (value == 1) {
310 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
311 } else if (value == 0) {
312 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
313 }
314
315 return 0;
316 }
317
318 static long heathrow_modem_enable(struct device_node *node, long param,
319 long value)
320 {
321 struct macio_chip* macio;
322 u8 gpio;
323 unsigned long flags;
324
325 macio = macio_find(node, macio_unknown);
326 if (!macio)
327 return -ENODEV;
328 gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
329 if (!value) {
330 LOCK(flags);
331 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
332 UNLOCK(flags);
333 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
334 mdelay(250);
335 }
336 if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
337 pmac_mb.model_id != PMAC_TYPE_YIKES) {
338 LOCK(flags);
339 if (value)
340 MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
341 else
342 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
343 UNLOCK(flags);
344 (void)MACIO_IN32(HEATHROW_FCR);
345 mdelay(250);
346 }
347 if (value) {
348 LOCK(flags);
349 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
350 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
351 UNLOCK(flags); mdelay(250); LOCK(flags);
352 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
353 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
354 UNLOCK(flags); mdelay(250); LOCK(flags);
355 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
356 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
357 UNLOCK(flags); mdelay(250);
358 }
359 return 0;
360 }
361
362 static long heathrow_floppy_enable(struct device_node *node, long param,
363 long value)
364 {
365 return simple_feature_tweak(node, macio_unknown,
366 HEATHROW_FCR,
367 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
368 value);
369 }
370
371 static long heathrow_mesh_enable(struct device_node *node, long param,
372 long value)
373 {
374 struct macio_chip* macio;
375 unsigned long flags;
376
377 macio = macio_find(node, macio_unknown);
378 if (!macio)
379 return -ENODEV;
380 LOCK(flags);
381 /* Set clear mesh cell enable */
382 if (value)
383 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
384 else
385 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
386 (void)MACIO_IN32(HEATHROW_FCR);
387 udelay(10);
388 /* Set/Clear termination power */
389 if (value)
390 MACIO_BIC(HEATHROW_MBCR, 0x04000000);
391 else
392 MACIO_BIS(HEATHROW_MBCR, 0x04000000);
393 (void)MACIO_IN32(HEATHROW_MBCR);
394 udelay(10);
395 UNLOCK(flags);
396
397 return 0;
398 }
399
400 static long heathrow_ide_enable(struct device_node *node, long param,
401 long value)
402 {
403 switch(param) {
404 case 0:
405 return simple_feature_tweak(node, macio_unknown,
406 HEATHROW_FCR, HRW_IDE0_ENABLE, value);
407 case 1:
408 return simple_feature_tweak(node, macio_unknown,
409 HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
410 default:
411 return -ENODEV;
412 }
413 }
414
415 static long heathrow_ide_reset(struct device_node *node, long param,
416 long value)
417 {
418 switch(param) {
419 case 0:
420 return simple_feature_tweak(node, macio_unknown,
421 HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
422 case 1:
423 return simple_feature_tweak(node, macio_unknown,
424 HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
425 default:
426 return -ENODEV;
427 }
428 }
429
430 static long heathrow_bmac_enable(struct device_node *node, long param,
431 long value)
432 {
433 struct macio_chip* macio;
434 unsigned long flags;
435
436 macio = macio_find(node, 0);
437 if (!macio)
438 return -ENODEV;
439 if (value) {
440 LOCK(flags);
441 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
442 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
443 UNLOCK(flags);
444 (void)MACIO_IN32(HEATHROW_FCR);
445 mdelay(10);
446 LOCK(flags);
447 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
448 UNLOCK(flags);
449 (void)MACIO_IN32(HEATHROW_FCR);
450 mdelay(10);
451 } else {
452 LOCK(flags);
453 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
454 UNLOCK(flags);
455 }
456 return 0;
457 }
458
459 static long heathrow_sound_enable(struct device_node *node, long param,
460 long value)
461 {
462 struct macio_chip* macio;
463 unsigned long flags;
464
465 /* B&W G3 and Yikes don't support that properly (the
466 * sound appear to never come back after beeing shut down).
467 */
468 if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
469 pmac_mb.model_id == PMAC_TYPE_YIKES)
470 return 0;
471
472 macio = macio_find(node, 0);
473 if (!macio)
474 return -ENODEV;
475 if (value) {
476 LOCK(flags);
477 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
478 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
479 UNLOCK(flags);
480 (void)MACIO_IN32(HEATHROW_FCR);
481 } else {
482 LOCK(flags);
483 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
484 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
485 UNLOCK(flags);
486 }
487 return 0;
488 }
489
490 static u32 save_fcr[6];
491 static u32 save_mbcr;
492 static u32 save_gpio_levels[2];
493 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
494 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
495 static u32 save_unin_clock_ctl;
496 static struct dbdma_regs save_dbdma[13];
497 static struct dbdma_regs save_alt_dbdma[13];
498
499 static void dbdma_save(struct macio_chip *macio, struct dbdma_regs *save)
500 {
501 int i;
502
503 /* Save state & config of DBDMA channels */
504 for (i = 0; i < 13; i++) {
505 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
506 (macio->base + ((0x8000+i*0x100)>>2));
507 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
508 save[i].cmdptr = in_le32(&chan->cmdptr);
509 save[i].intr_sel = in_le32(&chan->intr_sel);
510 save[i].br_sel = in_le32(&chan->br_sel);
511 save[i].wait_sel = in_le32(&chan->wait_sel);
512 }
513 }
514
515 static void dbdma_restore(struct macio_chip *macio, struct dbdma_regs *save)
516 {
517 int i;
518
519 /* Save state & config of DBDMA channels */
520 for (i = 0; i < 13; i++) {
521 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
522 (macio->base + ((0x8000+i*0x100)>>2));
523 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
524 while (in_le32(&chan->status) & ACTIVE)
525 mb();
526 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
527 out_le32(&chan->cmdptr, save[i].cmdptr);
528 out_le32(&chan->intr_sel, save[i].intr_sel);
529 out_le32(&chan->br_sel, save[i].br_sel);
530 out_le32(&chan->wait_sel, save[i].wait_sel);
531 }
532 }
533
534 static void heathrow_sleep(struct macio_chip *macio, int secondary)
535 {
536 if (secondary) {
537 dbdma_save(macio, save_alt_dbdma);
538 save_fcr[2] = MACIO_IN32(0x38);
539 save_fcr[3] = MACIO_IN32(0x3c);
540 } else {
541 dbdma_save(macio, save_dbdma);
542 save_fcr[0] = MACIO_IN32(0x38);
543 save_fcr[1] = MACIO_IN32(0x3c);
544 save_mbcr = MACIO_IN32(0x34);
545 /* Make sure sound is shut down */
546 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
547 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
548 /* This seems to be necessary as well or the fan
549 * keeps coming up and battery drains fast */
550 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
551 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N);
552 /* Make sure eth is down even if module or sleep
553 * won't work properly */
554 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET);
555 }
556 /* Make sure modem is shut down */
557 MACIO_OUT8(HRW_GPIO_MODEM_RESET,
558 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
559 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
560 MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);
561
562 /* Let things settle */
563 (void)MACIO_IN32(HEATHROW_FCR);
564 }
565
566 static void heathrow_wakeup(struct macio_chip *macio, int secondary)
567 {
568 if (secondary) {
569 MACIO_OUT32(0x38, save_fcr[2]);
570 (void)MACIO_IN32(0x38);
571 mdelay(1);
572 MACIO_OUT32(0x3c, save_fcr[3]);
573 (void)MACIO_IN32(0x38);
574 mdelay(10);
575 dbdma_restore(macio, save_alt_dbdma);
576 } else {
577 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
578 (void)MACIO_IN32(0x38);
579 mdelay(1);
580 MACIO_OUT32(0x3c, save_fcr[1]);
581 (void)MACIO_IN32(0x38);
582 mdelay(1);
583 MACIO_OUT32(0x34, save_mbcr);
584 (void)MACIO_IN32(0x38);
585 mdelay(10);
586 dbdma_restore(macio, save_dbdma);
587 }
588 }
589
590 static long heathrow_sleep_state(struct device_node *node, long param,
591 long value)
592 {
593 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
594 return -EPERM;
595 if (value == 1) {
596 if (macio_chips[1].type == macio_gatwick)
597 heathrow_sleep(&macio_chips[0], 1);
598 heathrow_sleep(&macio_chips[0], 0);
599 } else if (value == 0) {
600 heathrow_wakeup(&macio_chips[0], 0);
601 if (macio_chips[1].type == macio_gatwick)
602 heathrow_wakeup(&macio_chips[0], 1);
603 }
604 return 0;
605 }
606
607 static long core99_scc_enable(struct device_node *node, long param, long value)
608 {
609 struct macio_chip* macio;
610 unsigned long flags;
611 unsigned long chan_mask;
612 u32 fcr;
613
614 macio = macio_find(node, 0);
615 if (!macio)
616 return -ENODEV;
617 if (!strcmp(node->name, "ch-a"))
618 chan_mask = MACIO_FLAG_SCCA_ON;
619 else if (!strcmp(node->name, "ch-b"))
620 chan_mask = MACIO_FLAG_SCCB_ON;
621 else
622 return -ENODEV;
623
624 if (value) {
625 int need_reset_scc = 0;
626 int need_reset_irda = 0;
627
628 LOCK(flags);
629 fcr = MACIO_IN32(KEYLARGO_FCR0);
630 /* Check if scc cell need enabling */
631 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
632 fcr |= KL0_SCC_CELL_ENABLE;
633 need_reset_scc = 1;
634 }
635 if (chan_mask & MACIO_FLAG_SCCA_ON) {
636 fcr |= KL0_SCCA_ENABLE;
637 /* Don't enable line drivers for I2S modem */
638 if ((param & 0xfff) == PMAC_SCC_I2S1)
639 fcr &= ~KL0_SCC_A_INTF_ENABLE;
640 else
641 fcr |= KL0_SCC_A_INTF_ENABLE;
642 }
643 if (chan_mask & MACIO_FLAG_SCCB_ON) {
644 fcr |= KL0_SCCB_ENABLE;
645 /* Perform irda specific inits */
646 if ((param & 0xfff) == PMAC_SCC_IRDA) {
647 fcr &= ~KL0_SCC_B_INTF_ENABLE;
648 fcr |= KL0_IRDA_ENABLE;
649 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
650 fcr |= KL0_IRDA_SOURCE1_SEL;
651 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
652 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
653 need_reset_irda = 1;
654 } else
655 fcr |= KL0_SCC_B_INTF_ENABLE;
656 }
657 MACIO_OUT32(KEYLARGO_FCR0, fcr);
658 macio->flags |= chan_mask;
659 if (need_reset_scc) {
660 MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
661 (void)MACIO_IN32(KEYLARGO_FCR0);
662 UNLOCK(flags);
663 mdelay(15);
664 LOCK(flags);
665 MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
666 }
667 if (need_reset_irda) {
668 MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
669 (void)MACIO_IN32(KEYLARGO_FCR0);
670 UNLOCK(flags);
671 mdelay(15);
672 LOCK(flags);
673 MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
674 }
675 UNLOCK(flags);
676 if (param & PMAC_SCC_FLAG_XMON)
677 macio->flags |= MACIO_FLAG_SCC_LOCKED;
678 } else {
679 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
680 return -EPERM;
681 LOCK(flags);
682 fcr = MACIO_IN32(KEYLARGO_FCR0);
683 if (chan_mask & MACIO_FLAG_SCCA_ON)
684 fcr &= ~KL0_SCCA_ENABLE;
685 if (chan_mask & MACIO_FLAG_SCCB_ON) {
686 fcr &= ~KL0_SCCB_ENABLE;
687 /* Perform irda specific clears */
688 if ((param & 0xfff) == PMAC_SCC_IRDA) {
689 fcr &= ~KL0_IRDA_ENABLE;
690 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
691 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
692 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
693 }
694 }
695 MACIO_OUT32(KEYLARGO_FCR0, fcr);
696 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
697 fcr &= ~KL0_SCC_CELL_ENABLE;
698 MACIO_OUT32(KEYLARGO_FCR0, fcr);
699 }
700 macio->flags &= ~(chan_mask);
701 UNLOCK(flags);
702 mdelay(10);
703 }
704 return 0;
705 }
706
707 static long
708 core99_modem_enable(struct device_node *node, long param, long value)
709 {
710 struct macio_chip* macio;
711 u8 gpio;
712 unsigned long flags;
713
714 /* Hack for internal USB modem */
715 if (node == NULL) {
716 if (macio_chips[0].type != macio_keylargo)
717 return -ENODEV;
718 node = macio_chips[0].of_node;
719 }
720 macio = macio_find(node, 0);
721 if (!macio)
722 return -ENODEV;
723 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
724 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
725 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
726
727 if (!value) {
728 LOCK(flags);
729 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
730 UNLOCK(flags);
731 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
732 mdelay(250);
733 }
734 LOCK(flags);
735 if (value) {
736 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
737 UNLOCK(flags);
738 (void)MACIO_IN32(KEYLARGO_FCR2);
739 mdelay(250);
740 } else {
741 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
742 UNLOCK(flags);
743 }
744 if (value) {
745 LOCK(flags);
746 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
747 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
748 UNLOCK(flags); mdelay(250); LOCK(flags);
749 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
750 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
751 UNLOCK(flags); mdelay(250); LOCK(flags);
752 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
753 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
754 UNLOCK(flags); mdelay(250);
755 }
756 return 0;
757 }
758
759 static long
760 pangea_modem_enable(struct device_node *node, long param, long value)
761 {
762 struct macio_chip* macio;
763 u8 gpio;
764 unsigned long flags;
765
766 /* Hack for internal USB modem */
767 if (node == NULL) {
768 if (macio_chips[0].type != macio_pangea &&
769 macio_chips[0].type != macio_intrepid)
770 return -ENODEV;
771 node = macio_chips[0].of_node;
772 }
773 macio = macio_find(node, 0);
774 if (!macio)
775 return -ENODEV;
776 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
777 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
778 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
779
780 if (!value) {
781 LOCK(flags);
782 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
783 UNLOCK(flags);
784 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
785 mdelay(250);
786 }
787 LOCK(flags);
788 if (value) {
789 MACIO_OUT8(KL_GPIO_MODEM_POWER,
790 KEYLARGO_GPIO_OUTPUT_ENABLE);
791 UNLOCK(flags);
792 (void)MACIO_IN32(KEYLARGO_FCR2);
793 mdelay(250);
794 } else {
795 MACIO_OUT8(KL_GPIO_MODEM_POWER,
796 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
797 UNLOCK(flags);
798 }
799 if (value) {
800 LOCK(flags);
801 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
802 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
803 UNLOCK(flags); mdelay(250); LOCK(flags);
804 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
805 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
806 UNLOCK(flags); mdelay(250); LOCK(flags);
807 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
808 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
809 UNLOCK(flags); mdelay(250);
810 }
811 return 0;
812 }
813
814 static long
815 core99_ata100_enable(struct device_node *node, long value)
816 {
817 unsigned long flags;
818 struct pci_dev *pdev = NULL;
819 u8 pbus, pid;
820
821 if (uninorth_rev < 0x24)
822 return -ENODEV;
823
824 LOCK(flags);
825 if (value)
826 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
827 else
828 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
829 (void)UN_IN(UNI_N_CLOCK_CNTL);
830 UNLOCK(flags);
831 udelay(20);
832
833 if (value) {
834 if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
835 pdev = pci_find_slot(pbus, pid);
836 if (pdev == NULL)
837 return 0;
838 pci_enable_device(pdev);
839 pci_set_master(pdev);
840 }
841 return 0;
842 }
843
844 static long
845 core99_ide_enable(struct device_node *node, long param, long value)
846 {
847 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
848 * based ata-100
849 */
850 switch(param) {
851 case 0:
852 return simple_feature_tweak(node, macio_unknown,
853 KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
854 case 1:
855 return simple_feature_tweak(node, macio_unknown,
856 KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
857 case 2:
858 return simple_feature_tweak(node, macio_unknown,
859 KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
860 case 3:
861 return core99_ata100_enable(node, value);
862 default:
863 return -ENODEV;
864 }
865 }
866
867 static long
868 core99_ide_reset(struct device_node *node, long param, long value)
869 {
870 switch(param) {
871 case 0:
872 return simple_feature_tweak(node, macio_unknown,
873 KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
874 case 1:
875 return simple_feature_tweak(node, macio_unknown,
876 KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
877 case 2:
878 return simple_feature_tweak(node, macio_unknown,
879 KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
880 default:
881 return -ENODEV;
882 }
883 }
884
885 static long
886 core99_gmac_enable(struct device_node *node, long param, long value)
887 {
888 unsigned long flags;
889
890 LOCK(flags);
891 if (value)
892 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
893 else
894 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
895 (void)UN_IN(UNI_N_CLOCK_CNTL);
896 UNLOCK(flags);
897 udelay(20);
898
899 return 0;
900 }
901
902 static long
903 core99_gmac_phy_reset(struct device_node *node, long param, long value)
904 {
905 unsigned long flags;
906 struct macio_chip *macio;
907
908 macio = &macio_chips[0];
909 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
910 macio->type != macio_intrepid)
911 return -ENODEV;
912
913 LOCK(flags);
914 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
915 (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
916 UNLOCK(flags);
917 mdelay(10);
918 LOCK(flags);
919 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
920 KEYLARGO_GPIO_OUTOUT_DATA);
921 UNLOCK(flags);
922 mdelay(10);
923
924 return 0;
925 }
926
927 static long
928 core99_sound_chip_enable(struct device_node *node, long param, long value)
929 {
930 struct macio_chip* macio;
931 unsigned long flags;
932
933 macio = macio_find(node, 0);
934 if (!macio)
935 return -ENODEV;
936
937 /* Do a better probe code, screamer G4 desktops &
938 * iMacs can do that too, add a recalibrate in
939 * the driver as well
940 */
941 if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
942 pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
943 LOCK(flags);
944 if (value)
945 MACIO_OUT8(KL_GPIO_SOUND_POWER,
946 KEYLARGO_GPIO_OUTPUT_ENABLE |
947 KEYLARGO_GPIO_OUTOUT_DATA);
948 else
949 MACIO_OUT8(KL_GPIO_SOUND_POWER,
950 KEYLARGO_GPIO_OUTPUT_ENABLE);
951 (void)MACIO_IN8(KL_GPIO_SOUND_POWER);
952 UNLOCK(flags);
953 }
954 return 0;
955 }
956
957 static long
958 core99_airport_enable(struct device_node *node, long param, long value)
959 {
960 struct macio_chip* macio;
961 unsigned long flags;
962 int state;
963
964 macio = macio_find(node, 0);
965 if (!macio)
966 return -ENODEV;
967
968 /* Hint: we allow passing of macio itself for the sake of the
969 * sleep code
970 */
971 if (node != macio->of_node &&
972 (!node->parent || node->parent != macio->of_node))
973 return -ENODEV;
974 state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
975 if (value == state)
976 return 0;
977 if (value) {
978 /* This code is a reproduction of OF enable-cardslot
979 * and init-wireless methods, slightly hacked until
980 * I got it working.
981 */
982 LOCK(flags);
983 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
984 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
985 UNLOCK(flags);
986 mdelay(10);
987 LOCK(flags);
988 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
989 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
990 UNLOCK(flags);
991
992 mdelay(10);
993
994 LOCK(flags);
995 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
996 (void)MACIO_IN32(KEYLARGO_FCR2);
997 udelay(10);
998 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
999 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
1000 udelay(10);
1001 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
1002 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
1003 udelay(10);
1004 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
1005 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
1006 udelay(10);
1007 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
1008 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
1009 udelay(10);
1010 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
1011 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
1012 UNLOCK(flags);
1013 udelay(10);
1014 MACIO_OUT32(0x1c000, 0);
1015 mdelay(1);
1016 MACIO_OUT8(0x1a3e0, 0x41);
1017 (void)MACIO_IN8(0x1a3e0);
1018 udelay(10);
1019 LOCK(flags);
1020 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
1021 (void)MACIO_IN32(KEYLARGO_FCR2);
1022 UNLOCK(flags);
1023 mdelay(100);
1024
1025 macio->flags |= MACIO_FLAG_AIRPORT_ON;
1026 } else {
1027 LOCK(flags);
1028 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1029 (void)MACIO_IN32(KEYLARGO_FCR2);
1030 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
1031 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
1032 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
1033 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
1034 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
1035 (void)MACIO_IN8(KL_GPIO_AIRPORT_4);
1036 UNLOCK(flags);
1037
1038 macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
1039 }
1040 return 0;
1041 }
1042
1043 #ifdef CONFIG_SMP
1044 static long
1045 core99_reset_cpu(struct device_node *node, long param, long value)
1046 {
1047 unsigned int reset_io = 0;
1048 unsigned long flags;
1049 struct macio_chip *macio;
1050 struct device_node *np;
1051 const int dflt_reset_lines[] = { KL_GPIO_RESET_CPU0,
1052 KL_GPIO_RESET_CPU1,
1053 KL_GPIO_RESET_CPU2,
1054 KL_GPIO_RESET_CPU3 };
1055
1056 macio = &macio_chips[0];
1057 if (macio->type != macio_keylargo)
1058 return -ENODEV;
1059
1060 np = find_path_device("/cpus");
1061 if (np == NULL)
1062 return -ENODEV;
1063 for (np = np->child; np != NULL; np = np->sibling) {
1064 u32 *num = (u32 *)get_property(np, "reg", NULL);
1065 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL);
1066 if (num == NULL || rst == NULL)
1067 continue;
1068 if (param == *num) {
1069 reset_io = *rst;
1070 break;
1071 }
1072 }
1073 if (np == NULL || reset_io == 0)
1074 reset_io = dflt_reset_lines[param];
1075
1076 LOCK(flags);
1077 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1078 (void)MACIO_IN8(reset_io);
1079 udelay(1);
1080 MACIO_OUT8(reset_io, 0);
1081 (void)MACIO_IN8(reset_io);
1082 UNLOCK(flags);
1083
1084 return 0;
1085 }
1086 #endif /* CONFIG_SMP */
1087
1088 static long
1089 core99_usb_enable(struct device_node *node, long param, long value)
1090 {
1091 struct macio_chip *macio;
1092 unsigned long flags;
1093 char *prop;
1094 int number;
1095 u32 reg;
1096
1097 macio = &macio_chips[0];
1098 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1099 macio->type != macio_intrepid)
1100 return -ENODEV;
1101
1102 prop = (char *)get_property(node, "AAPL,clock-id", NULL);
1103 if (!prop)
1104 return -ENODEV;
1105 if (strncmp(prop, "usb0u048", 8) == 0)
1106 number = 0;
1107 else if (strncmp(prop, "usb1u148", 8) == 0)
1108 number = 2;
1109 else if (strncmp(prop, "usb2u248", 8) == 0)
1110 number = 4;
1111 else
1112 return -ENODEV;
1113
1114 /* Sorry for the brute-force locking, but this is only used during
1115 * sleep and the timing seem to be critical
1116 */
1117 LOCK(flags);
1118 if (value) {
1119 /* Turn ON */
1120 if (number == 0) {
1121 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1122 (void)MACIO_IN32(KEYLARGO_FCR0);
1123 UNLOCK(flags);
1124 mdelay(1);
1125 LOCK(flags);
1126 MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1127 } else if (number == 2) {
1128 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1129 UNLOCK(flags);
1130 (void)MACIO_IN32(KEYLARGO_FCR0);
1131 mdelay(1);
1132 LOCK(flags);
1133 MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1134 } else if (number == 4) {
1135 MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1136 UNLOCK(flags);
1137 (void)MACIO_IN32(KEYLARGO_FCR1);
1138 mdelay(1);
1139 LOCK(flags);
1140 MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE);
1141 }
1142 if (number < 4) {
1143 reg = MACIO_IN32(KEYLARGO_FCR4);
1144 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1145 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
1146 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1147 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
1148 MACIO_OUT32(KEYLARGO_FCR4, reg);
1149 (void)MACIO_IN32(KEYLARGO_FCR4);
1150 udelay(10);
1151 } else {
1152 reg = MACIO_IN32(KEYLARGO_FCR3);
1153 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1154 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0));
1155 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1156 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1));
1157 MACIO_OUT32(KEYLARGO_FCR3, reg);
1158 (void)MACIO_IN32(KEYLARGO_FCR3);
1159 udelay(10);
1160 }
1161 if (macio->type == macio_intrepid) {
1162 /* wait for clock stopped bits to clear */
1163 u32 test0 = 0, test1 = 0;
1164 u32 status0, status1;
1165 int timeout = 1000;
1166
1167 UNLOCK(flags);
1168 switch (number) {
1169 case 0:
1170 test0 = UNI_N_CLOCK_STOPPED_USB0;
1171 test1 = UNI_N_CLOCK_STOPPED_USB0PCI;
1172 break;
1173 case 2:
1174 test0 = UNI_N_CLOCK_STOPPED_USB1;
1175 test1 = UNI_N_CLOCK_STOPPED_USB1PCI;
1176 break;
1177 case 4:
1178 test0 = UNI_N_CLOCK_STOPPED_USB2;
1179 test1 = UNI_N_CLOCK_STOPPED_USB2PCI;
1180 break;
1181 }
1182 do {
1183 if (--timeout <= 0) {
1184 printk(KERN_ERR "core99_usb_enable: "
1185 "Timeout waiting for clocks\n");
1186 break;
1187 }
1188 mdelay(1);
1189 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0);
1190 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1);
1191 } while ((status0 & test0) | (status1 & test1));
1192 LOCK(flags);
1193 }
1194 } else {
1195 /* Turn OFF */
1196 if (number < 4) {
1197 reg = MACIO_IN32(KEYLARGO_FCR4);
1198 reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1199 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
1200 reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1201 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
1202 MACIO_OUT32(KEYLARGO_FCR4, reg);
1203 (void)MACIO_IN32(KEYLARGO_FCR4);
1204 udelay(1);
1205 } else {
1206 reg = MACIO_IN32(KEYLARGO_FCR3);
1207 reg |= KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1208 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0);
1209 reg |= KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1210 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1);
1211 MACIO_OUT32(KEYLARGO_FCR3, reg);
1212 (void)MACIO_IN32(KEYLARGO_FCR3);
1213 udelay(1);
1214 }
1215 if (number == 0) {
1216 if (macio->type != macio_intrepid)
1217 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1218 (void)MACIO_IN32(KEYLARGO_FCR0);
1219 udelay(1);
1220 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1221 (void)MACIO_IN32(KEYLARGO_FCR0);
1222 } else if (number == 2) {
1223 if (macio->type != macio_intrepid)
1224 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1225 (void)MACIO_IN32(KEYLARGO_FCR0);
1226 udelay(1);
1227 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1228 (void)MACIO_IN32(KEYLARGO_FCR0);
1229 } else if (number == 4) {
1230 udelay(1);
1231 MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1232 (void)MACIO_IN32(KEYLARGO_FCR1);
1233 }
1234 udelay(1);
1235 }
1236 UNLOCK(flags);
1237
1238 return 0;
1239 }
1240
1241 static long
1242 core99_firewire_enable(struct device_node *node, long param, long value)
1243 {
1244 unsigned long flags;
1245 struct macio_chip *macio;
1246
1247 macio = &macio_chips[0];
1248 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1249 macio->type != macio_intrepid)
1250 return -ENODEV;
1251 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1252 return -ENODEV;
1253
1254 LOCK(flags);
1255 if (value) {
1256 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1257 (void)UN_IN(UNI_N_CLOCK_CNTL);
1258 } else {
1259 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1260 (void)UN_IN(UNI_N_CLOCK_CNTL);
1261 }
1262 UNLOCK(flags);
1263 mdelay(1);
1264
1265 return 0;
1266 }
1267
1268 static long
1269 core99_firewire_cable_power(struct device_node *node, long param, long value)
1270 {
1271 unsigned long flags;
1272 struct macio_chip *macio;
1273
1274 /* Trick: we allow NULL node */
1275 if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
1276 return -ENODEV;
1277 macio = &macio_chips[0];
1278 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1279 macio->type != macio_intrepid)
1280 return -ENODEV;
1281 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1282 return -ENODEV;
1283
1284 LOCK(flags);
1285 if (value) {
1286 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
1287 MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
1288 udelay(10);
1289 } else {
1290 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
1291 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
1292 }
1293 UNLOCK(flags);
1294 mdelay(1);
1295
1296 return 0;
1297 }
1298
1299 static long
1300 intrepid_aack_delay_enable(struct device_node *node, long param, long value)
1301 {
1302 unsigned long flags;
1303
1304 if (uninorth_rev < 0xd2)
1305 return -ENODEV;
1306
1307 LOCK(flags);
1308 if (param)
1309 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1310 else
1311 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1312 UNLOCK(flags);
1313
1314 return 0;
1315 }
1316
1317
1318 #endif /* CONFIG_POWER4 */
1319
1320 static long
1321 core99_read_gpio(struct device_node *node, long param, long value)
1322 {
1323 struct macio_chip *macio = &macio_chips[0];
1324
1325 return MACIO_IN8(param);
1326 }
1327
1328
1329 static long
1330 core99_write_gpio(struct device_node *node, long param, long value)
1331 {
1332 struct macio_chip *macio = &macio_chips[0];
1333
1334 MACIO_OUT8(param, (u8)(value & 0xff));
1335 return 0;
1336 }
1337
1338 #ifdef CONFIG_POWER4
1339 static long g5_gmac_enable(struct device_node *node, long param, long value)
1340 {
1341 struct macio_chip *macio = &macio_chips[0];
1342 unsigned long flags;
1343
1344 if (node == NULL)
1345 return -ENODEV;
1346
1347 LOCK(flags);
1348 if (value) {
1349 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1350 mb();
1351 k2_skiplist[0] = NULL;
1352 } else {
1353 k2_skiplist[0] = node;
1354 mb();
1355 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1356 }
1357
1358 UNLOCK(flags);
1359 mdelay(1);
1360
1361 return 0;
1362 }
1363
1364 static long g5_fw_enable(struct device_node *node, long param, long value)
1365 {
1366 struct macio_chip *macio = &macio_chips[0];
1367 unsigned long flags;
1368
1369 if (node == NULL)
1370 return -ENODEV;
1371
1372 LOCK(flags);
1373 if (value) {
1374 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1375 mb();
1376 k2_skiplist[1] = NULL;
1377 } else {
1378 k2_skiplist[1] = node;
1379 mb();
1380 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1381 }
1382
1383 UNLOCK(flags);
1384 mdelay(1);
1385
1386 return 0;
1387 }
1388
1389 static long g5_mpic_enable(struct device_node *node, long param, long value)
1390 {
1391 unsigned long flags;
1392 struct device_node *parent = of_get_parent(node);
1393 int is_u3;
1394
1395 if (parent == NULL)
1396 return 0;
1397 is_u3 = strcmp(parent->name, "u3") == 0 ||
1398 strcmp(parent->name, "u4") == 0;
1399 of_node_put(parent);
1400 if (!is_u3)
1401 return 0;
1402
1403 LOCK(flags);
1404 UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
1405 UNLOCK(flags);
1406
1407 return 0;
1408 }
1409
1410 static long g5_eth_phy_reset(struct device_node *node, long param, long value)
1411 {
1412 struct macio_chip *macio = &macio_chips[0];
1413 struct device_node *phy;
1414 int need_reset;
1415
1416 /*
1417 * We must not reset the combo PHYs, only the BCM5221 found in
1418 * the iMac G5.
1419 */
1420 phy = of_get_next_child(node, NULL);
1421 if (!phy)
1422 return -ENODEV;
1423 need_reset = device_is_compatible(phy, "B5221");
1424 of_node_put(phy);
1425 if (!need_reset)
1426 return 0;
1427
1428 /* PHY reset is GPIO 29, not in device-tree unfortunately */
1429 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29,
1430 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
1431 /* Thankfully, this is now always called at a time when we can
1432 * schedule by sungem.
1433 */
1434 msleep(10);
1435 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0);
1436
1437 return 0;
1438 }
1439
1440 static long g5_i2s_enable(struct device_node *node, long param, long value)
1441 {
1442 /* Very crude implementation for now */
1443 struct macio_chip *macio = &macio_chips[0];
1444 unsigned long flags;
1445 int cell;
1446 u32 fcrs[3][3] = {
1447 { 0,
1448 K2_FCR1_I2S0_CELL_ENABLE |
1449 K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE,
1450 KL3_I2S0_CLK18_ENABLE
1451 },
1452 { KL0_SCC_A_INTF_ENABLE,
1453 K2_FCR1_I2S1_CELL_ENABLE |
1454 K2_FCR1_I2S1_CLK_ENABLE_BIT | K2_FCR1_I2S1_ENABLE,
1455 KL3_I2S1_CLK18_ENABLE
1456 },
1457 { KL0_SCC_B_INTF_ENABLE,
1458 SH_FCR1_I2S2_CELL_ENABLE |
1459 SH_FCR1_I2S2_CLK_ENABLE_BIT | SH_FCR1_I2S2_ENABLE,
1460 SH_FCR3_I2S2_CLK18_ENABLE
1461 },
1462 };
1463
1464 if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1465 return -ENODEV;
1466 if (strncmp(node->name, "i2s-", 4))
1467 return -ENODEV;
1468 cell = node->name[4] - 'a';
1469 switch(cell) {
1470 case 0:
1471 case 1:
1472 break;
1473 case 2:
1474 if (macio->type == macio_shasta)
1475 break;
1476 default:
1477 return -ENODEV;
1478 }
1479
1480 LOCK(flags);
1481 if (value) {
1482 MACIO_BIC(KEYLARGO_FCR0, fcrs[cell][0]);
1483 MACIO_BIS(KEYLARGO_FCR1, fcrs[cell][1]);
1484 MACIO_BIS(KEYLARGO_FCR3, fcrs[cell][2]);
1485 } else {
1486 MACIO_BIC(KEYLARGO_FCR3, fcrs[cell][2]);
1487 MACIO_BIC(KEYLARGO_FCR1, fcrs[cell][1]);
1488 MACIO_BIS(KEYLARGO_FCR0, fcrs[cell][0]);
1489 }
1490 udelay(10);
1491 UNLOCK(flags);
1492
1493 return 0;
1494 }
1495
1496
1497 #ifdef CONFIG_SMP
1498 static long g5_reset_cpu(struct device_node *node, long param, long value)
1499 {
1500 unsigned int reset_io = 0;
1501 unsigned long flags;
1502 struct macio_chip *macio;
1503 struct device_node *np;
1504
1505 macio = &macio_chips[0];
1506 if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1507 return -ENODEV;
1508
1509 np = find_path_device("/cpus");
1510 if (np == NULL)
1511 return -ENODEV;
1512 for (np = np->child; np != NULL; np = np->sibling) {
1513 u32 *num = (u32 *)get_property(np, "reg", NULL);
1514 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL);
1515 if (num == NULL || rst == NULL)
1516 continue;
1517 if (param == *num) {
1518 reset_io = *rst;
1519 break;
1520 }
1521 }
1522 if (np == NULL || reset_io == 0)
1523 return -ENODEV;
1524
1525 LOCK(flags);
1526 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1527 (void)MACIO_IN8(reset_io);
1528 udelay(1);
1529 MACIO_OUT8(reset_io, 0);
1530 (void)MACIO_IN8(reset_io);
1531 UNLOCK(flags);
1532
1533 return 0;
1534 }
1535 #endif /* CONFIG_SMP */
1536
1537 /*
1538 * This can be called from pmac_smp so isn't static
1539 *
1540 * This takes the second CPU off the bus on dual CPU machines
1541 * running UP
1542 */
1543 void g5_phy_disable_cpu1(void)
1544 {
1545 if (uninorth_maj == 3)
1546 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1547 }
1548 #endif /* CONFIG_POWER4 */
1549
1550 #ifndef CONFIG_POWER4
1551
1552
1553 #ifdef CONFIG_PM
1554
1555 static void keylargo_shutdown(struct macio_chip *macio, int sleep_mode)
1556 {
1557 u32 temp;
1558
1559 if (sleep_mode) {
1560 mdelay(1);
1561 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
1562 (void)MACIO_IN32(KEYLARGO_FCR0);
1563 mdelay(1);
1564 }
1565
1566 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1567 KL0_SCC_CELL_ENABLE |
1568 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
1569 KL0_IRDA_CLK19_ENABLE);
1570
1571 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
1572 MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
1573
1574 MACIO_BIC(KEYLARGO_FCR1,
1575 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1576 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1577 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1578 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1579 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1580 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
1581 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
1582 KL1_UIDE_ENABLE);
1583
1584 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1585 MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
1586
1587 temp = MACIO_IN32(KEYLARGO_FCR3);
1588 if (macio->rev >= 2) {
1589 temp |= KL3_SHUTDOWN_PLL2X;
1590 if (sleep_mode)
1591 temp |= KL3_SHUTDOWN_PLL_TOTAL;
1592 }
1593
1594 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1595 KL3_SHUTDOWN_PLLKW35;
1596 if (sleep_mode)
1597 temp |= KL3_SHUTDOWN_PLLKW12;
1598 temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
1599 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1600 if (sleep_mode)
1601 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
1602 MACIO_OUT32(KEYLARGO_FCR3, temp);
1603
1604 /* Flush posted writes & wait a bit */
1605 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1606 }
1607
1608 static void pangea_shutdown(struct macio_chip *macio, int sleep_mode)
1609 {
1610 u32 temp;
1611
1612 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1613 KL0_SCC_CELL_ENABLE |
1614 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
1615
1616 MACIO_BIC(KEYLARGO_FCR1,
1617 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1618 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1619 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1620 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1621 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1622 KL1_UIDE_ENABLE);
1623 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1624 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1625
1626 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1627
1628 temp = MACIO_IN32(KEYLARGO_FCR3);
1629 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1630 KL3_SHUTDOWN_PLLKW35;
1631 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE
1632 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);
1633 if (sleep_mode)
1634 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);
1635 MACIO_OUT32(KEYLARGO_FCR3, temp);
1636
1637 /* Flush posted writes & wait a bit */
1638 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1639 }
1640
1641 static void intrepid_shutdown(struct macio_chip *macio, int sleep_mode)
1642 {
1643 u32 temp;
1644
1645 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1646 KL0_SCC_CELL_ENABLE);
1647
1648 MACIO_BIC(KEYLARGO_FCR1,
1649 /*KL1_USB2_CELL_ENABLE |*/
1650 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1651 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1652 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE);
1653 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1654 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1655
1656 temp = MACIO_IN32(KEYLARGO_FCR3);
1657 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
1658 KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1659 if (sleep_mode)
1660 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);
1661 MACIO_OUT32(KEYLARGO_FCR3, temp);
1662
1663 /* Flush posted writes & wait a bit */
1664 (void)MACIO_IN32(KEYLARGO_FCR0);
1665 mdelay(10);
1666 }
1667
1668
1669 static int
1670 core99_sleep(void)
1671 {
1672 struct macio_chip *macio;
1673 int i;
1674
1675 macio = &macio_chips[0];
1676 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1677 macio->type != macio_intrepid)
1678 return -ENODEV;
1679
1680 /* We power off the wireless slot in case it was not done
1681 * by the driver. We don't power it on automatically however
1682 */
1683 if (macio->flags & MACIO_FLAG_AIRPORT_ON)
1684 core99_airport_enable(macio->of_node, 0, 0);
1685
1686 /* We power off the FW cable. Should be done by the driver... */
1687 if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
1688 core99_firewire_enable(NULL, 0, 0);
1689 core99_firewire_cable_power(NULL, 0, 0);
1690 }
1691
1692 /* We make sure int. modem is off (in case driver lost it) */
1693 if (macio->type == macio_keylargo)
1694 core99_modem_enable(macio->of_node, 0, 0);
1695 else
1696 pangea_modem_enable(macio->of_node, 0, 0);
1697
1698 /* We make sure the sound is off as well */
1699 core99_sound_chip_enable(macio->of_node, 0, 0);
1700
1701 /*
1702 * Save various bits of KeyLargo
1703 */
1704
1705 /* Save the state of the various GPIOs */
1706 save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
1707 save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
1708 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1709 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
1710 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1711 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);
1712
1713 /* Save the FCRs */
1714 if (macio->type == macio_keylargo)
1715 save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
1716 save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
1717 save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
1718 save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
1719 save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
1720 save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);
1721 if (macio->type == macio_pangea || macio->type == macio_intrepid)
1722 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);
1723
1724 /* Save state & config of DBDMA channels */
1725 dbdma_save(macio, save_dbdma);
1726
1727 /*
1728 * Turn off as much as we can
1729 */
1730 if (macio->type == macio_pangea)
1731 pangea_shutdown(macio, 1);
1732 else if (macio->type == macio_intrepid)
1733 intrepid_shutdown(macio, 1);
1734 else if (macio->type == macio_keylargo)
1735 keylargo_shutdown(macio, 1);
1736
1737 /*
1738 * Put the host bridge to sleep
1739 */
1740
1741 save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
1742 /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it
1743 * enabled !
1744 */
1745 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
1746 ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
1747 udelay(100);
1748 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1749 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);
1750 mdelay(10);
1751
1752 /*
1753 * FIXME: A bit of black magic with OpenPIC (don't ask me why)
1754 */
1755 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1756 MACIO_BIS(0x506e0, 0x00400000);
1757 MACIO_BIS(0x506e0, 0x80000000);
1758 }
1759 return 0;
1760 }
1761
1762 static int
1763 core99_wake_up(void)
1764 {
1765 struct macio_chip *macio;
1766 int i;
1767
1768 macio = &macio_chips[0];
1769 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1770 macio->type != macio_intrepid)
1771 return -ENODEV;
1772
1773 /*
1774 * Wakeup the host bridge
1775 */
1776 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1777 udelay(10);
1778 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1779 udelay(10);
1780
1781 /*
1782 * Restore KeyLargo
1783 */
1784
1785 if (macio->type == macio_keylargo) {
1786 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
1787 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
1788 }
1789 MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
1790 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
1791 MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
1792 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
1793 MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
1794 (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
1795 MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
1796 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
1797 MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
1798 (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);
1799 if (macio->type == macio_pangea || macio->type == macio_intrepid) {
1800 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);
1801 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);
1802 }
1803
1804 dbdma_restore(macio, save_dbdma);
1805
1806 MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
1807 MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
1808 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1809 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
1810 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1811 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);
1812
1813 /* FIXME more black magic with OpenPIC ... */
1814 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1815 MACIO_BIC(0x506e0, 0x00400000);
1816 MACIO_BIC(0x506e0, 0x80000000);
1817 }
1818
1819 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
1820 udelay(100);
1821
1822 return 0;
1823 }
1824
1825 #endif /* CONFIG_PM */
1826
1827 static long
1828 core99_sleep_state(struct device_node *node, long param, long value)
1829 {
1830 /* Param == 1 means to enter the "fake sleep" mode that is
1831 * used for CPU speed switch
1832 */
1833 if (param == 1) {
1834 if (value == 1) {
1835 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1836 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);
1837 } else {
1838 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1839 udelay(10);
1840 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1841 udelay(10);
1842 }
1843 return 0;
1844 }
1845 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
1846 return -EPERM;
1847
1848 #ifdef CONFIG_PM
1849 if (value == 1)
1850 return core99_sleep();
1851 else if (value == 0)
1852 return core99_wake_up();
1853
1854 #endif /* CONFIG_PM */
1855 return 0;
1856 }
1857
1858 #endif /* CONFIG_POWER4 */
1859
1860 static long
1861 generic_dev_can_wake(struct device_node *node, long param, long value)
1862 {
1863 /* Todo: eventually check we are really dealing with on-board
1864 * video device ...
1865 */
1866
1867 if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP)
1868 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP;
1869 return 0;
1870 }
1871
1872 static long generic_get_mb_info(struct device_node *node, long param, long value)
1873 {
1874 switch(param) {
1875 case PMAC_MB_INFO_MODEL:
1876 return pmac_mb.model_id;
1877 case PMAC_MB_INFO_FLAGS:
1878 return pmac_mb.board_flags;
1879 case PMAC_MB_INFO_NAME:
1880 /* hack hack hack... but should work */
1881 *((const char **)value) = pmac_mb.model_name;
1882 return 0;
1883 }
1884 return -EINVAL;
1885 }
1886
1887
1888 /*
1889 * Table definitions
1890 */
1891
1892 /* Used on any machine
1893 */
1894 static struct feature_table_entry any_features[] = {
1895 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
1896 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake },
1897 { 0, NULL }
1898 };
1899
1900 #ifndef CONFIG_POWER4
1901
1902 /* OHare based motherboards. Currently, we only use these on the
1903 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1904 * to have issues with turning on/off those asic cells
1905 */
1906 static struct feature_table_entry ohare_features[] = {
1907 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1908 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable },
1909 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable },
1910 { PMAC_FTR_IDE_ENABLE, ohare_ide_enable},
1911 { PMAC_FTR_IDE_RESET, ohare_ide_reset},
1912 { PMAC_FTR_SLEEP_STATE, ohare_sleep_state },
1913 { 0, NULL }
1914 };
1915
1916 /* Heathrow desktop machines (Beige G3).
1917 * Separated as some features couldn't be properly tested
1918 * and the serial port control bits appear to confuse it.
1919 */
1920 static struct feature_table_entry heathrow_desktop_features[] = {
1921 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1922 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1923 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1924 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1925 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1926 { 0, NULL }
1927 };
1928
1929 /* Heathrow based laptop, that is the Wallstreet and mainstreet
1930 * powerbooks.
1931 */
1932 static struct feature_table_entry heathrow_laptop_features[] = {
1933 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1934 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1935 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1936 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1937 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1938 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1939 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1940 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1941 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1942 { 0, NULL }
1943 };
1944
1945 /* Paddington based machines
1946 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1947 */
1948 static struct feature_table_entry paddington_features[] = {
1949 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1950 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1951 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1952 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1953 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1954 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1955 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1956 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1957 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1958 { 0, NULL }
1959 };
1960
1961 /* Core99 & MacRISC 2 machines (all machines released since the
1962 * iBook (included), that is all AGP machines, except pangea
1963 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1964 * used on iBook2 & iMac "flow power".
1965 */
1966 static struct feature_table_entry core99_features[] = {
1967 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1968 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable },
1969 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1970 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1971 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1972 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1973 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
1974 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
1975 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1976 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1977 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1978 #ifdef CONFIG_PM
1979 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1980 #endif
1981 #ifdef CONFIG_SMP
1982 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
1983 #endif /* CONFIG_SMP */
1984 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1985 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1986 { 0, NULL }
1987 };
1988
1989 /* RackMac
1990 */
1991 static struct feature_table_entry rackmac_features[] = {
1992 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1993 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1994 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1995 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1996 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1997 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1998 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1999 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2000 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2001 #ifdef CONFIG_SMP
2002 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
2003 #endif /* CONFIG_SMP */
2004 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2005 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2006 { 0, NULL }
2007 };
2008
2009 /* Pangea features
2010 */
2011 static struct feature_table_entry pangea_features[] = {
2012 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2013 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2014 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2015 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2016 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2017 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2018 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
2019 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
2020 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2021 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2022 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2023 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2024 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2025 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2026 { 0, NULL }
2027 };
2028
2029 /* Intrepid features
2030 */
2031 static struct feature_table_entry intrepid_features[] = {
2032 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2033 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2034 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2035 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2036 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2037 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2038 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
2039 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
2040 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2041 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2042 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2043 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2044 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2045 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2046 { PMAC_FTR_AACK_DELAY_ENABLE, intrepid_aack_delay_enable },
2047 { 0, NULL }
2048 };
2049
2050 #else /* CONFIG_POWER4 */
2051
2052 /* G5 features
2053 */
2054 static struct feature_table_entry g5_features[] = {
2055 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
2056 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
2057 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
2058 { PMAC_FTR_GMAC_PHY_RESET, g5_eth_phy_reset },
2059 { PMAC_FTR_SOUND_CHIP_ENABLE, g5_i2s_enable },
2060 #ifdef CONFIG_SMP
2061 { PMAC_FTR_RESET_CPU, g5_reset_cpu },
2062 #endif /* CONFIG_SMP */
2063 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2064 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2065 { 0, NULL }
2066 };
2067
2068 #endif /* CONFIG_POWER4 */
2069
2070 static struct pmac_mb_def pmac_mb_defs[] = {
2071 #ifndef CONFIG_POWER4
2072 /*
2073 * Desktops
2074 */
2075
2076 { "AAPL,8500", "PowerMac 8500/8600",
2077 PMAC_TYPE_PSURGE, NULL,
2078 0
2079 },
2080 { "AAPL,9500", "PowerMac 9500/9600",
2081 PMAC_TYPE_PSURGE, NULL,
2082 0
2083 },
2084 { "AAPL,7200", "PowerMac 7200",
2085 PMAC_TYPE_PSURGE, NULL,
2086 0
2087 },
2088 { "AAPL,7300", "PowerMac 7200/7300",
2089 PMAC_TYPE_PSURGE, NULL,
2090 0
2091 },
2092 { "AAPL,7500", "PowerMac 7500",
2093 PMAC_TYPE_PSURGE, NULL,
2094 0
2095 },
2096 { "AAPL,ShinerESB", "Apple Network Server",
2097 PMAC_TYPE_ANS, NULL,
2098 0
2099 },
2100 { "AAPL,e407", "Alchemy",
2101 PMAC_TYPE_ALCHEMY, NULL,
2102 0
2103 },
2104 { "AAPL,e411", "Gazelle",
2105 PMAC_TYPE_GAZELLE, NULL,
2106 0
2107 },
2108 { "AAPL,Gossamer", "PowerMac G3 (Gossamer)",
2109 PMAC_TYPE_GOSSAMER, heathrow_desktop_features,
2110 0
2111 },
2112 { "AAPL,PowerMac G3", "PowerMac G3 (Silk)",
2113 PMAC_TYPE_SILK, heathrow_desktop_features,
2114 0
2115 },
2116 { "PowerMac1,1", "Blue&White G3",
2117 PMAC_TYPE_YOSEMITE, paddington_features,
2118 0
2119 },
2120 { "PowerMac1,2", "PowerMac G4 PCI Graphics",
2121 PMAC_TYPE_YIKES, paddington_features,
2122 0
2123 },
2124 { "PowerMac2,1", "iMac FireWire",
2125 PMAC_TYPE_FW_IMAC, core99_features,
2126 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2127 },
2128 { "PowerMac2,2", "iMac FireWire",
2129 PMAC_TYPE_FW_IMAC, core99_features,
2130 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2131 },
2132 { "PowerMac3,1", "PowerMac G4 AGP Graphics",
2133 PMAC_TYPE_SAWTOOTH, core99_features,
2134 PMAC_MB_OLD_CORE99
2135 },
2136 { "PowerMac3,2", "PowerMac G4 AGP Graphics",
2137 PMAC_TYPE_SAWTOOTH, core99_features,
2138 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2139 },
2140 { "PowerMac3,3", "PowerMac G4 AGP Graphics",
2141 PMAC_TYPE_SAWTOOTH, core99_features,
2142 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2143 },
2144 { "PowerMac3,4", "PowerMac G4 Silver",
2145 PMAC_TYPE_QUICKSILVER, core99_features,
2146 PMAC_MB_MAY_SLEEP
2147 },
2148 { "PowerMac3,5", "PowerMac G4 Silver",
2149 PMAC_TYPE_QUICKSILVER, core99_features,
2150 PMAC_MB_MAY_SLEEP
2151 },
2152 { "PowerMac3,6", "PowerMac G4 Windtunnel",
2153 PMAC_TYPE_WINDTUNNEL, core99_features,
2154 PMAC_MB_MAY_SLEEP,
2155 },
2156 { "PowerMac4,1", "iMac \"Flower Power\"",
2157 PMAC_TYPE_PANGEA_IMAC, pangea_features,
2158 PMAC_MB_MAY_SLEEP
2159 },
2160 { "PowerMac4,2", "Flat panel iMac",
2161 PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features,
2162 PMAC_MB_CAN_SLEEP
2163 },
2164 { "PowerMac4,4", "eMac",
2165 PMAC_TYPE_EMAC, core99_features,
2166 PMAC_MB_MAY_SLEEP
2167 },
2168 { "PowerMac5,1", "PowerMac G4 Cube",
2169 PMAC_TYPE_CUBE, core99_features,
2170 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2171 },
2172 { "PowerMac6,1", "Flat panel iMac",
2173 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2174 PMAC_MB_MAY_SLEEP,
2175 },
2176 { "PowerMac6,3", "Flat panel iMac",
2177 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2178 PMAC_MB_MAY_SLEEP,
2179 },
2180 { "PowerMac6,4", "eMac",
2181 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2182 PMAC_MB_MAY_SLEEP,
2183 },
2184 { "PowerMac10,1", "Mac mini",
2185 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2186 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER,
2187 },
2188 { "iMac,1", "iMac (first generation)",
2189 PMAC_TYPE_ORIG_IMAC, paddington_features,
2190 0
2191 },
2192
2193 /*
2194 * Xserve's
2195 */
2196
2197 { "RackMac1,1", "XServe",
2198 PMAC_TYPE_RACKMAC, rackmac_features,
2199 0,
2200 },
2201 { "RackMac1,2", "XServe rev. 2",
2202 PMAC_TYPE_RACKMAC, rackmac_features,
2203 0,
2204 },
2205
2206 /*
2207 * Laptops
2208 */
2209
2210 { "AAPL,3400/2400", "PowerBook 3400",
2211 PMAC_TYPE_HOOPER, ohare_features,
2212 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2213 },
2214 { "AAPL,3500", "PowerBook 3500",
2215 PMAC_TYPE_KANGA, ohare_features,
2216 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2217 },
2218 { "AAPL,PowerBook1998", "PowerBook Wallstreet",
2219 PMAC_TYPE_WALLSTREET, heathrow_laptop_features,
2220 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2221 },
2222 { "PowerBook1,1", "PowerBook 101 (Lombard)",
2223 PMAC_TYPE_101_PBOOK, paddington_features,
2224 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2225 },
2226 { "PowerBook2,1", "iBook (first generation)",
2227 PMAC_TYPE_ORIG_IBOOK, core99_features,
2228 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2229 },
2230 { "PowerBook2,2", "iBook FireWire",
2231 PMAC_TYPE_FW_IBOOK, core99_features,
2232 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2233 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2234 },
2235 { "PowerBook3,1", "PowerBook Pismo",
2236 PMAC_TYPE_PISMO, core99_features,
2237 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2238 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2239 },
2240 { "PowerBook3,2", "PowerBook Titanium",
2241 PMAC_TYPE_TITANIUM, core99_features,
2242 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2243 },
2244 { "PowerBook3,3", "PowerBook Titanium II",
2245 PMAC_TYPE_TITANIUM2, core99_features,
2246 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2247 },
2248 { "PowerBook3,4", "PowerBook Titanium III",
2249 PMAC_TYPE_TITANIUM3, core99_features,
2250 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2251 },
2252 { "PowerBook3,5", "PowerBook Titanium IV",
2253 PMAC_TYPE_TITANIUM4, core99_features,
2254 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2255 },
2256 { "PowerBook4,1", "iBook 2",
2257 PMAC_TYPE_IBOOK2, pangea_features,
2258 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2259 },
2260 { "PowerBook4,2", "iBook 2",
2261 PMAC_TYPE_IBOOK2, pangea_features,
2262 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2263 },
2264 { "PowerBook4,3", "iBook 2 rev. 2",
2265 PMAC_TYPE_IBOOK2, pangea_features,
2266 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2267 },
2268 { "PowerBook5,1", "PowerBook G4 17\"",
2269 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2270 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2271 },
2272 { "PowerBook5,2", "PowerBook G4 15\"",
2273 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2274 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2275 },
2276 { "PowerBook5,3", "PowerBook G4 17\"",
2277 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2278 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2279 },
2280 { "PowerBook5,4", "PowerBook G4 15\"",
2281 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2282 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2283 },
2284 { "PowerBook5,5", "PowerBook G4 17\"",
2285 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2286 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2287 },
2288 { "PowerBook5,6", "PowerBook G4 15\"",
2289 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2290 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2291 },
2292 { "PowerBook5,7", "PowerBook G4 17\"",
2293 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2294 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2295 },
2296 { "PowerBook5,8", "PowerBook G4 15\"",
2297 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2298 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2299 },
2300 { "PowerBook5,9", "PowerBook G4 17\"",
2301 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2302 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2303 },
2304 { "PowerBook6,1", "PowerBook G4 12\"",
2305 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2306 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2307 },
2308 { "PowerBook6,2", "PowerBook G4",
2309 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2310 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2311 },
2312 { "PowerBook6,3", "iBook G4",
2313 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2314 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2315 },
2316 { "PowerBook6,4", "PowerBook G4 12\"",
2317 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2318 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2319 },
2320 { "PowerBook6,5", "iBook G4",
2321 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2322 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2323 },
2324 { "PowerBook6,7", "iBook G4",
2325 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2326 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2327 },
2328 { "PowerBook6,8", "PowerBook G4 12\"",
2329 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2330 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2331 },
2332 #else /* CONFIG_POWER4 */
2333 { "PowerMac7,2", "PowerMac G5",
2334 PMAC_TYPE_POWERMAC_G5, g5_features,
2335 0,
2336 },
2337 #ifdef CONFIG_PPC64
2338 { "PowerMac7,3", "PowerMac G5",
2339 PMAC_TYPE_POWERMAC_G5, g5_features,
2340 0,
2341 },
2342 { "PowerMac8,1", "iMac G5",
2343 PMAC_TYPE_IMAC_G5, g5_features,
2344 0,
2345 },
2346 { "PowerMac9,1", "PowerMac G5",
2347 PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
2348 0,
2349 },
2350 { "PowerMac11,2", "PowerMac G5 Dual Core",
2351 PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
2352 0,
2353 },
2354 { "PowerMac12,1", "iMac G5 (iSight)",
2355 PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
2356 0,
2357 },
2358 { "RackMac3,1", "XServe G5",
2359 PMAC_TYPE_XSERVE_G5, g5_features,
2360 0,
2361 },
2362 #endif /* CONFIG_PPC64 */
2363 #endif /* CONFIG_POWER4 */
2364 };
2365
2366 /*
2367 * The toplevel feature_call callback
2368 */
2369 long pmac_do_feature_call(unsigned int selector, ...)
2370 {
2371 struct device_node *node;
2372 long param, value;
2373 int i;
2374 feature_call func = NULL;
2375 va_list args;
2376
2377 if (pmac_mb.features)
2378 for (i=0; pmac_mb.features[i].function; i++)
2379 if (pmac_mb.features[i].selector == selector) {
2380 func = pmac_mb.features[i].function;
2381 break;
2382 }
2383 if (!func)
2384 for (i=0; any_features[i].function; i++)
2385 if (any_features[i].selector == selector) {
2386 func = any_features[i].function;
2387 break;
2388 }
2389 if (!func)
2390 return -ENODEV;
2391
2392 va_start(args, selector);
2393 node = (struct device_node*)va_arg(args, void*);
2394 param = va_arg(args, long);
2395 value = va_arg(args, long);
2396 va_end(args);
2397
2398 return func(node, param, value);
2399 }
2400
2401 static int __init probe_motherboard(void)
2402 {
2403 int i;
2404 struct macio_chip *macio = &macio_chips[0];
2405 const char *model = NULL;
2406 struct device_node *dt;
2407
2408 /* Lookup known motherboard type in device-tree. First try an
2409 * exact match on the "model" property, then try a "compatible"
2410 * match is none is found.
2411 */
2412 dt = find_devices("device-tree");
2413 if (dt != NULL)
2414 model = (const char *) get_property(dt, "model", NULL);
2415 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2416 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
2417 pmac_mb = pmac_mb_defs[i];
2418 goto found;
2419 }
2420 }
2421 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2422 if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
2423 pmac_mb = pmac_mb_defs[i];
2424 goto found;
2425 }
2426 }
2427
2428 /* Fallback to selection depending on mac-io chip type */
2429 switch(macio->type) {
2430 #ifndef CONFIG_POWER4
2431 case macio_grand_central:
2432 pmac_mb.model_id = PMAC_TYPE_PSURGE;
2433 pmac_mb.model_name = "Unknown PowerSurge";
2434 break;
2435 case macio_ohare:
2436 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
2437 pmac_mb.model_name = "Unknown OHare-based";
2438 break;
2439 case macio_heathrow:
2440 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
2441 pmac_mb.model_name = "Unknown Heathrow-based";
2442 pmac_mb.features = heathrow_desktop_features;
2443 break;
2444 case macio_paddington:
2445 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
2446 pmac_mb.model_name = "Unknown Paddington-based";
2447 pmac_mb.features = paddington_features;
2448 break;
2449 case macio_keylargo:
2450 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
2451 pmac_mb.model_name = "Unknown Keylargo-based";
2452 pmac_mb.features = core99_features;
2453 break;
2454 case macio_pangea:
2455 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
2456 pmac_mb.model_name = "Unknown Pangea-based";
2457 pmac_mb.features = pangea_features;
2458 break;
2459 case macio_intrepid:
2460 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID;
2461 pmac_mb.model_name = "Unknown Intrepid-based";
2462 pmac_mb.features = intrepid_features;
2463 break;
2464 #else /* CONFIG_POWER4 */
2465 case macio_keylargo2:
2466 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
2467 pmac_mb.model_name = "Unknown K2-based";
2468 pmac_mb.features = g5_features;
2469 break;
2470 case macio_shasta:
2471 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_SHASTA;
2472 pmac_mb.model_name = "Unknown Shasta-based";
2473 pmac_mb.features = g5_features;
2474 break;
2475 #endif /* CONFIG_POWER4 */
2476 default:
2477 return -ENODEV;
2478 }
2479 found:
2480 #ifndef CONFIG_POWER4
2481 /* Fixup Hooper vs. Comet */
2482 if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
2483 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4);
2484 if (!mach_id_ptr)
2485 return -ENODEV;
2486 /* Here, I used to disable the media-bay on comet. It
2487 * appears this is wrong, the floppy connector is actually
2488 * a kind of media-bay and works with the current driver.
2489 */
2490 if (__raw_readl(mach_id_ptr) & 0x20000000UL)
2491 pmac_mb.model_id = PMAC_TYPE_COMET;
2492 iounmap(mach_id_ptr);
2493 }
2494 #endif /* CONFIG_POWER4 */
2495
2496 #ifdef CONFIG_6xx
2497 /* Set default value of powersave_nap on machines that support it.
2498 * It appears that uninorth rev 3 has a problem with it, we don't
2499 * enable it on those. In theory, the flush-on-lock property is
2500 * supposed to be set when not supported, but I'm not very confident
2501 * that all Apple OF revs did it properly, I do it the paranoid way.
2502 */
2503 while (uninorth_base && uninorth_rev > 3) {
2504 struct device_node *np = find_path_device("/cpus");
2505 if (!np || !np->child) {
2506 printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
2507 break;
2508 }
2509 np = np->child;
2510 /* Nap mode not supported on SMP */
2511 if (np->sibling)
2512 break;
2513 /* Nap mode not supported if flush-on-lock property is present */
2514 if (get_property(np, "flush-on-lock", NULL))
2515 break;
2516 powersave_nap = 1;
2517 printk(KERN_INFO "Processor NAP mode on idle enabled.\n");
2518 break;
2519 }
2520
2521 /* On CPUs that support it (750FX), lowspeed by default during
2522 * NAP mode
2523 */
2524 powersave_lowspeed = 1;
2525 #endif /* CONFIG_6xx */
2526 #ifdef CONFIG_POWER4
2527 powersave_nap = 1;
2528 #endif
2529 /* Check for "mobile" machine */
2530 if (model && (strncmp(model, "PowerBook", 9) == 0
2531 || strncmp(model, "iBook", 5) == 0))
2532 pmac_mb.board_flags |= PMAC_MB_MOBILE;
2533
2534
2535 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
2536 return 0;
2537 }
2538
2539 /* Initialize the Core99 UniNorth host bridge and memory controller
2540 */
2541 static void __init probe_uninorth(void)
2542 {
2543 u32 *addrp;
2544 phys_addr_t address;
2545 unsigned long actrl;
2546
2547 /* Locate core99 Uni-N */
2548 uninorth_node = of_find_node_by_name(NULL, "uni-n");
2549 /* Locate G5 u3 */
2550 if (uninorth_node == NULL) {
2551 uninorth_node = of_find_node_by_name(NULL, "u3");
2552 uninorth_maj = 3;
2553 }
2554 /* Locate G5 u4 */
2555 if (uninorth_node == NULL) {
2556 uninorth_node = of_find_node_by_name(NULL, "u4");
2557 uninorth_maj = 4;
2558 }
2559 if (uninorth_node == NULL)
2560 return;
2561
2562 addrp = (u32 *)get_property(uninorth_node, "reg", NULL);
2563 if (addrp == NULL)
2564 return;
2565 address = of_translate_address(uninorth_node, addrp);
2566 if (address == 0)
2567 return;
2568 uninorth_base = ioremap(address, 0x40000);
2569 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
2570 if (uninorth_maj == 3 || uninorth_maj == 4)
2571 u3_ht_base = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
2572
2573 printk(KERN_INFO "Found %s memory controller & host bridge"
2574 " @ 0x%08x revision: 0x%02x\n", uninorth_maj == 3 ? "U3" :
2575 uninorth_maj == 4 ? "U4" : "UniNorth",
2576 (unsigned int)address, uninorth_rev);
2577 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
2578
2579 /* Set the arbitrer QAck delay according to what Apple does
2580 */
2581 if (uninorth_rev < 0x11) {
2582 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
2583 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
2584 UNI_N_ARB_CTRL_QACK_DELAY) <<
2585 UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
2586 UN_OUT(UNI_N_ARB_CTRL, actrl);
2587 }
2588
2589 /* Some more magic as done by them in recent MacOS X on UniNorth
2590 * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI
2591 * memory timeout
2592 */
2593 if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) ||
2594 uninorth_rev == 0xc0)
2595 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff);
2596 }
2597
2598 static void __init probe_one_macio(const char *name, const char *compat, int type)
2599 {
2600 struct device_node* node;
2601 int i;
2602 volatile u32 __iomem *base;
2603 u32 *addrp, *revp;
2604 phys_addr_t addr;
2605 u64 size;
2606
2607 for (node = NULL; (node = of_find_node_by_name(node, name)) != NULL;) {
2608 if (!compat)
2609 break;
2610 if (device_is_compatible(node, compat))
2611 break;
2612 }
2613 if (!node)
2614 return;
2615 for(i=0; i<MAX_MACIO_CHIPS; i++) {
2616 if (!macio_chips[i].of_node)
2617 break;
2618 if (macio_chips[i].of_node == node)
2619 return;
2620 }
2621
2622 if (i >= MAX_MACIO_CHIPS) {
2623 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
2624 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
2625 return;
2626 }
2627 addrp = of_get_pci_address(node, 0, &size, NULL);
2628 if (addrp == NULL) {
2629 printk(KERN_ERR "pmac_feature: %s: can't find base !\n",
2630 node->full_name);
2631 return;
2632 }
2633 addr = of_translate_address(node, addrp);
2634 if (addr == 0) {
2635 printk(KERN_ERR "pmac_feature: %s, can't translate base !\n",
2636 node->full_name);
2637 return;
2638 }
2639 base = ioremap(addr, (unsigned long)size);
2640 if (!base) {
2641 printk(KERN_ERR "pmac_feature: %s, can't map mac-io chip !\n",
2642 node->full_name);
2643 return;
2644 }
2645 if (type == macio_keylargo || type == macio_keylargo2) {
2646 u32 *did = (u32 *)get_property(node, "device-id", NULL);
2647 if (*did == 0x00000025)
2648 type = macio_pangea;
2649 if (*did == 0x0000003e)
2650 type = macio_intrepid;
2651 if (*did == 0x0000004f)
2652 type = macio_shasta;
2653 }
2654 macio_chips[i].of_node = node;
2655 macio_chips[i].type = type;
2656 macio_chips[i].base = base;
2657 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
2658 macio_chips[i].name = macio_names[type];
2659 revp = (u32 *)get_property(node, "revision-id", NULL);
2660 if (revp)
2661 macio_chips[i].rev = *revp;
2662 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
2663 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
2664 }
2665
2666 static int __init
2667 probe_macios(void)
2668 {
2669 /* Warning, ordering is important */
2670 probe_one_macio("gc", NULL, macio_grand_central);
2671 probe_one_macio("ohare", NULL, macio_ohare);
2672 probe_one_macio("pci106b,7", NULL, macio_ohareII);
2673 probe_one_macio("mac-io", "keylargo", macio_keylargo);
2674 probe_one_macio("mac-io", "paddington", macio_paddington);
2675 probe_one_macio("mac-io", "gatwick", macio_gatwick);
2676 probe_one_macio("mac-io", "heathrow", macio_heathrow);
2677 probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
2678
2679 /* Make sure the "main" macio chip appear first */
2680 if (macio_chips[0].type == macio_gatwick
2681 && macio_chips[1].type == macio_heathrow) {
2682 struct macio_chip temp = macio_chips[0];
2683 macio_chips[0] = macio_chips[1];
2684 macio_chips[1] = temp;
2685 }
2686 if (macio_chips[0].type == macio_ohareII
2687 && macio_chips[1].type == macio_ohare) {
2688 struct macio_chip temp = macio_chips[0];
2689 macio_chips[0] = macio_chips[1];
2690 macio_chips[1] = temp;
2691 }
2692 macio_chips[0].lbus.index = 0;
2693 macio_chips[1].lbus.index = 1;
2694
2695 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
2696 }
2697
2698 static void __init
2699 initial_serial_shutdown(struct device_node *np)
2700 {
2701 int len;
2702 struct slot_names_prop {
2703 int count;
2704 char name[1];
2705 } *slots;
2706 char *conn;
2707 int port_type = PMAC_SCC_ASYNC;
2708 int modem = 0;
2709
2710 slots = (struct slot_names_prop *)get_property(np, "slot-names", &len);
2711 conn = get_property(np, "AAPL,connector", &len);
2712 if (conn && (strcmp(conn, "infrared") == 0))
2713 port_type = PMAC_SCC_IRDA;
2714 else if (device_is_compatible(np, "cobalt"))
2715 modem = 1;
2716 else if (slots && slots->count > 0) {
2717 if (strcmp(slots->name, "IrDA") == 0)
2718 port_type = PMAC_SCC_IRDA;
2719 else if (strcmp(slots->name, "Modem") == 0)
2720 modem = 1;
2721 }
2722 if (modem)
2723 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
2724 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
2725 }
2726
2727 static void __init
2728 set_initial_features(void)
2729 {
2730 struct device_node *np;
2731
2732 /* That hack appears to be necessary for some StarMax motherboards
2733 * but I'm not too sure it was audited for side-effects on other
2734 * ohare based machines...
2735 * Since I still have difficulties figuring the right way to
2736 * differenciate them all and since that hack was there for a long
2737 * time, I'll keep it around
2738 */
2739 if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) {
2740 struct macio_chip *macio = &macio_chips[0];
2741 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
2742 } else if (macio_chips[0].type == macio_ohare) {
2743 struct macio_chip *macio = &macio_chips[0];
2744 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2745 } else if (macio_chips[1].type == macio_ohare) {
2746 struct macio_chip *macio = &macio_chips[1];
2747 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2748 }
2749
2750 #ifdef CONFIG_POWER4
2751 if (macio_chips[0].type == macio_keylargo2 ||
2752 macio_chips[0].type == macio_shasta) {
2753 #ifndef CONFIG_SMP
2754 /* On SMP machines running UP, we have the second CPU eating
2755 * bus cycles. We need to take it off the bus. This is done
2756 * from pmac_smp for SMP kernels running on one CPU
2757 */
2758 np = of_find_node_by_type(NULL, "cpu");
2759 if (np != NULL)
2760 np = of_find_node_by_type(np, "cpu");
2761 if (np != NULL) {
2762 g5_phy_disable_cpu1();
2763 of_node_put(np);
2764 }
2765 #endif /* CONFIG_SMP */
2766 /* Enable GMAC for now for PCI probing. It will be disabled
2767 * later on after PCI probe
2768 */
2769 np = of_find_node_by_name(NULL, "ethernet");
2770 while(np) {
2771 if (device_is_compatible(np, "K2-GMAC"))
2772 g5_gmac_enable(np, 0, 1);
2773 np = of_find_node_by_name(np, "ethernet");
2774 }
2775
2776 /* Enable FW before PCI probe. Will be disabled later on
2777 * Note: We should have a batter way to check that we are
2778 * dealing with uninorth internal cell and not a PCI cell
2779 * on the external PCI. The code below works though.
2780 */
2781 np = of_find_node_by_name(NULL, "firewire");
2782 while(np) {
2783 if (device_is_compatible(np, "pci106b,5811")) {
2784 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2785 g5_fw_enable(np, 0, 1);
2786 }
2787 np = of_find_node_by_name(np, "firewire");
2788 }
2789 }
2790 #else /* CONFIG_POWER4 */
2791
2792 if (macio_chips[0].type == macio_keylargo ||
2793 macio_chips[0].type == macio_pangea ||
2794 macio_chips[0].type == macio_intrepid) {
2795 /* Enable GMAC for now for PCI probing. It will be disabled
2796 * later on after PCI probe
2797 */
2798 np = of_find_node_by_name(NULL, "ethernet");
2799 while(np) {
2800 if (np->parent
2801 && device_is_compatible(np->parent, "uni-north")
2802 && device_is_compatible(np, "gmac"))
2803 core99_gmac_enable(np, 0, 1);
2804 np = of_find_node_by_name(np, "ethernet");
2805 }
2806
2807 /* Enable FW before PCI probe. Will be disabled later on
2808 * Note: We should have a batter way to check that we are
2809 * dealing with uninorth internal cell and not a PCI cell
2810 * on the external PCI. The code below works though.
2811 */
2812 np = of_find_node_by_name(NULL, "firewire");
2813 while(np) {
2814 if (np->parent
2815 && device_is_compatible(np->parent, "uni-north")
2816 && (device_is_compatible(np, "pci106b,18") ||
2817 device_is_compatible(np, "pci106b,30") ||
2818 device_is_compatible(np, "pci11c1,5811"))) {
2819 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2820 core99_firewire_enable(np, 0, 1);
2821 }
2822 np = of_find_node_by_name(np, "firewire");
2823 }
2824
2825 /* Enable ATA-100 before PCI probe. */
2826 np = of_find_node_by_name(NULL, "ata-6");
2827 while(np) {
2828 if (np->parent
2829 && device_is_compatible(np->parent, "uni-north")
2830 && device_is_compatible(np, "kauai-ata")) {
2831 core99_ata100_enable(np, 1);
2832 }
2833 np = of_find_node_by_name(np, "ata-6");
2834 }
2835
2836 /* Switch airport off */
2837 np = find_devices("radio");
2838 while(np) {
2839 if (np && np->parent == macio_chips[0].of_node) {
2840 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
2841 core99_airport_enable(np, 0, 0);
2842 }
2843 np = np->next;
2844 }
2845 }
2846
2847 /* On all machines that support sound PM, switch sound off */
2848 if (macio_chips[0].of_node)
2849 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
2850 macio_chips[0].of_node, 0, 0);
2851
2852 /* While on some desktop G3s, we turn it back on */
2853 if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow
2854 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER ||
2855 pmac_mb.model_id == PMAC_TYPE_SILK)) {
2856 struct macio_chip *macio = &macio_chips[0];
2857 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
2858 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
2859 }
2860
2861 #endif /* CONFIG_POWER4 */
2862
2863 /* On all machines, switch modem & serial ports off */
2864 np = find_devices("ch-a");
2865 while(np) {
2866 initial_serial_shutdown(np);
2867 np = np->next;
2868 }
2869 np = find_devices("ch-b");
2870 while(np) {
2871 initial_serial_shutdown(np);
2872 np = np->next;
2873 }
2874 }
2875
2876 void __init
2877 pmac_feature_init(void)
2878 {
2879 /* Detect the UniNorth memory controller */
2880 probe_uninorth();
2881
2882 /* Probe mac-io controllers */
2883 if (probe_macios()) {
2884 printk(KERN_WARNING "No mac-io chip found\n");
2885 return;
2886 }
2887
2888 /* Probe machine type */
2889 if (probe_motherboard())
2890 printk(KERN_WARNING "Unknown PowerMac !\n");
2891
2892 /* Set some initial features (turn off some chips that will
2893 * be later turned on)
2894 */
2895 set_initial_features();
2896 }
2897
2898 #if 0
2899 static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
2900 {
2901 int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
2902 int bits[8] = { 8,16,0,32,2,4,0,0 };
2903 int freq = (frq >> 8) & 0xf;
2904
2905 if (freqs[freq] == 0)
2906 printk("%s: Unknown HT link frequency %x\n", name, freq);
2907 else
2908 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
2909 name, freqs[freq],
2910 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
2911 }
2912
2913 void __init pmac_check_ht_link(void)
2914 {
2915 u32 ufreq, freq, ucfg, cfg;
2916 struct device_node *pcix_node;
2917 u8 px_bus, px_devfn;
2918 struct pci_controller *px_hose;
2919
2920 (void)in_be32(u3_ht_base + U3_HT_LINK_COMMAND);
2921 ucfg = cfg = in_be32(u3_ht_base + U3_HT_LINK_CONFIG);
2922 ufreq = freq = in_be32(u3_ht_base + U3_HT_LINK_FREQ);
2923 dump_HT_speeds("U3 HyperTransport", cfg, freq);
2924
2925 pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
2926 if (pcix_node == NULL) {
2927 printk("No PCI-X bridge found\n");
2928 return;
2929 }
2930 if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) {
2931 printk("PCI-X bridge found but not matched to pci\n");
2932 return;
2933 }
2934 px_hose = pci_find_hose_for_OF_device(pcix_node);
2935 if (px_hose == NULL) {
2936 printk("PCI-X bridge found but not matched to host\n");
2937 return;
2938 }
2939 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
2940 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
2941 dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
2942 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
2943 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
2944 dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
2945 }
2946 #endif /* 0 */
2947
2948 /*
2949 * Early video resume hook
2950 */
2951
2952 static void (*pmac_early_vresume_proc)(void *data);
2953 static void *pmac_early_vresume_data;
2954
2955 void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2956 {
2957 if (_machine != _MACH_Pmac)
2958 return;
2959 preempt_disable();
2960 pmac_early_vresume_proc = proc;
2961 pmac_early_vresume_data = data;
2962 preempt_enable();
2963 }
2964 EXPORT_SYMBOL(pmac_set_early_video_resume);
2965
2966 void pmac_call_early_video_resume(void)
2967 {
2968 if (pmac_early_vresume_proc)
2969 pmac_early_vresume_proc(pmac_early_vresume_data);
2970 }
2971
2972 /*
2973 * AGP related suspend/resume code
2974 */
2975
2976 static struct pci_dev *pmac_agp_bridge;
2977 static int (*pmac_agp_suspend)(struct pci_dev *bridge);
2978 static int (*pmac_agp_resume)(struct pci_dev *bridge);
2979
2980 void pmac_register_agp_pm(struct pci_dev *bridge,
2981 int (*suspend)(struct pci_dev *bridge),
2982 int (*resume)(struct pci_dev *bridge))
2983 {
2984 if (suspend || resume) {
2985 pmac_agp_bridge = bridge;
2986 pmac_agp_suspend = suspend;
2987 pmac_agp_resume = resume;
2988 return;
2989 }
2990 if (bridge != pmac_agp_bridge)
2991 return;
2992 pmac_agp_suspend = pmac_agp_resume = NULL;
2993 return;
2994 }
2995 EXPORT_SYMBOL(pmac_register_agp_pm);
2996
2997 void pmac_suspend_agp_for_card(struct pci_dev *dev)
2998 {
2999 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
3000 return;
3001 if (pmac_agp_bridge->bus != dev->bus)
3002 return;
3003 pmac_agp_suspend(pmac_agp_bridge);
3004 }
3005 EXPORT_SYMBOL(pmac_suspend_agp_for_card);
3006
3007 void pmac_resume_agp_for_card(struct pci_dev *dev)
3008 {
3009 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
3010 return;
3011 if (pmac_agp_bridge->bus != dev->bus)
3012 return;
3013 pmac_agp_resume(pmac_agp_bridge);
3014 }
3015 EXPORT_SYMBOL(pmac_resume_agp_for_card);
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