[ARM] Support register switch in nommu mode
[linux-2.6/verdex.git] / drivers / media / dvb / frontends / nxt6000.c
bloba16eeba0020d8484a8a43c44032eb754e831fdba
1 /*
2 NxtWave Communications - NXT6000 demodulator driver
4 Copyright (C) 2002-2003 Florian Schirmer <jolt@tuxbox.org>
5 Copyright (C) 2003 Paul Andreassen <paul@andreassen.com.au>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/init.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
28 #include "dvb_frontend.h"
29 #include "nxt6000_priv.h"
30 #include "nxt6000.h"
34 struct nxt6000_state {
35 struct i2c_adapter* i2c;
36 struct dvb_frontend_ops ops;
37 /* configuration settings */
38 const struct nxt6000_config* config;
39 struct dvb_frontend frontend;
42 static int debug = 0;
43 #define dprintk if (debug) printk
45 static int nxt6000_writereg(struct nxt6000_state* state, u8 reg, u8 data)
47 u8 buf[] = { reg, data };
48 struct i2c_msg msg = {.addr = state->config->demod_address,.flags = 0,.buf = buf,.len = 2 };
49 int ret;
51 if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1)
52 dprintk("nxt6000: nxt6000_write error (reg: 0x%02X, data: 0x%02X, ret: %d)\n", reg, data, ret);
54 return (ret != 1) ? -EFAULT : 0;
57 static u8 nxt6000_readreg(struct nxt6000_state* state, u8 reg)
59 int ret;
60 u8 b0[] = { reg };
61 u8 b1[] = { 0 };
62 struct i2c_msg msgs[] = {
63 {.addr = state->config->demod_address,.flags = 0,.buf = b0,.len = 1},
64 {.addr = state->config->demod_address,.flags = I2C_M_RD,.buf = b1,.len = 1}
67 ret = i2c_transfer(state->i2c, msgs, 2);
69 if (ret != 2)
70 dprintk("nxt6000: nxt6000_read error (reg: 0x%02X, ret: %d)\n", reg, ret);
72 return b1[0];
75 static void nxt6000_reset(struct nxt6000_state* state)
77 u8 val;
79 val = nxt6000_readreg(state, OFDM_COR_CTL);
81 nxt6000_writereg(state, OFDM_COR_CTL, val & ~COREACT);
82 nxt6000_writereg(state, OFDM_COR_CTL, val | COREACT);
85 static int nxt6000_set_bandwidth(struct nxt6000_state* state, fe_bandwidth_t bandwidth)
87 u16 nominal_rate;
88 int result;
90 switch (bandwidth) {
92 case BANDWIDTH_6_MHZ:
93 nominal_rate = 0x55B7;
94 break;
96 case BANDWIDTH_7_MHZ:
97 nominal_rate = 0x6400;
98 break;
100 case BANDWIDTH_8_MHZ:
101 nominal_rate = 0x7249;
102 break;
104 default:
105 return -EINVAL;
108 if ((result = nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, nominal_rate & 0xFF)) < 0)
109 return result;
111 return nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, (nominal_rate >> 8) & 0xFF);
114 static int nxt6000_set_guard_interval(struct nxt6000_state* state, fe_guard_interval_t guard_interval)
116 switch (guard_interval) {
118 case GUARD_INTERVAL_1_32:
119 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x00 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
121 case GUARD_INTERVAL_1_16:
122 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x01 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
124 case GUARD_INTERVAL_AUTO:
125 case GUARD_INTERVAL_1_8:
126 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x02 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
128 case GUARD_INTERVAL_1_4:
129 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x03 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
131 default:
132 return -EINVAL;
136 static int nxt6000_set_inversion(struct nxt6000_state* state, fe_spectral_inversion_t inversion)
138 switch (inversion) {
140 case INVERSION_OFF:
141 return nxt6000_writereg(state, OFDM_ITB_CTL, 0x00);
143 case INVERSION_ON:
144 return nxt6000_writereg(state, OFDM_ITB_CTL, ITBINV);
146 default:
147 return -EINVAL;
152 static int nxt6000_set_transmission_mode(struct nxt6000_state* state, fe_transmit_mode_t transmission_mode)
154 int result;
156 switch (transmission_mode) {
158 case TRANSMISSION_MODE_2K:
159 if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x00 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0)
160 return result;
162 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x00 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04));
164 case TRANSMISSION_MODE_8K:
165 case TRANSMISSION_MODE_AUTO:
166 if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x02 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0)
167 return result;
169 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x01 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04));
171 default:
172 return -EINVAL;
177 static void nxt6000_setup(struct dvb_frontend* fe)
179 struct nxt6000_state* state = fe->demodulator_priv;
181 nxt6000_writereg(state, RS_COR_SYNC_PARAM, SYNC_PARAM);
182 nxt6000_writereg(state, BER_CTRL, /*(1 << 2) | */ (0x01 << 1) | 0x01);
183 nxt6000_writereg(state, VIT_BERTIME_2, 0x00); // BER Timer = 0x000200 * 256 = 131072 bits
184 nxt6000_writereg(state, VIT_BERTIME_1, 0x02); //
185 nxt6000_writereg(state, VIT_BERTIME_0, 0x00); //
186 nxt6000_writereg(state, VIT_COR_INTEN, 0x98); // Enable BER interrupts
187 nxt6000_writereg(state, VIT_COR_CTL, 0x82); // Enable BER measurement
188 nxt6000_writereg(state, VIT_COR_CTL, VIT_COR_RESYNC | 0x02 );
189 nxt6000_writereg(state, OFDM_COR_CTL, (0x01 << 5) | (nxt6000_readreg(state, OFDM_COR_CTL) & 0x0F));
190 nxt6000_writereg(state, OFDM_COR_MODEGUARD, FORCEMODE8K | 0x02);
191 nxt6000_writereg(state, OFDM_AGC_CTL, AGCLAST | INITIAL_AGC_BW);
192 nxt6000_writereg(state, OFDM_ITB_FREQ_1, 0x06);
193 nxt6000_writereg(state, OFDM_ITB_FREQ_2, 0x31);
194 nxt6000_writereg(state, OFDM_CAS_CTL, (0x01 << 7) | (0x02 << 3) | 0x04);
195 nxt6000_writereg(state, CAS_FREQ, 0xBB); /* CHECKME */
196 nxt6000_writereg(state, OFDM_SYR_CTL, 1 << 2);
197 nxt6000_writereg(state, OFDM_PPM_CTL_1, PPM256);
198 nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, 0x49);
199 nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, 0x72);
200 nxt6000_writereg(state, ANALOG_CONTROL_0, 1 << 5);
201 nxt6000_writereg(state, EN_DMD_RACQ, (1 << 7) | (3 << 4) | 2);
202 nxt6000_writereg(state, DIAG_CONFIG, TB_SET);
204 if (state->config->clock_inversion)
205 nxt6000_writereg(state, SUB_DIAG_MODE_SEL, CLKINVERSION);
206 else
207 nxt6000_writereg(state, SUB_DIAG_MODE_SEL, 0);
209 nxt6000_writereg(state, TS_FORMAT, 0);
211 if (state->config->pll_init) {
212 nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x01); /* open i2c bus switch */
213 state->config->pll_init(fe);
214 nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x00); /* close i2c bus switch */
218 static void nxt6000_dump_status(struct nxt6000_state *state)
220 u8 val;
223 printk("RS_COR_STAT: 0x%02X\n", nxt6000_readreg(fe, RS_COR_STAT));
224 printk("VIT_SYNC_STATUS: 0x%02X\n", nxt6000_readreg(fe, VIT_SYNC_STATUS));
225 printk("OFDM_COR_STAT: 0x%02X\n", nxt6000_readreg(fe, OFDM_COR_STAT));
226 printk("OFDM_SYR_STAT: 0x%02X\n", nxt6000_readreg(fe, OFDM_SYR_STAT));
227 printk("OFDM_TPS_RCVD_1: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_1));
228 printk("OFDM_TPS_RCVD_2: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_2));
229 printk("OFDM_TPS_RCVD_3: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_3));
230 printk("OFDM_TPS_RCVD_4: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_4));
231 printk("OFDM_TPS_RESERVED_1: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RESERVED_1));
232 printk("OFDM_TPS_RESERVED_2: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RESERVED_2));
234 printk("NXT6000 status:");
236 val = nxt6000_readreg(state, RS_COR_STAT);
238 printk(" DATA DESCR LOCK: %d,", val & 0x01);
239 printk(" DATA SYNC LOCK: %d,", (val >> 1) & 0x01);
241 val = nxt6000_readreg(state, VIT_SYNC_STATUS);
243 printk(" VITERBI LOCK: %d,", (val >> 7) & 0x01);
245 switch ((val >> 4) & 0x07) {
247 case 0x00:
248 printk(" VITERBI CODERATE: 1/2,");
249 break;
251 case 0x01:
252 printk(" VITERBI CODERATE: 2/3,");
253 break;
255 case 0x02:
256 printk(" VITERBI CODERATE: 3/4,");
257 break;
259 case 0x03:
260 printk(" VITERBI CODERATE: 5/6,");
261 break;
263 case 0x04:
264 printk(" VITERBI CODERATE: 7/8,");
265 break;
267 default:
268 printk(" VITERBI CODERATE: Reserved,");
272 val = nxt6000_readreg(state, OFDM_COR_STAT);
274 printk(" CHCTrack: %d,", (val >> 7) & 0x01);
275 printk(" TPSLock: %d,", (val >> 6) & 0x01);
276 printk(" SYRLock: %d,", (val >> 5) & 0x01);
277 printk(" AGCLock: %d,", (val >> 4) & 0x01);
279 switch (val & 0x0F) {
281 case 0x00:
282 printk(" CoreState: IDLE,");
283 break;
285 case 0x02:
286 printk(" CoreState: WAIT_AGC,");
287 break;
289 case 0x03:
290 printk(" CoreState: WAIT_SYR,");
291 break;
293 case 0x04:
294 printk(" CoreState: WAIT_PPM,");
295 break;
297 case 0x01:
298 printk(" CoreState: WAIT_TRL,");
299 break;
301 case 0x05:
302 printk(" CoreState: WAIT_TPS,");
303 break;
305 case 0x06:
306 printk(" CoreState: MONITOR_TPS,");
307 break;
309 default:
310 printk(" CoreState: Reserved,");
314 val = nxt6000_readreg(state, OFDM_SYR_STAT);
316 printk(" SYRLock: %d,", (val >> 4) & 0x01);
317 printk(" SYRMode: %s,", (val >> 2) & 0x01 ? "8K" : "2K");
319 switch ((val >> 4) & 0x03) {
321 case 0x00:
322 printk(" SYRGuard: 1/32,");
323 break;
325 case 0x01:
326 printk(" SYRGuard: 1/16,");
327 break;
329 case 0x02:
330 printk(" SYRGuard: 1/8,");
331 break;
333 case 0x03:
334 printk(" SYRGuard: 1/4,");
335 break;
338 val = nxt6000_readreg(state, OFDM_TPS_RCVD_3);
340 switch ((val >> 4) & 0x07) {
342 case 0x00:
343 printk(" TPSLP: 1/2,");
344 break;
346 case 0x01:
347 printk(" TPSLP: 2/3,");
348 break;
350 case 0x02:
351 printk(" TPSLP: 3/4,");
352 break;
354 case 0x03:
355 printk(" TPSLP: 5/6,");
356 break;
358 case 0x04:
359 printk(" TPSLP: 7/8,");
360 break;
362 default:
363 printk(" TPSLP: Reserved,");
367 switch (val & 0x07) {
369 case 0x00:
370 printk(" TPSHP: 1/2,");
371 break;
373 case 0x01:
374 printk(" TPSHP: 2/3,");
375 break;
377 case 0x02:
378 printk(" TPSHP: 3/4,");
379 break;
381 case 0x03:
382 printk(" TPSHP: 5/6,");
383 break;
385 case 0x04:
386 printk(" TPSHP: 7/8,");
387 break;
389 default:
390 printk(" TPSHP: Reserved,");
394 val = nxt6000_readreg(state, OFDM_TPS_RCVD_4);
396 printk(" TPSMode: %s,", val & 0x01 ? "8K" : "2K");
398 switch ((val >> 4) & 0x03) {
400 case 0x00:
401 printk(" TPSGuard: 1/32,");
402 break;
404 case 0x01:
405 printk(" TPSGuard: 1/16,");
406 break;
408 case 0x02:
409 printk(" TPSGuard: 1/8,");
410 break;
412 case 0x03:
413 printk(" TPSGuard: 1/4,");
414 break;
418 /* Strange magic required to gain access to RF_AGC_STATUS */
419 nxt6000_readreg(state, RF_AGC_VAL_1);
420 val = nxt6000_readreg(state, RF_AGC_STATUS);
421 val = nxt6000_readreg(state, RF_AGC_STATUS);
423 printk(" RF AGC LOCK: %d,", (val >> 4) & 0x01);
424 printk("\n");
427 static int nxt6000_read_status(struct dvb_frontend* fe, fe_status_t* status)
429 u8 core_status;
430 struct nxt6000_state* state = fe->demodulator_priv;
432 *status = 0;
434 core_status = nxt6000_readreg(state, OFDM_COR_STAT);
436 if (core_status & AGCLOCKED)
437 *status |= FE_HAS_SIGNAL;
439 if (nxt6000_readreg(state, OFDM_SYR_STAT) & GI14_SYR_LOCK)
440 *status |= FE_HAS_CARRIER;
442 if (nxt6000_readreg(state, VIT_SYNC_STATUS) & VITINSYNC)
443 *status |= FE_HAS_VITERBI;
445 if (nxt6000_readreg(state, RS_COR_STAT) & RSCORESTATUS)
446 *status |= FE_HAS_SYNC;
448 if ((core_status & TPSLOCKED) && (*status == (FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC)))
449 *status |= FE_HAS_LOCK;
451 if (debug)
452 nxt6000_dump_status(state);
454 return 0;
457 static int nxt6000_init(struct dvb_frontend* fe)
459 struct nxt6000_state* state = fe->demodulator_priv;
461 nxt6000_reset(state);
462 nxt6000_setup(fe);
464 return 0;
467 static int nxt6000_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *param)
469 struct nxt6000_state* state = fe->demodulator_priv;
470 int result;
472 nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x01); /* open i2c bus switch */
473 state->config->pll_set(fe, param);
474 nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x00); /* close i2c bus switch */
476 if ((result = nxt6000_set_bandwidth(state, param->u.ofdm.bandwidth)) < 0)
477 return result;
478 if ((result = nxt6000_set_guard_interval(state, param->u.ofdm.guard_interval)) < 0)
479 return result;
480 if ((result = nxt6000_set_transmission_mode(state, param->u.ofdm.transmission_mode)) < 0)
481 return result;
482 if ((result = nxt6000_set_inversion(state, param->inversion)) < 0)
483 return result;
485 msleep(500);
486 return 0;
489 static void nxt6000_release(struct dvb_frontend* fe)
491 struct nxt6000_state* state = fe->demodulator_priv;
492 kfree(state);
495 static int nxt6000_read_snr(struct dvb_frontend* fe, u16* snr)
497 struct nxt6000_state* state = fe->demodulator_priv;
499 *snr = nxt6000_readreg( state, OFDM_CHC_SNR) / 8;
501 return 0;
504 static int nxt6000_read_ber(struct dvb_frontend* fe, u32* ber)
506 struct nxt6000_state* state = fe->demodulator_priv;
508 nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18 );
510 *ber = (nxt6000_readreg( state, VIT_BER_1 ) << 8 ) |
511 nxt6000_readreg( state, VIT_BER_0 );
513 nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18); // Clear BER Done interrupts
515 return 0;
518 static int nxt6000_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
520 struct nxt6000_state* state = fe->demodulator_priv;
522 *signal_strength = (short) (511 -
523 (nxt6000_readreg(state, AGC_GAIN_1) +
524 ((nxt6000_readreg(state, AGC_GAIN_2) & 0x03) << 8)));
526 return 0;
529 static int nxt6000_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
531 tune->min_delay_ms = 500;
532 return 0;
535 static struct dvb_frontend_ops nxt6000_ops;
537 struct dvb_frontend* nxt6000_attach(const struct nxt6000_config* config,
538 struct i2c_adapter* i2c)
540 struct nxt6000_state* state = NULL;
542 /* allocate memory for the internal state */
543 state = kmalloc(sizeof(struct nxt6000_state), GFP_KERNEL);
544 if (state == NULL) goto error;
546 /* setup the state */
547 state->config = config;
548 state->i2c = i2c;
549 memcpy(&state->ops, &nxt6000_ops, sizeof(struct dvb_frontend_ops));
551 /* check if the demod is there */
552 if (nxt6000_readreg(state, OFDM_MSC_REV) != NXT6000ASICDEVICE) goto error;
554 /* create dvb_frontend */
555 state->frontend.ops = &state->ops;
556 state->frontend.demodulator_priv = state;
557 return &state->frontend;
559 error:
560 kfree(state);
561 return NULL;
564 static struct dvb_frontend_ops nxt6000_ops = {
566 .info = {
567 .name = "NxtWave NXT6000 DVB-T",
568 .type = FE_OFDM,
569 .frequency_min = 0,
570 .frequency_max = 863250000,
571 .frequency_stepsize = 62500,
572 /*.frequency_tolerance = *//* FIXME: 12% of SR */
573 .symbol_rate_min = 0, /* FIXME */
574 .symbol_rate_max = 9360000, /* FIXME */
575 .symbol_rate_tolerance = 4000,
576 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
577 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
578 FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
579 FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
580 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
581 FE_CAN_HIERARCHY_AUTO,
584 .release = nxt6000_release,
586 .init = nxt6000_init,
588 .get_tune_settings = nxt6000_fe_get_tune_settings,
590 .set_frontend = nxt6000_set_frontend,
592 .read_status = nxt6000_read_status,
593 .read_ber = nxt6000_read_ber,
594 .read_signal_strength = nxt6000_read_signal_strength,
595 .read_snr = nxt6000_read_snr,
598 module_param(debug, int, 0644);
599 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
601 MODULE_DESCRIPTION("NxtWave NXT6000 DVB-T demodulator driver");
602 MODULE_AUTHOR("Florian Schirmer");
603 MODULE_LICENSE("GPL");
605 EXPORT_SYMBOL(nxt6000_attach);