[ARM] Support register switch in nommu mode
[linux-2.6/verdex.git] / drivers / net / smc91x.c
blob7ec08127c9d6c4f8594d805392155e3bddccd875
1 /*
2 * smc91x.c
3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * Arguments:
26 * io = for the base address
27 * irq = for the IRQ
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
30 * original author:
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
36 * contributors:
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
41 * History:
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
51 * - ethtool support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
55 * smc_phy_configure
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
63 /* Debugging level */
64 #ifndef SMC_DEBUG
65 #define SMC_DEBUG 0
66 #endif
69 #include <linux/config.h>
70 #include <linux/init.h>
71 #include <linux/module.h>
72 #include <linux/kernel.h>
73 #include <linux/sched.h>
74 #include <linux/slab.h>
75 #include <linux/delay.h>
76 #include <linux/interrupt.h>
77 #include <linux/errno.h>
78 #include <linux/ioport.h>
79 #include <linux/crc32.h>
80 #include <linux/platform_device.h>
81 #include <linux/spinlock.h>
82 #include <linux/ethtool.h>
83 #include <linux/mii.h>
84 #include <linux/workqueue.h>
86 #include <linux/netdevice.h>
87 #include <linux/etherdevice.h>
88 #include <linux/skbuff.h>
90 #include <asm/io.h>
92 #include "smc91x.h"
94 #ifdef CONFIG_ISA
96 * the LAN91C111 can be at any of the following port addresses. To change,
97 * for a slightly different card, you can add it to the array. Keep in
98 * mind that the array must end in zero.
100 static unsigned int smc_portlist[] __initdata = {
101 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
102 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
105 #ifndef SMC_IOADDR
106 # define SMC_IOADDR -1
107 #endif
108 static unsigned long io = SMC_IOADDR;
109 module_param(io, ulong, 0400);
110 MODULE_PARM_DESC(io, "I/O base address");
112 #ifndef SMC_IRQ
113 # define SMC_IRQ -1
114 #endif
115 static int irq = SMC_IRQ;
116 module_param(irq, int, 0400);
117 MODULE_PARM_DESC(irq, "IRQ number");
119 #endif /* CONFIG_ISA */
121 #ifndef SMC_NOWAIT
122 # define SMC_NOWAIT 0
123 #endif
124 static int nowait = SMC_NOWAIT;
125 module_param(nowait, int, 0400);
126 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
129 * Transmit timeout, default 5 seconds.
131 static int watchdog = 1000;
132 module_param(watchdog, int, 0400);
133 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
135 MODULE_LICENSE("GPL");
138 * The internal workings of the driver. If you are changing anything
139 * here with the SMC stuff, you should have the datasheet and know
140 * what you are doing.
142 #define CARDNAME "smc91x"
145 * Use power-down feature of the chip
147 #define POWER_DOWN 1
150 * Wait time for memory to be free. This probably shouldn't be
151 * tuned that much, as waiting for this means nothing else happens
152 * in the system
154 #define MEMORY_WAIT_TIME 16
157 * The maximum number of processing loops allowed for each call to the
158 * IRQ handler.
160 #define MAX_IRQ_LOOPS 8
163 * This selects whether TX packets are sent one by one to the SMC91x internal
164 * memory and throttled until transmission completes. This may prevent
165 * RX overruns a litle by keeping much of the memory free for RX packets
166 * but to the expense of reduced TX throughput and increased IRQ overhead.
167 * Note this is not a cure for a too slow data bus or too high IRQ latency.
169 #define THROTTLE_TX_PKTS 0
172 * The MII clock high/low times. 2x this number gives the MII clock period
173 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
175 #define MII_DELAY 1
177 /* store this information for the driver.. */
178 struct smc_local {
180 * If I have to wait until memory is available to send a
181 * packet, I will store the skbuff here, until I get the
182 * desired memory. Then, I'll send it out and free it.
184 struct sk_buff *pending_tx_skb;
185 struct tasklet_struct tx_task;
188 * these are things that the kernel wants me to keep, so users
189 * can find out semi-useless statistics of how well the card is
190 * performing
192 struct net_device_stats stats;
194 /* version/revision of the SMC91x chip */
195 int version;
197 /* Contains the current active transmission mode */
198 int tcr_cur_mode;
200 /* Contains the current active receive mode */
201 int rcr_cur_mode;
203 /* Contains the current active receive/phy mode */
204 int rpc_cur_mode;
205 int ctl_rfduplx;
206 int ctl_rspeed;
208 u32 msg_enable;
209 u32 phy_type;
210 struct mii_if_info mii;
212 /* work queue */
213 struct work_struct phy_configure;
214 int work_pending;
216 spinlock_t lock;
218 #ifdef SMC_CAN_USE_DATACS
219 u32 __iomem *datacs;
220 #endif
222 #ifdef SMC_USE_PXA_DMA
223 /* DMA needs the physical address of the chip */
224 u_long physaddr;
225 #endif
226 void __iomem *base;
229 #if SMC_DEBUG > 0
230 #define DBG(n, args...) \
231 do { \
232 if (SMC_DEBUG >= (n)) \
233 printk(args); \
234 } while (0)
236 #define PRINTK(args...) printk(args)
237 #else
238 #define DBG(n, args...) do { } while(0)
239 #define PRINTK(args...) printk(KERN_DEBUG args)
240 #endif
242 #if SMC_DEBUG > 3
243 static void PRINT_PKT(u_char *buf, int length)
245 int i;
246 int remainder;
247 int lines;
249 lines = length / 16;
250 remainder = length % 16;
252 for (i = 0; i < lines ; i ++) {
253 int cur;
254 for (cur = 0; cur < 8; cur++) {
255 u_char a, b;
256 a = *buf++;
257 b = *buf++;
258 printk("%02x%02x ", a, b);
260 printk("\n");
262 for (i = 0; i < remainder/2 ; i++) {
263 u_char a, b;
264 a = *buf++;
265 b = *buf++;
266 printk("%02x%02x ", a, b);
268 printk("\n");
270 #else
271 #define PRINT_PKT(x...) do { } while(0)
272 #endif
275 /* this enables an interrupt in the interrupt mask register */
276 #define SMC_ENABLE_INT(x) do { \
277 unsigned char mask; \
278 spin_lock_irq(&lp->lock); \
279 mask = SMC_GET_INT_MASK(); \
280 mask |= (x); \
281 SMC_SET_INT_MASK(mask); \
282 spin_unlock_irq(&lp->lock); \
283 } while (0)
285 /* this disables an interrupt from the interrupt mask register */
286 #define SMC_DISABLE_INT(x) do { \
287 unsigned char mask; \
288 spin_lock_irq(&lp->lock); \
289 mask = SMC_GET_INT_MASK(); \
290 mask &= ~(x); \
291 SMC_SET_INT_MASK(mask); \
292 spin_unlock_irq(&lp->lock); \
293 } while (0)
296 * Wait while MMU is busy. This is usually in the order of a few nanosecs
297 * if at all, but let's avoid deadlocking the system if the hardware
298 * decides to go south.
300 #define SMC_WAIT_MMU_BUSY() do { \
301 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
302 unsigned long timeout = jiffies + 2; \
303 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
304 if (time_after(jiffies, timeout)) { \
305 printk("%s: timeout %s line %d\n", \
306 dev->name, __FILE__, __LINE__); \
307 break; \
309 cpu_relax(); \
312 } while (0)
316 * this does a soft reset on the device
318 static void smc_reset(struct net_device *dev)
320 struct smc_local *lp = netdev_priv(dev);
321 void __iomem *ioaddr = lp->base;
322 unsigned int ctl, cfg;
323 struct sk_buff *pending_skb;
325 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
327 /* Disable all interrupts, block TX tasklet */
328 spin_lock(&lp->lock);
329 SMC_SELECT_BANK(2);
330 SMC_SET_INT_MASK(0);
331 pending_skb = lp->pending_tx_skb;
332 lp->pending_tx_skb = NULL;
333 spin_unlock(&lp->lock);
335 /* free any pending tx skb */
336 if (pending_skb) {
337 dev_kfree_skb(pending_skb);
338 lp->stats.tx_errors++;
339 lp->stats.tx_aborted_errors++;
343 * This resets the registers mostly to defaults, but doesn't
344 * affect EEPROM. That seems unnecessary
346 SMC_SELECT_BANK(0);
347 SMC_SET_RCR(RCR_SOFTRST);
350 * Setup the Configuration Register
351 * This is necessary because the CONFIG_REG is not affected
352 * by a soft reset
354 SMC_SELECT_BANK(1);
356 cfg = CONFIG_DEFAULT;
359 * Setup for fast accesses if requested. If the card/system
360 * can't handle it then there will be no recovery except for
361 * a hard reset or power cycle
363 if (nowait)
364 cfg |= CONFIG_NO_WAIT;
367 * Release from possible power-down state
368 * Configuration register is not affected by Soft Reset
370 cfg |= CONFIG_EPH_POWER_EN;
372 SMC_SET_CONFIG(cfg);
374 /* this should pause enough for the chip to be happy */
376 * elaborate? What does the chip _need_? --jgarzik
378 * This seems to be undocumented, but something the original
379 * driver(s) have always done. Suspect undocumented timing
380 * info/determined empirically. --rmk
382 udelay(1);
384 /* Disable transmit and receive functionality */
385 SMC_SELECT_BANK(0);
386 SMC_SET_RCR(RCR_CLEAR);
387 SMC_SET_TCR(TCR_CLEAR);
389 SMC_SELECT_BANK(1);
390 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
393 * Set the control register to automatically release successfully
394 * transmitted packets, to make the best use out of our limited
395 * memory
397 if(!THROTTLE_TX_PKTS)
398 ctl |= CTL_AUTO_RELEASE;
399 else
400 ctl &= ~CTL_AUTO_RELEASE;
401 SMC_SET_CTL(ctl);
403 /* Reset the MMU */
404 SMC_SELECT_BANK(2);
405 SMC_SET_MMU_CMD(MC_RESET);
406 SMC_WAIT_MMU_BUSY();
410 * Enable Interrupts, Receive, and Transmit
412 static void smc_enable(struct net_device *dev)
414 struct smc_local *lp = netdev_priv(dev);
415 void __iomem *ioaddr = lp->base;
416 int mask;
418 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
420 /* see the header file for options in TCR/RCR DEFAULT */
421 SMC_SELECT_BANK(0);
422 SMC_SET_TCR(lp->tcr_cur_mode);
423 SMC_SET_RCR(lp->rcr_cur_mode);
425 SMC_SELECT_BANK(1);
426 SMC_SET_MAC_ADDR(dev->dev_addr);
428 /* now, enable interrupts */
429 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
430 if (lp->version >= (CHIP_91100 << 4))
431 mask |= IM_MDINT;
432 SMC_SELECT_BANK(2);
433 SMC_SET_INT_MASK(mask);
436 * From this point the register bank must _NOT_ be switched away
437 * to something else than bank 2 without proper locking against
438 * races with any tasklet or interrupt handlers until smc_shutdown()
439 * or smc_reset() is called.
444 * this puts the device in an inactive state
446 static void smc_shutdown(struct net_device *dev)
448 struct smc_local *lp = netdev_priv(dev);
449 void __iomem *ioaddr = lp->base;
450 struct sk_buff *pending_skb;
452 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
454 /* no more interrupts for me */
455 spin_lock(&lp->lock);
456 SMC_SELECT_BANK(2);
457 SMC_SET_INT_MASK(0);
458 pending_skb = lp->pending_tx_skb;
459 lp->pending_tx_skb = NULL;
460 spin_unlock(&lp->lock);
461 if (pending_skb)
462 dev_kfree_skb(pending_skb);
464 /* and tell the card to stay away from that nasty outside world */
465 SMC_SELECT_BANK(0);
466 SMC_SET_RCR(RCR_CLEAR);
467 SMC_SET_TCR(TCR_CLEAR);
469 #ifdef POWER_DOWN
470 /* finally, shut the chip down */
471 SMC_SELECT_BANK(1);
472 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
473 #endif
477 * This is the procedure to handle the receipt of a packet.
479 static inline void smc_rcv(struct net_device *dev)
481 struct smc_local *lp = netdev_priv(dev);
482 void __iomem *ioaddr = lp->base;
483 unsigned int packet_number, status, packet_len;
485 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
487 packet_number = SMC_GET_RXFIFO();
488 if (unlikely(packet_number & RXFIFO_REMPTY)) {
489 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
490 return;
493 /* read from start of packet */
494 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
496 /* First two words are status and packet length */
497 SMC_GET_PKT_HDR(status, packet_len);
498 packet_len &= 0x07ff; /* mask off top bits */
499 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
500 dev->name, packet_number, status,
501 packet_len, packet_len);
503 back:
504 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
505 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
506 /* accept VLAN packets */
507 status &= ~RS_TOOLONG;
508 goto back;
510 if (packet_len < 6) {
511 /* bloody hardware */
512 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
513 dev->name, packet_len, status);
514 status |= RS_TOOSHORT;
516 SMC_WAIT_MMU_BUSY();
517 SMC_SET_MMU_CMD(MC_RELEASE);
518 lp->stats.rx_errors++;
519 if (status & RS_ALGNERR)
520 lp->stats.rx_frame_errors++;
521 if (status & (RS_TOOSHORT | RS_TOOLONG))
522 lp->stats.rx_length_errors++;
523 if (status & RS_BADCRC)
524 lp->stats.rx_crc_errors++;
525 } else {
526 struct sk_buff *skb;
527 unsigned char *data;
528 unsigned int data_len;
530 /* set multicast stats */
531 if (status & RS_MULTICAST)
532 lp->stats.multicast++;
535 * Actual payload is packet_len - 6 (or 5 if odd byte).
536 * We want skb_reserve(2) and the final ctrl word
537 * (2 bytes, possibly containing the payload odd byte).
538 * Furthermore, we add 2 bytes to allow rounding up to
539 * multiple of 4 bytes on 32 bit buses.
540 * Hence packet_len - 6 + 2 + 2 + 2.
542 skb = dev_alloc_skb(packet_len);
543 if (unlikely(skb == NULL)) {
544 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
545 dev->name);
546 SMC_WAIT_MMU_BUSY();
547 SMC_SET_MMU_CMD(MC_RELEASE);
548 lp->stats.rx_dropped++;
549 return;
552 /* Align IP header to 32 bits */
553 skb_reserve(skb, 2);
555 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
556 if (lp->version == 0x90)
557 status |= RS_ODDFRAME;
560 * If odd length: packet_len - 5,
561 * otherwise packet_len - 6.
562 * With the trailing ctrl byte it's packet_len - 4.
564 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
565 data = skb_put(skb, data_len);
566 SMC_PULL_DATA(data, packet_len - 4);
568 SMC_WAIT_MMU_BUSY();
569 SMC_SET_MMU_CMD(MC_RELEASE);
571 PRINT_PKT(data, packet_len - 4);
573 dev->last_rx = jiffies;
574 skb->dev = dev;
575 skb->protocol = eth_type_trans(skb, dev);
576 netif_rx(skb);
577 lp->stats.rx_packets++;
578 lp->stats.rx_bytes += data_len;
582 #ifdef CONFIG_SMP
584 * On SMP we have the following problem:
586 * A = smc_hardware_send_pkt()
587 * B = smc_hard_start_xmit()
588 * C = smc_interrupt()
590 * A and B can never be executed simultaneously. However, at least on UP,
591 * it is possible (and even desirable) for C to interrupt execution of
592 * A or B in order to have better RX reliability and avoid overruns.
593 * C, just like A and B, must have exclusive access to the chip and
594 * each of them must lock against any other concurrent access.
595 * Unfortunately this is not possible to have C suspend execution of A or
596 * B taking place on another CPU. On UP this is no an issue since A and B
597 * are run from softirq context and C from hard IRQ context, and there is
598 * no other CPU where concurrent access can happen.
599 * If ever there is a way to force at least B and C to always be executed
600 * on the same CPU then we could use read/write locks to protect against
601 * any other concurrent access and C would always interrupt B. But life
602 * isn't that easy in a SMP world...
604 #define smc_special_trylock(lock) \
605 ({ \
606 int __ret; \
607 local_irq_disable(); \
608 __ret = spin_trylock(lock); \
609 if (!__ret) \
610 local_irq_enable(); \
611 __ret; \
613 #define smc_special_lock(lock) spin_lock_irq(lock)
614 #define smc_special_unlock(lock) spin_unlock_irq(lock)
615 #else
616 #define smc_special_trylock(lock) (1)
617 #define smc_special_lock(lock) do { } while (0)
618 #define smc_special_unlock(lock) do { } while (0)
619 #endif
622 * This is called to actually send a packet to the chip.
624 static void smc_hardware_send_pkt(unsigned long data)
626 struct net_device *dev = (struct net_device *)data;
627 struct smc_local *lp = netdev_priv(dev);
628 void __iomem *ioaddr = lp->base;
629 struct sk_buff *skb;
630 unsigned int packet_no, len;
631 unsigned char *buf;
633 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
635 if (!smc_special_trylock(&lp->lock)) {
636 netif_stop_queue(dev);
637 tasklet_schedule(&lp->tx_task);
638 return;
641 skb = lp->pending_tx_skb;
642 if (unlikely(!skb)) {
643 smc_special_unlock(&lp->lock);
644 return;
646 lp->pending_tx_skb = NULL;
648 packet_no = SMC_GET_AR();
649 if (unlikely(packet_no & AR_FAILED)) {
650 printk("%s: Memory allocation failed.\n", dev->name);
651 lp->stats.tx_errors++;
652 lp->stats.tx_fifo_errors++;
653 smc_special_unlock(&lp->lock);
654 goto done;
657 /* point to the beginning of the packet */
658 SMC_SET_PN(packet_no);
659 SMC_SET_PTR(PTR_AUTOINC);
661 buf = skb->data;
662 len = skb->len;
663 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
664 dev->name, packet_no, len, len, buf);
665 PRINT_PKT(buf, len);
668 * Send the packet length (+6 for status words, length, and ctl.
669 * The card will pad to 64 bytes with zeroes if packet is too small.
671 SMC_PUT_PKT_HDR(0, len + 6);
673 /* send the actual data */
674 SMC_PUSH_DATA(buf, len & ~1);
676 /* Send final ctl word with the last byte if there is one */
677 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
680 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
681 * have the effect of having at most one packet queued for TX
682 * in the chip's memory at all time.
684 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
685 * when memory allocation (MC_ALLOC) does not succeed right away.
687 if (THROTTLE_TX_PKTS)
688 netif_stop_queue(dev);
690 /* queue the packet for TX */
691 SMC_SET_MMU_CMD(MC_ENQUEUE);
692 smc_special_unlock(&lp->lock);
694 dev->trans_start = jiffies;
695 lp->stats.tx_packets++;
696 lp->stats.tx_bytes += len;
698 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
700 done: if (!THROTTLE_TX_PKTS)
701 netif_wake_queue(dev);
703 dev_kfree_skb(skb);
707 * Since I am not sure if I will have enough room in the chip's ram
708 * to store the packet, I call this routine which either sends it
709 * now, or set the card to generates an interrupt when ready
710 * for the packet.
712 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
714 struct smc_local *lp = netdev_priv(dev);
715 void __iomem *ioaddr = lp->base;
716 unsigned int numPages, poll_count, status;
718 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
720 BUG_ON(lp->pending_tx_skb != NULL);
723 * The MMU wants the number of pages to be the number of 256 bytes
724 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
726 * The 91C111 ignores the size bits, but earlier models don't.
728 * Pkt size for allocating is data length +6 (for additional status
729 * words, length and ctl)
731 * If odd size then last byte is included in ctl word.
733 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
734 if (unlikely(numPages > 7)) {
735 printk("%s: Far too big packet error.\n", dev->name);
736 lp->stats.tx_errors++;
737 lp->stats.tx_dropped++;
738 dev_kfree_skb(skb);
739 return 0;
742 smc_special_lock(&lp->lock);
744 /* now, try to allocate the memory */
745 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
748 * Poll the chip for a short amount of time in case the
749 * allocation succeeds quickly.
751 poll_count = MEMORY_WAIT_TIME;
752 do {
753 status = SMC_GET_INT();
754 if (status & IM_ALLOC_INT) {
755 SMC_ACK_INT(IM_ALLOC_INT);
756 break;
758 } while (--poll_count);
760 smc_special_unlock(&lp->lock);
762 lp->pending_tx_skb = skb;
763 if (!poll_count) {
764 /* oh well, wait until the chip finds memory later */
765 netif_stop_queue(dev);
766 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
767 SMC_ENABLE_INT(IM_ALLOC_INT);
768 } else {
770 * Allocation succeeded: push packet to the chip's own memory
771 * immediately.
773 smc_hardware_send_pkt((unsigned long)dev);
776 return 0;
780 * This handles a TX interrupt, which is only called when:
781 * - a TX error occurred, or
782 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
784 static void smc_tx(struct net_device *dev)
786 struct smc_local *lp = netdev_priv(dev);
787 void __iomem *ioaddr = lp->base;
788 unsigned int saved_packet, packet_no, tx_status, pkt_len;
790 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
792 /* If the TX FIFO is empty then nothing to do */
793 packet_no = SMC_GET_TXFIFO();
794 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
795 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
796 return;
799 /* select packet to read from */
800 saved_packet = SMC_GET_PN();
801 SMC_SET_PN(packet_no);
803 /* read the first word (status word) from this packet */
804 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
805 SMC_GET_PKT_HDR(tx_status, pkt_len);
806 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
807 dev->name, tx_status, packet_no);
809 if (!(tx_status & ES_TX_SUC))
810 lp->stats.tx_errors++;
812 if (tx_status & ES_LOSTCARR)
813 lp->stats.tx_carrier_errors++;
815 if (tx_status & (ES_LATCOL | ES_16COL)) {
816 PRINTK("%s: %s occurred on last xmit\n", dev->name,
817 (tx_status & ES_LATCOL) ?
818 "late collision" : "too many collisions");
819 lp->stats.tx_window_errors++;
820 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
821 printk(KERN_INFO "%s: unexpectedly large number of "
822 "bad collisions. Please check duplex "
823 "setting.\n", dev->name);
827 /* kill the packet */
828 SMC_WAIT_MMU_BUSY();
829 SMC_SET_MMU_CMD(MC_FREEPKT);
831 /* Don't restore Packet Number Reg until busy bit is cleared */
832 SMC_WAIT_MMU_BUSY();
833 SMC_SET_PN(saved_packet);
835 /* re-enable transmit */
836 SMC_SELECT_BANK(0);
837 SMC_SET_TCR(lp->tcr_cur_mode);
838 SMC_SELECT_BANK(2);
842 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
844 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
846 struct smc_local *lp = netdev_priv(dev);
847 void __iomem *ioaddr = lp->base;
848 unsigned int mii_reg, mask;
850 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
851 mii_reg |= MII_MDOE;
853 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
854 if (val & mask)
855 mii_reg |= MII_MDO;
856 else
857 mii_reg &= ~MII_MDO;
859 SMC_SET_MII(mii_reg);
860 udelay(MII_DELAY);
861 SMC_SET_MII(mii_reg | MII_MCLK);
862 udelay(MII_DELAY);
866 static unsigned int smc_mii_in(struct net_device *dev, int bits)
868 struct smc_local *lp = netdev_priv(dev);
869 void __iomem *ioaddr = lp->base;
870 unsigned int mii_reg, mask, val;
872 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
873 SMC_SET_MII(mii_reg);
875 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
876 if (SMC_GET_MII() & MII_MDI)
877 val |= mask;
879 SMC_SET_MII(mii_reg);
880 udelay(MII_DELAY);
881 SMC_SET_MII(mii_reg | MII_MCLK);
882 udelay(MII_DELAY);
885 return val;
889 * Reads a register from the MII Management serial interface
891 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
893 struct smc_local *lp = netdev_priv(dev);
894 void __iomem *ioaddr = lp->base;
895 unsigned int phydata;
897 SMC_SELECT_BANK(3);
899 /* Idle - 32 ones */
900 smc_mii_out(dev, 0xffffffff, 32);
902 /* Start code (01) + read (10) + phyaddr + phyreg */
903 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
905 /* Turnaround (2bits) + phydata */
906 phydata = smc_mii_in(dev, 18);
908 /* Return to idle state */
909 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
911 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
912 __FUNCTION__, phyaddr, phyreg, phydata);
914 SMC_SELECT_BANK(2);
915 return phydata;
919 * Writes a register to the MII Management serial interface
921 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
922 int phydata)
924 struct smc_local *lp = netdev_priv(dev);
925 void __iomem *ioaddr = lp->base;
927 SMC_SELECT_BANK(3);
929 /* Idle - 32 ones */
930 smc_mii_out(dev, 0xffffffff, 32);
932 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
933 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
935 /* Return to idle state */
936 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
938 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
939 __FUNCTION__, phyaddr, phyreg, phydata);
941 SMC_SELECT_BANK(2);
945 * Finds and reports the PHY address
947 static void smc_phy_detect(struct net_device *dev)
949 struct smc_local *lp = netdev_priv(dev);
950 int phyaddr;
952 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
954 lp->phy_type = 0;
957 * Scan all 32 PHY addresses if necessary, starting at
958 * PHY#1 to PHY#31, and then PHY#0 last.
960 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
961 unsigned int id1, id2;
963 /* Read the PHY identifiers */
964 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
965 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
967 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
968 dev->name, id1, id2);
970 /* Make sure it is a valid identifier */
971 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
972 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
973 /* Save the PHY's address */
974 lp->mii.phy_id = phyaddr & 31;
975 lp->phy_type = id1 << 16 | id2;
976 break;
982 * Sets the PHY to a configuration as determined by the user
984 static int smc_phy_fixed(struct net_device *dev)
986 struct smc_local *lp = netdev_priv(dev);
987 void __iomem *ioaddr = lp->base;
988 int phyaddr = lp->mii.phy_id;
989 int bmcr, cfg1;
991 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
993 /* Enter Link Disable state */
994 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
995 cfg1 |= PHY_CFG1_LNKDIS;
996 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
999 * Set our fixed capabilities
1000 * Disable auto-negotiation
1002 bmcr = 0;
1004 if (lp->ctl_rfduplx)
1005 bmcr |= BMCR_FULLDPLX;
1007 if (lp->ctl_rspeed == 100)
1008 bmcr |= BMCR_SPEED100;
1010 /* Write our capabilities to the phy control register */
1011 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
1013 /* Re-Configure the Receive/Phy Control register */
1014 SMC_SELECT_BANK(0);
1015 SMC_SET_RPC(lp->rpc_cur_mode);
1016 SMC_SELECT_BANK(2);
1018 return 1;
1022 * smc_phy_reset - reset the phy
1023 * @dev: net device
1024 * @phy: phy address
1026 * Issue a software reset for the specified PHY and
1027 * wait up to 100ms for the reset to complete. We should
1028 * not access the PHY for 50ms after issuing the reset.
1030 * The time to wait appears to be dependent on the PHY.
1032 * Must be called with lp->lock locked.
1034 static int smc_phy_reset(struct net_device *dev, int phy)
1036 struct smc_local *lp = netdev_priv(dev);
1037 unsigned int bmcr;
1038 int timeout;
1040 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
1042 for (timeout = 2; timeout; timeout--) {
1043 spin_unlock_irq(&lp->lock);
1044 msleep(50);
1045 spin_lock_irq(&lp->lock);
1047 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1048 if (!(bmcr & BMCR_RESET))
1049 break;
1052 return bmcr & BMCR_RESET;
1056 * smc_phy_powerdown - powerdown phy
1057 * @dev: net device
1059 * Power down the specified PHY
1061 static void smc_phy_powerdown(struct net_device *dev)
1063 struct smc_local *lp = netdev_priv(dev);
1064 unsigned int bmcr;
1065 int phy = lp->mii.phy_id;
1067 if (lp->phy_type == 0)
1068 return;
1070 /* We need to ensure that no calls to smc_phy_configure are
1071 pending.
1073 flush_scheduled_work() cannot be called because we are
1074 running with the netlink semaphore held (from
1075 devinet_ioctl()) and the pending work queue contains
1076 linkwatch_event() (scheduled by netif_carrier_off()
1077 above). linkwatch_event() also wants the netlink semaphore.
1079 while(lp->work_pending)
1080 yield();
1082 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1083 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1087 * smc_phy_check_media - check the media status and adjust TCR
1088 * @dev: net device
1089 * @init: set true for initialisation
1091 * Select duplex mode depending on negotiation state. This
1092 * also updates our carrier state.
1094 static void smc_phy_check_media(struct net_device *dev, int init)
1096 struct smc_local *lp = netdev_priv(dev);
1097 void __iomem *ioaddr = lp->base;
1099 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1100 /* duplex state has changed */
1101 if (lp->mii.full_duplex) {
1102 lp->tcr_cur_mode |= TCR_SWFDUP;
1103 } else {
1104 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1107 SMC_SELECT_BANK(0);
1108 SMC_SET_TCR(lp->tcr_cur_mode);
1113 * Configures the specified PHY through the MII management interface
1114 * using Autonegotiation.
1115 * Calls smc_phy_fixed() if the user has requested a certain config.
1116 * If RPC ANEG bit is set, the media selection is dependent purely on
1117 * the selection by the MII (either in the MII BMCR reg or the result
1118 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1119 * is controlled by the RPC SPEED and RPC DPLX bits.
1121 static void smc_phy_configure(void *data)
1123 struct net_device *dev = data;
1124 struct smc_local *lp = netdev_priv(dev);
1125 void __iomem *ioaddr = lp->base;
1126 int phyaddr = lp->mii.phy_id;
1127 int my_phy_caps; /* My PHY capabilities */
1128 int my_ad_caps; /* My Advertised capabilities */
1129 int status;
1131 DBG(3, "%s:smc_program_phy()\n", dev->name);
1133 spin_lock_irq(&lp->lock);
1136 * We should not be called if phy_type is zero.
1138 if (lp->phy_type == 0)
1139 goto smc_phy_configure_exit;
1141 if (smc_phy_reset(dev, phyaddr)) {
1142 printk("%s: PHY reset timed out\n", dev->name);
1143 goto smc_phy_configure_exit;
1147 * Enable PHY Interrupts (for register 18)
1148 * Interrupts listed here are disabled
1150 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1151 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1152 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1153 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1155 /* Configure the Receive/Phy Control register */
1156 SMC_SELECT_BANK(0);
1157 SMC_SET_RPC(lp->rpc_cur_mode);
1159 /* If the user requested no auto neg, then go set his request */
1160 if (lp->mii.force_media) {
1161 smc_phy_fixed(dev);
1162 goto smc_phy_configure_exit;
1165 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1166 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1168 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1169 printk(KERN_INFO "Auto negotiation NOT supported\n");
1170 smc_phy_fixed(dev);
1171 goto smc_phy_configure_exit;
1174 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1176 if (my_phy_caps & BMSR_100BASE4)
1177 my_ad_caps |= ADVERTISE_100BASE4;
1178 if (my_phy_caps & BMSR_100FULL)
1179 my_ad_caps |= ADVERTISE_100FULL;
1180 if (my_phy_caps & BMSR_100HALF)
1181 my_ad_caps |= ADVERTISE_100HALF;
1182 if (my_phy_caps & BMSR_10FULL)
1183 my_ad_caps |= ADVERTISE_10FULL;
1184 if (my_phy_caps & BMSR_10HALF)
1185 my_ad_caps |= ADVERTISE_10HALF;
1187 /* Disable capabilities not selected by our user */
1188 if (lp->ctl_rspeed != 100)
1189 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1191 if (!lp->ctl_rfduplx)
1192 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1194 /* Update our Auto-Neg Advertisement Register */
1195 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1196 lp->mii.advertising = my_ad_caps;
1199 * Read the register back. Without this, it appears that when
1200 * auto-negotiation is restarted, sometimes it isn't ready and
1201 * the link does not come up.
1203 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1205 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1206 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1208 /* Restart auto-negotiation process in order to advertise my caps */
1209 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1211 smc_phy_check_media(dev, 1);
1213 smc_phy_configure_exit:
1214 SMC_SELECT_BANK(2);
1215 spin_unlock_irq(&lp->lock);
1216 lp->work_pending = 0;
1220 * smc_phy_interrupt
1222 * Purpose: Handle interrupts relating to PHY register 18. This is
1223 * called from the "hard" interrupt handler under our private spinlock.
1225 static void smc_phy_interrupt(struct net_device *dev)
1227 struct smc_local *lp = netdev_priv(dev);
1228 int phyaddr = lp->mii.phy_id;
1229 int phy18;
1231 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1233 if (lp->phy_type == 0)
1234 return;
1236 for(;;) {
1237 smc_phy_check_media(dev, 0);
1239 /* Read PHY Register 18, Status Output */
1240 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1241 if ((phy18 & PHY_INT_INT) == 0)
1242 break;
1246 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1248 static void smc_10bt_check_media(struct net_device *dev, int init)
1250 struct smc_local *lp = netdev_priv(dev);
1251 void __iomem *ioaddr = lp->base;
1252 unsigned int old_carrier, new_carrier;
1254 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1256 SMC_SELECT_BANK(0);
1257 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
1258 SMC_SELECT_BANK(2);
1260 if (init || (old_carrier != new_carrier)) {
1261 if (!new_carrier) {
1262 netif_carrier_off(dev);
1263 } else {
1264 netif_carrier_on(dev);
1266 if (netif_msg_link(lp))
1267 printk(KERN_INFO "%s: link %s\n", dev->name,
1268 new_carrier ? "up" : "down");
1272 static void smc_eph_interrupt(struct net_device *dev)
1274 struct smc_local *lp = netdev_priv(dev);
1275 void __iomem *ioaddr = lp->base;
1276 unsigned int ctl;
1278 smc_10bt_check_media(dev, 0);
1280 SMC_SELECT_BANK(1);
1281 ctl = SMC_GET_CTL();
1282 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1283 SMC_SET_CTL(ctl);
1284 SMC_SELECT_BANK(2);
1288 * This is the main routine of the driver, to handle the device when
1289 * it needs some attention.
1291 static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1293 struct net_device *dev = dev_id;
1294 struct smc_local *lp = netdev_priv(dev);
1295 void __iomem *ioaddr = lp->base;
1296 int status, mask, timeout, card_stats;
1297 int saved_pointer;
1299 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1301 spin_lock(&lp->lock);
1303 /* A preamble may be used when there is a potential race
1304 * between the interruptible transmit functions and this
1305 * ISR. */
1306 SMC_INTERRUPT_PREAMBLE;
1308 saved_pointer = SMC_GET_PTR();
1309 mask = SMC_GET_INT_MASK();
1310 SMC_SET_INT_MASK(0);
1312 /* set a timeout value, so I don't stay here forever */
1313 timeout = MAX_IRQ_LOOPS;
1315 do {
1316 status = SMC_GET_INT();
1318 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1319 dev->name, status, mask,
1320 ({ int meminfo; SMC_SELECT_BANK(0);
1321 meminfo = SMC_GET_MIR();
1322 SMC_SELECT_BANK(2); meminfo; }),
1323 SMC_GET_FIFO());
1325 status &= mask;
1326 if (!status)
1327 break;
1329 if (status & IM_TX_INT) {
1330 /* do this before RX as it will free memory quickly */
1331 DBG(3, "%s: TX int\n", dev->name);
1332 smc_tx(dev);
1333 SMC_ACK_INT(IM_TX_INT);
1334 if (THROTTLE_TX_PKTS)
1335 netif_wake_queue(dev);
1336 } else if (status & IM_RCV_INT) {
1337 DBG(3, "%s: RX irq\n", dev->name);
1338 smc_rcv(dev);
1339 } else if (status & IM_ALLOC_INT) {
1340 DBG(3, "%s: Allocation irq\n", dev->name);
1341 tasklet_hi_schedule(&lp->tx_task);
1342 mask &= ~IM_ALLOC_INT;
1343 } else if (status & IM_TX_EMPTY_INT) {
1344 DBG(3, "%s: TX empty\n", dev->name);
1345 mask &= ~IM_TX_EMPTY_INT;
1347 /* update stats */
1348 SMC_SELECT_BANK(0);
1349 card_stats = SMC_GET_COUNTER();
1350 SMC_SELECT_BANK(2);
1352 /* single collisions */
1353 lp->stats.collisions += card_stats & 0xF;
1354 card_stats >>= 4;
1356 /* multiple collisions */
1357 lp->stats.collisions += card_stats & 0xF;
1358 } else if (status & IM_RX_OVRN_INT) {
1359 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1360 ({ int eph_st; SMC_SELECT_BANK(0);
1361 eph_st = SMC_GET_EPH_STATUS();
1362 SMC_SELECT_BANK(2); eph_st; }) );
1363 SMC_ACK_INT(IM_RX_OVRN_INT);
1364 lp->stats.rx_errors++;
1365 lp->stats.rx_fifo_errors++;
1366 } else if (status & IM_EPH_INT) {
1367 smc_eph_interrupt(dev);
1368 } else if (status & IM_MDINT) {
1369 SMC_ACK_INT(IM_MDINT);
1370 smc_phy_interrupt(dev);
1371 } else if (status & IM_ERCV_INT) {
1372 SMC_ACK_INT(IM_ERCV_INT);
1373 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1375 } while (--timeout);
1377 /* restore register states */
1378 SMC_SET_PTR(saved_pointer);
1379 SMC_SET_INT_MASK(mask);
1380 spin_unlock(&lp->lock);
1382 if (timeout == MAX_IRQ_LOOPS)
1383 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1384 dev->name, mask);
1385 DBG(3, "%s: Interrupt done (%d loops)\n",
1386 dev->name, MAX_IRQ_LOOPS - timeout);
1389 * We return IRQ_HANDLED unconditionally here even if there was
1390 * nothing to do. There is a possibility that a packet might
1391 * get enqueued into the chip right after TX_EMPTY_INT is raised
1392 * but just before the CPU acknowledges the IRQ.
1393 * Better take an unneeded IRQ in some occasions than complexifying
1394 * the code for all cases.
1396 return IRQ_HANDLED;
1399 #ifdef CONFIG_NET_POLL_CONTROLLER
1401 * Polling receive - used by netconsole and other diagnostic tools
1402 * to allow network i/o with interrupts disabled.
1404 static void smc_poll_controller(struct net_device *dev)
1406 disable_irq(dev->irq);
1407 smc_interrupt(dev->irq, dev, NULL);
1408 enable_irq(dev->irq);
1410 #endif
1412 /* Our watchdog timed out. Called by the networking layer */
1413 static void smc_timeout(struct net_device *dev)
1415 struct smc_local *lp = netdev_priv(dev);
1416 void __iomem *ioaddr = lp->base;
1417 int status, mask, eph_st, meminfo, fifo;
1419 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1421 spin_lock_irq(&lp->lock);
1422 status = SMC_GET_INT();
1423 mask = SMC_GET_INT_MASK();
1424 fifo = SMC_GET_FIFO();
1425 SMC_SELECT_BANK(0);
1426 eph_st = SMC_GET_EPH_STATUS();
1427 meminfo = SMC_GET_MIR();
1428 SMC_SELECT_BANK(2);
1429 spin_unlock_irq(&lp->lock);
1430 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1431 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1432 dev->name, status, mask, meminfo, fifo, eph_st );
1434 smc_reset(dev);
1435 smc_enable(dev);
1438 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1439 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1440 * which calls schedule(). Hence we use a work queue.
1442 if (lp->phy_type != 0) {
1443 if (schedule_work(&lp->phy_configure)) {
1444 lp->work_pending = 1;
1448 /* We can accept TX packets again */
1449 dev->trans_start = jiffies;
1450 netif_wake_queue(dev);
1454 * This routine will, depending on the values passed to it,
1455 * either make it accept multicast packets, go into
1456 * promiscuous mode (for TCPDUMP and cousins) or accept
1457 * a select set of multicast packets
1459 static void smc_set_multicast_list(struct net_device *dev)
1461 struct smc_local *lp = netdev_priv(dev);
1462 void __iomem *ioaddr = lp->base;
1463 unsigned char multicast_table[8];
1464 int update_multicast = 0;
1466 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1468 if (dev->flags & IFF_PROMISC) {
1469 DBG(2, "%s: RCR_PRMS\n", dev->name);
1470 lp->rcr_cur_mode |= RCR_PRMS;
1473 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1474 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1475 when promiscuous mode is turned on.
1479 * Here, I am setting this to accept all multicast packets.
1480 * I don't need to zero the multicast table, because the flag is
1481 * checked before the table is
1483 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1484 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1485 lp->rcr_cur_mode |= RCR_ALMUL;
1489 * This sets the internal hardware table to filter out unwanted
1490 * multicast packets before they take up memory.
1492 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1493 * address are the offset into the table. If that bit is 1, then the
1494 * multicast packet is accepted. Otherwise, it's dropped silently.
1496 * To use the 6 bits as an offset into the table, the high 3 bits are
1497 * the number of the 8 bit register, while the low 3 bits are the bit
1498 * within that register.
1500 else if (dev->mc_count) {
1501 int i;
1502 struct dev_mc_list *cur_addr;
1504 /* table for flipping the order of 3 bits */
1505 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1507 /* start with a table of all zeros: reject all */
1508 memset(multicast_table, 0, sizeof(multicast_table));
1510 cur_addr = dev->mc_list;
1511 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1512 int position;
1514 /* do we have a pointer here? */
1515 if (!cur_addr)
1516 break;
1517 /* make sure this is a multicast address -
1518 shouldn't this be a given if we have it here ? */
1519 if (!(*cur_addr->dmi_addr & 1))
1520 continue;
1522 /* only use the low order bits */
1523 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1525 /* do some messy swapping to put the bit in the right spot */
1526 multicast_table[invert3[position&7]] |=
1527 (1<<invert3[(position>>3)&7]);
1530 /* be sure I get rid of flags I might have set */
1531 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1533 /* now, the table can be loaded into the chipset */
1534 update_multicast = 1;
1535 } else {
1536 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1537 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1540 * since I'm disabling all multicast entirely, I need to
1541 * clear the multicast list
1543 memset(multicast_table, 0, sizeof(multicast_table));
1544 update_multicast = 1;
1547 spin_lock_irq(&lp->lock);
1548 SMC_SELECT_BANK(0);
1549 SMC_SET_RCR(lp->rcr_cur_mode);
1550 if (update_multicast) {
1551 SMC_SELECT_BANK(3);
1552 SMC_SET_MCAST(multicast_table);
1554 SMC_SELECT_BANK(2);
1555 spin_unlock_irq(&lp->lock);
1560 * Open and Initialize the board
1562 * Set up everything, reset the card, etc..
1564 static int
1565 smc_open(struct net_device *dev)
1567 struct smc_local *lp = netdev_priv(dev);
1569 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1572 * Check that the address is valid. If its not, refuse
1573 * to bring the device up. The user must specify an
1574 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1576 if (!is_valid_ether_addr(dev->dev_addr)) {
1577 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1578 return -EINVAL;
1581 /* Setup the default Register Modes */
1582 lp->tcr_cur_mode = TCR_DEFAULT;
1583 lp->rcr_cur_mode = RCR_DEFAULT;
1584 lp->rpc_cur_mode = RPC_DEFAULT;
1587 * If we are not using a MII interface, we need to
1588 * monitor our own carrier signal to detect faults.
1590 if (lp->phy_type == 0)
1591 lp->tcr_cur_mode |= TCR_MON_CSN;
1593 /* reset the hardware */
1594 smc_reset(dev);
1595 smc_enable(dev);
1597 /* Configure the PHY, initialize the link state */
1598 if (lp->phy_type != 0)
1599 smc_phy_configure(dev);
1600 else {
1601 spin_lock_irq(&lp->lock);
1602 smc_10bt_check_media(dev, 1);
1603 spin_unlock_irq(&lp->lock);
1606 netif_start_queue(dev);
1607 return 0;
1611 * smc_close
1613 * this makes the board clean up everything that it can
1614 * and not talk to the outside world. Caused by
1615 * an 'ifconfig ethX down'
1617 static int smc_close(struct net_device *dev)
1619 struct smc_local *lp = netdev_priv(dev);
1621 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1623 netif_stop_queue(dev);
1624 netif_carrier_off(dev);
1626 /* clear everything */
1627 smc_shutdown(dev);
1628 tasklet_kill(&lp->tx_task);
1629 smc_phy_powerdown(dev);
1630 return 0;
1634 * Get the current statistics.
1635 * This may be called with the card open or closed.
1637 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1639 struct smc_local *lp = netdev_priv(dev);
1641 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1643 return &lp->stats;
1647 * Ethtool support
1649 static int
1650 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1652 struct smc_local *lp = netdev_priv(dev);
1653 int ret;
1655 cmd->maxtxpkt = 1;
1656 cmd->maxrxpkt = 1;
1658 if (lp->phy_type != 0) {
1659 spin_lock_irq(&lp->lock);
1660 ret = mii_ethtool_gset(&lp->mii, cmd);
1661 spin_unlock_irq(&lp->lock);
1662 } else {
1663 cmd->supported = SUPPORTED_10baseT_Half |
1664 SUPPORTED_10baseT_Full |
1665 SUPPORTED_TP | SUPPORTED_AUI;
1667 if (lp->ctl_rspeed == 10)
1668 cmd->speed = SPEED_10;
1669 else if (lp->ctl_rspeed == 100)
1670 cmd->speed = SPEED_100;
1672 cmd->autoneg = AUTONEG_DISABLE;
1673 cmd->transceiver = XCVR_INTERNAL;
1674 cmd->port = 0;
1675 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1677 ret = 0;
1680 return ret;
1683 static int
1684 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1686 struct smc_local *lp = netdev_priv(dev);
1687 int ret;
1689 if (lp->phy_type != 0) {
1690 spin_lock_irq(&lp->lock);
1691 ret = mii_ethtool_sset(&lp->mii, cmd);
1692 spin_unlock_irq(&lp->lock);
1693 } else {
1694 if (cmd->autoneg != AUTONEG_DISABLE ||
1695 cmd->speed != SPEED_10 ||
1696 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1697 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1698 return -EINVAL;
1700 // lp->port = cmd->port;
1701 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1703 // if (netif_running(dev))
1704 // smc_set_port(dev);
1706 ret = 0;
1709 return ret;
1712 static void
1713 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1715 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1716 strncpy(info->version, version, sizeof(info->version));
1717 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1720 static int smc_ethtool_nwayreset(struct net_device *dev)
1722 struct smc_local *lp = netdev_priv(dev);
1723 int ret = -EINVAL;
1725 if (lp->phy_type != 0) {
1726 spin_lock_irq(&lp->lock);
1727 ret = mii_nway_restart(&lp->mii);
1728 spin_unlock_irq(&lp->lock);
1731 return ret;
1734 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1736 struct smc_local *lp = netdev_priv(dev);
1737 return lp->msg_enable;
1740 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1742 struct smc_local *lp = netdev_priv(dev);
1743 lp->msg_enable = level;
1746 static struct ethtool_ops smc_ethtool_ops = {
1747 .get_settings = smc_ethtool_getsettings,
1748 .set_settings = smc_ethtool_setsettings,
1749 .get_drvinfo = smc_ethtool_getdrvinfo,
1751 .get_msglevel = smc_ethtool_getmsglevel,
1752 .set_msglevel = smc_ethtool_setmsglevel,
1753 .nway_reset = smc_ethtool_nwayreset,
1754 .get_link = ethtool_op_get_link,
1755 // .get_eeprom = smc_ethtool_geteeprom,
1756 // .set_eeprom = smc_ethtool_seteeprom,
1760 * smc_findirq
1762 * This routine has a simple purpose -- make the SMC chip generate an
1763 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1766 * does this still work?
1768 * I just deleted auto_irq.c, since it was never built...
1769 * --jgarzik
1771 static int __init smc_findirq(void __iomem *ioaddr)
1773 int timeout = 20;
1774 unsigned long cookie;
1776 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1778 cookie = probe_irq_on();
1781 * What I try to do here is trigger an ALLOC_INT. This is done
1782 * by allocating a small chunk of memory, which will give an interrupt
1783 * when done.
1785 /* enable ALLOCation interrupts ONLY */
1786 SMC_SELECT_BANK(2);
1787 SMC_SET_INT_MASK(IM_ALLOC_INT);
1790 * Allocate 512 bytes of memory. Note that the chip was just
1791 * reset so all the memory is available
1793 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1796 * Wait until positive that the interrupt has been generated
1798 do {
1799 int int_status;
1800 udelay(10);
1801 int_status = SMC_GET_INT();
1802 if (int_status & IM_ALLOC_INT)
1803 break; /* got the interrupt */
1804 } while (--timeout);
1807 * there is really nothing that I can do here if timeout fails,
1808 * as autoirq_report will return a 0 anyway, which is what I
1809 * want in this case. Plus, the clean up is needed in both
1810 * cases.
1813 /* and disable all interrupts again */
1814 SMC_SET_INT_MASK(0);
1816 /* and return what I found */
1817 return probe_irq_off(cookie);
1821 * Function: smc_probe(unsigned long ioaddr)
1823 * Purpose:
1824 * Tests to see if a given ioaddr points to an SMC91x chip.
1825 * Returns a 0 on success
1827 * Algorithm:
1828 * (1) see if the high byte of BANK_SELECT is 0x33
1829 * (2) compare the ioaddr with the base register's address
1830 * (3) see if I recognize the chip ID in the appropriate register
1832 * Here I do typical initialization tasks.
1834 * o Initialize the structure if needed
1835 * o print out my vanity message if not done so already
1836 * o print out what type of hardware is detected
1837 * o print out the ethernet address
1838 * o find the IRQ
1839 * o set up my private data
1840 * o configure the dev structure with my subroutines
1841 * o actually GRAB the irq.
1842 * o GRAB the region
1844 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
1846 struct smc_local *lp = netdev_priv(dev);
1847 static int version_printed = 0;
1848 int i, retval;
1849 unsigned int val, revision_register;
1850 const char *version_string;
1852 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1854 /* First, see if the high byte is 0x33 */
1855 val = SMC_CURRENT_BANK();
1856 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1857 if ((val & 0xFF00) != 0x3300) {
1858 if ((val & 0xFF) == 0x33) {
1859 printk(KERN_WARNING
1860 "%s: Detected possible byte-swapped interface"
1861 " at IOADDR %p\n", CARDNAME, ioaddr);
1863 retval = -ENODEV;
1864 goto err_out;
1868 * The above MIGHT indicate a device, but I need to write to
1869 * further test this.
1871 SMC_SELECT_BANK(0);
1872 val = SMC_CURRENT_BANK();
1873 if ((val & 0xFF00) != 0x3300) {
1874 retval = -ENODEV;
1875 goto err_out;
1879 * well, we've already written once, so hopefully another
1880 * time won't hurt. This time, I need to switch the bank
1881 * register to bank 1, so I can access the base address
1882 * register
1884 SMC_SELECT_BANK(1);
1885 val = SMC_GET_BASE();
1886 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1887 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1888 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1889 CARDNAME, ioaddr, val);
1893 * check if the revision register is something that I
1894 * recognize. These might need to be added to later,
1895 * as future revisions could be added.
1897 SMC_SELECT_BANK(3);
1898 revision_register = SMC_GET_REV();
1899 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1900 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1901 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1902 /* I don't recognize this chip, so... */
1903 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1904 ", Contact author.\n", CARDNAME,
1905 ioaddr, revision_register);
1907 retval = -ENODEV;
1908 goto err_out;
1911 /* At this point I'll assume that the chip is an SMC91x. */
1912 if (version_printed++ == 0)
1913 printk("%s", version);
1915 /* fill in some of the fields */
1916 dev->base_addr = (unsigned long)ioaddr;
1917 lp->base = ioaddr;
1918 lp->version = revision_register & 0xff;
1919 spin_lock_init(&lp->lock);
1921 /* Get the MAC address */
1922 SMC_SELECT_BANK(1);
1923 SMC_GET_MAC_ADDR(dev->dev_addr);
1925 /* now, reset the chip, and put it into a known state */
1926 smc_reset(dev);
1929 * If dev->irq is 0, then the device has to be banged on to see
1930 * what the IRQ is.
1932 * This banging doesn't always detect the IRQ, for unknown reasons.
1933 * a workaround is to reset the chip and try again.
1935 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1936 * be what is requested on the command line. I don't do that, mostly
1937 * because the card that I have uses a non-standard method of accessing
1938 * the IRQs, and because this _should_ work in most configurations.
1940 * Specifying an IRQ is done with the assumption that the user knows
1941 * what (s)he is doing. No checking is done!!!!
1943 if (dev->irq < 1) {
1944 int trials;
1946 trials = 3;
1947 while (trials--) {
1948 dev->irq = smc_findirq(ioaddr);
1949 if (dev->irq)
1950 break;
1951 /* kick the card and try again */
1952 smc_reset(dev);
1955 if (dev->irq == 0) {
1956 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1957 dev->name);
1958 retval = -ENODEV;
1959 goto err_out;
1961 dev->irq = irq_canonicalize(dev->irq);
1963 /* Fill in the fields of the device structure with ethernet values. */
1964 ether_setup(dev);
1966 dev->open = smc_open;
1967 dev->stop = smc_close;
1968 dev->hard_start_xmit = smc_hard_start_xmit;
1969 dev->tx_timeout = smc_timeout;
1970 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1971 dev->get_stats = smc_query_statistics;
1972 dev->set_multicast_list = smc_set_multicast_list;
1973 dev->ethtool_ops = &smc_ethtool_ops;
1974 #ifdef CONFIG_NET_POLL_CONTROLLER
1975 dev->poll_controller = smc_poll_controller;
1976 #endif
1978 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1979 INIT_WORK(&lp->phy_configure, smc_phy_configure, dev);
1980 lp->mii.phy_id_mask = 0x1f;
1981 lp->mii.reg_num_mask = 0x1f;
1982 lp->mii.force_media = 0;
1983 lp->mii.full_duplex = 0;
1984 lp->mii.dev = dev;
1985 lp->mii.mdio_read = smc_phy_read;
1986 lp->mii.mdio_write = smc_phy_write;
1989 * Locate the phy, if any.
1991 if (lp->version >= (CHIP_91100 << 4))
1992 smc_phy_detect(dev);
1994 /* then shut everything down to save power */
1995 smc_shutdown(dev);
1996 smc_phy_powerdown(dev);
1998 /* Set default parameters */
1999 lp->msg_enable = NETIF_MSG_LINK;
2000 lp->ctl_rfduplx = 0;
2001 lp->ctl_rspeed = 10;
2003 if (lp->version >= (CHIP_91100 << 4)) {
2004 lp->ctl_rfduplx = 1;
2005 lp->ctl_rspeed = 100;
2008 /* Grab the IRQ */
2009 retval = request_irq(dev->irq, &smc_interrupt, SMC_IRQ_FLAGS, dev->name, dev);
2010 if (retval)
2011 goto err_out;
2013 #ifdef SMC_USE_PXA_DMA
2015 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
2016 smc_pxa_dma_irq, NULL);
2017 if (dma >= 0)
2018 dev->dma = dma;
2020 #endif
2022 retval = register_netdev(dev);
2023 if (retval == 0) {
2024 /* now, print out the card info, in a short format.. */
2025 printk("%s: %s (rev %d) at %p IRQ %d",
2026 dev->name, version_string, revision_register & 0x0f,
2027 lp->base, dev->irq);
2029 if (dev->dma != (unsigned char)-1)
2030 printk(" DMA %d", dev->dma);
2032 printk("%s%s\n", nowait ? " [nowait]" : "",
2033 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2035 if (!is_valid_ether_addr(dev->dev_addr)) {
2036 printk("%s: Invalid ethernet MAC address. Please "
2037 "set using ifconfig\n", dev->name);
2038 } else {
2039 /* Print the Ethernet address */
2040 printk("%s: Ethernet addr: ", dev->name);
2041 for (i = 0; i < 5; i++)
2042 printk("%2.2x:", dev->dev_addr[i]);
2043 printk("%2.2x\n", dev->dev_addr[5]);
2046 if (lp->phy_type == 0) {
2047 PRINTK("%s: No PHY found\n", dev->name);
2048 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2049 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
2050 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2051 PRINTK("%s: PHY LAN83C180\n", dev->name);
2055 err_out:
2056 #ifdef SMC_USE_PXA_DMA
2057 if (retval && dev->dma != (unsigned char)-1)
2058 pxa_free_dma(dev->dma);
2059 #endif
2060 return retval;
2063 static int smc_enable_device(struct platform_device *pdev)
2065 unsigned long flags;
2066 unsigned char ecor, ecsr;
2067 void __iomem *addr;
2068 struct resource * res;
2070 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2071 if (!res)
2072 return 0;
2075 * Map the attribute space. This is overkill, but clean.
2077 addr = ioremap(res->start, ATTRIB_SIZE);
2078 if (!addr)
2079 return -ENOMEM;
2082 * Reset the device. We must disable IRQs around this
2083 * since a reset causes the IRQ line become active.
2085 local_irq_save(flags);
2086 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2087 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2088 readb(addr + (ECOR << SMC_IO_SHIFT));
2091 * Wait 100us for the chip to reset.
2093 udelay(100);
2096 * The device will ignore all writes to the enable bit while
2097 * reset is asserted, even if the reset bit is cleared in the
2098 * same write. Must clear reset first, then enable the device.
2100 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2101 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2104 * Set the appropriate byte/word mode.
2106 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2107 #ifndef SMC_CAN_USE_16BIT
2108 ecsr |= ECSR_IOIS8;
2109 #endif
2110 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2111 local_irq_restore(flags);
2113 iounmap(addr);
2116 * Wait for the chip to wake up. We could poll the control
2117 * register in the main register space, but that isn't mapped
2118 * yet. We know this is going to take 750us.
2120 msleep(1);
2122 return 0;
2125 static int smc_request_attrib(struct platform_device *pdev)
2127 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2129 if (!res)
2130 return 0;
2132 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2133 return -EBUSY;
2135 return 0;
2138 static void smc_release_attrib(struct platform_device *pdev)
2140 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2142 if (res)
2143 release_mem_region(res->start, ATTRIB_SIZE);
2146 #ifdef SMC_CAN_USE_DATACS
2147 static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2149 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2150 struct smc_local *lp = netdev_priv(ndev);
2152 if (!res)
2153 return;
2155 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2156 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2157 return;
2160 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2163 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2165 struct smc_local *lp = netdev_priv(ndev);
2166 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2168 if (lp->datacs)
2169 iounmap(lp->datacs);
2171 lp->datacs = NULL;
2173 if (res)
2174 release_mem_region(res->start, SMC_DATA_EXTENT);
2176 #else
2177 static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev) {}
2178 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev) {}
2179 #endif
2182 * smc_init(void)
2183 * Input parameters:
2184 * dev->base_addr == 0, try to find all possible locations
2185 * dev->base_addr > 0x1ff, this is the address to check
2186 * dev->base_addr == <anything else>, return failure code
2188 * Output:
2189 * 0 --> there is a device
2190 * anything else, error
2192 static int smc_drv_probe(struct platform_device *pdev)
2194 struct net_device *ndev;
2195 struct resource *res;
2196 unsigned int __iomem *addr;
2197 int ret;
2199 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2200 if (!res)
2201 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2202 if (!res) {
2203 ret = -ENODEV;
2204 goto out;
2208 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2209 ret = -EBUSY;
2210 goto out;
2213 ndev = alloc_etherdev(sizeof(struct smc_local));
2214 if (!ndev) {
2215 printk("%s: could not allocate device.\n", CARDNAME);
2216 ret = -ENOMEM;
2217 goto out_release_io;
2219 SET_MODULE_OWNER(ndev);
2220 SET_NETDEV_DEV(ndev, &pdev->dev);
2222 ndev->dma = (unsigned char)-1;
2223 ndev->irq = platform_get_irq(pdev, 0);
2225 ret = smc_request_attrib(pdev);
2226 if (ret)
2227 goto out_free_netdev;
2228 #if defined(CONFIG_SA1100_ASSABET)
2229 NCR_0 |= NCR_ENET_OSC_EN;
2230 #endif
2231 ret = smc_enable_device(pdev);
2232 if (ret)
2233 goto out_release_attrib;
2235 addr = ioremap(res->start, SMC_IO_EXTENT);
2236 if (!addr) {
2237 ret = -ENOMEM;
2238 goto out_release_attrib;
2241 platform_set_drvdata(pdev, ndev);
2242 ret = smc_probe(ndev, addr);
2243 if (ret != 0)
2244 goto out_iounmap;
2245 #ifdef SMC_USE_PXA_DMA
2246 else {
2247 struct smc_local *lp = netdev_priv(ndev);
2248 lp->physaddr = res->start;
2250 #endif
2252 smc_request_datacs(pdev, ndev);
2254 return 0;
2256 out_iounmap:
2257 platform_set_drvdata(pdev, NULL);
2258 iounmap(addr);
2259 out_release_attrib:
2260 smc_release_attrib(pdev);
2261 out_free_netdev:
2262 free_netdev(ndev);
2263 out_release_io:
2264 release_mem_region(res->start, SMC_IO_EXTENT);
2265 out:
2266 printk("%s: not found (%d).\n", CARDNAME, ret);
2268 return ret;
2271 static int smc_drv_remove(struct platform_device *pdev)
2273 struct net_device *ndev = platform_get_drvdata(pdev);
2274 struct smc_local *lp = netdev_priv(ndev);
2275 struct resource *res;
2277 platform_set_drvdata(pdev, NULL);
2279 unregister_netdev(ndev);
2281 free_irq(ndev->irq, ndev);
2283 #ifdef SMC_USE_PXA_DMA
2284 if (ndev->dma != (unsigned char)-1)
2285 pxa_free_dma(ndev->dma);
2286 #endif
2287 iounmap(lp->base);
2289 smc_release_datacs(pdev,ndev);
2290 smc_release_attrib(pdev);
2292 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2293 if (!res)
2294 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2295 release_mem_region(res->start, SMC_IO_EXTENT);
2297 free_netdev(ndev);
2299 return 0;
2302 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2304 struct net_device *ndev = platform_get_drvdata(dev);
2306 if (ndev) {
2307 if (netif_running(ndev)) {
2308 netif_device_detach(ndev);
2309 smc_shutdown(ndev);
2310 smc_phy_powerdown(ndev);
2313 return 0;
2316 static int smc_drv_resume(struct platform_device *dev)
2318 struct net_device *ndev = platform_get_drvdata(dev);
2320 if (ndev) {
2321 struct smc_local *lp = netdev_priv(ndev);
2322 smc_enable_device(dev);
2323 if (netif_running(ndev)) {
2324 smc_reset(ndev);
2325 smc_enable(ndev);
2326 if (lp->phy_type != 0)
2327 smc_phy_configure(ndev);
2328 netif_device_attach(ndev);
2331 return 0;
2334 static struct platform_driver smc_driver = {
2335 .probe = smc_drv_probe,
2336 .remove = smc_drv_remove,
2337 .suspend = smc_drv_suspend,
2338 .resume = smc_drv_resume,
2339 .driver = {
2340 .name = CARDNAME,
2344 static int __init smc_init(void)
2346 #ifdef MODULE
2347 #ifdef CONFIG_ISA
2348 if (io == -1)
2349 printk(KERN_WARNING
2350 "%s: You shouldn't use auto-probing with insmod!\n",
2351 CARDNAME);
2352 #endif
2353 #endif
2355 return platform_driver_register(&smc_driver);
2358 static void __exit smc_cleanup(void)
2360 platform_driver_unregister(&smc_driver);
2363 module_init(smc_init);
2364 module_exit(smc_cleanup);