3 * Linux MegaRAID driver for SAS based RAID controllers
5 * Copyright (c) 2003-2005 LSI Logic Corporation.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 * FILE : megaraid_sas.h
15 #ifndef LSI_MEGARAID_SAS_H
16 #define LSI_MEGARAID_SAS_H
19 * MegaRAID SAS Driver meta data
21 #define MEGASAS_VERSION "00.00.02.00-rc4"
22 #define MEGASAS_RELDATE "Sep 16, 2005"
23 #define MEGASAS_EXT_VERSION "Fri Sep 16 12:37:08 EDT 2005"
26 * =====================================
27 * MegaRAID SAS MFI firmware definitions
28 * =====================================
32 * MFI stands for MegaRAID SAS FW Interface. This is just a moniker for
33 * protocol between the software and firmware. Commands are issued using
38 * FW posts its state in upper 4 bits of outbound_msg_0 register
40 #define MFI_STATE_MASK 0xF0000000
41 #define MFI_STATE_UNDEFINED 0x00000000
42 #define MFI_STATE_BB_INIT 0x10000000
43 #define MFI_STATE_FW_INIT 0x40000000
44 #define MFI_STATE_WAIT_HANDSHAKE 0x60000000
45 #define MFI_STATE_FW_INIT_2 0x70000000
46 #define MFI_STATE_DEVICE_SCAN 0x80000000
47 #define MFI_STATE_FLUSH_CACHE 0xA0000000
48 #define MFI_STATE_READY 0xB0000000
49 #define MFI_STATE_OPERATIONAL 0xC0000000
50 #define MFI_STATE_FAULT 0xF0000000
52 #define MEGAMFI_FRAME_SIZE 64
55 * During FW init, clear pending cmds & reset state using inbound_msg_0
57 * ABORT : Abort all pending cmds
58 * READY : Move from OPERATIONAL to READY state; discard queue info
59 * MFIMODE : Discard (possible) low MFA posted in 64-bit mode (??)
60 * CLR_HANDSHAKE: FW is waiting for HANDSHAKE from BIOS or Driver
62 #define MFI_INIT_ABORT 0x00000000
63 #define MFI_INIT_READY 0x00000002
64 #define MFI_INIT_MFIMODE 0x00000004
65 #define MFI_INIT_CLEAR_HANDSHAKE 0x00000008
66 #define MFI_RESET_FLAGS MFI_INIT_READY|MFI_INIT_MFIMODE
71 #define MFI_FRAME_POST_IN_REPLY_QUEUE 0x0000
72 #define MFI_FRAME_DONT_POST_IN_REPLY_QUEUE 0x0001
73 #define MFI_FRAME_SGL32 0x0000
74 #define MFI_FRAME_SGL64 0x0002
75 #define MFI_FRAME_SENSE32 0x0000
76 #define MFI_FRAME_SENSE64 0x0004
77 #define MFI_FRAME_DIR_NONE 0x0000
78 #define MFI_FRAME_DIR_WRITE 0x0008
79 #define MFI_FRAME_DIR_READ 0x0010
80 #define MFI_FRAME_DIR_BOTH 0x0018
83 * Definition for cmd_status
85 #define MFI_CMD_STATUS_POLL_MODE 0xFF
90 #define MFI_CMD_INIT 0x00
91 #define MFI_CMD_LD_READ 0x01
92 #define MFI_CMD_LD_WRITE 0x02
93 #define MFI_CMD_LD_SCSI_IO 0x03
94 #define MFI_CMD_PD_SCSI_IO 0x04
95 #define MFI_CMD_DCMD 0x05
96 #define MFI_CMD_ABORT 0x06
97 #define MFI_CMD_SMP 0x07
98 #define MFI_CMD_STP 0x08
100 #define MR_DCMD_CTRL_GET_INFO 0x01010000
102 #define MR_DCMD_CTRL_CACHE_FLUSH 0x01101000
103 #define MR_FLUSH_CTRL_CACHE 0x01
104 #define MR_FLUSH_DISK_CACHE 0x02
106 #define MR_DCMD_CTRL_SHUTDOWN 0x01050000
107 #define MR_ENABLE_DRIVE_SPINDOWN 0x01
109 #define MR_DCMD_CTRL_EVENT_GET_INFO 0x01040100
110 #define MR_DCMD_CTRL_EVENT_GET 0x01040300
111 #define MR_DCMD_CTRL_EVENT_WAIT 0x01040500
112 #define MR_DCMD_LD_GET_PROPERTIES 0x03030000
114 #define MR_DCMD_CLUSTER 0x08000000
115 #define MR_DCMD_CLUSTER_RESET_ALL 0x08010100
116 #define MR_DCMD_CLUSTER_RESET_LD 0x08010200
119 * MFI command completion codes
123 MFI_STAT_INVALID_CMD
= 0x01,
124 MFI_STAT_INVALID_DCMD
= 0x02,
125 MFI_STAT_INVALID_PARAMETER
= 0x03,
126 MFI_STAT_INVALID_SEQUENCE_NUMBER
= 0x04,
127 MFI_STAT_ABORT_NOT_POSSIBLE
= 0x05,
128 MFI_STAT_APP_HOST_CODE_NOT_FOUND
= 0x06,
129 MFI_STAT_APP_IN_USE
= 0x07,
130 MFI_STAT_APP_NOT_INITIALIZED
= 0x08,
131 MFI_STAT_ARRAY_INDEX_INVALID
= 0x09,
132 MFI_STAT_ARRAY_ROW_NOT_EMPTY
= 0x0a,
133 MFI_STAT_CONFIG_RESOURCE_CONFLICT
= 0x0b,
134 MFI_STAT_DEVICE_NOT_FOUND
= 0x0c,
135 MFI_STAT_DRIVE_TOO_SMALL
= 0x0d,
136 MFI_STAT_FLASH_ALLOC_FAIL
= 0x0e,
137 MFI_STAT_FLASH_BUSY
= 0x0f,
138 MFI_STAT_FLASH_ERROR
= 0x10,
139 MFI_STAT_FLASH_IMAGE_BAD
= 0x11,
140 MFI_STAT_FLASH_IMAGE_INCOMPLETE
= 0x12,
141 MFI_STAT_FLASH_NOT_OPEN
= 0x13,
142 MFI_STAT_FLASH_NOT_STARTED
= 0x14,
143 MFI_STAT_FLUSH_FAILED
= 0x15,
144 MFI_STAT_HOST_CODE_NOT_FOUNT
= 0x16,
145 MFI_STAT_LD_CC_IN_PROGRESS
= 0x17,
146 MFI_STAT_LD_INIT_IN_PROGRESS
= 0x18,
147 MFI_STAT_LD_LBA_OUT_OF_RANGE
= 0x19,
148 MFI_STAT_LD_MAX_CONFIGURED
= 0x1a,
149 MFI_STAT_LD_NOT_OPTIMAL
= 0x1b,
150 MFI_STAT_LD_RBLD_IN_PROGRESS
= 0x1c,
151 MFI_STAT_LD_RECON_IN_PROGRESS
= 0x1d,
152 MFI_STAT_LD_WRONG_RAID_LEVEL
= 0x1e,
153 MFI_STAT_MAX_SPARES_EXCEEDED
= 0x1f,
154 MFI_STAT_MEMORY_NOT_AVAILABLE
= 0x20,
155 MFI_STAT_MFC_HW_ERROR
= 0x21,
156 MFI_STAT_NO_HW_PRESENT
= 0x22,
157 MFI_STAT_NOT_FOUND
= 0x23,
158 MFI_STAT_NOT_IN_ENCL
= 0x24,
159 MFI_STAT_PD_CLEAR_IN_PROGRESS
= 0x25,
160 MFI_STAT_PD_TYPE_WRONG
= 0x26,
161 MFI_STAT_PR_DISABLED
= 0x27,
162 MFI_STAT_ROW_INDEX_INVALID
= 0x28,
163 MFI_STAT_SAS_CONFIG_INVALID_ACTION
= 0x29,
164 MFI_STAT_SAS_CONFIG_INVALID_DATA
= 0x2a,
165 MFI_STAT_SAS_CONFIG_INVALID_PAGE
= 0x2b,
166 MFI_STAT_SAS_CONFIG_INVALID_TYPE
= 0x2c,
167 MFI_STAT_SCSI_DONE_WITH_ERROR
= 0x2d,
168 MFI_STAT_SCSI_IO_FAILED
= 0x2e,
169 MFI_STAT_SCSI_RESERVATION_CONFLICT
= 0x2f,
170 MFI_STAT_SHUTDOWN_FAILED
= 0x30,
171 MFI_STAT_TIME_NOT_SET
= 0x31,
172 MFI_STAT_WRONG_STATE
= 0x32,
173 MFI_STAT_LD_OFFLINE
= 0x33,
174 MFI_STAT_PEER_NOTIFICATION_REJECTED
= 0x34,
175 MFI_STAT_PEER_NOTIFICATION_FAILED
= 0x35,
176 MFI_STAT_RESERVATION_IN_PROGRESS
= 0x36,
177 MFI_STAT_I2C_ERRORS_DETECTED
= 0x37,
178 MFI_STAT_PCI_ERRORS_DETECTED
= 0x38,
180 MFI_STAT_INVALID_STATUS
= 0xFF
184 * Number of mailbox bytes in DCMD message frame
186 #define MFI_MBOX_SIZE 12
190 MR_EVT_CLASS_DEBUG
= -2,
191 MR_EVT_CLASS_PROGRESS
= -1,
192 MR_EVT_CLASS_INFO
= 0,
193 MR_EVT_CLASS_WARNING
= 1,
194 MR_EVT_CLASS_CRITICAL
= 2,
195 MR_EVT_CLASS_FATAL
= 3,
196 MR_EVT_CLASS_DEAD
= 4,
202 MR_EVT_LOCALE_LD
= 0x0001,
203 MR_EVT_LOCALE_PD
= 0x0002,
204 MR_EVT_LOCALE_ENCL
= 0x0004,
205 MR_EVT_LOCALE_BBU
= 0x0008,
206 MR_EVT_LOCALE_SAS
= 0x0010,
207 MR_EVT_LOCALE_CTRL
= 0x0020,
208 MR_EVT_LOCALE_CONFIG
= 0x0040,
209 MR_EVT_LOCALE_CLUSTER
= 0x0080,
210 MR_EVT_LOCALE_ALL
= 0xffff,
217 MR_EVT_ARGS_CDB_SENSE
,
219 MR_EVT_ARGS_LD_COUNT
,
221 MR_EVT_ARGS_LD_OWNER
,
222 MR_EVT_ARGS_LD_LBA_PD_LBA
,
224 MR_EVT_ARGS_LD_STATE
,
225 MR_EVT_ARGS_LD_STRIP
,
229 MR_EVT_ARGS_PD_LBA_LD
,
231 MR_EVT_ARGS_PD_STATE
,
241 * SAS controller properties
243 struct megasas_ctrl_prop
{
246 u16 pred_fail_poll_interval
;
247 u16 intr_throttle_count
;
248 u16 intr_throttle_timeouts
;
254 u8 cache_flush_interval
;
260 u8 disable_auto_rebuild
;
261 u8 disable_battery_warn
;
263 u16 ecc_bucket_leak_rate
;
264 u8 restore_hotspare_on_insertion
;
265 u8 expose_encl_devices
;
268 } __attribute__ ((packed
));
271 * SAS controller information
273 struct megasas_ctrl_info
{
276 * PCI device information
286 } __attribute__ ((packed
)) pci
;
289 * Host interface information
302 } __attribute__ ((packed
)) host_interface
;
305 * Device (backend) interface information
318 } __attribute__ ((packed
)) device_interface
;
321 * List of components residing in flash. All str are null terminated
323 u32 image_check_word
;
324 u32 image_component_count
;
333 } __attribute__ ((packed
)) image_component
[8];
336 * List of flash components that have been flashed on the card, but
337 * are not in use, pending reset of the adapter. This list will be
338 * empty if a flash operation has not occurred. All stings are null
341 u32 pending_image_component_count
;
350 } __attribute__ ((packed
)) pending_image_component
[8];
357 char product_name
[80];
361 * Other physical/controller/operation information. Indicates the
362 * presence of the hardware
372 } __attribute__ ((packed
)) hw_present
;
377 * Maximum data transfer sizes
379 u16 max_concurrent_cmds
;
381 u32 max_request_size
;
384 * Logical and physical device counts
386 u16 ld_present_count
;
387 u16 ld_degraded_count
;
388 u16 ld_offline_count
;
390 u16 pd_present_count
;
391 u16 pd_disk_present_count
;
392 u16 pd_disk_pred_failure_count
;
393 u16 pd_disk_failed_count
;
396 * Memory size information
405 u16 mem_correctable_error_count
;
406 u16 mem_uncorrectable_error_count
;
409 * Cluster information
411 u8 cluster_permitted
;
415 * Additional max data transfer sizes
417 u16 max_strips_per_io
;
420 * Controller capabilities structures
431 } __attribute__ ((packed
)) raid_levels
;
441 u32 cluster_supported
:1;
443 u32 spanning_allowed
:1;
444 u32 dedicated_hotspares
:1;
445 u32 revertible_hotspares
:1;
446 u32 foreign_config_import
:1;
447 u32 self_diagnostic
:1;
448 u32 mixed_redundancy_arr
:1;
449 u32 global_hot_spares
:1;
452 } __attribute__ ((packed
)) adapter_operations
;
460 u32 disk_cache_policy
:1;
463 } __attribute__ ((packed
)) ld_operations
;
471 } __attribute__ ((packed
)) stripe_sz_ops
;
480 } __attribute__ ((packed
)) pd_operations
;
484 u32 ctrl_supports_sas
:1;
485 u32 ctrl_supports_sata
:1;
486 u32 allow_mix_in_encl
:1;
487 u32 allow_mix_in_ld
:1;
488 u32 allow_sata_in_cluster
:1;
491 } __attribute__ ((packed
)) pd_mix_support
;
494 * Define ECC single-bit-error bucket information
500 * Include the controller properties (changeable items)
502 struct megasas_ctrl_prop properties
;
505 * Define FW pkg version (set in envt v'bles on OEM basis)
507 char package_version
[0x60];
509 u8 pad
[0x800 - 0x6a0];
511 } __attribute__ ((packed
));
514 * ===============================
515 * MegaRAID SAS driver definitions
516 * ===============================
518 #define MEGASAS_MAX_PD_CHANNELS 2
519 #define MEGASAS_MAX_LD_CHANNELS 2
520 #define MEGASAS_MAX_CHANNELS (MEGASAS_MAX_PD_CHANNELS + \
521 MEGASAS_MAX_LD_CHANNELS)
522 #define MEGASAS_MAX_DEV_PER_CHANNEL 128
523 #define MEGASAS_DEFAULT_INIT_ID -1
524 #define MEGASAS_MAX_LUN 8
525 #define MEGASAS_MAX_LD 64
528 * When SCSI mid-layer calls driver's reset routine, driver waits for
529 * MEGASAS_RESET_WAIT_TIME seconds for all outstanding IO to complete. Note
530 * that the driver cannot _actually_ abort or reset pending commands. While
531 * it is waiting for the commands to complete, it prints a diagnostic message
532 * every MEGASAS_RESET_NOTICE_INTERVAL seconds
534 #define MEGASAS_RESET_WAIT_TIME 180
535 #define MEGASAS_RESET_NOTICE_INTERVAL 5
537 #define MEGASAS_IOCTL_CMD 0
540 * FW reports the maximum of number of commands that it can accept (maximum
541 * commands that can be outstanding) at any time. The driver must report a
542 * lower number to the mid layer because it can issue a few internal commands
543 * itself (E.g, AEN, abort cmd, IOCTLs etc). The number of commands it needs
546 #define MEGASAS_INT_CMDS 32
549 * FW can accept both 32 and 64 bit SGLs. We want to allocate 32/64 bit
550 * SGLs based on the size of dma_addr_t
552 #define IS_DMA64 (sizeof(dma_addr_t) == 8)
554 #define MFI_OB_INTR_STATUS_MASK 0x00000002
555 #define MFI_POLL_TIMEOUT_SECS 10
557 struct megasas_register_set
{
559 u32 reserved_0
[4]; /*0000h */
561 u32 inbound_msg_0
; /*0010h */
562 u32 inbound_msg_1
; /*0014h */
563 u32 outbound_msg_0
; /*0018h */
564 u32 outbound_msg_1
; /*001Ch */
566 u32 inbound_doorbell
; /*0020h */
567 u32 inbound_intr_status
; /*0024h */
568 u32 inbound_intr_mask
; /*0028h */
570 u32 outbound_doorbell
; /*002Ch */
571 u32 outbound_intr_status
; /*0030h */
572 u32 outbound_intr_mask
; /*0034h */
574 u32 reserved_1
[2]; /*0038h */
576 u32 inbound_queue_port
; /*0040h */
577 u32 outbound_queue_port
; /*0044h */
579 u32 reserved_2
; /*004Ch */
581 u32 index_registers
[1004]; /*0050h */
583 } __attribute__ ((packed
));
585 struct megasas_sge32
{
590 } __attribute__ ((packed
));
592 struct megasas_sge64
{
597 } __attribute__ ((packed
));
601 struct megasas_sge32 sge32
[1];
602 struct megasas_sge64 sge64
[1];
604 } __attribute__ ((packed
));
606 struct megasas_header
{
609 u8 sense_len
; /*01h */
610 u8 cmd_status
; /*02h */
611 u8 scsi_status
; /*03h */
613 u8 target_id
; /*04h */
616 u8 sge_count
; /*07h */
618 u32 context
; /*08h */
622 u16 timeout
; /*12h */
623 u32 data_xferlen
; /*14h */
625 } __attribute__ ((packed
));
627 union megasas_sgl_frame
{
629 struct megasas_sge32 sge32
[8];
630 struct megasas_sge64 sge64
[5];
632 } __attribute__ ((packed
));
634 struct megasas_init_frame
{
637 u8 reserved_0
; /*01h */
638 u8 cmd_status
; /*02h */
640 u8 reserved_1
; /*03h */
641 u32 reserved_2
; /*04h */
643 u32 context
; /*08h */
647 u16 reserved_3
; /*12h */
648 u32 data_xfer_len
; /*14h */
650 u32 queue_info_new_phys_addr_lo
; /*18h */
651 u32 queue_info_new_phys_addr_hi
; /*1Ch */
652 u32 queue_info_old_phys_addr_lo
; /*20h */
653 u32 queue_info_old_phys_addr_hi
; /*24h */
655 u32 reserved_4
[6]; /*28h */
657 } __attribute__ ((packed
));
659 struct megasas_init_queue_info
{
661 u32 init_flags
; /*00h */
662 u32 reply_queue_entries
; /*04h */
664 u32 reply_queue_start_phys_addr_lo
; /*08h */
665 u32 reply_queue_start_phys_addr_hi
; /*0Ch */
666 u32 producer_index_phys_addr_lo
; /*10h */
667 u32 producer_index_phys_addr_hi
; /*14h */
668 u32 consumer_index_phys_addr_lo
; /*18h */
669 u32 consumer_index_phys_addr_hi
; /*1Ch */
671 } __attribute__ ((packed
));
673 struct megasas_io_frame
{
676 u8 sense_len
; /*01h */
677 u8 cmd_status
; /*02h */
678 u8 scsi_status
; /*03h */
680 u8 target_id
; /*04h */
681 u8 access_byte
; /*05h */
682 u8 reserved_0
; /*06h */
683 u8 sge_count
; /*07h */
685 u32 context
; /*08h */
689 u16 timeout
; /*12h */
690 u32 lba_count
; /*14h */
692 u32 sense_buf_phys_addr_lo
; /*18h */
693 u32 sense_buf_phys_addr_hi
; /*1Ch */
695 u32 start_lba_lo
; /*20h */
696 u32 start_lba_hi
; /*24h */
698 union megasas_sgl sgl
; /*28h */
700 } __attribute__ ((packed
));
702 struct megasas_pthru_frame
{
705 u8 sense_len
; /*01h */
706 u8 cmd_status
; /*02h */
707 u8 scsi_status
; /*03h */
709 u8 target_id
; /*04h */
712 u8 sge_count
; /*07h */
714 u32 context
; /*08h */
718 u16 timeout
; /*12h */
719 u32 data_xfer_len
; /*14h */
721 u32 sense_buf_phys_addr_lo
; /*18h */
722 u32 sense_buf_phys_addr_hi
; /*1Ch */
725 union megasas_sgl sgl
; /*30h */
727 } __attribute__ ((packed
));
729 struct megasas_dcmd_frame
{
732 u8 reserved_0
; /*01h */
733 u8 cmd_status
; /*02h */
734 u8 reserved_1
[4]; /*03h */
735 u8 sge_count
; /*07h */
737 u32 context
; /*08h */
741 u16 timeout
; /*12h */
743 u32 data_xfer_len
; /*14h */
752 union megasas_sgl sgl
; /*28h */
754 } __attribute__ ((packed
));
756 struct megasas_abort_frame
{
759 u8 reserved_0
; /*01h */
760 u8 cmd_status
; /*02h */
762 u8 reserved_1
; /*03h */
763 u32 reserved_2
; /*04h */
765 u32 context
; /*08h */
769 u16 reserved_3
; /*12h */
770 u32 reserved_4
; /*14h */
772 u32 abort_context
; /*18h */
775 u32 abort_mfi_phys_addr_lo
; /*20h */
776 u32 abort_mfi_phys_addr_hi
; /*24h */
778 u32 reserved_5
[6]; /*28h */
780 } __attribute__ ((packed
));
782 struct megasas_smp_frame
{
785 u8 reserved_1
; /*01h */
786 u8 cmd_status
; /*02h */
787 u8 connection_status
; /*03h */
789 u8 reserved_2
[3]; /*04h */
790 u8 sge_count
; /*07h */
792 u32 context
; /*08h */
796 u16 timeout
; /*12h */
798 u32 data_xfer_len
; /*14h */
799 u64 sas_addr
; /*18h */
802 struct megasas_sge32 sge32
[2]; /* [0]: resp [1]: req */
803 struct megasas_sge64 sge64
[2]; /* [0]: resp [1]: req */
806 } __attribute__ ((packed
));
808 struct megasas_stp_frame
{
811 u8 reserved_1
; /*01h */
812 u8 cmd_status
; /*02h */
813 u8 reserved_2
; /*03h */
815 u8 target_id
; /*04h */
816 u8 reserved_3
[2]; /*05h */
817 u8 sge_count
; /*07h */
819 u32 context
; /*08h */
823 u16 timeout
; /*12h */
825 u32 data_xfer_len
; /*14h */
827 u16 fis
[10]; /*18h */
831 struct megasas_sge32 sge32
[2]; /* [0]: resp [1]: data */
832 struct megasas_sge64 sge64
[2]; /* [0]: resp [1]: data */
835 } __attribute__ ((packed
));
837 union megasas_frame
{
839 struct megasas_header hdr
;
840 struct megasas_init_frame init
;
841 struct megasas_io_frame io
;
842 struct megasas_pthru_frame pthru
;
843 struct megasas_dcmd_frame dcmd
;
844 struct megasas_abort_frame abort
;
845 struct megasas_smp_frame smp
;
846 struct megasas_stp_frame stp
;
853 union megasas_evt_class_locale
{
859 } __attribute__ ((packed
)) members
;
863 } __attribute__ ((packed
));
865 struct megasas_evt_log_info
{
869 u32 shutdown_seq_num
;
872 } __attribute__ ((packed
));
874 struct megasas_progress
{
879 } __attribute__ ((packed
));
881 struct megasas_evtarg_ld
{
887 } __attribute__ ((packed
));
889 struct megasas_evtarg_pd
{
894 } __attribute__ ((packed
));
896 struct megasas_evt_detail
{
901 union megasas_evt_class_locale cl
;
907 struct megasas_evtarg_pd pd
;
913 } __attribute__ ((packed
)) cdbSense
;
915 struct megasas_evtarg_ld ld
;
918 struct megasas_evtarg_ld ld
;
920 } __attribute__ ((packed
)) ld_count
;
924 struct megasas_evtarg_ld ld
;
925 } __attribute__ ((packed
)) ld_lba
;
928 struct megasas_evtarg_ld ld
;
931 } __attribute__ ((packed
)) ld_owner
;
936 struct megasas_evtarg_ld ld
;
937 struct megasas_evtarg_pd pd
;
938 } __attribute__ ((packed
)) ld_lba_pd_lba
;
941 struct megasas_evtarg_ld ld
;
942 struct megasas_progress prog
;
943 } __attribute__ ((packed
)) ld_prog
;
946 struct megasas_evtarg_ld ld
;
949 } __attribute__ ((packed
)) ld_state
;
953 struct megasas_evtarg_ld ld
;
954 } __attribute__ ((packed
)) ld_strip
;
956 struct megasas_evtarg_pd pd
;
959 struct megasas_evtarg_pd pd
;
961 } __attribute__ ((packed
)) pd_err
;
965 struct megasas_evtarg_pd pd
;
966 } __attribute__ ((packed
)) pd_lba
;
970 struct megasas_evtarg_pd pd
;
971 struct megasas_evtarg_ld ld
;
972 } __attribute__ ((packed
)) pd_lba_ld
;
975 struct megasas_evtarg_pd pd
;
976 struct megasas_progress prog
;
977 } __attribute__ ((packed
)) pd_prog
;
980 struct megasas_evtarg_pd pd
;
983 } __attribute__ ((packed
)) pd_state
;
990 } __attribute__ ((packed
)) pci
;
998 } __attribute__ ((packed
)) time
;
1004 } __attribute__ ((packed
)) ecc
;
1012 char description
[128];
1014 } __attribute__ ((packed
));
1016 struct megasas_instance
{
1019 dma_addr_t producer_h
;
1021 dma_addr_t consumer_h
;
1024 dma_addr_t reply_queue_h
;
1026 unsigned long base_addr
;
1027 struct megasas_register_set __iomem
*reg_set
;
1034 u32 max_sectors_per_req
;
1036 struct megasas_cmd
**cmd_list
;
1037 struct list_head cmd_pool
;
1038 spinlock_t cmd_pool_lock
;
1039 struct dma_pool
*frame_dma_pool
;
1040 struct dma_pool
*sense_dma_pool
;
1042 struct megasas_evt_detail
*evt_detail
;
1043 dma_addr_t evt_detail_h
;
1044 struct megasas_cmd
*aen_cmd
;
1045 struct semaphore aen_mutex
;
1046 struct semaphore ioctl_sem
;
1048 struct Scsi_Host
*host
;
1050 wait_queue_head_t int_cmd_wait_q
;
1051 wait_queue_head_t abort_cmd_wait_q
;
1053 struct pci_dev
*pdev
;
1058 spinlock_t instance_lock
;
1061 #define MEGASAS_IS_LOGICAL(scp) \
1062 (scp->device->channel < MEGASAS_MAX_PD_CHANNELS) ? 0 : 1
1064 #define MEGASAS_DEV_INDEX(inst, scp) \
1065 ((scp->device->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL) + \
1068 struct megasas_cmd
{
1070 union megasas_frame
*frame
;
1071 dma_addr_t frame_phys_addr
;
1073 dma_addr_t sense_phys_addr
;
1080 struct list_head list
;
1081 struct scsi_cmnd
*scmd
;
1082 struct megasas_instance
*instance
;
1086 #define MAX_MGMT_ADAPTERS 1024
1087 #define MAX_IOCTL_SGE 16
1089 struct megasas_iocpacket
{
1099 struct megasas_header hdr
;
1102 struct iovec sgl
[MAX_IOCTL_SGE
];
1104 } __attribute__ ((packed
));
1106 struct megasas_aen
{
1110 u32 class_locale_word
;
1111 } __attribute__ ((packed
));
1113 #ifdef CONFIG_COMPAT
1114 struct compat_megasas_iocpacket
{
1123 struct megasas_header hdr
;
1125 struct compat_iovec sgl
[MAX_IOCTL_SGE
];
1126 } __attribute__ ((packed
));
1128 #define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct compat_megasas_iocpacket)
1130 #define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct megasas_iocpacket)
1133 #define MEGASAS_IOC_GET_AEN _IOW('M', 3, struct megasas_aen)
1135 struct megasas_mgmt_info
{
1138 struct megasas_instance
*instance
[MAX_MGMT_ADAPTERS
];
1142 #endif /*LSI_MEGARAID_SAS_H */