1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005 - 2007 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
51 #include <linux/inet_lro.h>
53 #include <linux/inet.h>
55 #include <linux/ethtool.h>
56 #include <linux/firmware.h>
57 #include <linux/delay.h>
58 #include <linux/version.h>
59 #include <linux/timer.h>
60 #include <linux/vmalloc.h>
61 #include <linux/crc32.h>
62 #include <linux/moduleparam.h>
64 #include <linux/log2.h>
65 #include <net/checksum.h>
68 #include <asm/byteorder.h>
70 #include <asm/processor.h>
75 #include "myri10ge_mcp.h"
76 #include "myri10ge_mcp_gen_header.h"
78 #define MYRI10GE_VERSION_STR "1.3.2-1.287"
80 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
81 MODULE_AUTHOR("Maintainer: help@myri.com");
82 MODULE_VERSION(MYRI10GE_VERSION_STR
);
83 MODULE_LICENSE("Dual BSD/GPL");
85 #define MYRI10GE_MAX_ETHER_MTU 9014
87 #define MYRI10GE_ETH_STOPPED 0
88 #define MYRI10GE_ETH_STOPPING 1
89 #define MYRI10GE_ETH_STARTING 2
90 #define MYRI10GE_ETH_RUNNING 3
91 #define MYRI10GE_ETH_OPEN_FAILED 4
93 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
94 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
95 #define MYRI10GE_MAX_LRO_DESCRIPTORS 8
96 #define MYRI10GE_LRO_MAX_PKTS 64
98 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
99 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
101 #define MYRI10GE_ALLOC_ORDER 0
102 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
103 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
105 struct myri10ge_rx_buffer_state
{
108 DECLARE_PCI_UNMAP_ADDR(bus
)
109 DECLARE_PCI_UNMAP_LEN(len
)
112 struct myri10ge_tx_buffer_state
{
115 DECLARE_PCI_UNMAP_ADDR(bus
)
116 DECLARE_PCI_UNMAP_LEN(len
)
119 struct myri10ge_cmd
{
125 struct myri10ge_rx_buf
{
126 struct mcp_kreq_ether_recv __iomem
*lanai
; /* lanai ptr for recv ring */
127 u8 __iomem
*wc_fifo
; /* w/c rx dma addr fifo address */
128 struct mcp_kreq_ether_recv
*shadow
; /* host shadow of recv ring */
129 struct myri10ge_rx_buffer_state
*info
;
136 int mask
; /* number of rx slots -1 */
140 struct myri10ge_tx_buf
{
141 struct mcp_kreq_ether_send __iomem
*lanai
; /* lanai ptr for sendq */
142 u8 __iomem
*wc_fifo
; /* w/c send fifo address */
143 struct mcp_kreq_ether_send
*req_list
; /* host shadow of sendq */
145 struct myri10ge_tx_buffer_state
*info
;
146 int mask
; /* number of transmit slots -1 */
147 int boundary
; /* boundary transmits cannot cross */
148 int req ____cacheline_aligned
; /* transmit slots submitted */
149 int pkt_start
; /* packets started */
150 int done ____cacheline_aligned
; /* transmit slots completed */
151 int pkt_done
; /* packets completed */
154 struct myri10ge_rx_done
{
155 struct mcp_slot
*entry
;
159 struct net_lro_mgr lro_mgr
;
160 struct net_lro_desc lro_desc
[MYRI10GE_MAX_LRO_DESCRIPTORS
];
163 struct myri10ge_priv
{
164 int running
; /* running? */
165 int csum_flag
; /* rx_csums? */
166 struct myri10ge_tx_buf tx
; /* transmit ring */
167 struct myri10ge_rx_buf rx_small
;
168 struct myri10ge_rx_buf rx_big
;
169 struct myri10ge_rx_done rx_done
;
172 struct net_device
*dev
;
173 struct napi_struct napi
;
174 struct net_device_stats stats
;
177 unsigned long board_span
;
178 unsigned long iomem_base
;
179 __be32 __iomem
*irq_claim
;
180 __be32 __iomem
*irq_deassert
;
181 char *mac_addr_string
;
182 struct mcp_cmd_response
*cmd
;
184 struct mcp_irq_data
*fw_stats
;
185 dma_addr_t fw_stats_bus
;
186 struct pci_dev
*pdev
;
189 unsigned int rdma_tags_available
;
191 __be32 __iomem
*intr_coal_delay_ptr
;
197 wait_queue_head_t down_wq
;
198 struct work_struct watchdog_work
;
199 struct timer_list watchdog_timer
;
200 int watchdog_tx_done
;
207 char eeprom_strings
[MYRI10GE_EEPROM_STRINGS_SIZE
];
208 char *product_code_string
;
209 char fw_version
[128];
213 int adopted_rx_filter_bug
;
214 u8 mac_addr
[6]; /* eeprom mac address */
215 unsigned long serial_number
;
216 int vendor_specific_offset
;
217 int fw_multicast_support
;
218 unsigned long features
;
227 static char *myri10ge_fw_unaligned
= "myri10ge_ethp_z8e.dat";
228 static char *myri10ge_fw_aligned
= "myri10ge_eth_z8e.dat";
230 static char *myri10ge_fw_name
= NULL
;
231 module_param(myri10ge_fw_name
, charp
, S_IRUGO
| S_IWUSR
);
232 MODULE_PARM_DESC(myri10ge_fw_name
, "Firmware image name");
234 static int myri10ge_ecrc_enable
= 1;
235 module_param(myri10ge_ecrc_enable
, int, S_IRUGO
);
236 MODULE_PARM_DESC(myri10ge_ecrc_enable
, "Enable Extended CRC on PCI-E");
238 static int myri10ge_max_intr_slots
= 1024;
239 module_param(myri10ge_max_intr_slots
, int, S_IRUGO
);
240 MODULE_PARM_DESC(myri10ge_max_intr_slots
, "Interrupt queue slots");
242 static int myri10ge_small_bytes
= -1; /* -1 == auto */
243 module_param(myri10ge_small_bytes
, int, S_IRUGO
| S_IWUSR
);
244 MODULE_PARM_DESC(myri10ge_small_bytes
, "Threshold of small packets");
246 static int myri10ge_msi
= 1; /* enable msi by default */
247 module_param(myri10ge_msi
, int, S_IRUGO
| S_IWUSR
);
248 MODULE_PARM_DESC(myri10ge_msi
, "Enable Message Signalled Interrupts");
250 static int myri10ge_intr_coal_delay
= 75;
251 module_param(myri10ge_intr_coal_delay
, int, S_IRUGO
);
252 MODULE_PARM_DESC(myri10ge_intr_coal_delay
, "Interrupt coalescing delay");
254 static int myri10ge_flow_control
= 1;
255 module_param(myri10ge_flow_control
, int, S_IRUGO
);
256 MODULE_PARM_DESC(myri10ge_flow_control
, "Pause parameter");
258 static int myri10ge_deassert_wait
= 1;
259 module_param(myri10ge_deassert_wait
, int, S_IRUGO
| S_IWUSR
);
260 MODULE_PARM_DESC(myri10ge_deassert_wait
,
261 "Wait when deasserting legacy interrupts");
263 static int myri10ge_force_firmware
= 0;
264 module_param(myri10ge_force_firmware
, int, S_IRUGO
);
265 MODULE_PARM_DESC(myri10ge_force_firmware
,
266 "Force firmware to assume aligned completions");
268 static int myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
269 module_param(myri10ge_initial_mtu
, int, S_IRUGO
);
270 MODULE_PARM_DESC(myri10ge_initial_mtu
, "Initial MTU");
272 static int myri10ge_napi_weight
= 64;
273 module_param(myri10ge_napi_weight
, int, S_IRUGO
);
274 MODULE_PARM_DESC(myri10ge_napi_weight
, "Set NAPI weight");
276 static int myri10ge_watchdog_timeout
= 1;
277 module_param(myri10ge_watchdog_timeout
, int, S_IRUGO
);
278 MODULE_PARM_DESC(myri10ge_watchdog_timeout
, "Set watchdog timeout");
280 static int myri10ge_max_irq_loops
= 1048576;
281 module_param(myri10ge_max_irq_loops
, int, S_IRUGO
);
282 MODULE_PARM_DESC(myri10ge_max_irq_loops
,
283 "Set stuck legacy IRQ detection threshold");
285 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
287 static int myri10ge_debug
= -1; /* defaults above */
288 module_param(myri10ge_debug
, int, 0);
289 MODULE_PARM_DESC(myri10ge_debug
, "Debug level (0=none,...,16=all)");
291 static int myri10ge_lro
= 1;
292 module_param(myri10ge_lro
, int, S_IRUGO
);
293 MODULE_PARM_DESC(myri10ge_lro
, "Enable large receive offload");
295 static int myri10ge_lro_max_pkts
= MYRI10GE_LRO_MAX_PKTS
;
296 module_param(myri10ge_lro_max_pkts
, int, S_IRUGO
);
297 MODULE_PARM_DESC(myri10ge_lro_max_pkts
,
298 "Number of LRO packets to be aggregated");
300 static int myri10ge_fill_thresh
= 256;
301 module_param(myri10ge_fill_thresh
, int, S_IRUGO
| S_IWUSR
);
302 MODULE_PARM_DESC(myri10ge_fill_thresh
, "Number of empty rx slots allowed");
304 static int myri10ge_reset_recover
= 1;
306 static int myri10ge_wcfifo
= 0;
307 module_param(myri10ge_wcfifo
, int, S_IRUGO
);
308 MODULE_PARM_DESC(myri10ge_wcfifo
, "Enable WC Fifo when WC is enabled");
310 #define MYRI10GE_FW_OFFSET 1024*1024
311 #define MYRI10GE_HIGHPART_TO_U32(X) \
312 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
313 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
315 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
317 static void myri10ge_set_multicast_list(struct net_device
*dev
);
318 static int myri10ge_sw_tso(struct sk_buff
*skb
, struct net_device
*dev
);
320 static inline void put_be32(__be32 val
, __be32 __iomem
* p
)
322 __raw_writel((__force __u32
) val
, (__force
void __iomem
*)p
);
326 myri10ge_send_cmd(struct myri10ge_priv
*mgp
, u32 cmd
,
327 struct myri10ge_cmd
*data
, int atomic
)
330 char buf_bytes
[sizeof(*buf
) + 8];
331 struct mcp_cmd_response
*response
= mgp
->cmd
;
332 char __iomem
*cmd_addr
= mgp
->sram
+ MXGEFW_ETH_CMD
;
333 u32 dma_low
, dma_high
, result
, value
;
336 /* ensure buf is aligned to 8 bytes */
337 buf
= (struct mcp_cmd
*)ALIGN((unsigned long)buf_bytes
, 8);
339 buf
->data0
= htonl(data
->data0
);
340 buf
->data1
= htonl(data
->data1
);
341 buf
->data2
= htonl(data
->data2
);
342 buf
->cmd
= htonl(cmd
);
343 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
344 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
346 buf
->response_addr
.low
= htonl(dma_low
);
347 buf
->response_addr
.high
= htonl(dma_high
);
348 response
->result
= htonl(MYRI10GE_NO_RESPONSE_RESULT
);
350 myri10ge_pio_copy(cmd_addr
, buf
, sizeof(*buf
));
352 /* wait up to 15ms. Longest command is the DMA benchmark,
353 * which is capped at 5ms, but runs from a timeout handler
354 * that runs every 7.8ms. So a 15ms timeout leaves us with
358 /* if atomic is set, do not sleep,
359 * and try to get the completion quickly
360 * (1ms will be enough for those commands) */
361 for (sleep_total
= 0;
363 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
369 /* use msleep for most command */
370 for (sleep_total
= 0;
372 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
377 result
= ntohl(response
->result
);
378 value
= ntohl(response
->data
);
379 if (result
!= MYRI10GE_NO_RESPONSE_RESULT
) {
383 } else if (result
== MXGEFW_CMD_UNKNOWN
) {
385 } else if (result
== MXGEFW_CMD_ERROR_UNALIGNED
) {
388 dev_err(&mgp
->pdev
->dev
,
389 "command %d failed, result = %d\n",
395 dev_err(&mgp
->pdev
->dev
, "command %d timed out, result = %d\n",
401 * The eeprom strings on the lanaiX have the format
404 * PT:ddd mmm xx xx:xx:xx xx\0
405 * PV:ddd mmm xx xx:xx:xx xx\0
407 static int myri10ge_read_mac_addr(struct myri10ge_priv
*mgp
)
412 ptr
= mgp
->eeprom_strings
;
413 limit
= mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
;
415 while (*ptr
!= '\0' && ptr
< limit
) {
416 if (memcmp(ptr
, "MAC=", 4) == 0) {
418 mgp
->mac_addr_string
= ptr
;
419 for (i
= 0; i
< 6; i
++) {
420 if ((ptr
+ 2) > limit
)
423 simple_strtoul(ptr
, &ptr
, 16);
427 if (memcmp(ptr
, "PC=", 3) == 0) {
429 mgp
->product_code_string
= ptr
;
431 if (memcmp((const void *)ptr
, "SN=", 3) == 0) {
433 mgp
->serial_number
= simple_strtoul(ptr
, &ptr
, 10);
435 while (ptr
< limit
&& *ptr
++) ;
441 dev_err(&mgp
->pdev
->dev
, "failed to parse eeprom_strings\n");
446 * Enable or disable periodic RDMAs from the host to make certain
447 * chipsets resend dropped PCIe messages
450 static void myri10ge_dummy_rdma(struct myri10ge_priv
*mgp
, int enable
)
452 char __iomem
*submit
;
453 __be32 buf
[16] __attribute__ ((__aligned__(8)));
454 u32 dma_low
, dma_high
;
457 /* clear confirmation addr */
461 /* send a rdma command to the PCIe engine, and wait for the
462 * response in the confirmation address. The firmware should
463 * write a -1 there to indicate it is alive and well
465 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
466 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
468 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
469 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
470 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
471 buf
[3] = htonl(dma_high
); /* dummy addr MSW */
472 buf
[4] = htonl(dma_low
); /* dummy addr LSW */
473 buf
[5] = htonl(enable
); /* enable? */
475 submit
= mgp
->sram
+ MXGEFW_BOOT_DUMMY_RDMA
;
477 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
478 for (i
= 0; mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20; i
++)
480 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
)
481 dev_err(&mgp
->pdev
->dev
, "dummy rdma %s failed\n",
482 (enable
? "enable" : "disable"));
486 myri10ge_validate_firmware(struct myri10ge_priv
*mgp
,
487 struct mcp_gen_header
*hdr
)
489 struct device
*dev
= &mgp
->pdev
->dev
;
491 /* check firmware type */
492 if (ntohl(hdr
->mcp_type
) != MCP_TYPE_ETH
) {
493 dev_err(dev
, "Bad firmware type: 0x%x\n", ntohl(hdr
->mcp_type
));
497 /* save firmware version for ethtool */
498 strncpy(mgp
->fw_version
, hdr
->version
, sizeof(mgp
->fw_version
));
500 sscanf(mgp
->fw_version
, "%d.%d.%d", &mgp
->fw_ver_major
,
501 &mgp
->fw_ver_minor
, &mgp
->fw_ver_tiny
);
503 if (!(mgp
->fw_ver_major
== MXGEFW_VERSION_MAJOR
504 && mgp
->fw_ver_minor
== MXGEFW_VERSION_MINOR
)) {
505 dev_err(dev
, "Found firmware version %s\n", mgp
->fw_version
);
506 dev_err(dev
, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR
,
507 MXGEFW_VERSION_MINOR
);
513 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv
*mgp
, u32
* size
)
515 unsigned crc
, reread_crc
;
516 const struct firmware
*fw
;
517 struct device
*dev
= &mgp
->pdev
->dev
;
518 struct mcp_gen_header
*hdr
;
523 if ((status
= request_firmware(&fw
, mgp
->fw_name
, dev
)) < 0) {
524 dev_err(dev
, "Unable to load %s firmware image via hotplug\n",
527 goto abort_with_nothing
;
532 if (fw
->size
>= mgp
->sram_size
- MYRI10GE_FW_OFFSET
||
533 fw
->size
< MCP_HEADER_PTR_OFFSET
+ 4) {
534 dev_err(dev
, "Firmware size invalid:%d\n", (int)fw
->size
);
540 hdr_offset
= ntohl(*(__be32
*) (fw
->data
+ MCP_HEADER_PTR_OFFSET
));
541 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > fw
->size
) {
542 dev_err(dev
, "Bad firmware file\n");
546 hdr
= (void *)(fw
->data
+ hdr_offset
);
548 status
= myri10ge_validate_firmware(mgp
, hdr
);
552 crc
= crc32(~0, fw
->data
, fw
->size
);
553 for (i
= 0; i
< fw
->size
; i
+= 256) {
554 myri10ge_pio_copy(mgp
->sram
+ MYRI10GE_FW_OFFSET
+ i
,
556 min(256U, (unsigned)(fw
->size
- i
)));
560 /* corruption checking is good for parity recovery and buggy chipset */
561 memcpy_fromio(fw
->data
, mgp
->sram
+ MYRI10GE_FW_OFFSET
, fw
->size
);
562 reread_crc
= crc32(~0, fw
->data
, fw
->size
);
563 if (crc
!= reread_crc
) {
564 dev_err(dev
, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
565 (unsigned)fw
->size
, reread_crc
, crc
);
569 *size
= (u32
) fw
->size
;
572 release_firmware(fw
);
578 static int myri10ge_adopt_running_firmware(struct myri10ge_priv
*mgp
)
580 struct mcp_gen_header
*hdr
;
581 struct device
*dev
= &mgp
->pdev
->dev
;
582 const size_t bytes
= sizeof(struct mcp_gen_header
);
586 /* find running firmware header */
587 hdr_offset
= swab32(readl(mgp
->sram
+ MCP_HEADER_PTR_OFFSET
));
589 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > mgp
->sram_size
) {
590 dev_err(dev
, "Running firmware has bad header offset (%d)\n",
595 /* copy header of running firmware from SRAM to host memory to
596 * validate firmware */
597 hdr
= kmalloc(bytes
, GFP_KERNEL
);
599 dev_err(dev
, "could not malloc firmware hdr\n");
602 memcpy_fromio(hdr
, mgp
->sram
+ hdr_offset
, bytes
);
603 status
= myri10ge_validate_firmware(mgp
, hdr
);
606 /* check to see if adopted firmware has bug where adopting
607 * it will cause broadcasts to be filtered unless the NIC
608 * is kept in ALLMULTI mode */
609 if (mgp
->fw_ver_major
== 1 && mgp
->fw_ver_minor
== 4 &&
610 mgp
->fw_ver_tiny
>= 4 && mgp
->fw_ver_tiny
<= 11) {
611 mgp
->adopted_rx_filter_bug
= 1;
612 dev_warn(dev
, "Adopting fw %d.%d.%d: "
613 "working around rx filter bug\n",
614 mgp
->fw_ver_major
, mgp
->fw_ver_minor
,
620 static int myri10ge_load_firmware(struct myri10ge_priv
*mgp
)
622 char __iomem
*submit
;
623 __be32 buf
[16] __attribute__ ((__aligned__(8)));
624 u32 dma_low
, dma_high
, size
;
626 struct myri10ge_cmd cmd
;
629 status
= myri10ge_load_hotplug_firmware(mgp
, &size
);
631 dev_warn(&mgp
->pdev
->dev
, "hotplug firmware loading failed\n");
633 /* Do not attempt to adopt firmware if there
638 status
= myri10ge_adopt_running_firmware(mgp
);
640 dev_err(&mgp
->pdev
->dev
,
641 "failed to adopt running firmware\n");
644 dev_info(&mgp
->pdev
->dev
,
645 "Successfully adopted running firmware\n");
646 if (mgp
->tx
.boundary
== 4096) {
647 dev_warn(&mgp
->pdev
->dev
,
648 "Using firmware currently running on NIC"
650 dev_warn(&mgp
->pdev
->dev
,
651 "performance consider loading optimized "
653 dev_warn(&mgp
->pdev
->dev
, "via hotplug\n");
656 mgp
->fw_name
= "adopted";
657 mgp
->tx
.boundary
= 2048;
661 /* clear confirmation addr */
665 /* send a reload command to the bootstrap MCP, and wait for the
666 * response in the confirmation address. The firmware should
667 * write a -1 there to indicate it is alive and well
669 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
670 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
672 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
673 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
674 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
676 /* FIX: All newest firmware should un-protect the bottom of
677 * the sram before handoff. However, the very first interfaces
678 * do not. Therefore the handoff copy must skip the first 8 bytes
680 buf
[3] = htonl(MYRI10GE_FW_OFFSET
+ 8); /* where the code starts */
681 buf
[4] = htonl(size
- 8); /* length of code */
682 buf
[5] = htonl(8); /* where to copy to */
683 buf
[6] = htonl(0); /* where to jump to */
685 submit
= mgp
->sram
+ MXGEFW_BOOT_HANDOFF
;
687 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
692 while (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 9) {
696 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
) {
697 dev_err(&mgp
->pdev
->dev
, "handoff failed\n");
700 dev_info(&mgp
->pdev
->dev
, "handoff confirmed\n");
701 myri10ge_dummy_rdma(mgp
, 1);
703 /* probe for IPv6 TSO support */
704 mgp
->features
= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_TSO
;
705 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_MAX_TSO6_HDR_SIZE
,
708 mgp
->max_tso6
= cmd
.data0
;
709 mgp
->features
|= NETIF_F_TSO6
;
714 static int myri10ge_update_mac_address(struct myri10ge_priv
*mgp
, u8
* addr
)
716 struct myri10ge_cmd cmd
;
719 cmd
.data0
= ((addr
[0] << 24) | (addr
[1] << 16)
720 | (addr
[2] << 8) | addr
[3]);
722 cmd
.data1
= ((addr
[4] << 8) | (addr
[5]));
724 status
= myri10ge_send_cmd(mgp
, MXGEFW_SET_MAC_ADDRESS
, &cmd
, 0);
728 static int myri10ge_change_pause(struct myri10ge_priv
*mgp
, int pause
)
730 struct myri10ge_cmd cmd
;
733 ctl
= pause
? MXGEFW_ENABLE_FLOW_CONTROL
: MXGEFW_DISABLE_FLOW_CONTROL
;
734 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, 0);
738 "myri10ge: %s: Failed to set flow control mode\n",
747 myri10ge_change_promisc(struct myri10ge_priv
*mgp
, int promisc
, int atomic
)
749 struct myri10ge_cmd cmd
;
752 ctl
= promisc
? MXGEFW_ENABLE_PROMISC
: MXGEFW_DISABLE_PROMISC
;
753 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, atomic
);
755 printk(KERN_ERR
"myri10ge: %s: Failed to set promisc mode\n",
759 static int myri10ge_dma_test(struct myri10ge_priv
*mgp
, int test_type
)
761 struct myri10ge_cmd cmd
;
764 struct page
*dmatest_page
;
765 dma_addr_t dmatest_bus
;
768 dmatest_page
= alloc_page(GFP_KERNEL
);
771 dmatest_bus
= pci_map_page(mgp
->pdev
, dmatest_page
, 0, PAGE_SIZE
,
774 /* Run a small DMA test.
775 * The magic multipliers to the length tell the firmware
776 * to do DMA read, write, or read+write tests. The
777 * results are returned in cmd.data0. The upper 16
778 * bits or the return is the number of transfers completed.
779 * The lower 16 bits is the time in 0.5us ticks that the
780 * transfers took to complete.
783 len
= mgp
->tx
.boundary
;
785 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(dmatest_bus
);
786 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(dmatest_bus
);
787 cmd
.data2
= len
* 0x10000;
788 status
= myri10ge_send_cmd(mgp
, test_type
, &cmd
, 0);
793 mgp
->read_dma
= ((cmd
.data0
>> 16) * len
* 2) / (cmd
.data0
& 0xffff);
794 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(dmatest_bus
);
795 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(dmatest_bus
);
796 cmd
.data2
= len
* 0x1;
797 status
= myri10ge_send_cmd(mgp
, test_type
, &cmd
, 0);
802 mgp
->write_dma
= ((cmd
.data0
>> 16) * len
* 2) / (cmd
.data0
& 0xffff);
804 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(dmatest_bus
);
805 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(dmatest_bus
);
806 cmd
.data2
= len
* 0x10001;
807 status
= myri10ge_send_cmd(mgp
, test_type
, &cmd
, 0);
812 mgp
->read_write_dma
= ((cmd
.data0
>> 16) * len
* 2 * 2) /
813 (cmd
.data0
& 0xffff);
816 pci_unmap_page(mgp
->pdev
, dmatest_bus
, PAGE_SIZE
, DMA_BIDIRECTIONAL
);
817 put_page(dmatest_page
);
819 if (status
!= 0 && test_type
!= MXGEFW_CMD_UNALIGNED_TEST
)
820 dev_warn(&mgp
->pdev
->dev
, "DMA %s benchmark failed: %d\n",
826 static int myri10ge_reset(struct myri10ge_priv
*mgp
)
828 struct myri10ge_cmd cmd
;
832 /* try to send a reset command to the card to see if it
834 memset(&cmd
, 0, sizeof(cmd
));
835 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_RESET
, &cmd
, 0);
837 dev_err(&mgp
->pdev
->dev
, "failed reset\n");
841 (void)myri10ge_dma_test(mgp
, MXGEFW_DMA_TEST
);
843 /* Now exchange information about interrupts */
845 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
846 memset(mgp
->rx_done
.entry
, 0, bytes
);
847 cmd
.data0
= (u32
) bytes
;
848 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_SIZE
, &cmd
, 0);
849 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
850 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
851 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_DMA
, &cmd
, 0);
854 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_ACK_OFFSET
, &cmd
, 0);
855 mgp
->irq_claim
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
856 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET
,
858 mgp
->irq_deassert
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
860 status
|= myri10ge_send_cmd
861 (mgp
, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET
, &cmd
, 0);
862 mgp
->intr_coal_delay_ptr
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
864 dev_err(&mgp
->pdev
->dev
, "failed set interrupt parameters\n");
867 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
869 memset(mgp
->rx_done
.entry
, 0, bytes
);
871 /* reset mcp/driver shared state back to 0 */
874 mgp
->tx
.pkt_start
= 0;
875 mgp
->tx
.pkt_done
= 0;
877 mgp
->rx_small
.cnt
= 0;
878 mgp
->rx_done
.idx
= 0;
879 mgp
->rx_done
.cnt
= 0;
880 mgp
->link_changes
= 0;
881 status
= myri10ge_update_mac_address(mgp
, mgp
->dev
->dev_addr
);
882 myri10ge_change_pause(mgp
, mgp
->pause
);
883 myri10ge_set_multicast_list(mgp
->dev
);
888 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem
* dst
,
889 struct mcp_kreq_ether_recv
*src
)
894 src
->addr_low
= htonl(DMA_32BIT_MASK
);
895 myri10ge_pio_copy(dst
, src
, 4 * sizeof(*src
));
897 myri10ge_pio_copy(dst
+ 4, src
+ 4, 4 * sizeof(*src
));
900 put_be32(low
, &dst
->addr_low
);
904 static inline void myri10ge_vlan_ip_csum(struct sk_buff
*skb
, __wsum hw_csum
)
906 struct vlan_hdr
*vh
= (struct vlan_hdr
*)(skb
->data
);
908 if ((skb
->protocol
== htons(ETH_P_8021Q
)) &&
909 (vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IP
) ||
910 vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IPV6
))) {
912 skb
->ip_summed
= CHECKSUM_COMPLETE
;
917 myri10ge_rx_skb_build(struct sk_buff
*skb
, u8
* va
,
918 struct skb_frag_struct
*rx_frags
, int len
, int hlen
)
920 struct skb_frag_struct
*skb_frags
;
922 skb
->len
= skb
->data_len
= len
;
923 skb
->truesize
= len
+ sizeof(struct sk_buff
);
924 /* attach the page(s) */
926 skb_frags
= skb_shinfo(skb
)->frags
;
928 memcpy(skb_frags
, rx_frags
, sizeof(*skb_frags
));
929 len
-= rx_frags
->size
;
932 skb_shinfo(skb
)->nr_frags
++;
935 /* pskb_may_pull is not available in irq context, but
936 * skb_pull() (for ether_pad and eth_type_trans()) requires
937 * the beginning of the packet in skb_headlen(), move it
939 skb_copy_to_linear_data(skb
, va
, hlen
);
940 skb_shinfo(skb
)->frags
[0].page_offset
+= hlen
;
941 skb_shinfo(skb
)->frags
[0].size
-= hlen
;
942 skb
->data_len
-= hlen
;
944 skb_pull(skb
, MXGEFW_PAD
);
948 myri10ge_alloc_rx_pages(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
949 int bytes
, int watchdog
)
954 if (unlikely(rx
->watchdog_needed
&& !watchdog
))
957 /* try to refill entire ring */
958 while (rx
->fill_cnt
!= (rx
->cnt
+ rx
->mask
+ 1)) {
959 idx
= rx
->fill_cnt
& rx
->mask
;
960 if (rx
->page_offset
+ bytes
<= MYRI10GE_ALLOC_SIZE
) {
961 /* we can use part of previous page */
964 /* we need a new page */
966 alloc_pages(GFP_ATOMIC
| __GFP_COMP
,
967 MYRI10GE_ALLOC_ORDER
);
968 if (unlikely(page
== NULL
)) {
969 if (rx
->fill_cnt
- rx
->cnt
< 16)
970 rx
->watchdog_needed
= 1;
975 rx
->bus
= pci_map_page(mgp
->pdev
, page
, 0,
979 rx
->info
[idx
].page
= rx
->page
;
980 rx
->info
[idx
].page_offset
= rx
->page_offset
;
981 /* note that this is the address of the start of the
983 pci_unmap_addr_set(&rx
->info
[idx
], bus
, rx
->bus
);
984 rx
->shadow
[idx
].addr_low
=
985 htonl(MYRI10GE_LOWPART_TO_U32(rx
->bus
) + rx
->page_offset
);
986 rx
->shadow
[idx
].addr_high
=
987 htonl(MYRI10GE_HIGHPART_TO_U32(rx
->bus
));
989 /* start next packet on a cacheline boundary */
990 rx
->page_offset
+= SKB_DATA_ALIGN(bytes
);
992 #if MYRI10GE_ALLOC_SIZE > 4096
993 /* don't cross a 4KB boundary */
994 if ((rx
->page_offset
>> 12) !=
995 ((rx
->page_offset
+ bytes
- 1) >> 12))
996 rx
->page_offset
= (rx
->page_offset
+ 4096) & ~4095;
1000 /* copy 8 descriptors to the firmware at a time */
1001 if ((idx
& 7) == 7) {
1002 if (rx
->wc_fifo
== NULL
)
1003 myri10ge_submit_8rx(&rx
->lanai
[idx
- 7],
1004 &rx
->shadow
[idx
- 7]);
1007 myri10ge_pio_copy(rx
->wc_fifo
,
1008 &rx
->shadow
[idx
- 7], 64);
1015 myri10ge_unmap_rx_page(struct pci_dev
*pdev
,
1016 struct myri10ge_rx_buffer_state
*info
, int bytes
)
1018 /* unmap the recvd page if we're the only or last user of it */
1019 if (bytes
>= MYRI10GE_ALLOC_SIZE
/ 2 ||
1020 (info
->page_offset
+ 2 * bytes
) > MYRI10GE_ALLOC_SIZE
) {
1021 pci_unmap_page(pdev
, (pci_unmap_addr(info
, bus
)
1022 & ~(MYRI10GE_ALLOC_SIZE
- 1)),
1023 MYRI10GE_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
1027 #define MYRI10GE_HLEN 64 /* The number of bytes to copy from a
1028 * page into an skb */
1031 myri10ge_rx_done(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
1032 int bytes
, int len
, __wsum csum
)
1034 struct sk_buff
*skb
;
1035 struct skb_frag_struct rx_frags
[MYRI10GE_MAX_FRAGS_PER_FRAME
];
1036 int i
, idx
, hlen
, remainder
;
1037 struct pci_dev
*pdev
= mgp
->pdev
;
1038 struct net_device
*dev
= mgp
->dev
;
1042 idx
= rx
->cnt
& rx
->mask
;
1043 va
= page_address(rx
->info
[idx
].page
) + rx
->info
[idx
].page_offset
;
1045 /* Fill skb_frag_struct(s) with data from our receive */
1046 for (i
= 0, remainder
= len
; remainder
> 0; i
++) {
1047 myri10ge_unmap_rx_page(pdev
, &rx
->info
[idx
], bytes
);
1048 rx_frags
[i
].page
= rx
->info
[idx
].page
;
1049 rx_frags
[i
].page_offset
= rx
->info
[idx
].page_offset
;
1050 if (remainder
< MYRI10GE_ALLOC_SIZE
)
1051 rx_frags
[i
].size
= remainder
;
1053 rx_frags
[i
].size
= MYRI10GE_ALLOC_SIZE
;
1055 idx
= rx
->cnt
& rx
->mask
;
1056 remainder
-= MYRI10GE_ALLOC_SIZE
;
1059 if (mgp
->csum_flag
&& myri10ge_lro
) {
1060 rx_frags
[0].page_offset
+= MXGEFW_PAD
;
1061 rx_frags
[0].size
-= MXGEFW_PAD
;
1063 lro_receive_frags(&mgp
->rx_done
.lro_mgr
, rx_frags
,
1065 /* opaque, will come back in get_frag_header */
1066 (void *)(__force
unsigned long)csum
,
1071 hlen
= MYRI10GE_HLEN
> len
? len
: MYRI10GE_HLEN
;
1073 /* allocate an skb to attach the page(s) to. This is done
1074 * after trying LRO, so as to avoid skb allocation overheads */
1076 skb
= netdev_alloc_skb(dev
, MYRI10GE_HLEN
+ 16);
1077 if (unlikely(skb
== NULL
)) {
1078 mgp
->stats
.rx_dropped
++;
1081 put_page(rx_frags
[i
].page
);
1086 /* Attach the pages to the skb, and trim off any padding */
1087 myri10ge_rx_skb_build(skb
, va
, rx_frags
, len
, hlen
);
1088 if (skb_shinfo(skb
)->frags
[0].size
<= 0) {
1089 put_page(skb_shinfo(skb
)->frags
[0].page
);
1090 skb_shinfo(skb
)->nr_frags
= 0;
1092 skb
->protocol
= eth_type_trans(skb
, dev
);
1094 if (mgp
->csum_flag
) {
1095 if ((skb
->protocol
== htons(ETH_P_IP
)) ||
1096 (skb
->protocol
== htons(ETH_P_IPV6
))) {
1098 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1100 myri10ge_vlan_ip_csum(skb
, csum
);
1102 netif_receive_skb(skb
);
1103 dev
->last_rx
= jiffies
;
1107 static inline void myri10ge_tx_done(struct myri10ge_priv
*mgp
, int mcp_index
)
1109 struct pci_dev
*pdev
= mgp
->pdev
;
1110 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1111 struct sk_buff
*skb
;
1114 while (tx
->pkt_done
!= mcp_index
) {
1115 idx
= tx
->done
& tx
->mask
;
1116 skb
= tx
->info
[idx
].skb
;
1119 tx
->info
[idx
].skb
= NULL
;
1120 if (tx
->info
[idx
].last
) {
1122 tx
->info
[idx
].last
= 0;
1125 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1126 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1128 mgp
->stats
.tx_bytes
+= skb
->len
;
1129 mgp
->stats
.tx_packets
++;
1130 dev_kfree_skb_irq(skb
);
1132 pci_unmap_single(pdev
,
1133 pci_unmap_addr(&tx
->info
[idx
],
1138 pci_unmap_page(pdev
,
1139 pci_unmap_addr(&tx
->info
[idx
],
1144 /* start the queue if we've stopped it */
1145 if (netif_queue_stopped(mgp
->dev
)
1146 && tx
->req
- tx
->done
< (tx
->mask
>> 1)) {
1148 netif_wake_queue(mgp
->dev
);
1152 static inline int myri10ge_clean_rx_done(struct myri10ge_priv
*mgp
, int budget
)
1154 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1155 unsigned long rx_bytes
= 0;
1156 unsigned long rx_packets
= 0;
1157 unsigned long rx_ok
;
1159 int idx
= rx_done
->idx
;
1160 int cnt
= rx_done
->cnt
;
1165 while (rx_done
->entry
[idx
].length
!= 0 && work_done
< budget
) {
1166 length
= ntohs(rx_done
->entry
[idx
].length
);
1167 rx_done
->entry
[idx
].length
= 0;
1168 checksum
= csum_unfold(rx_done
->entry
[idx
].checksum
);
1169 if (length
<= mgp
->small_bytes
)
1170 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_small
,
1174 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_big
,
1177 rx_packets
+= rx_ok
;
1178 rx_bytes
+= rx_ok
* (unsigned long)length
;
1180 idx
= cnt
& (myri10ge_max_intr_slots
- 1);
1185 mgp
->stats
.rx_packets
+= rx_packets
;
1186 mgp
->stats
.rx_bytes
+= rx_bytes
;
1189 lro_flush_all(&rx_done
->lro_mgr
);
1191 /* restock receive rings if needed */
1192 if (mgp
->rx_small
.fill_cnt
- mgp
->rx_small
.cnt
< myri10ge_fill_thresh
)
1193 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
1194 mgp
->small_bytes
+ MXGEFW_PAD
, 0);
1195 if (mgp
->rx_big
.fill_cnt
- mgp
->rx_big
.cnt
< myri10ge_fill_thresh
)
1196 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 0);
1201 static inline void myri10ge_check_statblock(struct myri10ge_priv
*mgp
)
1203 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1205 if (unlikely(stats
->stats_updated
)) {
1206 unsigned link_up
= ntohl(stats
->link_up
);
1207 if (mgp
->link_state
!= link_up
) {
1208 mgp
->link_state
= link_up
;
1210 if (mgp
->link_state
== MXGEFW_LINK_UP
) {
1211 if (netif_msg_link(mgp
))
1213 "myri10ge: %s: link up\n",
1215 netif_carrier_on(mgp
->dev
);
1216 mgp
->link_changes
++;
1218 if (netif_msg_link(mgp
))
1220 "myri10ge: %s: link %s\n",
1222 (link_up
== MXGEFW_LINK_MYRINET
?
1223 "mismatch (Myrinet detected)" :
1225 netif_carrier_off(mgp
->dev
);
1226 mgp
->link_changes
++;
1229 if (mgp
->rdma_tags_available
!=
1230 ntohl(mgp
->fw_stats
->rdma_tags_available
)) {
1231 mgp
->rdma_tags_available
=
1232 ntohl(mgp
->fw_stats
->rdma_tags_available
);
1233 printk(KERN_WARNING
"myri10ge: %s: RDMA timed out! "
1234 "%d tags left\n", mgp
->dev
->name
,
1235 mgp
->rdma_tags_available
);
1237 mgp
->down_cnt
+= stats
->link_down
;
1238 if (stats
->link_down
)
1239 wake_up(&mgp
->down_wq
);
1243 static int myri10ge_poll(struct napi_struct
*napi
, int budget
)
1245 struct myri10ge_priv
*mgp
=
1246 container_of(napi
, struct myri10ge_priv
, napi
);
1247 struct net_device
*netdev
= mgp
->dev
;
1250 /* process as many rx events as NAPI will allow */
1251 work_done
= myri10ge_clean_rx_done(mgp
, budget
);
1253 if (work_done
< budget
) {
1254 netif_rx_complete(netdev
, napi
);
1255 put_be32(htonl(3), mgp
->irq_claim
);
1260 static irqreturn_t
myri10ge_intr(int irq
, void *arg
)
1262 struct myri10ge_priv
*mgp
= arg
;
1263 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1264 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1265 u32 send_done_count
;
1268 /* make sure it is our IRQ, and that the DMA has finished */
1269 if (unlikely(!stats
->valid
))
1272 /* low bit indicates receives are present, so schedule
1273 * napi poll handler */
1274 if (stats
->valid
& 1)
1275 netif_rx_schedule(mgp
->dev
, &mgp
->napi
);
1277 if (!mgp
->msi_enabled
) {
1278 put_be32(0, mgp
->irq_deassert
);
1279 if (!myri10ge_deassert_wait
)
1285 /* Wait for IRQ line to go low, if using INTx */
1289 /* check for transmit completes and receives */
1290 send_done_count
= ntohl(stats
->send_done_count
);
1291 if (send_done_count
!= tx
->pkt_done
)
1292 myri10ge_tx_done(mgp
, (int)send_done_count
);
1293 if (unlikely(i
> myri10ge_max_irq_loops
)) {
1294 printk(KERN_WARNING
"myri10ge: %s: irq stuck?\n",
1297 schedule_work(&mgp
->watchdog_work
);
1299 if (likely(stats
->valid
== 0))
1305 myri10ge_check_statblock(mgp
);
1307 put_be32(htonl(3), mgp
->irq_claim
+ 1);
1308 return (IRQ_HANDLED
);
1312 myri10ge_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
1314 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1318 cmd
->autoneg
= AUTONEG_DISABLE
;
1319 cmd
->speed
= SPEED_10000
;
1320 cmd
->duplex
= DUPLEX_FULL
;
1323 * parse the product code to deterimine the interface type
1324 * (CX4, XFP, Quad Ribbon Fiber) by looking at the character
1325 * after the 3rd dash in the driver's cached copy of the
1326 * EEPROM's product code string.
1328 ptr
= mgp
->product_code_string
;
1330 printk(KERN_ERR
"myri10ge: %s: Missing product code\n",
1334 for (i
= 0; i
< 3; i
++, ptr
++) {
1335 ptr
= strchr(ptr
, '-');
1337 printk(KERN_ERR
"myri10ge: %s: Invalid product "
1338 "code %s\n", netdev
->name
,
1339 mgp
->product_code_string
);
1343 if (*ptr
== 'R' || *ptr
== 'Q') {
1344 /* We've found either an XFP or quad ribbon fiber */
1345 cmd
->port
= PORT_FIBRE
;
1351 myri10ge_get_drvinfo(struct net_device
*netdev
, struct ethtool_drvinfo
*info
)
1353 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1355 strlcpy(info
->driver
, "myri10ge", sizeof(info
->driver
));
1356 strlcpy(info
->version
, MYRI10GE_VERSION_STR
, sizeof(info
->version
));
1357 strlcpy(info
->fw_version
, mgp
->fw_version
, sizeof(info
->fw_version
));
1358 strlcpy(info
->bus_info
, pci_name(mgp
->pdev
), sizeof(info
->bus_info
));
1362 myri10ge_get_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1364 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1365 coal
->rx_coalesce_usecs
= mgp
->intr_coal_delay
;
1370 myri10ge_set_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1372 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1374 mgp
->intr_coal_delay
= coal
->rx_coalesce_usecs
;
1375 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
1380 myri10ge_get_pauseparam(struct net_device
*netdev
,
1381 struct ethtool_pauseparam
*pause
)
1383 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1386 pause
->rx_pause
= mgp
->pause
;
1387 pause
->tx_pause
= mgp
->pause
;
1391 myri10ge_set_pauseparam(struct net_device
*netdev
,
1392 struct ethtool_pauseparam
*pause
)
1394 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1396 if (pause
->tx_pause
!= mgp
->pause
)
1397 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1398 if (pause
->rx_pause
!= mgp
->pause
)
1399 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1400 if (pause
->autoneg
!= 0)
1406 myri10ge_get_ringparam(struct net_device
*netdev
,
1407 struct ethtool_ringparam
*ring
)
1409 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1411 ring
->rx_mini_max_pending
= mgp
->rx_small
.mask
+ 1;
1412 ring
->rx_max_pending
= mgp
->rx_big
.mask
+ 1;
1413 ring
->rx_jumbo_max_pending
= 0;
1414 ring
->tx_max_pending
= mgp
->rx_small
.mask
+ 1;
1415 ring
->rx_mini_pending
= ring
->rx_mini_max_pending
;
1416 ring
->rx_pending
= ring
->rx_max_pending
;
1417 ring
->rx_jumbo_pending
= ring
->rx_jumbo_max_pending
;
1418 ring
->tx_pending
= ring
->tx_max_pending
;
1421 static u32
myri10ge_get_rx_csum(struct net_device
*netdev
)
1423 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1430 static int myri10ge_set_rx_csum(struct net_device
*netdev
, u32 csum_enabled
)
1432 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1434 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
1440 static int myri10ge_set_tso(struct net_device
*netdev
, u32 tso_enabled
)
1442 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1443 unsigned long flags
= mgp
->features
& (NETIF_F_TSO6
| NETIF_F_TSO
);
1446 netdev
->features
|= flags
;
1448 netdev
->features
&= ~flags
;
1452 static const char myri10ge_gstrings_stats
[][ETH_GSTRING_LEN
] = {
1453 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1454 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1455 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1456 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1457 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1458 "tx_heartbeat_errors", "tx_window_errors",
1459 /* device-specific stats */
1460 "tx_boundary", "WC", "irq", "MSI",
1461 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1462 "serial_number", "tx_pkt_start", "tx_pkt_done",
1463 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1464 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1465 "link_changes", "link_up", "dropped_link_overflow",
1466 "dropped_link_error_or_filtered",
1467 "dropped_pause", "dropped_bad_phy", "dropped_bad_crc32",
1468 "dropped_unicast_filtered", "dropped_multicast_filtered",
1469 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1470 "dropped_no_big_buffer", "LRO aggregated", "LRO flushed",
1471 "LRO avg aggr", "LRO no_desc"
1474 #define MYRI10GE_NET_STATS_LEN 21
1475 #define MYRI10GE_STATS_LEN ARRAY_SIZE(myri10ge_gstrings_stats)
1478 myri10ge_get_strings(struct net_device
*netdev
, u32 stringset
, u8
* data
)
1480 switch (stringset
) {
1482 memcpy(data
, *myri10ge_gstrings_stats
,
1483 sizeof(myri10ge_gstrings_stats
));
1488 static int myri10ge_get_sset_count(struct net_device
*netdev
, int sset
)
1492 return MYRI10GE_STATS_LEN
;
1499 myri10ge_get_ethtool_stats(struct net_device
*netdev
,
1500 struct ethtool_stats
*stats
, u64
* data
)
1502 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1505 for (i
= 0; i
< MYRI10GE_NET_STATS_LEN
; i
++)
1506 data
[i
] = ((unsigned long *)&mgp
->stats
)[i
];
1508 data
[i
++] = (unsigned int)mgp
->tx
.boundary
;
1509 data
[i
++] = (unsigned int)mgp
->wc_enabled
;
1510 data
[i
++] = (unsigned int)mgp
->pdev
->irq
;
1511 data
[i
++] = (unsigned int)mgp
->msi_enabled
;
1512 data
[i
++] = (unsigned int)mgp
->read_dma
;
1513 data
[i
++] = (unsigned int)mgp
->write_dma
;
1514 data
[i
++] = (unsigned int)mgp
->read_write_dma
;
1515 data
[i
++] = (unsigned int)mgp
->serial_number
;
1516 data
[i
++] = (unsigned int)mgp
->tx
.pkt_start
;
1517 data
[i
++] = (unsigned int)mgp
->tx
.pkt_done
;
1518 data
[i
++] = (unsigned int)mgp
->tx
.req
;
1519 data
[i
++] = (unsigned int)mgp
->tx
.done
;
1520 data
[i
++] = (unsigned int)mgp
->rx_small
.cnt
;
1521 data
[i
++] = (unsigned int)mgp
->rx_big
.cnt
;
1522 data
[i
++] = (unsigned int)mgp
->wake_queue
;
1523 data
[i
++] = (unsigned int)mgp
->stop_queue
;
1524 data
[i
++] = (unsigned int)mgp
->watchdog_resets
;
1525 data
[i
++] = (unsigned int)mgp
->tx_linearized
;
1526 data
[i
++] = (unsigned int)mgp
->link_changes
;
1527 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->link_up
);
1528 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_overflow
);
1530 (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_error_or_filtered
);
1531 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_pause
);
1532 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_bad_phy
);
1533 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_bad_crc32
);
1535 (unsigned int)ntohl(mgp
->fw_stats
->dropped_unicast_filtered
);
1537 (unsigned int)ntohl(mgp
->fw_stats
->dropped_multicast_filtered
);
1538 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_runt
);
1539 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_overrun
);
1540 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_small_buffer
);
1541 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_big_buffer
);
1542 data
[i
++] = mgp
->rx_done
.lro_mgr
.stats
.aggregated
;
1543 data
[i
++] = mgp
->rx_done
.lro_mgr
.stats
.flushed
;
1544 if (mgp
->rx_done
.lro_mgr
.stats
.flushed
)
1545 data
[i
++] = mgp
->rx_done
.lro_mgr
.stats
.aggregated
/
1546 mgp
->rx_done
.lro_mgr
.stats
.flushed
;
1549 data
[i
++] = mgp
->rx_done
.lro_mgr
.stats
.no_desc
;
1552 static void myri10ge_set_msglevel(struct net_device
*netdev
, u32 value
)
1554 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1555 mgp
->msg_enable
= value
;
1558 static u32
myri10ge_get_msglevel(struct net_device
*netdev
)
1560 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1561 return mgp
->msg_enable
;
1564 static const struct ethtool_ops myri10ge_ethtool_ops
= {
1565 .get_settings
= myri10ge_get_settings
,
1566 .get_drvinfo
= myri10ge_get_drvinfo
,
1567 .get_coalesce
= myri10ge_get_coalesce
,
1568 .set_coalesce
= myri10ge_set_coalesce
,
1569 .get_pauseparam
= myri10ge_get_pauseparam
,
1570 .set_pauseparam
= myri10ge_set_pauseparam
,
1571 .get_ringparam
= myri10ge_get_ringparam
,
1572 .get_rx_csum
= myri10ge_get_rx_csum
,
1573 .set_rx_csum
= myri10ge_set_rx_csum
,
1574 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
1575 .set_sg
= ethtool_op_set_sg
,
1576 .set_tso
= myri10ge_set_tso
,
1577 .get_link
= ethtool_op_get_link
,
1578 .get_strings
= myri10ge_get_strings
,
1579 .get_sset_count
= myri10ge_get_sset_count
,
1580 .get_ethtool_stats
= myri10ge_get_ethtool_stats
,
1581 .set_msglevel
= myri10ge_set_msglevel
,
1582 .get_msglevel
= myri10ge_get_msglevel
1585 static int myri10ge_allocate_rings(struct net_device
*dev
)
1587 struct myri10ge_priv
*mgp
;
1588 struct myri10ge_cmd cmd
;
1589 int tx_ring_size
, rx_ring_size
;
1590 int tx_ring_entries
, rx_ring_entries
;
1594 mgp
= netdev_priv(dev
);
1596 /* get ring sizes */
1598 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_RING_SIZE
, &cmd
, 0);
1599 tx_ring_size
= cmd
.data0
;
1600 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_RX_RING_SIZE
, &cmd
, 0);
1603 rx_ring_size
= cmd
.data0
;
1605 tx_ring_entries
= tx_ring_size
/ sizeof(struct mcp_kreq_ether_send
);
1606 rx_ring_entries
= rx_ring_size
/ sizeof(struct mcp_dma_addr
);
1607 mgp
->tx
.mask
= tx_ring_entries
- 1;
1608 mgp
->rx_small
.mask
= mgp
->rx_big
.mask
= rx_ring_entries
- 1;
1612 /* allocate the host shadow rings */
1614 bytes
= 8 + (MYRI10GE_MAX_SEND_DESC_TSO
+ 4)
1615 * sizeof(*mgp
->tx
.req_list
);
1616 mgp
->tx
.req_bytes
= kzalloc(bytes
, GFP_KERNEL
);
1617 if (mgp
->tx
.req_bytes
== NULL
)
1618 goto abort_with_nothing
;
1620 /* ensure req_list entries are aligned to 8 bytes */
1621 mgp
->tx
.req_list
= (struct mcp_kreq_ether_send
*)
1622 ALIGN((unsigned long)mgp
->tx
.req_bytes
, 8);
1624 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.shadow
);
1625 mgp
->rx_small
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1626 if (mgp
->rx_small
.shadow
== NULL
)
1627 goto abort_with_tx_req_bytes
;
1629 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.shadow
);
1630 mgp
->rx_big
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1631 if (mgp
->rx_big
.shadow
== NULL
)
1632 goto abort_with_rx_small_shadow
;
1634 /* allocate the host info rings */
1636 bytes
= tx_ring_entries
* sizeof(*mgp
->tx
.info
);
1637 mgp
->tx
.info
= kzalloc(bytes
, GFP_KERNEL
);
1638 if (mgp
->tx
.info
== NULL
)
1639 goto abort_with_rx_big_shadow
;
1641 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.info
);
1642 mgp
->rx_small
.info
= kzalloc(bytes
, GFP_KERNEL
);
1643 if (mgp
->rx_small
.info
== NULL
)
1644 goto abort_with_tx_info
;
1646 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.info
);
1647 mgp
->rx_big
.info
= kzalloc(bytes
, GFP_KERNEL
);
1648 if (mgp
->rx_big
.info
== NULL
)
1649 goto abort_with_rx_small_info
;
1651 /* Fill the receive rings */
1652 mgp
->rx_big
.cnt
= 0;
1653 mgp
->rx_small
.cnt
= 0;
1654 mgp
->rx_big
.fill_cnt
= 0;
1655 mgp
->rx_small
.fill_cnt
= 0;
1656 mgp
->rx_small
.page_offset
= MYRI10GE_ALLOC_SIZE
;
1657 mgp
->rx_big
.page_offset
= MYRI10GE_ALLOC_SIZE
;
1658 mgp
->rx_small
.watchdog_needed
= 0;
1659 mgp
->rx_big
.watchdog_needed
= 0;
1660 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
1661 mgp
->small_bytes
+ MXGEFW_PAD
, 0);
1663 if (mgp
->rx_small
.fill_cnt
< mgp
->rx_small
.mask
+ 1) {
1664 printk(KERN_ERR
"myri10ge: %s: alloced only %d small bufs\n",
1665 dev
->name
, mgp
->rx_small
.fill_cnt
);
1666 goto abort_with_rx_small_ring
;
1669 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 0);
1670 if (mgp
->rx_big
.fill_cnt
< mgp
->rx_big
.mask
+ 1) {
1671 printk(KERN_ERR
"myri10ge: %s: alloced only %d big bufs\n",
1672 dev
->name
, mgp
->rx_big
.fill_cnt
);
1673 goto abort_with_rx_big_ring
;
1678 abort_with_rx_big_ring
:
1679 for (i
= mgp
->rx_big
.cnt
; i
< mgp
->rx_big
.fill_cnt
; i
++) {
1680 int idx
= i
& mgp
->rx_big
.mask
;
1681 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_big
.info
[idx
],
1683 put_page(mgp
->rx_big
.info
[idx
].page
);
1686 abort_with_rx_small_ring
:
1687 for (i
= mgp
->rx_small
.cnt
; i
< mgp
->rx_small
.fill_cnt
; i
++) {
1688 int idx
= i
& mgp
->rx_small
.mask
;
1689 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_small
.info
[idx
],
1690 mgp
->small_bytes
+ MXGEFW_PAD
);
1691 put_page(mgp
->rx_small
.info
[idx
].page
);
1694 kfree(mgp
->rx_big
.info
);
1696 abort_with_rx_small_info
:
1697 kfree(mgp
->rx_small
.info
);
1700 kfree(mgp
->tx
.info
);
1702 abort_with_rx_big_shadow
:
1703 kfree(mgp
->rx_big
.shadow
);
1705 abort_with_rx_small_shadow
:
1706 kfree(mgp
->rx_small
.shadow
);
1708 abort_with_tx_req_bytes
:
1709 kfree(mgp
->tx
.req_bytes
);
1710 mgp
->tx
.req_bytes
= NULL
;
1711 mgp
->tx
.req_list
= NULL
;
1717 static void myri10ge_free_rings(struct net_device
*dev
)
1719 struct myri10ge_priv
*mgp
;
1720 struct sk_buff
*skb
;
1721 struct myri10ge_tx_buf
*tx
;
1724 mgp
= netdev_priv(dev
);
1726 for (i
= mgp
->rx_big
.cnt
; i
< mgp
->rx_big
.fill_cnt
; i
++) {
1727 idx
= i
& mgp
->rx_big
.mask
;
1728 if (i
== mgp
->rx_big
.fill_cnt
- 1)
1729 mgp
->rx_big
.info
[idx
].page_offset
= MYRI10GE_ALLOC_SIZE
;
1730 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_big
.info
[idx
],
1732 put_page(mgp
->rx_big
.info
[idx
].page
);
1735 for (i
= mgp
->rx_small
.cnt
; i
< mgp
->rx_small
.fill_cnt
; i
++) {
1736 idx
= i
& mgp
->rx_small
.mask
;
1737 if (i
== mgp
->rx_small
.fill_cnt
- 1)
1738 mgp
->rx_small
.info
[idx
].page_offset
=
1739 MYRI10GE_ALLOC_SIZE
;
1740 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_small
.info
[idx
],
1741 mgp
->small_bytes
+ MXGEFW_PAD
);
1742 put_page(mgp
->rx_small
.info
[idx
].page
);
1745 while (tx
->done
!= tx
->req
) {
1746 idx
= tx
->done
& tx
->mask
;
1747 skb
= tx
->info
[idx
].skb
;
1750 tx
->info
[idx
].skb
= NULL
;
1752 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1753 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1755 mgp
->stats
.tx_dropped
++;
1756 dev_kfree_skb_any(skb
);
1758 pci_unmap_single(mgp
->pdev
,
1759 pci_unmap_addr(&tx
->info
[idx
],
1764 pci_unmap_page(mgp
->pdev
,
1765 pci_unmap_addr(&tx
->info
[idx
],
1770 kfree(mgp
->rx_big
.info
);
1772 kfree(mgp
->rx_small
.info
);
1774 kfree(mgp
->tx
.info
);
1776 kfree(mgp
->rx_big
.shadow
);
1778 kfree(mgp
->rx_small
.shadow
);
1780 kfree(mgp
->tx
.req_bytes
);
1781 mgp
->tx
.req_bytes
= NULL
;
1782 mgp
->tx
.req_list
= NULL
;
1785 static int myri10ge_request_irq(struct myri10ge_priv
*mgp
)
1787 struct pci_dev
*pdev
= mgp
->pdev
;
1791 status
= pci_enable_msi(pdev
);
1794 "Error %d setting up MSI; falling back to xPIC\n",
1797 mgp
->msi_enabled
= 1;
1799 mgp
->msi_enabled
= 0;
1801 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
1802 mgp
->dev
->name
, mgp
);
1804 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
1805 if (mgp
->msi_enabled
)
1806 pci_disable_msi(pdev
);
1811 static void myri10ge_free_irq(struct myri10ge_priv
*mgp
)
1813 struct pci_dev
*pdev
= mgp
->pdev
;
1815 free_irq(pdev
->irq
, mgp
);
1816 if (mgp
->msi_enabled
)
1817 pci_disable_msi(pdev
);
1821 myri10ge_get_frag_header(struct skb_frag_struct
*frag
, void **mac_hdr
,
1822 void **ip_hdr
, void **tcpudp_hdr
,
1823 u64
* hdr_flags
, void *priv
)
1826 struct vlan_ethhdr
*veh
;
1828 u8
*va
= page_address(frag
->page
) + frag
->page_offset
;
1829 unsigned long ll_hlen
;
1830 /* passed opaque through lro_receive_frags() */
1831 __wsum csum
= (__force __wsum
) (unsigned long)priv
;
1833 /* find the mac header, aborting if not IPv4 */
1835 eh
= (struct ethhdr
*)va
;
1838 if (eh
->h_proto
!= htons(ETH_P_IP
)) {
1839 if (eh
->h_proto
== htons(ETH_P_8021Q
)) {
1840 veh
= (struct vlan_ethhdr
*)va
;
1841 if (veh
->h_vlan_encapsulated_proto
!= htons(ETH_P_IP
))
1844 ll_hlen
+= VLAN_HLEN
;
1847 * HW checksum starts ETH_HLEN bytes into
1848 * frame, so we must subtract off the VLAN
1849 * header's checksum before csum can be used
1851 csum
= csum_sub(csum
, csum_partial(va
+ ETH_HLEN
,
1857 *hdr_flags
= LRO_IPV4
;
1859 iph
= (struct iphdr
*)(va
+ ll_hlen
);
1861 if (iph
->protocol
!= IPPROTO_TCP
)
1863 *hdr_flags
|= LRO_TCP
;
1864 *tcpudp_hdr
= (u8
*) (*ip_hdr
) + (iph
->ihl
<< 2);
1866 /* verify the IP checksum */
1867 if (unlikely(ip_fast_csum((u8
*) iph
, iph
->ihl
)))
1870 /* verify the checksum */
1871 if (unlikely(csum_tcpudp_magic(iph
->saddr
, iph
->daddr
,
1872 ntohs(iph
->tot_len
) - (iph
->ihl
<< 2),
1873 IPPROTO_TCP
, csum
)))
1879 static int myri10ge_open(struct net_device
*dev
)
1881 struct myri10ge_priv
*mgp
;
1882 struct myri10ge_cmd cmd
;
1883 struct net_lro_mgr
*lro_mgr
;
1884 int status
, big_pow2
;
1886 mgp
= netdev_priv(dev
);
1888 if (mgp
->running
!= MYRI10GE_ETH_STOPPED
)
1891 mgp
->running
= MYRI10GE_ETH_STARTING
;
1892 status
= myri10ge_reset(mgp
);
1894 printk(KERN_ERR
"myri10ge: %s: failed reset\n", dev
->name
);
1895 goto abort_with_nothing
;
1898 status
= myri10ge_request_irq(mgp
);
1900 goto abort_with_nothing
;
1902 /* decide what small buffer size to use. For good TCP rx
1903 * performance, it is important to not receive 1514 byte
1904 * frames into jumbo buffers, as it confuses the socket buffer
1905 * accounting code, leading to drops and erratic performance.
1908 if (dev
->mtu
<= ETH_DATA_LEN
)
1909 /* enough for a TCP header */
1910 mgp
->small_bytes
= (128 > SMP_CACHE_BYTES
)
1911 ? (128 - MXGEFW_PAD
)
1912 : (SMP_CACHE_BYTES
- MXGEFW_PAD
);
1914 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
1915 mgp
->small_bytes
= VLAN_ETH_FRAME_LEN
;
1917 /* Override the small buffer size? */
1918 if (myri10ge_small_bytes
> 0)
1919 mgp
->small_bytes
= myri10ge_small_bytes
;
1921 /* get the lanai pointers to the send and receive rings */
1923 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_OFFSET
, &cmd
, 0);
1925 (struct mcp_kreq_ether_send __iomem
*)(mgp
->sram
+ cmd
.data0
);
1928 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SMALL_RX_OFFSET
, &cmd
, 0);
1929 mgp
->rx_small
.lanai
=
1930 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1932 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_BIG_RX_OFFSET
, &cmd
, 0);
1934 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1938 "myri10ge: %s: failed to get ring sizes or locations\n",
1940 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1941 goto abort_with_irq
;
1944 if (myri10ge_wcfifo
&& mgp
->wc_enabled
) {
1945 mgp
->tx
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_SEND_4
;
1946 mgp
->rx_small
.wc_fifo
=
1947 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_SMALL
;
1948 mgp
->rx_big
.wc_fifo
=
1949 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_BIG
;
1951 mgp
->tx
.wc_fifo
= NULL
;
1952 mgp
->rx_small
.wc_fifo
= NULL
;
1953 mgp
->rx_big
.wc_fifo
= NULL
;
1956 /* Firmware needs the big buff size as a power of 2. Lie and
1957 * tell him the buffer is larger, because we only use 1
1958 * buffer/pkt, and the mtu will prevent overruns.
1960 big_pow2
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ MXGEFW_PAD
;
1961 if (big_pow2
< MYRI10GE_ALLOC_SIZE
/ 2) {
1962 while (!is_power_of_2(big_pow2
))
1964 mgp
->big_bytes
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ MXGEFW_PAD
;
1966 big_pow2
= MYRI10GE_ALLOC_SIZE
;
1967 mgp
->big_bytes
= big_pow2
;
1970 status
= myri10ge_allocate_rings(dev
);
1972 goto abort_with_irq
;
1974 /* now give firmware buffers sizes, and MTU */
1975 cmd
.data0
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
;
1976 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_MTU
, &cmd
, 0);
1977 cmd
.data0
= mgp
->small_bytes
;
1979 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE
, &cmd
, 0);
1980 cmd
.data0
= big_pow2
;
1982 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_BIG_BUFFER_SIZE
, &cmd
, 0);
1984 printk(KERN_ERR
"myri10ge: %s: Couldn't set buffer sizes\n",
1986 goto abort_with_rings
;
1989 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->fw_stats_bus
);
1990 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->fw_stats_bus
);
1991 cmd
.data2
= sizeof(struct mcp_irq_data
);
1992 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_STATS_DMA_V2
, &cmd
, 0);
1993 if (status
== -ENOSYS
) {
1994 dma_addr_t bus
= mgp
->fw_stats_bus
;
1995 bus
+= offsetof(struct mcp_irq_data
, send_done_count
);
1996 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(bus
);
1997 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(bus
);
1998 status
= myri10ge_send_cmd(mgp
,
1999 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE
,
2001 /* Firmware cannot support multicast without STATS_DMA_V2 */
2002 mgp
->fw_multicast_support
= 0;
2004 mgp
->fw_multicast_support
= 1;
2007 printk(KERN_ERR
"myri10ge: %s: Couldn't set stats DMA\n",
2009 goto abort_with_rings
;
2012 mgp
->link_state
= ~0U;
2013 mgp
->rdma_tags_available
= 15;
2015 lro_mgr
= &mgp
->rx_done
.lro_mgr
;
2017 lro_mgr
->features
= LRO_F_NAPI
;
2018 lro_mgr
->ip_summed
= CHECKSUM_COMPLETE
;
2019 lro_mgr
->ip_summed_aggr
= CHECKSUM_UNNECESSARY
;
2020 lro_mgr
->max_desc
= MYRI10GE_MAX_LRO_DESCRIPTORS
;
2021 lro_mgr
->lro_arr
= mgp
->rx_done
.lro_desc
;
2022 lro_mgr
->get_frag_header
= myri10ge_get_frag_header
;
2023 lro_mgr
->max_aggr
= myri10ge_lro_max_pkts
;
2024 lro_mgr
->frag_align_pad
= 2;
2025 if (lro_mgr
->max_aggr
> MAX_SKB_FRAGS
)
2026 lro_mgr
->max_aggr
= MAX_SKB_FRAGS
;
2028 napi_enable(&mgp
->napi
); /* must happen prior to any irq */
2030 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_UP
, &cmd
, 0);
2032 printk(KERN_ERR
"myri10ge: %s: Couldn't bring up link\n",
2034 goto abort_with_rings
;
2037 mgp
->wake_queue
= 0;
2038 mgp
->stop_queue
= 0;
2039 mgp
->running
= MYRI10GE_ETH_RUNNING
;
2040 mgp
->watchdog_timer
.expires
= jiffies
+ myri10ge_watchdog_timeout
* HZ
;
2041 add_timer(&mgp
->watchdog_timer
);
2042 netif_wake_queue(dev
);
2046 myri10ge_free_rings(dev
);
2049 myri10ge_free_irq(mgp
);
2052 mgp
->running
= MYRI10GE_ETH_STOPPED
;
2056 static int myri10ge_close(struct net_device
*dev
)
2058 struct myri10ge_priv
*mgp
;
2059 struct myri10ge_cmd cmd
;
2060 int status
, old_down_cnt
;
2062 mgp
= netdev_priv(dev
);
2064 if (mgp
->running
!= MYRI10GE_ETH_RUNNING
)
2067 if (mgp
->tx
.req_bytes
== NULL
)
2070 del_timer_sync(&mgp
->watchdog_timer
);
2071 mgp
->running
= MYRI10GE_ETH_STOPPING
;
2072 napi_disable(&mgp
->napi
);
2073 netif_carrier_off(dev
);
2074 netif_stop_queue(dev
);
2075 old_down_cnt
= mgp
->down_cnt
;
2077 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_DOWN
, &cmd
, 0);
2079 printk(KERN_ERR
"myri10ge: %s: Couldn't bring down link\n",
2082 wait_event_timeout(mgp
->down_wq
, old_down_cnt
!= mgp
->down_cnt
, HZ
);
2083 if (old_down_cnt
== mgp
->down_cnt
)
2084 printk(KERN_ERR
"myri10ge: %s never got down irq\n", dev
->name
);
2086 netif_tx_disable(dev
);
2087 myri10ge_free_irq(mgp
);
2088 myri10ge_free_rings(dev
);
2090 mgp
->running
= MYRI10GE_ETH_STOPPED
;
2094 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
2095 * backwards one at a time and handle ring wraps */
2098 myri10ge_submit_req_backwards(struct myri10ge_tx_buf
*tx
,
2099 struct mcp_kreq_ether_send
*src
, int cnt
)
2101 int idx
, starting_slot
;
2102 starting_slot
= tx
->req
;
2105 idx
= (starting_slot
+ cnt
) & tx
->mask
;
2106 myri10ge_pio_copy(&tx
->lanai
[idx
], &src
[cnt
], sizeof(*src
));
2112 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
2113 * at most 32 bytes at a time, so as to avoid involving the software
2114 * pio handler in the nic. We re-write the first segment's flags
2115 * to mark them valid only after writing the entire chain.
2119 myri10ge_submit_req(struct myri10ge_tx_buf
*tx
, struct mcp_kreq_ether_send
*src
,
2123 struct mcp_kreq_ether_send __iomem
*dstp
, *dst
;
2124 struct mcp_kreq_ether_send
*srcp
;
2127 idx
= tx
->req
& tx
->mask
;
2129 last_flags
= src
->flags
;
2132 dst
= dstp
= &tx
->lanai
[idx
];
2135 if ((idx
+ cnt
) < tx
->mask
) {
2136 for (i
= 0; i
< (cnt
- 1); i
+= 2) {
2137 myri10ge_pio_copy(dstp
, srcp
, 2 * sizeof(*src
));
2138 mb(); /* force write every 32 bytes */
2143 /* submit all but the first request, and ensure
2144 * that it is submitted below */
2145 myri10ge_submit_req_backwards(tx
, src
, cnt
);
2149 /* submit the first request */
2150 myri10ge_pio_copy(dstp
, srcp
, sizeof(*src
));
2151 mb(); /* barrier before setting valid flag */
2154 /* re-write the last 32-bits with the valid flags */
2155 src
->flags
= last_flags
;
2156 put_be32(*((__be32
*) src
+ 3), (__be32 __iomem
*) dst
+ 3);
2162 myri10ge_submit_req_wc(struct myri10ge_tx_buf
*tx
,
2163 struct mcp_kreq_ether_send
*src
, int cnt
)
2168 myri10ge_pio_copy(tx
->wc_fifo
, src
, 64);
2174 /* pad it to 64 bytes. The src is 64 bytes bigger than it
2175 * needs to be so that we don't overrun it */
2176 myri10ge_pio_copy(tx
->wc_fifo
+ MXGEFW_ETH_SEND_OFFSET(cnt
),
2183 * Transmit a packet. We need to split the packet so that a single
2184 * segment does not cross myri10ge->tx.boundary, so this makes segment
2185 * counting tricky. So rather than try to count segments up front, we
2186 * just give up if there are too few segments to hold a reasonably
2187 * fragmented packet currently available. If we run
2188 * out of segments while preparing a packet for DMA, we just linearize
2192 static int myri10ge_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2194 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2195 struct mcp_kreq_ether_send
*req
;
2196 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
2197 struct skb_frag_struct
*frag
;
2200 __be32 high_swapped
;
2202 int idx
, last_idx
, avail
, frag_cnt
, frag_idx
, count
, mss
, max_segments
;
2203 u16 pseudo_hdr_offset
, cksum_offset
;
2204 int cum_len
, seglen
, boundary
, rdma_count
;
2209 avail
= tx
->mask
- 1 - (tx
->req
- tx
->done
);
2212 max_segments
= MXGEFW_MAX_SEND_DESC
;
2214 if (skb_is_gso(skb
)) {
2215 mss
= skb_shinfo(skb
)->gso_size
;
2216 max_segments
= MYRI10GE_MAX_SEND_DESC_TSO
;
2219 if ((unlikely(avail
< max_segments
))) {
2220 /* we are out of transmit resources */
2222 netif_stop_queue(dev
);
2226 /* Setup checksum offloading, if needed */
2228 pseudo_hdr_offset
= 0;
2230 flags
= (MXGEFW_FLAGS_NO_TSO
| MXGEFW_FLAGS_FIRST
);
2231 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
2232 cksum_offset
= skb_transport_offset(skb
);
2233 pseudo_hdr_offset
= cksum_offset
+ skb
->csum_offset
;
2234 /* If the headers are excessively large, then we must
2235 * fall back to a software checksum */
2236 if (unlikely(!mss
&& (cksum_offset
> 255 ||
2237 pseudo_hdr_offset
> 127))) {
2238 if (skb_checksum_help(skb
))
2241 pseudo_hdr_offset
= 0;
2243 odd_flag
= MXGEFW_FLAGS_ALIGN_ODD
;
2244 flags
|= MXGEFW_FLAGS_CKSUM
;
2250 if (mss
) { /* TSO */
2251 /* this removes any CKSUM flag from before */
2252 flags
= (MXGEFW_FLAGS_TSO_HDR
| MXGEFW_FLAGS_FIRST
);
2254 /* negative cum_len signifies to the
2255 * send loop that we are still in the
2256 * header portion of the TSO packet.
2257 * TSO header can be at most 1KB long */
2258 cum_len
= -(skb_transport_offset(skb
) + tcp_hdrlen(skb
));
2260 /* for IPv6 TSO, the checksum offset stores the
2261 * TCP header length, to save the firmware from
2262 * the need to parse the headers */
2263 if (skb_is_gso_v6(skb
)) {
2264 cksum_offset
= tcp_hdrlen(skb
);
2265 /* Can only handle headers <= max_tso6 long */
2266 if (unlikely(-cum_len
> mgp
->max_tso6
))
2267 return myri10ge_sw_tso(skb
, dev
);
2269 /* for TSO, pseudo_hdr_offset holds mss.
2270 * The firmware figures out where to put
2271 * the checksum by parsing the header. */
2272 pseudo_hdr_offset
= mss
;
2274 /* Mark small packets, and pad out tiny packets */
2275 if (skb
->len
<= MXGEFW_SEND_SMALL_SIZE
) {
2276 flags
|= MXGEFW_FLAGS_SMALL
;
2278 /* pad frames to at least ETH_ZLEN bytes */
2279 if (unlikely(skb
->len
< ETH_ZLEN
)) {
2280 if (skb_padto(skb
, ETH_ZLEN
)) {
2281 /* The packet is gone, so we must
2283 mgp
->stats
.tx_dropped
+= 1;
2286 /* adjust the len to account for the zero pad
2287 * so that the nic can know how long it is */
2288 skb
->len
= ETH_ZLEN
;
2292 /* map the skb for DMA */
2293 len
= skb
->len
- skb
->data_len
;
2294 idx
= tx
->req
& tx
->mask
;
2295 tx
->info
[idx
].skb
= skb
;
2296 bus
= pci_map_single(mgp
->pdev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2297 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2298 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2300 frag_cnt
= skb_shinfo(skb
)->nr_frags
;
2305 /* "rdma_count" is the number of RDMAs belonging to the
2306 * current packet BEFORE the current send request. For
2307 * non-TSO packets, this is equal to "count".
2308 * For TSO packets, rdma_count needs to be reset
2309 * to 0 after a segment cut.
2311 * The rdma_count field of the send request is
2312 * the number of RDMAs of the packet starting at
2313 * that request. For TSO send requests with one ore more cuts
2314 * in the middle, this is the number of RDMAs starting
2315 * after the last cut in the request. All previous
2316 * segments before the last cut implicitly have 1 RDMA.
2318 * Since the number of RDMAs is not known beforehand,
2319 * it must be filled-in retroactively - after each
2320 * segmentation cut or at the end of the entire packet.
2324 /* Break the SKB or Fragment up into pieces which
2325 * do not cross mgp->tx.boundary */
2326 low
= MYRI10GE_LOWPART_TO_U32(bus
);
2327 high_swapped
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
2332 if (unlikely(count
== max_segments
))
2333 goto abort_linearize
;
2335 boundary
= (low
+ tx
->boundary
) & ~(tx
->boundary
- 1);
2336 seglen
= boundary
- low
;
2339 flags_next
= flags
& ~MXGEFW_FLAGS_FIRST
;
2340 cum_len_next
= cum_len
+ seglen
;
2341 if (mss
) { /* TSO */
2342 (req
- rdma_count
)->rdma_count
= rdma_count
+ 1;
2344 if (likely(cum_len
>= 0)) { /* payload */
2345 int next_is_first
, chop
;
2347 chop
= (cum_len_next
> mss
);
2348 cum_len_next
= cum_len_next
% mss
;
2349 next_is_first
= (cum_len_next
== 0);
2350 flags
|= chop
* MXGEFW_FLAGS_TSO_CHOP
;
2351 flags_next
|= next_is_first
*
2353 rdma_count
|= -(chop
| next_is_first
);
2354 rdma_count
+= chop
& !next_is_first
;
2355 } else if (likely(cum_len_next
>= 0)) { /* header ends */
2361 small
= (mss
<= MXGEFW_SEND_SMALL_SIZE
);
2362 flags_next
= MXGEFW_FLAGS_TSO_PLD
|
2363 MXGEFW_FLAGS_FIRST
|
2364 (small
* MXGEFW_FLAGS_SMALL
);
2367 req
->addr_high
= high_swapped
;
2368 req
->addr_low
= htonl(low
);
2369 req
->pseudo_hdr_offset
= htons(pseudo_hdr_offset
);
2370 req
->pad
= 0; /* complete solid 16-byte block; does this matter? */
2371 req
->rdma_count
= 1;
2372 req
->length
= htons(seglen
);
2373 req
->cksum_offset
= cksum_offset
;
2374 req
->flags
= flags
| ((cum_len
& 1) * odd_flag
);
2378 cum_len
= cum_len_next
;
2383 if (cksum_offset
!= 0 && !(mss
&& skb_is_gso_v6(skb
))) {
2384 if (unlikely(cksum_offset
> seglen
))
2385 cksum_offset
-= seglen
;
2390 if (frag_idx
== frag_cnt
)
2393 /* map next fragment for DMA */
2394 idx
= (count
+ tx
->req
) & tx
->mask
;
2395 frag
= &skb_shinfo(skb
)->frags
[frag_idx
];
2398 bus
= pci_map_page(mgp
->pdev
, frag
->page
, frag
->page_offset
,
2399 len
, PCI_DMA_TODEVICE
);
2400 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2401 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2404 (req
- rdma_count
)->rdma_count
= rdma_count
;
2408 req
->flags
|= MXGEFW_FLAGS_TSO_LAST
;
2409 } while (!(req
->flags
& (MXGEFW_FLAGS_TSO_CHOP
|
2410 MXGEFW_FLAGS_FIRST
)));
2411 idx
= ((count
- 1) + tx
->req
) & tx
->mask
;
2412 tx
->info
[idx
].last
= 1;
2413 if (tx
->wc_fifo
== NULL
)
2414 myri10ge_submit_req(tx
, tx
->req_list
, count
);
2416 myri10ge_submit_req_wc(tx
, tx
->req_list
, count
);
2418 if ((avail
- count
) < MXGEFW_MAX_SEND_DESC
) {
2420 netif_stop_queue(dev
);
2422 dev
->trans_start
= jiffies
;
2426 /* Free any DMA resources we've alloced and clear out the skb
2427 * slot so as to not trip up assertions, and to avoid a
2428 * double-free if linearizing fails */
2430 last_idx
= (idx
+ 1) & tx
->mask
;
2431 idx
= tx
->req
& tx
->mask
;
2432 tx
->info
[idx
].skb
= NULL
;
2434 len
= pci_unmap_len(&tx
->info
[idx
], len
);
2436 if (tx
->info
[idx
].skb
!= NULL
)
2437 pci_unmap_single(mgp
->pdev
,
2438 pci_unmap_addr(&tx
->info
[idx
],
2442 pci_unmap_page(mgp
->pdev
,
2443 pci_unmap_addr(&tx
->info
[idx
],
2446 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
2447 tx
->info
[idx
].skb
= NULL
;
2449 idx
= (idx
+ 1) & tx
->mask
;
2450 } while (idx
!= last_idx
);
2451 if (skb_is_gso(skb
)) {
2453 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2458 if (skb_linearize(skb
))
2461 mgp
->tx_linearized
++;
2465 dev_kfree_skb_any(skb
);
2466 mgp
->stats
.tx_dropped
+= 1;
2471 static int myri10ge_sw_tso(struct sk_buff
*skb
, struct net_device
*dev
)
2473 struct sk_buff
*segs
, *curr
;
2474 struct myri10ge_priv
*mgp
= dev
->priv
;
2477 segs
= skb_gso_segment(skb
, dev
->features
& ~NETIF_F_TSO6
);
2485 status
= myri10ge_xmit(curr
, dev
);
2487 dev_kfree_skb_any(curr
);
2492 dev_kfree_skb_any(segs
);
2497 dev_kfree_skb_any(skb
);
2501 dev_kfree_skb_any(skb
);
2502 mgp
->stats
.tx_dropped
+= 1;
2506 static struct net_device_stats
*myri10ge_get_stats(struct net_device
*dev
)
2508 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2512 static void myri10ge_set_multicast_list(struct net_device
*dev
)
2514 struct myri10ge_cmd cmd
;
2515 struct myri10ge_priv
*mgp
;
2516 struct dev_mc_list
*mc_list
;
2517 __be32 data
[2] = { 0, 0 };
2519 DECLARE_MAC_BUF(mac
);
2521 mgp
= netdev_priv(dev
);
2522 /* can be called from atomic contexts,
2523 * pass 1 to force atomicity in myri10ge_send_cmd() */
2524 myri10ge_change_promisc(mgp
, dev
->flags
& IFF_PROMISC
, 1);
2526 /* This firmware is known to not support multicast */
2527 if (!mgp
->fw_multicast_support
)
2530 /* Disable multicast filtering */
2532 err
= myri10ge_send_cmd(mgp
, MXGEFW_ENABLE_ALLMULTI
, &cmd
, 1);
2534 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2535 " error status: %d\n", dev
->name
, err
);
2539 if ((dev
->flags
& IFF_ALLMULTI
) || mgp
->adopted_rx_filter_bug
) {
2540 /* request to disable multicast filtering, so quit here */
2544 /* Flush the filters */
2546 err
= myri10ge_send_cmd(mgp
, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS
,
2550 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2551 ", error status: %d\n", dev
->name
, err
);
2555 /* Walk the multicast list, and add each address */
2556 for (mc_list
= dev
->mc_list
; mc_list
!= NULL
; mc_list
= mc_list
->next
) {
2557 memcpy(data
, &mc_list
->dmi_addr
, 6);
2558 cmd
.data0
= ntohl(data
[0]);
2559 cmd
.data1
= ntohl(data
[1]);
2560 err
= myri10ge_send_cmd(mgp
, MXGEFW_JOIN_MULTICAST_GROUP
,
2564 printk(KERN_ERR
"myri10ge: %s: Failed "
2565 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2566 "%d\t", dev
->name
, err
);
2567 printk(KERN_ERR
"MAC %s\n",
2568 print_mac(mac
, mc_list
->dmi_addr
));
2572 /* Enable multicast filtering */
2573 err
= myri10ge_send_cmd(mgp
, MXGEFW_DISABLE_ALLMULTI
, &cmd
, 1);
2575 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2576 "error status: %d\n", dev
->name
, err
);
2586 static int myri10ge_set_mac_address(struct net_device
*dev
, void *addr
)
2588 struct sockaddr
*sa
= addr
;
2589 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2592 if (!is_valid_ether_addr(sa
->sa_data
))
2593 return -EADDRNOTAVAIL
;
2595 status
= myri10ge_update_mac_address(mgp
, sa
->sa_data
);
2598 "myri10ge: %s: changing mac address failed with %d\n",
2603 /* change the dev structure */
2604 memcpy(dev
->dev_addr
, sa
->sa_data
, 6);
2608 static int myri10ge_change_mtu(struct net_device
*dev
, int new_mtu
)
2610 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2613 if ((new_mtu
< 68) || (ETH_HLEN
+ new_mtu
> MYRI10GE_MAX_ETHER_MTU
)) {
2614 printk(KERN_ERR
"myri10ge: %s: new mtu (%d) is not valid\n",
2615 dev
->name
, new_mtu
);
2618 printk(KERN_INFO
"%s: changing mtu from %d to %d\n",
2619 dev
->name
, dev
->mtu
, new_mtu
);
2621 /* if we change the mtu on an active device, we must
2622 * reset the device so the firmware sees the change */
2623 myri10ge_close(dev
);
2633 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2634 * Only do it if the bridge is a root port since we don't want to disturb
2635 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2638 static void myri10ge_enable_ecrc(struct myri10ge_priv
*mgp
)
2640 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2641 struct device
*dev
= &mgp
->pdev
->dev
;
2648 if (!myri10ge_ecrc_enable
|| !bridge
)
2651 /* check that the bridge is a root port */
2652 cap
= pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2653 pci_read_config_word(bridge
, cap
+ PCI_CAP_FLAGS
, &val
);
2654 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2655 if (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
) {
2656 if (myri10ge_ecrc_enable
> 1) {
2657 struct pci_dev
*old_bridge
= bridge
;
2659 /* Walk the hierarchy up to the root port
2660 * where ECRC has to be enabled */
2662 bridge
= bridge
->bus
->self
;
2665 "Failed to find root port"
2666 " to force ECRC\n");
2670 pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2671 pci_read_config_word(bridge
,
2672 cap
+ PCI_CAP_FLAGS
, &val
);
2673 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2674 } while (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
);
2677 "Forcing ECRC on non-root port %s"
2678 " (enabling on root port %s)\n",
2679 pci_name(old_bridge
), pci_name(bridge
));
2682 "Not enabling ECRC on non-root port %s\n",
2688 cap
= pci_find_ext_capability(bridge
, PCI_EXT_CAP_ID_ERR
);
2692 ret
= pci_read_config_dword(bridge
, cap
+ PCI_ERR_CAP
, &err_cap
);
2694 dev_err(dev
, "failed reading ext-conf-space of %s\n",
2696 dev_err(dev
, "\t pci=nommconf in use? "
2697 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2700 if (!(err_cap
& PCI_ERR_CAP_ECRC_GENC
))
2703 err_cap
|= PCI_ERR_CAP_ECRC_GENE
;
2704 pci_write_config_dword(bridge
, cap
+ PCI_ERR_CAP
, err_cap
);
2705 dev_info(dev
, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge
));
2709 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2710 * when the PCI-E Completion packets are aligned on an 8-byte
2711 * boundary. Some PCI-E chip sets always align Completion packets; on
2712 * the ones that do not, the alignment can be enforced by enabling
2713 * ECRC generation (if supported).
2715 * When PCI-E Completion packets are not aligned, it is actually more
2716 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2718 * If the driver can neither enable ECRC nor verify that it has
2719 * already been enabled, then it must use a firmware image which works
2720 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2721 * should also ensure that it never gives the device a Read-DMA which is
2722 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2723 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2724 * firmware image, and set tx.boundary to 4KB.
2727 static void myri10ge_firmware_probe(struct myri10ge_priv
*mgp
)
2729 struct pci_dev
*pdev
= mgp
->pdev
;
2730 struct device
*dev
= &pdev
->dev
;
2733 mgp
->tx
.boundary
= 4096;
2735 * Verify the max read request size was set to 4KB
2736 * before trying the test with 4KB.
2738 status
= pcie_get_readrq(pdev
);
2740 dev_err(dev
, "Couldn't read max read req size: %d\n", status
);
2743 if (status
!= 4096) {
2744 dev_warn(dev
, "Max Read Request size != 4096 (%d)\n", status
);
2745 mgp
->tx
.boundary
= 2048;
2748 * load the optimized firmware (which assumes aligned PCIe
2749 * completions) in order to see if it works on this host.
2751 mgp
->fw_name
= myri10ge_fw_aligned
;
2752 status
= myri10ge_load_firmware(mgp
);
2758 * Enable ECRC if possible
2760 myri10ge_enable_ecrc(mgp
);
2763 * Run a DMA test which watches for unaligned completions and
2764 * aborts on the first one seen.
2767 status
= myri10ge_dma_test(mgp
, MXGEFW_CMD_UNALIGNED_TEST
);
2769 return; /* keep the aligned firmware */
2771 if (status
!= -E2BIG
)
2772 dev_warn(dev
, "DMA test failed: %d\n", status
);
2773 if (status
== -ENOSYS
)
2774 dev_warn(dev
, "Falling back to ethp! "
2775 "Please install up to date fw\n");
2777 /* fall back to using the unaligned firmware */
2778 mgp
->tx
.boundary
= 2048;
2779 mgp
->fw_name
= myri10ge_fw_unaligned
;
2783 static void myri10ge_select_firmware(struct myri10ge_priv
*mgp
)
2785 if (myri10ge_force_firmware
== 0) {
2786 int link_width
, exp_cap
;
2789 exp_cap
= pci_find_capability(mgp
->pdev
, PCI_CAP_ID_EXP
);
2790 pci_read_config_word(mgp
->pdev
, exp_cap
+ PCI_EXP_LNKSTA
, &lnk
);
2791 link_width
= (lnk
>> 4) & 0x3f;
2793 /* Check to see if Link is less than 8 or if the
2794 * upstream bridge is known to provide aligned
2796 if (link_width
< 8) {
2797 dev_info(&mgp
->pdev
->dev
, "PCIE x%d Link\n",
2799 mgp
->tx
.boundary
= 4096;
2800 mgp
->fw_name
= myri10ge_fw_aligned
;
2802 myri10ge_firmware_probe(mgp
);
2805 if (myri10ge_force_firmware
== 1) {
2806 dev_info(&mgp
->pdev
->dev
,
2807 "Assuming aligned completions (forced)\n");
2808 mgp
->tx
.boundary
= 4096;
2809 mgp
->fw_name
= myri10ge_fw_aligned
;
2811 dev_info(&mgp
->pdev
->dev
,
2812 "Assuming unaligned completions (forced)\n");
2813 mgp
->tx
.boundary
= 2048;
2814 mgp
->fw_name
= myri10ge_fw_unaligned
;
2817 if (myri10ge_fw_name
!= NULL
) {
2818 dev_info(&mgp
->pdev
->dev
, "overriding firmware to %s\n",
2820 mgp
->fw_name
= myri10ge_fw_name
;
2825 static int myri10ge_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2827 struct myri10ge_priv
*mgp
;
2828 struct net_device
*netdev
;
2830 mgp
= pci_get_drvdata(pdev
);
2835 netif_device_detach(netdev
);
2836 if (netif_running(netdev
)) {
2837 printk(KERN_INFO
"myri10ge: closing %s\n", netdev
->name
);
2839 myri10ge_close(netdev
);
2842 myri10ge_dummy_rdma(mgp
, 0);
2843 pci_save_state(pdev
);
2844 pci_disable_device(pdev
);
2846 return pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2849 static int myri10ge_resume(struct pci_dev
*pdev
)
2851 struct myri10ge_priv
*mgp
;
2852 struct net_device
*netdev
;
2856 mgp
= pci_get_drvdata(pdev
);
2860 pci_set_power_state(pdev
, 0); /* zeros conf space as a side effect */
2861 msleep(5); /* give card time to respond */
2862 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2863 if (vendor
== 0xffff) {
2864 printk(KERN_ERR
"myri10ge: %s: device disappeared!\n",
2869 status
= pci_restore_state(pdev
);
2873 status
= pci_enable_device(pdev
);
2875 dev_err(&pdev
->dev
, "failed to enable device\n");
2879 pci_set_master(pdev
);
2881 myri10ge_reset(mgp
);
2882 myri10ge_dummy_rdma(mgp
, 1);
2884 /* Save configuration space to be restored if the
2885 * nic resets due to a parity error */
2886 pci_save_state(pdev
);
2888 if (netif_running(netdev
)) {
2890 status
= myri10ge_open(netdev
);
2893 goto abort_with_enabled
;
2896 netif_device_attach(netdev
);
2901 pci_disable_device(pdev
);
2905 #endif /* CONFIG_PM */
2907 static u32
myri10ge_read_reboot(struct myri10ge_priv
*mgp
)
2909 struct pci_dev
*pdev
= mgp
->pdev
;
2910 int vs
= mgp
->vendor_specific_offset
;
2913 /*enter read32 mode */
2914 pci_write_config_byte(pdev
, vs
+ 0x10, 0x3);
2916 /*read REBOOT_STATUS (0xfffffff0) */
2917 pci_write_config_dword(pdev
, vs
+ 0x18, 0xfffffff0);
2918 pci_read_config_dword(pdev
, vs
+ 0x14, &reboot
);
2923 * This watchdog is used to check whether the board has suffered
2924 * from a parity error and needs to be recovered.
2926 static void myri10ge_watchdog(struct work_struct
*work
)
2928 struct myri10ge_priv
*mgp
=
2929 container_of(work
, struct myri10ge_priv
, watchdog_work
);
2934 mgp
->watchdog_resets
++;
2935 pci_read_config_word(mgp
->pdev
, PCI_COMMAND
, &cmd
);
2936 if ((cmd
& PCI_COMMAND_MASTER
) == 0) {
2937 /* Bus master DMA disabled? Check to see
2938 * if the card rebooted due to a parity error
2939 * For now, just report it */
2940 reboot
= myri10ge_read_reboot(mgp
);
2942 "myri10ge: %s: NIC rebooted (0x%x),%s resetting\n",
2943 mgp
->dev
->name
, reboot
,
2944 myri10ge_reset_recover
? " " : " not");
2945 if (myri10ge_reset_recover
== 0)
2948 myri10ge_reset_recover
--;
2951 * A rebooted nic will come back with config space as
2952 * it was after power was applied to PCIe bus.
2953 * Attempt to restore config space which was saved
2954 * when the driver was loaded, or the last time the
2955 * nic was resumed from power saving mode.
2957 pci_restore_state(mgp
->pdev
);
2959 /* save state again for accounting reasons */
2960 pci_save_state(mgp
->pdev
);
2963 /* if we get back -1's from our slot, perhaps somebody
2964 * powered off our card. Don't try to reset it in
2966 if (cmd
== 0xffff) {
2967 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2968 if (vendor
== 0xffff) {
2970 "myri10ge: %s: device disappeared!\n",
2975 /* Perhaps it is a software error. Try to reset */
2977 printk(KERN_ERR
"myri10ge: %s: device timeout, resetting\n",
2979 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2980 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2981 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2982 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2984 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2985 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2986 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2987 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2990 myri10ge_close(mgp
->dev
);
2991 status
= myri10ge_load_firmware(mgp
);
2993 printk(KERN_ERR
"myri10ge: %s: failed to load firmware\n",
2996 myri10ge_open(mgp
->dev
);
3001 * We use our own timer routine rather than relying upon
3002 * netdev->tx_timeout because we have a very large hardware transmit
3003 * queue. Due to the large queue, the netdev->tx_timeout function
3004 * cannot detect a NIC with a parity error in a timely fashion if the
3005 * NIC is lightly loaded.
3007 static void myri10ge_watchdog_timer(unsigned long arg
)
3009 struct myri10ge_priv
*mgp
;
3012 mgp
= (struct myri10ge_priv
*)arg
;
3014 if (mgp
->rx_small
.watchdog_needed
) {
3015 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
3016 mgp
->small_bytes
+ MXGEFW_PAD
, 1);
3017 if (mgp
->rx_small
.fill_cnt
- mgp
->rx_small
.cnt
>=
3018 myri10ge_fill_thresh
)
3019 mgp
->rx_small
.watchdog_needed
= 0;
3021 if (mgp
->rx_big
.watchdog_needed
) {
3022 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 1);
3023 if (mgp
->rx_big
.fill_cnt
- mgp
->rx_big
.cnt
>=
3024 myri10ge_fill_thresh
)
3025 mgp
->rx_big
.watchdog_needed
= 0;
3027 rx_pause_cnt
= ntohl(mgp
->fw_stats
->dropped_pause
);
3029 if (mgp
->tx
.req
!= mgp
->tx
.done
&&
3030 mgp
->tx
.done
== mgp
->watchdog_tx_done
&&
3031 mgp
->watchdog_tx_req
!= mgp
->watchdog_tx_done
) {
3032 /* nic seems like it might be stuck.. */
3033 if (rx_pause_cnt
!= mgp
->watchdog_pause
) {
3034 if (net_ratelimit())
3035 printk(KERN_WARNING
"myri10ge %s:"
3036 "TX paused, check link partner\n",
3039 schedule_work(&mgp
->watchdog_work
);
3044 mod_timer(&mgp
->watchdog_timer
,
3045 jiffies
+ myri10ge_watchdog_timeout
* HZ
);
3046 mgp
->watchdog_tx_done
= mgp
->tx
.done
;
3047 mgp
->watchdog_tx_req
= mgp
->tx
.req
;
3048 mgp
->watchdog_pause
= rx_pause_cnt
;
3051 static int myri10ge_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
3053 struct net_device
*netdev
;
3054 struct myri10ge_priv
*mgp
;
3055 struct device
*dev
= &pdev
->dev
;
3058 int status
= -ENXIO
;
3061 netdev
= alloc_etherdev(sizeof(*mgp
));
3062 if (netdev
== NULL
) {
3063 dev_err(dev
, "Could not allocate ethernet device\n");
3067 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
3069 mgp
= netdev_priv(netdev
);
3071 netif_napi_add(netdev
, &mgp
->napi
, myri10ge_poll
, myri10ge_napi_weight
);
3073 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
3074 mgp
->pause
= myri10ge_flow_control
;
3075 mgp
->intr_coal_delay
= myri10ge_intr_coal_delay
;
3076 mgp
->msg_enable
= netif_msg_init(myri10ge_debug
, MYRI10GE_MSG_DEFAULT
);
3077 init_waitqueue_head(&mgp
->down_wq
);
3079 if (pci_enable_device(pdev
)) {
3080 dev_err(&pdev
->dev
, "pci_enable_device call failed\n");
3082 goto abort_with_netdev
;
3085 /* Find the vendor-specific cap so we can check
3086 * the reboot register later on */
3087 mgp
->vendor_specific_offset
3088 = pci_find_capability(pdev
, PCI_CAP_ID_VNDR
);
3090 /* Set our max read request to 4KB */
3091 status
= pcie_set_readrq(pdev
, 4096);
3093 dev_err(&pdev
->dev
, "Error %d writing PCI_EXP_DEVCTL\n",
3095 goto abort_with_netdev
;
3098 pci_set_master(pdev
);
3100 status
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
3104 "64-bit pci address mask was refused, "
3106 status
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
3109 dev_err(&pdev
->dev
, "Error %d setting DMA mask\n", status
);
3110 goto abort_with_netdev
;
3112 mgp
->cmd
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
3113 &mgp
->cmd_bus
, GFP_KERNEL
);
3114 if (mgp
->cmd
== NULL
)
3115 goto abort_with_netdev
;
3117 mgp
->fw_stats
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
3118 &mgp
->fw_stats_bus
, GFP_KERNEL
);
3119 if (mgp
->fw_stats
== NULL
)
3120 goto abort_with_cmd
;
3122 mgp
->board_span
= pci_resource_len(pdev
, 0);
3123 mgp
->iomem_base
= pci_resource_start(pdev
, 0);
3125 mgp
->wc_enabled
= 0;
3127 mgp
->mtrr
= mtrr_add(mgp
->iomem_base
, mgp
->board_span
,
3128 MTRR_TYPE_WRCOMB
, 1);
3130 mgp
->wc_enabled
= 1;
3132 /* Hack. need to get rid of these magic numbers */
3134 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
3135 if (mgp
->sram_size
> mgp
->board_span
) {
3136 dev_err(&pdev
->dev
, "board span %ld bytes too small\n",
3140 mgp
->sram
= ioremap(mgp
->iomem_base
, mgp
->board_span
);
3141 if (mgp
->sram
== NULL
) {
3142 dev_err(&pdev
->dev
, "ioremap failed for %ld bytes at 0x%lx\n",
3143 mgp
->board_span
, mgp
->iomem_base
);
3147 memcpy_fromio(mgp
->eeprom_strings
,
3148 mgp
->sram
+ mgp
->sram_size
- MYRI10GE_EEPROM_STRINGS_SIZE
,
3149 MYRI10GE_EEPROM_STRINGS_SIZE
);
3150 memset(mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
- 2, 0, 2);
3151 status
= myri10ge_read_mac_addr(mgp
);
3153 goto abort_with_ioremap
;
3155 for (i
= 0; i
< ETH_ALEN
; i
++)
3156 netdev
->dev_addr
[i
] = mgp
->mac_addr
[i
];
3158 /* allocate rx done ring */
3159 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
3160 mgp
->rx_done
.entry
= dma_alloc_coherent(&pdev
->dev
, bytes
,
3161 &mgp
->rx_done
.bus
, GFP_KERNEL
);
3162 if (mgp
->rx_done
.entry
== NULL
)
3163 goto abort_with_ioremap
;
3164 memset(mgp
->rx_done
.entry
, 0, bytes
);
3166 myri10ge_select_firmware(mgp
);
3168 status
= myri10ge_load_firmware(mgp
);
3170 dev_err(&pdev
->dev
, "failed to load firmware\n");
3171 goto abort_with_rx_done
;
3174 status
= myri10ge_reset(mgp
);
3176 dev_err(&pdev
->dev
, "failed reset\n");
3177 goto abort_with_firmware
;
3180 pci_set_drvdata(pdev
, mgp
);
3181 if ((myri10ge_initial_mtu
+ ETH_HLEN
) > MYRI10GE_MAX_ETHER_MTU
)
3182 myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
3183 if ((myri10ge_initial_mtu
+ ETH_HLEN
) < 68)
3184 myri10ge_initial_mtu
= 68;
3185 netdev
->mtu
= myri10ge_initial_mtu
;
3186 netdev
->open
= myri10ge_open
;
3187 netdev
->stop
= myri10ge_close
;
3188 netdev
->hard_start_xmit
= myri10ge_xmit
;
3189 netdev
->get_stats
= myri10ge_get_stats
;
3190 netdev
->base_addr
= mgp
->iomem_base
;
3191 netdev
->change_mtu
= myri10ge_change_mtu
;
3192 netdev
->set_multicast_list
= myri10ge_set_multicast_list
;
3193 netdev
->set_mac_address
= myri10ge_set_mac_address
;
3194 netdev
->features
= mgp
->features
;
3196 netdev
->features
|= NETIF_F_HIGHDMA
;
3198 /* make sure we can get an irq, and that MSI can be
3199 * setup (if available). Also ensure netdev->irq
3200 * is set to correct value if MSI is enabled */
3201 status
= myri10ge_request_irq(mgp
);
3203 goto abort_with_firmware
;
3204 netdev
->irq
= pdev
->irq
;
3205 myri10ge_free_irq(mgp
);
3207 /* Save configuration space to be restored if the
3208 * nic resets due to a parity error */
3209 pci_save_state(pdev
);
3211 /* Setup the watchdog timer */
3212 setup_timer(&mgp
->watchdog_timer
, myri10ge_watchdog_timer
,
3213 (unsigned long)mgp
);
3215 SET_ETHTOOL_OPS(netdev
, &myri10ge_ethtool_ops
);
3216 INIT_WORK(&mgp
->watchdog_work
, myri10ge_watchdog
);
3217 status
= register_netdev(netdev
);
3219 dev_err(&pdev
->dev
, "register_netdev failed: %d\n", status
);
3220 goto abort_with_state
;
3222 dev_info(dev
, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
3223 (mgp
->msi_enabled
? "MSI" : "xPIC"),
3224 netdev
->irq
, mgp
->tx
.boundary
, mgp
->fw_name
,
3225 (mgp
->wc_enabled
? "Enabled" : "Disabled"));
3230 pci_restore_state(pdev
);
3232 abort_with_firmware
:
3233 myri10ge_dummy_rdma(mgp
, 0);
3236 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
3237 dma_free_coherent(&pdev
->dev
, bytes
,
3238 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
3246 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
3248 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
3249 mgp
->fw_stats
, mgp
->fw_stats_bus
);
3252 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
3253 mgp
->cmd
, mgp
->cmd_bus
);
3257 free_netdev(netdev
);
3264 * Does what is necessary to shutdown one Myrinet device. Called
3265 * once for each Myrinet card by the kernel when a module is
3268 static void myri10ge_remove(struct pci_dev
*pdev
)
3270 struct myri10ge_priv
*mgp
;
3271 struct net_device
*netdev
;
3274 mgp
= pci_get_drvdata(pdev
);
3278 flush_scheduled_work();
3280 unregister_netdev(netdev
);
3282 myri10ge_dummy_rdma(mgp
, 0);
3284 /* avoid a memory leak */
3285 pci_restore_state(pdev
);
3287 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
3288 dma_free_coherent(&pdev
->dev
, bytes
,
3289 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
3295 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
3297 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
3298 mgp
->fw_stats
, mgp
->fw_stats_bus
);
3300 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
3301 mgp
->cmd
, mgp
->cmd_bus
);
3303 free_netdev(netdev
);
3304 pci_set_drvdata(pdev
, NULL
);
3307 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
3308 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9 0x0009
3310 static struct pci_device_id myri10ge_pci_tbl
[] = {
3311 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM
, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E
)},
3313 (PCI_VENDOR_ID_MYRICOM
, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9
)},
3317 static struct pci_driver myri10ge_driver
= {
3319 .probe
= myri10ge_probe
,
3320 .remove
= myri10ge_remove
,
3321 .id_table
= myri10ge_pci_tbl
,
3323 .suspend
= myri10ge_suspend
,
3324 .resume
= myri10ge_resume
,
3328 static __init
int myri10ge_init_module(void)
3330 printk(KERN_INFO
"%s: Version %s\n", myri10ge_driver
.name
,
3331 MYRI10GE_VERSION_STR
);
3332 return pci_register_driver(&myri10ge_driver
);
3335 module_init(myri10ge_init_module
);
3337 static __exit
void myri10ge_cleanup_module(void)
3339 pci_unregister_driver(&myri10ge_driver
);
3342 module_exit(myri10ge_cleanup_module
);