viafb: improve viafb_par
[linux-2.6/verdex.git] / drivers / video / via / viafbdev.c
blob4a8853a07602d220116707219245dd96f937d42a
1 /*
2 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public
7 * License as published by the Free Software Foundation;
8 * either version 2, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
12 * the implied warranty of MERCHANTABILITY or FITNESS FOR
13 * A PARTICULAR PURPOSE.See the GNU General Public License
14 * for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 #include <linux/module.h>
23 #define _MASTER_FILE
25 #include "global.h"
27 static int MAX_CURS = 32;
28 static struct fb_var_screeninfo default_var;
29 static char *viafb_name = "Via";
30 static u32 pseudo_pal[17];
32 /* video mode */
33 static char *viafb_mode = "640x480";
34 static char *viafb_mode1 = "640x480";
36 /* Added for specifying active devices.*/
37 char *viafb_active_dev = "";
39 /*Added for specify lcd output port*/
40 char *viafb_lcd_port = "";
41 char *viafb_dvi_port = "";
43 static void viafb_set_device(struct device_t active_dev);
44 static int apply_device_setting(struct viafb_ioctl_setting setting_info,
45 struct fb_info *info);
46 static void apply_second_mode_setting(struct fb_var_screeninfo
47 *sec_var);
48 static void retrieve_device_setting(struct viafb_ioctl_setting
49 *setting_info);
51 static struct fb_ops viafb_ops;
54 static void viafb_update_fix(struct fb_info *info)
56 u32 bpp = info->var.bits_per_pixel;
58 info->fix.visual =
59 bpp == 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
60 info->fix.line_length =
61 ((info->var.xres_virtual + 7) & ~7) * bpp / 8;
64 static void viafb_setup_fixinfo(struct fb_fix_screeninfo *fix,
65 struct viafb_par *viaparinfo)
67 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
68 strcpy(fix->id, viafb_name);
70 fix->smem_start = viaparinfo->fbmem;
71 fix->smem_len = viaparinfo->fbmem_free;
73 fix->type = FB_TYPE_PACKED_PIXELS;
74 fix->type_aux = 0;
76 fix->xpanstep = fix->ywrapstep = 0;
77 fix->ypanstep = 1;
79 /* Just tell the accel name */
80 viafbinfo->fix.accel = FB_ACCEL_VIA_UNICHROME;
82 static int viafb_open(struct fb_info *info, int user)
84 DEBUG_MSG(KERN_INFO "viafb_open!\n");
85 return 0;
88 static int viafb_release(struct fb_info *info, int user)
90 DEBUG_MSG(KERN_INFO "viafb_release!\n");
91 return 0;
94 static int viafb_check_var(struct fb_var_screeninfo *var,
95 struct fb_info *info)
97 int vmode_index, htotal, vtotal;
98 struct viafb_par *ppar;
99 u32 long_refresh;
100 struct viafb_par *p_viafb_par;
101 ppar = info->par;
104 DEBUG_MSG(KERN_INFO "viafb_check_var!\n");
105 /* Sanity check */
106 /* HW neither support interlacte nor double-scaned mode */
107 if (var->vmode & FB_VMODE_INTERLACED || var->vmode & FB_VMODE_DOUBLE)
108 return -EINVAL;
110 vmode_index = viafb_get_mode_index(var->xres, var->yres);
111 if (vmode_index == VIA_RES_INVALID) {
112 DEBUG_MSG(KERN_INFO
113 "viafb: Mode %dx%dx%d not supported!!\n",
114 var->xres, var->yres, var->bits_per_pixel);
115 return -EINVAL;
118 if (24 == var->bits_per_pixel)
119 var->bits_per_pixel = 32;
121 if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 &&
122 var->bits_per_pixel != 32)
123 return -EINVAL;
125 if ((var->xres_virtual * (var->bits_per_pixel >> 3)) & 0x1F)
126 /*32 pixel alignment */
127 var->xres_virtual = (var->xres_virtual + 31) & ~31;
128 if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
129 ppar->memsize)
130 return -EINVAL;
132 /* Based on var passed in to calculate the refresh,
133 * because our driver use some modes special.
135 htotal = var->xres + var->left_margin +
136 var->right_margin + var->hsync_len;
137 vtotal = var->yres + var->upper_margin +
138 var->lower_margin + var->vsync_len;
139 long_refresh = 1000000000UL / var->pixclock * 1000;
140 long_refresh /= (htotal * vtotal);
142 viafb_refresh = viafb_get_refresh(var->xres, var->yres, long_refresh);
144 /* Adjust var according to our driver's own table */
145 viafb_fill_var_timing_info(var, viafb_refresh, vmode_index);
147 /* This is indeed a patch for VT3353 */
148 if (!info->par)
149 return -1;
150 p_viafb_par = (struct viafb_par *)info->par;
151 if (p_viafb_par->chip_info->gfx_chip_name == UNICHROME_VX800)
152 var->accel_flags = 0;
154 return 0;
157 static int viafb_set_par(struct fb_info *info)
159 int vmode_index;
160 int vmode_index1 = 0;
161 DEBUG_MSG(KERN_INFO "viafb_set_par!\n");
163 viafb_update_device_setting(info->var.xres, info->var.yres,
164 info->var.bits_per_pixel, viafb_refresh, 0);
166 vmode_index = viafb_get_mode_index(info->var.xres, info->var.yres);
168 if (viafb_SAMM_ON == 1) {
169 DEBUG_MSG(KERN_INFO
170 "viafb_second_xres = %d, viafb_second_yres = %d, bpp = %d\n",
171 viafb_second_xres, viafb_second_yres, viafb_bpp1);
172 vmode_index1 = viafb_get_mode_index(viafb_second_xres,
173 viafb_second_yres);
174 DEBUG_MSG(KERN_INFO "->viafb_SAMM_ON: index=%d\n",
175 vmode_index1);
177 viafb_update_device_setting(viafb_second_xres,
178 viafb_second_yres, viafb_bpp1, viafb_refresh1, 1);
181 if (vmode_index != VIA_RES_INVALID) {
182 viafb_setmode(vmode_index, info->var.xres, info->var.yres,
183 info->var.bits_per_pixel, vmode_index1,
184 viafb_second_xres, viafb_second_yres, viafb_bpp1);
186 /*We should set memory offset according virtual_x */
187 /*Fix me:put this function into viafb_setmode */
188 viafb_memory_pitch_patch(info);
189 viafb_update_fix(info);
190 viafb_bpp = info->var.bits_per_pixel;
191 /* Update viafb_accel, it is necessary to our 2D accelerate */
192 viafb_accel = info->var.accel_flags;
194 if (viafb_accel)
195 viafb_set_2d_color_depth(info->var.bits_per_pixel);
198 return 0;
201 /* Set one color register */
202 static int viafb_setcolreg(unsigned regno, unsigned red, unsigned green,
203 unsigned blue, unsigned transp, struct fb_info *info)
205 u8 sr1a, sr1b, cr67, cr6a, rev = 0, shift = 10;
206 unsigned cmap_entries = (info->var.bits_per_pixel == 8) ? 256 : 16;
207 DEBUG_MSG(KERN_INFO "viafb_setcolreg!\n");
208 if (regno >= cmap_entries)
209 return 1;
210 if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name) {
212 * Read PCI bus 0,dev 0,function 0,index 0xF6 to get chip rev.
214 outl(0x80000000 | (0xf6 & ~3), (unsigned long)0xCF8);
215 rev = (inl((unsigned long)0xCFC) >> ((0xf6 & 3) * 8)) & 0xff;
217 switch (info->var.bits_per_pixel) {
218 case 8:
219 outb(0x1A, 0x3C4);
220 sr1a = inb(0x3C5);
221 outb(0x1B, 0x3C4);
222 sr1b = inb(0x3C5);
223 outb(0x67, 0x3D4);
224 cr67 = inb(0x3D5);
225 outb(0x6A, 0x3D4);
226 cr6a = inb(0x3D5);
228 /* Map the 3C6/7/8/9 to the IGA2 */
229 outb(0x1A, 0x3C4);
230 outb(sr1a | 0x01, 0x3C5);
231 /* Second Display Engine colck always on */
232 outb(0x1B, 0x3C4);
233 outb(sr1b | 0x80, 0x3C5);
234 /* Second Display Color Depth 8 */
235 outb(0x67, 0x3D4);
236 outb(cr67 & 0x3F, 0x3D5);
237 outb(0x6A, 0x3D4);
238 /* Second Display Channel Reset CR6A[6]) */
239 outb(cr6a & 0xBF, 0x3D5);
240 /* Second Display Channel Enable CR6A[7] */
241 outb(cr6a | 0x80, 0x3D5);
242 /* Second Display Channel stop reset) */
243 outb(cr6a | 0x40, 0x3D5);
245 /* Bit mask of palette */
246 outb(0xFF, 0x3c6);
247 /* Write one register of IGA2 */
248 outb(regno, 0x3C8);
249 if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name &&
250 rev >= 15) {
251 shift = 8;
252 viafb_write_reg_mask(CR6A, VIACR, BIT5, BIT5);
253 viafb_write_reg_mask(SR15, VIASR, BIT7, BIT7);
254 } else {
255 shift = 10;
256 viafb_write_reg_mask(CR6A, VIACR, 0, BIT5);
257 viafb_write_reg_mask(SR15, VIASR, 0, BIT7);
259 outb(red >> shift, 0x3C9);
260 outb(green >> shift, 0x3C9);
261 outb(blue >> shift, 0x3C9);
263 /* Map the 3C6/7/8/9 to the IGA1 */
264 outb(0x1A, 0x3C4);
265 outb(sr1a & 0xFE, 0x3C5);
266 /* Bit mask of palette */
267 outb(0xFF, 0x3c6);
268 /* Write one register of IGA1 */
269 outb(regno, 0x3C8);
270 outb(red >> shift, 0x3C9);
271 outb(green >> shift, 0x3C9);
272 outb(blue >> shift, 0x3C9);
274 outb(0x1A, 0x3C4);
275 outb(sr1a, 0x3C5);
276 outb(0x1B, 0x3C4);
277 outb(sr1b, 0x3C5);
278 outb(0x67, 0x3D4);
279 outb(cr67, 0x3D5);
280 outb(0x6A, 0x3D4);
281 outb(cr6a, 0x3D5);
282 break;
283 case 16:
284 ((u32 *) info->pseudo_palette)[regno] = (red & 0xF800) |
285 ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11);
286 break;
287 case 32:
288 ((u32 *) info->pseudo_palette)[regno] =
289 ((transp & 0xFF00) << 16) |
290 ((red & 0xFF00) << 8) |
291 ((green & 0xFF00)) | ((blue & 0xFF00) >> 8);
292 break;
295 return 0;
299 /*CALLED BY: fb_set_cmap */
300 /* fb_set_var, pass 256 colors */
301 /*CALLED BY: fb_set_cmap */
302 /* fbcon_set_palette, pass 16 colors */
303 static int viafb_setcmap(struct fb_cmap *cmap, struct fb_info *info)
305 u32 len = cmap->len;
306 u32 i;
307 u16 *pred = cmap->red;
308 u16 *pgreen = cmap->green;
309 u16 *pblue = cmap->blue;
310 u16 *ptransp = cmap->transp;
311 u8 sr1a, sr1b, cr67, cr6a, rev = 0, shift = 10;
312 if (len > 256)
313 return 1;
314 if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name) {
316 * Read PCI bus 0, dev 0, function 0, index 0xF6 to get chip
317 * rev.
319 outl(0x80000000 | (0xf6 & ~3), (unsigned long)0xCF8);
320 rev = (inl((unsigned long)0xCFC) >> ((0xf6 & 3) * 8)) & 0xff;
322 switch (info->var.bits_per_pixel) {
323 case 8:
324 outb(0x1A, 0x3C4);
325 sr1a = inb(0x3C5);
326 outb(0x1B, 0x3C4);
327 sr1b = inb(0x3C5);
328 outb(0x67, 0x3D4);
329 cr67 = inb(0x3D5);
330 outb(0x6A, 0x3D4);
331 cr6a = inb(0x3D5);
332 /* Map the 3C6/7/8/9 to the IGA2 */
333 outb(0x1A, 0x3C4);
334 outb(sr1a | 0x01, 0x3C5);
335 outb(0x1B, 0x3C4);
336 /* Second Display Engine colck always on */
337 outb(sr1b | 0x80, 0x3C5);
338 outb(0x67, 0x3D4);
339 /* Second Display Color Depth 8 */
340 outb(cr67 & 0x3F, 0x3D5);
341 outb(0x6A, 0x3D4);
342 /* Second Display Channel Reset CR6A[6]) */
343 outb(cr6a & 0xBF, 0x3D5);
344 /* Second Display Channel Enable CR6A[7] */
345 outb(cr6a | 0x80, 0x3D5);
346 /* Second Display Channel stop reset) */
347 outb(cr6a | 0xC0, 0x3D5);
349 /* Bit mask of palette */
350 outb(0xFF, 0x3c6);
351 outb(0x00, 0x3C8);
352 if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name &&
353 rev >= 15) {
354 shift = 8;
355 viafb_write_reg_mask(CR6A, VIACR, BIT5, BIT5);
356 viafb_write_reg_mask(SR15, VIASR, BIT7, BIT7);
357 } else {
358 shift = 10;
359 viafb_write_reg_mask(CR6A, VIACR, 0, BIT5);
360 viafb_write_reg_mask(SR15, VIASR, 0, BIT7);
362 for (i = 0; i < len; i++) {
363 outb((*(pred + i)) >> shift, 0x3C9);
364 outb((*(pgreen + i)) >> shift, 0x3C9);
365 outb((*(pblue + i)) >> shift, 0x3C9);
368 outb(0x1A, 0x3C4);
369 /* Map the 3C6/7/8/9 to the IGA1 */
370 outb(sr1a & 0xFE, 0x3C5);
371 /* Bit mask of palette */
372 outb(0xFF, 0x3c6);
373 outb(0x00, 0x3C8);
374 for (i = 0; i < len; i++) {
375 outb((*(pred + i)) >> shift, 0x3C9);
376 outb((*(pgreen + i)) >> shift, 0x3C9);
377 outb((*(pblue + i)) >> shift, 0x3C9);
380 outb(0x1A, 0x3C4);
381 outb(sr1a, 0x3C5);
382 outb(0x1B, 0x3C4);
383 outb(sr1b, 0x3C5);
384 outb(0x67, 0x3D4);
385 outb(cr67, 0x3D5);
386 outb(0x6A, 0x3D4);
387 outb(cr6a, 0x3D5);
388 break;
389 case 16:
390 if (len > 17)
391 return 0; /* Because static u32 pseudo_pal[17]; */
392 for (i = 0; i < len; i++)
393 ((u32 *) info->pseudo_palette)[i] =
394 (*(pred + i) & 0xF800) |
395 ((*(pgreen + i) & 0xFC00) >> 5) |
396 ((*(pblue + i) & 0xF800) >> 11);
397 break;
398 case 32:
399 if (len > 17)
400 return 0;
401 if (ptransp) {
402 for (i = 0; i < len; i++)
403 ((u32 *) info->pseudo_palette)[i] =
404 ((*(ptransp + i) & 0xFF00) << 16) |
405 ((*(pred + i) & 0xFF00) << 8) |
406 ((*(pgreen + i) & 0xFF00)) |
407 ((*(pblue + i) & 0xFF00) >> 8);
408 } else {
409 for (i = 0; i < len; i++)
410 ((u32 *) info->pseudo_palette)[i] =
411 0x00000000 |
412 ((*(pred + i) & 0xFF00) << 8) |
413 ((*(pgreen + i) & 0xFF00)) |
414 ((*(pblue + i) & 0xFF00) >> 8);
416 break;
418 return 0;
421 static int viafb_pan_display(struct fb_var_screeninfo *var,
422 struct fb_info *info)
424 unsigned int offset;
426 DEBUG_MSG(KERN_INFO "viafb_pan_display!\n");
428 offset = (var->xoffset + (var->yoffset * var->xres_virtual)) *
429 var->bits_per_pixel / 16;
431 DEBUG_MSG(KERN_INFO "\nviafb_pan_display,offset =%d ", offset);
432 viafb_set_primary_address(offset);
433 return 0;
436 static int viafb_blank(int blank_mode, struct fb_info *info)
438 DEBUG_MSG(KERN_INFO "viafb_blank!\n");
439 /* clear DPMS setting */
441 switch (blank_mode) {
442 case FB_BLANK_UNBLANK:
443 /* Screen: On, HSync: On, VSync: On */
444 /* control CRT monitor power management */
445 viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5);
446 break;
447 case FB_BLANK_HSYNC_SUSPEND:
448 /* Screen: Off, HSync: Off, VSync: On */
449 /* control CRT monitor power management */
450 viafb_write_reg_mask(CR36, VIACR, 0x10, BIT4 + BIT5);
451 break;
452 case FB_BLANK_VSYNC_SUSPEND:
453 /* Screen: Off, HSync: On, VSync: Off */
454 /* control CRT monitor power management */
455 viafb_write_reg_mask(CR36, VIACR, 0x20, BIT4 + BIT5);
456 break;
457 case FB_BLANK_POWERDOWN:
458 /* Screen: Off, HSync: Off, VSync: Off */
459 /* control CRT monitor power management */
460 viafb_write_reg_mask(CR36, VIACR, 0x30, BIT4 + BIT5);
461 break;
464 return 0;
467 static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
469 union {
470 struct viafb_ioctl_mode viamode;
471 struct viafb_ioctl_samm viasamm;
472 struct viafb_driver_version driver_version;
473 struct fb_var_screeninfo sec_var;
474 struct _panel_size_pos_info panel_pos_size_para;
475 struct viafb_ioctl_setting viafb_setting;
476 struct device_t active_dev;
477 } u;
478 u32 state_info = 0;
479 u32 *viafb_gamma_table;
480 char driver_name[] = "viafb";
482 u32 __user *argp = (u32 __user *) arg;
483 u32 gpu32;
485 DEBUG_MSG(KERN_INFO "viafb_ioctl: 0x%X !!\n", cmd);
486 memset(&u, 0, sizeof(u));
488 switch (cmd) {
489 case VIAFB_GET_CHIP_INFO:
490 if (copy_to_user(argp, viaparinfo->chip_info,
491 sizeof(struct chip_information)))
492 return -EFAULT;
493 break;
494 case VIAFB_GET_INFO_SIZE:
495 return put_user((u32)sizeof(struct viafb_ioctl_info), argp);
496 case VIAFB_GET_INFO:
497 return viafb_ioctl_get_viafb_info(arg);
498 case VIAFB_HOTPLUG:
499 return put_user(viafb_ioctl_hotplug(info->var.xres,
500 info->var.yres,
501 info->var.bits_per_pixel), argp);
502 case VIAFB_SET_HOTPLUG_FLAG:
503 if (copy_from_user(&gpu32, argp, sizeof(gpu32)))
504 return -EFAULT;
505 viafb_hotplug = (gpu32) ? 1 : 0;
506 break;
507 case VIAFB_GET_RESOLUTION:
508 u.viamode.xres = (u32) viafb_hotplug_Xres;
509 u.viamode.yres = (u32) viafb_hotplug_Yres;
510 u.viamode.refresh = (u32) viafb_hotplug_refresh;
511 u.viamode.bpp = (u32) viafb_hotplug_bpp;
512 if (viafb_SAMM_ON == 1) {
513 u.viamode.xres_sec = viafb_second_xres;
514 u.viamode.yres_sec = viafb_second_yres;
515 u.viamode.virtual_xres_sec = viafb_second_virtual_xres;
516 u.viamode.virtual_yres_sec = viafb_second_virtual_yres;
517 u.viamode.refresh_sec = viafb_refresh1;
518 u.viamode.bpp_sec = viafb_bpp1;
519 } else {
520 u.viamode.xres_sec = 0;
521 u.viamode.yres_sec = 0;
522 u.viamode.virtual_xres_sec = 0;
523 u.viamode.virtual_yres_sec = 0;
524 u.viamode.refresh_sec = 0;
525 u.viamode.bpp_sec = 0;
527 if (copy_to_user(argp, &u.viamode, sizeof(u.viamode)))
528 return -EFAULT;
529 break;
530 case VIAFB_GET_SAMM_INFO:
531 u.viasamm.samm_status = viafb_SAMM_ON;
533 if (viafb_SAMM_ON == 1) {
534 if (viafb_dual_fb) {
535 u.viasamm.size_prim = viaparinfo->fbmem_free;
536 u.viasamm.size_sec = viaparinfo1->fbmem_free;
537 } else {
538 if (viafb_second_size) {
539 u.viasamm.size_prim =
540 viaparinfo->fbmem_free -
541 viafb_second_size * 1024 * 1024;
542 u.viasamm.size_sec =
543 viafb_second_size * 1024 * 1024;
544 } else {
545 u.viasamm.size_prim =
546 viaparinfo->fbmem_free >> 1;
547 u.viasamm.size_sec =
548 (viaparinfo->fbmem_free >> 1);
551 u.viasamm.mem_base = viaparinfo->fbmem;
552 u.viasamm.offset_sec = viafb_second_offset;
553 } else {
554 u.viasamm.size_prim =
555 viaparinfo->memsize - viaparinfo->fbmem_used;
556 u.viasamm.size_sec = 0;
557 u.viasamm.mem_base = viaparinfo->fbmem;
558 u.viasamm.offset_sec = 0;
561 if (copy_to_user(argp, &u.viasamm, sizeof(u.viasamm)))
562 return -EFAULT;
564 break;
565 case VIAFB_TURN_ON_OUTPUT_DEVICE:
566 if (copy_from_user(&gpu32, argp, sizeof(gpu32)))
567 return -EFAULT;
568 if (gpu32 & CRT_Device)
569 viafb_crt_enable();
570 if (gpu32 & DVI_Device)
571 viafb_dvi_enable();
572 if (gpu32 & LCD_Device)
573 viafb_lcd_enable();
574 break;
575 case VIAFB_TURN_OFF_OUTPUT_DEVICE:
576 if (copy_from_user(&gpu32, argp, sizeof(gpu32)))
577 return -EFAULT;
578 if (gpu32 & CRT_Device)
579 viafb_crt_disable();
580 if (gpu32 & DVI_Device)
581 viafb_dvi_disable();
582 if (gpu32 & LCD_Device)
583 viafb_lcd_disable();
584 break;
585 case VIAFB_SET_DEVICE:
586 if (copy_from_user(&u.active_dev, (void *)argp,
587 sizeof(u.active_dev)))
588 return -EFAULT;
589 viafb_set_device(u.active_dev);
590 viafb_set_par(info);
591 break;
592 case VIAFB_GET_DEVICE:
593 u.active_dev.crt = viafb_CRT_ON;
594 u.active_dev.dvi = viafb_DVI_ON;
595 u.active_dev.lcd = viafb_LCD_ON;
596 u.active_dev.samm = viafb_SAMM_ON;
597 u.active_dev.primary_dev = viafb_primary_dev;
599 u.active_dev.lcd_dsp_cent = viafb_lcd_dsp_method;
600 u.active_dev.lcd_panel_id = viafb_lcd_panel_id;
601 u.active_dev.lcd_mode = viafb_lcd_mode;
603 u.active_dev.xres = viafb_hotplug_Xres;
604 u.active_dev.yres = viafb_hotplug_Yres;
606 u.active_dev.xres1 = viafb_second_xres;
607 u.active_dev.yres1 = viafb_second_yres;
609 u.active_dev.bpp = viafb_bpp;
610 u.active_dev.bpp1 = viafb_bpp1;
611 u.active_dev.refresh = viafb_refresh;
612 u.active_dev.refresh1 = viafb_refresh1;
614 u.active_dev.epia_dvi = viafb_platform_epia_dvi;
615 u.active_dev.lcd_dual_edge = viafb_device_lcd_dualedge;
616 u.active_dev.bus_width = viafb_bus_width;
618 if (copy_to_user(argp, &u.active_dev, sizeof(u.active_dev)))
619 return -EFAULT;
620 break;
622 case VIAFB_GET_DRIVER_VERSION:
623 u.driver_version.iMajorNum = VERSION_MAJOR;
624 u.driver_version.iKernelNum = VERSION_KERNEL;
625 u.driver_version.iOSNum = VERSION_OS;
626 u.driver_version.iMinorNum = VERSION_MINOR;
628 if (copy_to_user(argp, &u.driver_version,
629 sizeof(u.driver_version)))
630 return -EFAULT;
632 break;
634 case VIAFB_SET_DEVICE_INFO:
635 if (copy_from_user(&u.viafb_setting,
636 argp, sizeof(u.viafb_setting)))
637 return -EFAULT;
638 if (apply_device_setting(u.viafb_setting, info) < 0)
639 return -EINVAL;
641 break;
643 case VIAFB_SET_SECOND_MODE:
644 if (copy_from_user(&u.sec_var, argp, sizeof(u.sec_var)))
645 return -EFAULT;
646 apply_second_mode_setting(&u.sec_var);
647 break;
649 case VIAFB_GET_DEVICE_INFO:
651 retrieve_device_setting(&u.viafb_setting);
653 if (copy_to_user(argp, &u.viafb_setting,
654 sizeof(u.viafb_setting)))
655 return -EFAULT;
657 break;
659 case VIAFB_GET_DEVICE_SUPPORT:
660 viafb_get_device_support_state(&state_info);
661 if (put_user(state_info, argp))
662 return -EFAULT;
663 break;
665 case VIAFB_GET_DEVICE_CONNECT:
666 viafb_get_device_connect_state(&state_info);
667 if (put_user(state_info, argp))
668 return -EFAULT;
669 break;
671 case VIAFB_GET_PANEL_SUPPORT_EXPAND:
672 state_info =
673 viafb_lcd_get_support_expand_state(info->var.xres,
674 info->var.yres);
675 if (put_user(state_info, argp))
676 return -EFAULT;
677 break;
679 case VIAFB_GET_DRIVER_NAME:
680 if (copy_to_user(argp, driver_name, sizeof(driver_name)))
681 return -EFAULT;
682 break;
684 case VIAFB_SET_GAMMA_LUT:
685 viafb_gamma_table = kmalloc(256 * sizeof(u32), GFP_KERNEL);
686 if (!viafb_gamma_table)
687 return -ENOMEM;
688 if (copy_from_user(viafb_gamma_table, argp,
689 sizeof(viafb_gamma_table))) {
690 kfree(viafb_gamma_table);
691 return -EFAULT;
693 viafb_set_gamma_table(viafb_bpp, viafb_gamma_table);
694 kfree(viafb_gamma_table);
695 break;
697 case VIAFB_GET_GAMMA_LUT:
698 viafb_gamma_table = kmalloc(256 * sizeof(u32), GFP_KERNEL);
699 if (!viafb_gamma_table)
700 return -ENOMEM;
701 viafb_get_gamma_table(viafb_gamma_table);
702 if (copy_to_user(argp, viafb_gamma_table,
703 sizeof(viafb_gamma_table))) {
704 kfree(viafb_gamma_table);
705 return -EFAULT;
707 kfree(viafb_gamma_table);
708 break;
710 case VIAFB_GET_GAMMA_SUPPORT_STATE:
711 viafb_get_gamma_support_state(viafb_bpp, &state_info);
712 if (put_user(state_info, argp))
713 return -EFAULT;
714 break;
715 case VIAFB_SYNC_SURFACE:
716 DEBUG_MSG(KERN_INFO "lobo VIAFB_SYNC_SURFACE\n");
717 break;
718 case VIAFB_GET_DRIVER_CAPS:
719 break;
721 case VIAFB_GET_PANEL_MAX_SIZE:
722 if (copy_from_user(&u.panel_pos_size_para, argp,
723 sizeof(u.panel_pos_size_para)))
724 return -EFAULT;
725 u.panel_pos_size_para.x = u.panel_pos_size_para.y = 0;
726 if (copy_to_user(argp, &u.panel_pos_size_para,
727 sizeof(u.panel_pos_size_para)))
728 return -EFAULT;
729 break;
730 case VIAFB_GET_PANEL_MAX_POSITION:
731 if (copy_from_user(&u.panel_pos_size_para, argp,
732 sizeof(u.panel_pos_size_para)))
733 return -EFAULT;
734 u.panel_pos_size_para.x = u.panel_pos_size_para.y = 0;
735 if (copy_to_user(argp, &u.panel_pos_size_para,
736 sizeof(u.panel_pos_size_para)))
737 return -EFAULT;
738 break;
740 case VIAFB_GET_PANEL_POSITION:
741 if (copy_from_user(&u.panel_pos_size_para, argp,
742 sizeof(u.panel_pos_size_para)))
743 return -EFAULT;
744 u.panel_pos_size_para.x = u.panel_pos_size_para.y = 0;
745 if (copy_to_user(argp, &u.panel_pos_size_para,
746 sizeof(u.panel_pos_size_para)))
747 return -EFAULT;
748 break;
749 case VIAFB_GET_PANEL_SIZE:
750 if (copy_from_user(&u.panel_pos_size_para, argp,
751 sizeof(u.panel_pos_size_para)))
752 return -EFAULT;
753 u.panel_pos_size_para.x = u.panel_pos_size_para.y = 0;
754 if (copy_to_user(argp, &u.panel_pos_size_para,
755 sizeof(u.panel_pos_size_para)))
756 return -EFAULT;
757 break;
759 case VIAFB_SET_PANEL_POSITION:
760 if (copy_from_user(&u.panel_pos_size_para, argp,
761 sizeof(u.panel_pos_size_para)))
762 return -EFAULT;
763 break;
764 case VIAFB_SET_PANEL_SIZE:
765 if (copy_from_user(&u.panel_pos_size_para, argp,
766 sizeof(u.panel_pos_size_para)))
767 return -EFAULT;
768 break;
770 default:
771 return -EINVAL;
774 return 0;
777 static void viafb_fillrect(struct fb_info *info,
778 const struct fb_fillrect *rect)
780 u32 col = 0, rop = 0;
781 int pitch;
783 if (!viafb_accel) {
784 cfb_fillrect(info, rect);
785 return;
788 if (!rect->width || !rect->height)
789 return;
791 switch (rect->rop) {
792 case ROP_XOR:
793 rop = 0x5A;
794 break;
795 case ROP_COPY:
796 default:
797 rop = 0xF0;
798 break;
801 switch (info->var.bits_per_pixel) {
802 case 8:
803 col = rect->color;
804 break;
805 case 16:
806 col = ((u32 *) (info->pseudo_palette))[rect->color];
807 break;
808 case 32:
809 col = ((u32 *) (info->pseudo_palette))[rect->color];
810 break;
813 /* BitBlt Source Address */
814 writel(0x0, viaparinfo->io_virt + VIA_REG_SRCPOS);
815 /* Source Base Address */
816 writel(0x0, viaparinfo->io_virt + VIA_REG_SRCBASE);
817 /* Destination Base Address */
818 writel((info->fix.smem_start - viafbinfo->fix.smem_start) >> 3,
819 viaparinfo->io_virt + VIA_REG_DSTBASE);
820 /* Pitch */
821 pitch = (info->var.xres_virtual + 7) & ~7;
822 writel(VIA_PITCH_ENABLE |
823 (((pitch *
824 info->var.bits_per_pixel >> 3) >> 3) |
825 (((pitch * info->
826 var.bits_per_pixel >> 3) >> 3) << 16)),
827 viaparinfo->io_virt + VIA_REG_PITCH);
828 /* BitBlt Destination Address */
829 writel(((rect->dy << 16) | rect->dx),
830 viaparinfo->io_virt + VIA_REG_DSTPOS);
831 /* Dimension: width & height */
832 writel((((rect->height - 1) << 16) | (rect->width - 1)),
833 viaparinfo->io_virt + VIA_REG_DIMENSION);
834 /* Forground color or Destination color */
835 writel(col, viaparinfo->io_virt + VIA_REG_FGCOLOR);
836 /* GE Command */
837 writel((0x01 | 0x2000 | (rop << 24)),
838 viaparinfo->io_virt + VIA_REG_GECMD);
842 static void viafb_copyarea(struct fb_info *info,
843 const struct fb_copyarea *area)
845 u32 dy = area->dy, sy = area->sy, direction = 0x0;
846 u32 sx = area->sx, dx = area->dx, width = area->width;
847 int pitch;
849 DEBUG_MSG(KERN_INFO "viafb_copyarea!!\n");
851 if (!viafb_accel) {
852 cfb_copyarea(info, area);
853 return;
856 if (!area->width || !area->height)
857 return;
859 if (sy < dy) {
860 dy += area->height - 1;
861 sy += area->height - 1;
862 direction |= 0x4000;
865 if (sx < dx) {
866 dx += width - 1;
867 sx += width - 1;
868 direction |= 0x8000;
871 /* Source Base Address */
872 writel((info->fix.smem_start - viafbinfo->fix.smem_start) >> 3,
873 viaparinfo->io_virt + VIA_REG_SRCBASE);
874 /* Destination Base Address */
875 writel((info->fix.smem_start - viafbinfo->fix.smem_start) >> 3,
876 viaparinfo->io_virt + VIA_REG_DSTBASE);
877 /* Pitch */
878 pitch = (info->var.xres_virtual + 7) & ~7;
879 /* VIA_PITCH_ENABLE can be omitted now. */
880 writel(VIA_PITCH_ENABLE |
881 (((pitch *
882 info->var.bits_per_pixel >> 3) >> 3) | (((pitch *
883 info->var.
884 bits_per_pixel
885 >> 3) >> 3)
886 << 16)),
887 viaparinfo->io_virt + VIA_REG_PITCH);
888 /* BitBlt Source Address */
889 writel(((sy << 16) | sx), viaparinfo->io_virt + VIA_REG_SRCPOS);
890 /* BitBlt Destination Address */
891 writel(((dy << 16) | dx), viaparinfo->io_virt + VIA_REG_DSTPOS);
892 /* Dimension: width & height */
893 writel((((area->height - 1) << 16) | (area->width - 1)),
894 viaparinfo->io_virt + VIA_REG_DIMENSION);
895 /* GE Command */
896 writel((0x01 | direction | (0xCC << 24)),
897 viaparinfo->io_virt + VIA_REG_GECMD);
901 static void viafb_imageblit(struct fb_info *info,
902 const struct fb_image *image)
904 u32 size, bg_col = 0, fg_col = 0, *udata;
905 int i;
906 int pitch;
908 if (!viafb_accel) {
909 cfb_imageblit(info, image);
910 return;
913 udata = (u32 *) image->data;
915 switch (info->var.bits_per_pixel) {
916 case 8:
917 bg_col = image->bg_color;
918 fg_col = image->fg_color;
919 break;
920 case 16:
921 bg_col = ((u32 *) (info->pseudo_palette))[image->bg_color];
922 fg_col = ((u32 *) (info->pseudo_palette))[image->fg_color];
923 break;
924 case 32:
925 bg_col = ((u32 *) (info->pseudo_palette))[image->bg_color];
926 fg_col = ((u32 *) (info->pseudo_palette))[image->fg_color];
927 break;
929 size = image->width * image->height;
931 /* Source Base Address */
932 writel(0x0, viaparinfo->io_virt + VIA_REG_SRCBASE);
933 /* Destination Base Address */
934 writel((info->fix.smem_start - viafbinfo->fix.smem_start) >> 3,
935 viaparinfo->io_virt + VIA_REG_DSTBASE);
936 /* Pitch */
937 pitch = (info->var.xres_virtual + 7) & ~7;
938 writel(VIA_PITCH_ENABLE |
939 (((pitch *
940 info->var.bits_per_pixel >> 3) >> 3) | (((pitch *
941 info->var.
942 bits_per_pixel
943 >> 3) >> 3)
944 << 16)),
945 viaparinfo->io_virt + VIA_REG_PITCH);
946 /* BitBlt Source Address */
947 writel(0x0, viaparinfo->io_virt + VIA_REG_SRCPOS);
948 /* BitBlt Destination Address */
949 writel(((image->dy << 16) | image->dx),
950 viaparinfo->io_virt + VIA_REG_DSTPOS);
951 /* Dimension: width & height */
952 writel((((image->height - 1) << 16) | (image->width - 1)),
953 viaparinfo->io_virt + VIA_REG_DIMENSION);
954 /* fb color */
955 writel(fg_col, viaparinfo->io_virt + VIA_REG_FGCOLOR);
956 /* bg color */
957 writel(bg_col, viaparinfo->io_virt + VIA_REG_BGCOLOR);
958 /* GE Command */
959 writel(0xCC020142, viaparinfo->io_virt + VIA_REG_GECMD);
961 for (i = 0; i < size / 4; i++) {
962 writel(*udata, viaparinfo->io_virt + VIA_MMIO_BLTBASE);
963 udata++;
968 static int viafb_cursor(struct fb_info *info, struct fb_cursor *cursor)
970 u32 temp, xx, yy, bg_col = 0, fg_col = 0;
971 int i, j = 0;
972 static int hw_cursor;
973 struct viafb_par *p_viafb_par;
975 if (viafb_accel)
976 hw_cursor = 1;
978 if (!viafb_accel) {
979 if (hw_cursor) {
980 viafb_show_hw_cursor(info, HW_Cursor_OFF);
981 hw_cursor = 0;
983 return -ENODEV;
986 if ((((struct viafb_par *)(info->par))->iga_path == IGA2)
987 && (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266))
988 return -ENODEV;
990 /* When duoview and using lcd , use soft cursor */
991 if (viafb_LCD_ON || (!viafb_SAMM_ON &&
992 viafb_LCD2_ON + viafb_DVI_ON + viafb_CRT_ON == 2))
993 return -ENODEV;
995 viafb_show_hw_cursor(info, HW_Cursor_OFF);
996 viacursor = *cursor;
998 if (cursor->set & FB_CUR_SETHOT) {
999 viacursor.hot = cursor->hot;
1000 temp = ((viacursor.hot.x) << 16) + viacursor.hot.y;
1001 writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_ORG);
1004 if (cursor->set & FB_CUR_SETPOS) {
1005 viacursor.image.dx = cursor->image.dx;
1006 viacursor.image.dy = cursor->image.dy;
1007 yy = cursor->image.dy - info->var.yoffset;
1008 xx = cursor->image.dx - info->var.xoffset;
1009 temp = yy & 0xFFFF;
1010 temp |= (xx << 16);
1011 writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_POS);
1014 if (cursor->set & FB_CUR_SETSIZE) {
1015 temp = readl(viaparinfo->io_virt + VIA_REG_CURSOR_MODE);
1017 if ((cursor->image.width <= 32)
1018 && (cursor->image.height <= 32)) {
1019 MAX_CURS = 32;
1020 temp |= 0x2;
1021 } else if ((cursor->image.width <= 64)
1022 && (cursor->image.height <= 64)) {
1023 MAX_CURS = 64;
1024 temp &= 0xFFFFFFFD;
1025 } else {
1026 DEBUG_MSG(KERN_INFO
1027 "The cursor image is biger than 64x64 bits...\n");
1028 return -ENXIO;
1030 writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_MODE);
1032 viacursor.image.height = cursor->image.height;
1033 viacursor.image.width = cursor->image.width;
1036 if (cursor->set & FB_CUR_SETCMAP) {
1037 viacursor.image.fg_color = cursor->image.fg_color;
1038 viacursor.image.bg_color = cursor->image.bg_color;
1040 switch (info->var.bits_per_pixel) {
1041 case 8:
1042 case 16:
1043 case 32:
1044 bg_col =
1045 (0xFF << 24) |
1046 (((info->cmap.red)[viacursor.image.bg_color] &
1047 0xFF00) << 8) |
1048 ((info->cmap.green)[viacursor.image.bg_color] &
1049 0xFF00) |
1050 (((info->cmap.blue)[viacursor.image.bg_color] &
1051 0xFF00) >> 8);
1052 fg_col =
1053 (0xFF << 24) |
1054 (((info->cmap.red)[viacursor.image.fg_color] &
1055 0xFF00) << 8) |
1056 ((info->cmap.green)[viacursor.image.fg_color] &
1057 0xFF00) |
1058 (((info->cmap.blue)[viacursor.image.fg_color] &
1059 0xFF00) >> 8);
1060 break;
1061 default:
1062 return 0;
1065 /* This is indeed a patch for VT3324/VT3353 */
1066 if (!info->par)
1067 return 0;
1068 p_viafb_par = (struct viafb_par *)info->par;
1070 if ((p_viafb_par->chip_info->gfx_chip_name ==
1071 UNICHROME_CX700) ||
1072 ((p_viafb_par->chip_info->gfx_chip_name ==
1073 UNICHROME_VX800))) {
1074 bg_col =
1075 (((info->cmap.red)[viacursor.image.bg_color] &
1076 0xFFC0) << 14) |
1077 (((info->cmap.green)[viacursor.image.bg_color] &
1078 0xFFC0) << 4) |
1079 (((info->cmap.blue)[viacursor.image.bg_color] &
1080 0xFFC0) >> 6);
1081 fg_col =
1082 (((info->cmap.red)[viacursor.image.fg_color] &
1083 0xFFC0) << 14) |
1084 (((info->cmap.green)[viacursor.image.fg_color] &
1085 0xFFC0) << 4) |
1086 (((info->cmap.blue)[viacursor.image.fg_color] &
1087 0xFFC0) >> 6);
1090 writel(bg_col, viaparinfo->io_virt + VIA_REG_CURSOR_BG);
1091 writel(fg_col, viaparinfo->io_virt + VIA_REG_CURSOR_FG);
1094 if (cursor->set & FB_CUR_SETSHAPE) {
1095 struct {
1096 u8 data[CURSOR_SIZE / 8];
1097 u32 bak[CURSOR_SIZE / 32];
1098 } *cr_data = kzalloc(sizeof(*cr_data), GFP_ATOMIC);
1099 int size =
1100 ((viacursor.image.width + 7) >> 3) *
1101 viacursor.image.height;
1103 if (cr_data == NULL)
1104 goto out;
1106 if (MAX_CURS == 32) {
1107 for (i = 0; i < (CURSOR_SIZE / 32); i++) {
1108 cr_data->bak[i] = 0x0;
1109 cr_data->bak[i + 1] = 0xFFFFFFFF;
1110 i += 1;
1112 } else if (MAX_CURS == 64) {
1113 for (i = 0; i < (CURSOR_SIZE / 32); i++) {
1114 cr_data->bak[i] = 0x0;
1115 cr_data->bak[i + 1] = 0x0;
1116 cr_data->bak[i + 2] = 0xFFFFFFFF;
1117 cr_data->bak[i + 3] = 0xFFFFFFFF;
1118 i += 3;
1122 switch (viacursor.rop) {
1123 case ROP_XOR:
1124 for (i = 0; i < size; i++)
1125 cr_data->data[i] = viacursor.mask[i];
1126 break;
1127 case ROP_COPY:
1129 for (i = 0; i < size; i++)
1130 cr_data->data[i] = viacursor.mask[i];
1131 break;
1132 default:
1133 break;
1136 if (MAX_CURS == 32) {
1137 for (i = 0; i < size; i++) {
1138 cr_data->bak[j] = (u32) cr_data->data[i];
1139 cr_data->bak[j + 1] = ~cr_data->bak[j];
1140 j += 2;
1142 } else if (MAX_CURS == 64) {
1143 for (i = 0; i < size; i++) {
1144 cr_data->bak[j] = (u32) cr_data->data[i];
1145 cr_data->bak[j + 1] = 0x0;
1146 cr_data->bak[j + 2] = ~cr_data->bak[j];
1147 cr_data->bak[j + 3] = ~cr_data->bak[j + 1];
1148 j += 4;
1152 memcpy(viafbinfo->screen_base +
1153 ((struct viafb_par *)(info->par))->cursor_start,
1154 cr_data->bak, CURSOR_SIZE);
1155 out:
1156 kfree(cr_data);
1159 if (viacursor.enable)
1160 viafb_show_hw_cursor(info, HW_Cursor_ON);
1162 return 0;
1165 static int viafb_sync(struct fb_info *info)
1167 if (viafb_accel)
1168 viafb_wait_engine_idle();
1169 return 0;
1172 int viafb_get_mode_index(int hres, int vres)
1174 u32 i;
1175 DEBUG_MSG(KERN_INFO "viafb_get_mode_index!\n");
1177 for (i = 0; i < NUM_TOTAL_MODETABLE; i++)
1178 if (CLE266Modes[i].mode_array &&
1179 CLE266Modes[i].crtc[0].crtc.hor_addr == hres &&
1180 CLE266Modes[i].crtc[0].crtc.ver_addr == vres)
1181 break;
1183 if (i == NUM_TOTAL_MODETABLE)
1184 return VIA_RES_INVALID;
1186 return CLE266Modes[i].ModeIndex;
1189 static void check_available_device_to_enable(int device_id)
1191 int device_num = 0;
1193 /* Initialize: */
1194 viafb_CRT_ON = STATE_OFF;
1195 viafb_DVI_ON = STATE_OFF;
1196 viafb_LCD_ON = STATE_OFF;
1197 viafb_LCD2_ON = STATE_OFF;
1198 viafb_DeviceStatus = None_Device;
1200 if ((device_id & CRT_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) {
1201 viafb_CRT_ON = STATE_ON;
1202 device_num++;
1203 viafb_DeviceStatus |= CRT_Device;
1206 if ((device_id & DVI_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) {
1207 viafb_DVI_ON = STATE_ON;
1208 device_num++;
1209 viafb_DeviceStatus |= DVI_Device;
1212 if ((device_id & LCD_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) {
1213 viafb_LCD_ON = STATE_ON;
1214 device_num++;
1215 viafb_DeviceStatus |= LCD_Device;
1218 if ((device_id & LCD2_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) {
1219 viafb_LCD2_ON = STATE_ON;
1220 device_num++;
1221 viafb_DeviceStatus |= LCD2_Device;
1224 if (viafb_DeviceStatus == None_Device) {
1225 /* Use CRT as default active device: */
1226 viafb_CRT_ON = STATE_ON;
1227 viafb_DeviceStatus = CRT_Device;
1229 DEBUG_MSG(KERN_INFO "Device Status:%x", viafb_DeviceStatus);
1232 static void viafb_set_device(struct device_t active_dev)
1234 /* Check available device to enable: */
1235 int device_id = None_Device;
1236 if (active_dev.crt)
1237 device_id |= CRT_Device;
1238 if (active_dev.dvi)
1239 device_id |= DVI_Device;
1240 if (active_dev.lcd)
1241 device_id |= LCD_Device;
1243 check_available_device_to_enable(device_id);
1245 /* Check property of LCD: */
1246 if (viafb_LCD_ON) {
1247 if (active_dev.lcd_dsp_cent) {
1248 viaparinfo->lvds_setting_info->display_method =
1249 viafb_lcd_dsp_method = LCD_CENTERING;
1250 } else {
1251 viaparinfo->lvds_setting_info->display_method =
1252 viafb_lcd_dsp_method = LCD_EXPANDSION;
1255 if (active_dev.lcd_mode == LCD_SPWG) {
1256 viaparinfo->lvds_setting_info->lcd_mode =
1257 viafb_lcd_mode = LCD_SPWG;
1258 } else {
1259 viaparinfo->lvds_setting_info->lcd_mode =
1260 viafb_lcd_mode = LCD_OPENLDI;
1263 if (active_dev.lcd_panel_id <= LCD_PANEL_ID_MAXIMUM) {
1264 viafb_lcd_panel_id = active_dev.lcd_panel_id;
1265 viafb_init_lcd_size();
1269 /* Check property of mode: */
1270 if (!active_dev.xres1)
1271 viafb_second_xres = 640;
1272 else
1273 viafb_second_xres = active_dev.xres1;
1274 if (!active_dev.yres1)
1275 viafb_second_yres = 480;
1276 else
1277 viafb_second_yres = active_dev.yres1;
1278 if (active_dev.bpp != 0)
1279 viafb_bpp = active_dev.bpp;
1280 if (active_dev.bpp1 != 0)
1281 viafb_bpp1 = active_dev.bpp1;
1282 if (active_dev.refresh != 0)
1283 viafb_refresh = active_dev.refresh;
1284 if (active_dev.refresh1 != 0)
1285 viafb_refresh1 = active_dev.refresh1;
1286 if ((active_dev.samm == STATE_OFF) || (active_dev.samm == STATE_ON))
1287 viafb_SAMM_ON = active_dev.samm;
1288 viafb_primary_dev = active_dev.primary_dev;
1290 viafb_set_primary_address(0);
1291 viafb_set_secondary_address(viafb_SAMM_ON ? viafb_second_offset : 0);
1292 viafb_set_iga_path();
1295 static int get_primary_device(void)
1297 int primary_device = 0;
1298 /* Rule: device on iga1 path are the primary device. */
1299 if (viafb_SAMM_ON) {
1300 if (viafb_CRT_ON) {
1301 if (viaparinfo->crt_setting_info->iga_path == IGA1) {
1302 DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n",
1303 viaparinfo->
1304 crt_setting_info->iga_path);
1305 primary_device = CRT_Device;
1308 if (viafb_DVI_ON) {
1309 if (viaparinfo->tmds_setting_info->iga_path == IGA1) {
1310 DEBUG_MSG(KERN_INFO "DVI IGA Path:%d\n",
1311 viaparinfo->
1312 tmds_setting_info->iga_path);
1313 primary_device = DVI_Device;
1316 if (viafb_LCD_ON) {
1317 if (viaparinfo->lvds_setting_info->iga_path == IGA1) {
1318 DEBUG_MSG(KERN_INFO "LCD IGA Path:%d\n",
1319 viaparinfo->
1320 lvds_setting_info->iga_path);
1321 primary_device = LCD_Device;
1324 if (viafb_LCD2_ON) {
1325 if (viaparinfo->lvds_setting_info2->iga_path == IGA1) {
1326 DEBUG_MSG(KERN_INFO "LCD2 IGA Path:%d\n",
1327 viaparinfo->
1328 lvds_setting_info2->iga_path);
1329 primary_device = LCD2_Device;
1333 return primary_device;
1336 static void apply_second_mode_setting(struct fb_var_screeninfo
1337 *sec_var)
1339 u32 htotal, vtotal, long_refresh;
1341 htotal = sec_var->xres + sec_var->left_margin +
1342 sec_var->right_margin + sec_var->hsync_len;
1343 vtotal = sec_var->yres + sec_var->upper_margin +
1344 sec_var->lower_margin + sec_var->vsync_len;
1345 if ((sec_var->xres_virtual * (sec_var->bits_per_pixel >> 3)) & 0x1F) {
1346 /*Is 32 bytes alignment? */
1347 /*32 pixel alignment */
1348 sec_var->xres_virtual = (sec_var->xres_virtual + 31) & ~31;
1351 htotal = sec_var->xres + sec_var->left_margin +
1352 sec_var->right_margin + sec_var->hsync_len;
1353 vtotal = sec_var->yres + sec_var->upper_margin +
1354 sec_var->lower_margin + sec_var->vsync_len;
1355 long_refresh = 1000000000UL / sec_var->pixclock * 1000;
1356 long_refresh /= (htotal * vtotal);
1358 viafb_second_xres = sec_var->xres;
1359 viafb_second_yres = sec_var->yres;
1360 viafb_second_virtual_xres = sec_var->xres_virtual;
1361 viafb_second_virtual_yres = sec_var->yres_virtual;
1362 viafb_bpp1 = sec_var->bits_per_pixel;
1363 viafb_refresh1 = viafb_get_refresh(sec_var->xres, sec_var->yres,
1364 long_refresh);
1367 static int apply_device_setting(struct viafb_ioctl_setting setting_info,
1368 struct fb_info *info)
1370 int need_set_mode = 0;
1371 DEBUG_MSG(KERN_INFO "apply_device_setting\n");
1373 if (setting_info.device_flag) {
1374 need_set_mode = 1;
1375 check_available_device_to_enable(setting_info.device_status);
1378 /* Unlock LCD's operation according to LCD flag
1379 and check if the setting value is valid. */
1380 /* If the value is valid, apply the new setting value to the device. */
1381 if (viafb_LCD_ON) {
1382 if (setting_info.lcd_operation_flag & OP_LCD_CENTERING) {
1383 need_set_mode = 1;
1384 if (setting_info.lcd_attributes.display_center) {
1385 /* Centering */
1386 viaparinfo->lvds_setting_info->display_method =
1387 LCD_CENTERING;
1388 viafb_lcd_dsp_method = LCD_CENTERING;
1389 viaparinfo->lvds_setting_info2->display_method =
1390 viafb_lcd_dsp_method = LCD_CENTERING;
1391 } else {
1392 /* expandsion */
1393 viaparinfo->lvds_setting_info->display_method =
1394 LCD_EXPANDSION;
1395 viafb_lcd_dsp_method = LCD_EXPANDSION;
1396 viaparinfo->lvds_setting_info2->display_method =
1397 LCD_EXPANDSION;
1398 viafb_lcd_dsp_method = LCD_EXPANDSION;
1402 if (setting_info.lcd_operation_flag & OP_LCD_MODE) {
1403 need_set_mode = 1;
1404 if (setting_info.lcd_attributes.lcd_mode ==
1405 LCD_SPWG) {
1406 viaparinfo->lvds_setting_info->lcd_mode =
1407 viafb_lcd_mode = LCD_SPWG;
1408 } else {
1409 viaparinfo->lvds_setting_info->lcd_mode =
1410 viafb_lcd_mode = LCD_OPENLDI;
1412 viaparinfo->lvds_setting_info2->lcd_mode =
1413 viaparinfo->lvds_setting_info->lcd_mode;
1416 if (setting_info.lcd_operation_flag & OP_LCD_PANEL_ID) {
1417 need_set_mode = 1;
1418 if (setting_info.lcd_attributes.panel_id <=
1419 LCD_PANEL_ID_MAXIMUM) {
1420 viafb_lcd_panel_id =
1421 setting_info.lcd_attributes.panel_id;
1422 viafb_init_lcd_size();
1427 if (0 != (setting_info.samm_status & OP_SAMM)) {
1428 setting_info.samm_status =
1429 setting_info.samm_status & (~OP_SAMM);
1430 if (setting_info.samm_status == 0
1431 || setting_info.samm_status == 1) {
1432 viafb_SAMM_ON = setting_info.samm_status;
1434 if (viafb_SAMM_ON)
1435 viafb_primary_dev = setting_info.primary_device;
1437 viafb_set_primary_address(0);
1438 viafb_set_secondary_address(viafb_SAMM_ON ? viafb_second_offset : 0);
1439 viafb_set_iga_path();
1441 need_set_mode = 1;
1444 if (!need_set_mode) {
1446 } else {
1447 viafb_set_iga_path();
1448 viafb_set_par(info);
1450 return true;
1453 static void retrieve_device_setting(struct viafb_ioctl_setting
1454 *setting_info)
1457 /* get device status */
1458 if (viafb_CRT_ON == 1)
1459 setting_info->device_status = CRT_Device;
1460 if (viafb_DVI_ON == 1)
1461 setting_info->device_status |= DVI_Device;
1462 if (viafb_LCD_ON == 1)
1463 setting_info->device_status |= LCD_Device;
1464 if (viafb_LCD2_ON == 1)
1465 setting_info->device_status |= LCD2_Device;
1467 setting_info->samm_status = viafb_SAMM_ON;
1468 setting_info->primary_device = get_primary_device();
1470 setting_info->first_dev_bpp = viafb_bpp;
1471 setting_info->second_dev_bpp = viafb_bpp1;
1473 setting_info->first_dev_refresh = viafb_refresh;
1474 setting_info->second_dev_refresh = viafb_refresh1;
1476 setting_info->first_dev_hor_res = viafb_hotplug_Xres;
1477 setting_info->first_dev_ver_res = viafb_hotplug_Yres;
1478 setting_info->second_dev_hor_res = viafb_second_xres;
1479 setting_info->second_dev_ver_res = viafb_second_yres;
1481 /* Get lcd attributes */
1482 setting_info->lcd_attributes.display_center = viafb_lcd_dsp_method;
1483 setting_info->lcd_attributes.panel_id = viafb_lcd_panel_id;
1484 setting_info->lcd_attributes.lcd_mode = viafb_lcd_mode;
1487 static void parse_active_dev(void)
1489 viafb_CRT_ON = STATE_OFF;
1490 viafb_DVI_ON = STATE_OFF;
1491 viafb_LCD_ON = STATE_OFF;
1492 viafb_LCD2_ON = STATE_OFF;
1493 /* 1. Modify the active status of devices. */
1494 /* 2. Keep the order of devices, so we can set corresponding
1495 IGA path to devices in SAMM case. */
1496 /* Note: The previous of active_dev is primary device,
1497 and the following is secondary device. */
1498 if (!strncmp(viafb_active_dev, "CRT+DVI", 7)) {
1499 /* CRT+DVI */
1500 viafb_CRT_ON = STATE_ON;
1501 viafb_DVI_ON = STATE_ON;
1502 viafb_primary_dev = CRT_Device;
1503 } else if (!strncmp(viafb_active_dev, "DVI+CRT", 7)) {
1504 /* DVI+CRT */
1505 viafb_CRT_ON = STATE_ON;
1506 viafb_DVI_ON = STATE_ON;
1507 viafb_primary_dev = DVI_Device;
1508 } else if (!strncmp(viafb_active_dev, "CRT+LCD", 7)) {
1509 /* CRT+LCD */
1510 viafb_CRT_ON = STATE_ON;
1511 viafb_LCD_ON = STATE_ON;
1512 viafb_primary_dev = CRT_Device;
1513 } else if (!strncmp(viafb_active_dev, "LCD+CRT", 7)) {
1514 /* LCD+CRT */
1515 viafb_CRT_ON = STATE_ON;
1516 viafb_LCD_ON = STATE_ON;
1517 viafb_primary_dev = LCD_Device;
1518 } else if (!strncmp(viafb_active_dev, "DVI+LCD", 7)) {
1519 /* DVI+LCD */
1520 viafb_DVI_ON = STATE_ON;
1521 viafb_LCD_ON = STATE_ON;
1522 viafb_primary_dev = DVI_Device;
1523 } else if (!strncmp(viafb_active_dev, "LCD+DVI", 7)) {
1524 /* LCD+DVI */
1525 viafb_DVI_ON = STATE_ON;
1526 viafb_LCD_ON = STATE_ON;
1527 viafb_primary_dev = LCD_Device;
1528 } else if (!strncmp(viafb_active_dev, "LCD+LCD2", 8)) {
1529 viafb_LCD_ON = STATE_ON;
1530 viafb_LCD2_ON = STATE_ON;
1531 viafb_primary_dev = LCD_Device;
1532 } else if (!strncmp(viafb_active_dev, "LCD2+LCD", 8)) {
1533 viafb_LCD_ON = STATE_ON;
1534 viafb_LCD2_ON = STATE_ON;
1535 viafb_primary_dev = LCD2_Device;
1536 } else if (!strncmp(viafb_active_dev, "CRT", 3)) {
1537 /* CRT only */
1538 viafb_CRT_ON = STATE_ON;
1539 viafb_SAMM_ON = STATE_OFF;
1540 } else if (!strncmp(viafb_active_dev, "DVI", 3)) {
1541 /* DVI only */
1542 viafb_DVI_ON = STATE_ON;
1543 viafb_SAMM_ON = STATE_OFF;
1544 } else if (!strncmp(viafb_active_dev, "LCD", 3)) {
1545 /* LCD only */
1546 viafb_LCD_ON = STATE_ON;
1547 viafb_SAMM_ON = STATE_OFF;
1548 } else {
1549 viafb_CRT_ON = STATE_ON;
1550 viafb_SAMM_ON = STATE_OFF;
1554 static int parse_port(char *opt_str, int *output_interface)
1556 if (!strncmp(opt_str, "DVP0", 4))
1557 *output_interface = INTERFACE_DVP0;
1558 else if (!strncmp(opt_str, "DVP1", 4))
1559 *output_interface = INTERFACE_DVP1;
1560 else if (!strncmp(opt_str, "DFP_HIGHLOW", 11))
1561 *output_interface = INTERFACE_DFP;
1562 else if (!strncmp(opt_str, "DFP_HIGH", 8))
1563 *output_interface = INTERFACE_DFP_HIGH;
1564 else if (!strncmp(opt_str, "DFP_LOW", 7))
1565 *output_interface = INTERFACE_DFP_LOW;
1566 else
1567 *output_interface = INTERFACE_NONE;
1568 return 0;
1571 static void parse_lcd_port(void)
1573 parse_port(viafb_lcd_port, &viaparinfo->chip_info->lvds_chip_info.
1574 output_interface);
1575 /*Initialize to avoid unexpected behavior */
1576 viaparinfo->chip_info->lvds_chip_info2.output_interface =
1577 INTERFACE_NONE;
1579 DEBUG_MSG(KERN_INFO "parse_lcd_port: viafb_lcd_port:%s,interface:%d\n",
1580 viafb_lcd_port, viaparinfo->chip_info->lvds_chip_info.
1581 output_interface);
1584 static void parse_dvi_port(void)
1586 parse_port(viafb_dvi_port, &viaparinfo->chip_info->tmds_chip_info.
1587 output_interface);
1589 DEBUG_MSG(KERN_INFO "parse_dvi_port: viafb_dvi_port:%s,interface:%d\n",
1590 viafb_dvi_port, viaparinfo->chip_info->tmds_chip_info.
1591 output_interface);
1595 * The proc filesystem read/write function, a simple proc implement to
1596 * get/set the value of DPA DVP0, DVP0DataDriving, DVP0ClockDriving, DVP1,
1597 * DVP1Driving, DFPHigh, DFPLow CR96, SR2A[5], SR1B[1], SR2A[4], SR1E[2],
1598 * CR9B, SR65, CR97, CR99
1600 static int viafb_dvp0_proc_read(char *buf, char **start, off_t offset,
1601 int count, int *eof, void *data)
1603 int len = 0;
1604 u8 dvp0_data_dri = 0, dvp0_clk_dri = 0, dvp0 = 0;
1605 dvp0_data_dri =
1606 (viafb_read_reg(VIASR, SR2A) & BIT5) >> 4 |
1607 (viafb_read_reg(VIASR, SR1B) & BIT1) >> 1;
1608 dvp0_clk_dri =
1609 (viafb_read_reg(VIASR, SR2A) & BIT4) >> 3 |
1610 (viafb_read_reg(VIASR, SR1E) & BIT2) >> 2;
1611 dvp0 = viafb_read_reg(VIACR, CR96) & 0x0f;
1612 len +=
1613 sprintf(buf + len, "%x %x %x\n", dvp0, dvp0_data_dri, dvp0_clk_dri);
1614 *eof = 1; /*Inform kernel end of data */
1615 return len;
1617 static int viafb_dvp0_proc_write(struct file *file,
1618 const char __user *buffer, unsigned long count, void *data)
1620 char buf[20], *value, *pbuf;
1621 u8 reg_val = 0;
1622 unsigned long length, i;
1623 if (count < 1)
1624 return -EINVAL;
1625 length = count > 20 ? 20 : count;
1626 if (copy_from_user(&buf[0], buffer, length))
1627 return -EFAULT;
1628 buf[length - 1] = '\0'; /*Ensure end string */
1629 pbuf = &buf[0];
1630 for (i = 0; i < 3; i++) {
1631 value = strsep(&pbuf, " ");
1632 if (value != NULL) {
1633 strict_strtoul(value, 0, (unsigned long *)&reg_val);
1634 DEBUG_MSG(KERN_INFO "DVP0:reg_val[%l]=:%x\n", i,
1635 reg_val);
1636 switch (i) {
1637 case 0:
1638 viafb_write_reg_mask(CR96, VIACR,
1639 reg_val, 0x0f);
1640 break;
1641 case 1:
1642 viafb_write_reg_mask(SR2A, VIASR,
1643 reg_val << 4, BIT5);
1644 viafb_write_reg_mask(SR1B, VIASR,
1645 reg_val << 1, BIT1);
1646 break;
1647 case 2:
1648 viafb_write_reg_mask(SR2A, VIASR,
1649 reg_val << 3, BIT4);
1650 viafb_write_reg_mask(SR1E, VIASR,
1651 reg_val << 2, BIT2);
1652 break;
1653 default:
1654 break;
1656 } else {
1657 break;
1660 return count;
1662 static int viafb_dvp1_proc_read(char *buf, char **start, off_t offset,
1663 int count, int *eof, void *data)
1665 int len = 0;
1666 u8 dvp1 = 0, dvp1_data_dri = 0, dvp1_clk_dri = 0;
1667 dvp1 = viafb_read_reg(VIACR, CR9B) & 0x0f;
1668 dvp1_data_dri = (viafb_read_reg(VIASR, SR65) & 0x0c) >> 2;
1669 dvp1_clk_dri = viafb_read_reg(VIASR, SR65) & 0x03;
1670 len +=
1671 sprintf(buf + len, "%x %x %x\n", dvp1, dvp1_data_dri, dvp1_clk_dri);
1672 *eof = 1; /*Inform kernel end of data */
1673 return len;
1675 static int viafb_dvp1_proc_write(struct file *file,
1676 const char __user *buffer, unsigned long count, void *data)
1678 char buf[20], *value, *pbuf;
1679 u8 reg_val = 0;
1680 unsigned long length, i;
1681 if (count < 1)
1682 return -EINVAL;
1683 length = count > 20 ? 20 : count;
1684 if (copy_from_user(&buf[0], buffer, length))
1685 return -EFAULT;
1686 buf[length - 1] = '\0'; /*Ensure end string */
1687 pbuf = &buf[0];
1688 for (i = 0; i < 3; i++) {
1689 value = strsep(&pbuf, " ");
1690 if (value != NULL) {
1691 strict_strtoul(value, 0, (unsigned long *)&reg_val);
1692 switch (i) {
1693 case 0:
1694 viafb_write_reg_mask(CR9B, VIACR,
1695 reg_val, 0x0f);
1696 break;
1697 case 1:
1698 viafb_write_reg_mask(SR65, VIASR,
1699 reg_val << 2, 0x0c);
1700 break;
1701 case 2:
1702 viafb_write_reg_mask(SR65, VIASR,
1703 reg_val, 0x03);
1704 break;
1705 default:
1706 break;
1708 } else {
1709 break;
1712 return count;
1715 static int viafb_dfph_proc_read(char *buf, char **start, off_t offset,
1716 int count, int *eof, void *data)
1718 int len = 0;
1719 u8 dfp_high = 0;
1720 dfp_high = viafb_read_reg(VIACR, CR97) & 0x0f;
1721 len += sprintf(buf + len, "%x\n", dfp_high);
1722 *eof = 1; /*Inform kernel end of data */
1723 return len;
1725 static int viafb_dfph_proc_write(struct file *file,
1726 const char __user *buffer, unsigned long count, void *data)
1728 char buf[20];
1729 u8 reg_val = 0;
1730 unsigned long length;
1731 if (count < 1)
1732 return -EINVAL;
1733 length = count > 20 ? 20 : count;
1734 if (copy_from_user(&buf[0], buffer, length))
1735 return -EFAULT;
1736 buf[length - 1] = '\0'; /*Ensure end string */
1737 strict_strtoul(&buf[0], 0, (unsigned long *)&reg_val);
1738 viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f);
1739 return count;
1741 static int viafb_dfpl_proc_read(char *buf, char **start, off_t offset,
1742 int count, int *eof, void *data)
1744 int len = 0;
1745 u8 dfp_low = 0;
1746 dfp_low = viafb_read_reg(VIACR, CR99) & 0x0f;
1747 len += sprintf(buf + len, "%x\n", dfp_low);
1748 *eof = 1; /*Inform kernel end of data */
1749 return len;
1751 static int viafb_dfpl_proc_write(struct file *file,
1752 const char __user *buffer, unsigned long count, void *data)
1754 char buf[20];
1755 u8 reg_val = 0;
1756 unsigned long length;
1757 if (count < 1)
1758 return -EINVAL;
1759 length = count > 20 ? 20 : count;
1760 if (copy_from_user(&buf[0], buffer, length))
1761 return -EFAULT;
1762 buf[length - 1] = '\0'; /*Ensure end string */
1763 strict_strtoul(&buf[0], 0, (unsigned long *)&reg_val);
1764 viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f);
1765 return count;
1767 static int viafb_vt1636_proc_read(char *buf, char **start,
1768 off_t offset, int count, int *eof, void *data)
1770 int len = 0;
1771 u8 vt1636_08 = 0, vt1636_09 = 0;
1772 switch (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
1773 case VT1636_LVDS:
1774 vt1636_08 =
1775 viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info,
1776 &viaparinfo->chip_info->lvds_chip_info, 0x08) & 0x0f;
1777 vt1636_09 =
1778 viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info,
1779 &viaparinfo->chip_info->lvds_chip_info, 0x09) & 0x1f;
1780 len += sprintf(buf + len, "%x %x\n", vt1636_08, vt1636_09);
1781 break;
1782 default:
1783 break;
1785 switch (viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) {
1786 case VT1636_LVDS:
1787 vt1636_08 =
1788 viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info2,
1789 &viaparinfo->chip_info->lvds_chip_info2, 0x08) & 0x0f;
1790 vt1636_09 =
1791 viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info2,
1792 &viaparinfo->chip_info->lvds_chip_info2, 0x09) & 0x1f;
1793 len += sprintf(buf + len, " %x %x\n", vt1636_08, vt1636_09);
1794 break;
1795 default:
1796 break;
1798 *eof = 1; /*Inform kernel end of data */
1799 return len;
1801 static int viafb_vt1636_proc_write(struct file *file,
1802 const char __user *buffer, unsigned long count, void *data)
1804 char buf[30], *value, *pbuf;
1805 struct IODATA reg_val;
1806 unsigned long length, i;
1807 if (count < 1)
1808 return -EINVAL;
1809 length = count > 30 ? 30 : count;
1810 if (copy_from_user(&buf[0], buffer, length))
1811 return -EFAULT;
1812 buf[length - 1] = '\0'; /*Ensure end string */
1813 pbuf = &buf[0];
1814 switch (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
1815 case VT1636_LVDS:
1816 for (i = 0; i < 2; i++) {
1817 value = strsep(&pbuf, " ");
1818 if (value != NULL) {
1819 strict_strtoul(value, 0,
1820 (unsigned long *)&reg_val.Data);
1821 switch (i) {
1822 case 0:
1823 reg_val.Index = 0x08;
1824 reg_val.Mask = 0x0f;
1825 viafb_gpio_i2c_write_mask_lvds
1826 (viaparinfo->lvds_setting_info,
1827 &viaparinfo->
1828 chip_info->lvds_chip_info,
1829 reg_val);
1830 break;
1831 case 1:
1832 reg_val.Index = 0x09;
1833 reg_val.Mask = 0x1f;
1834 viafb_gpio_i2c_write_mask_lvds
1835 (viaparinfo->lvds_setting_info,
1836 &viaparinfo->
1837 chip_info->lvds_chip_info,
1838 reg_val);
1839 break;
1840 default:
1841 break;
1843 } else {
1844 break;
1847 break;
1848 default:
1849 break;
1851 switch (viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) {
1852 case VT1636_LVDS:
1853 for (i = 0; i < 2; i++) {
1854 value = strsep(&pbuf, " ");
1855 if (value != NULL) {
1856 strict_strtoul(value, 0,
1857 (unsigned long *)&reg_val.Data);
1858 switch (i) {
1859 case 0:
1860 reg_val.Index = 0x08;
1861 reg_val.Mask = 0x0f;
1862 viafb_gpio_i2c_write_mask_lvds
1863 (viaparinfo->lvds_setting_info2,
1864 &viaparinfo->
1865 chip_info->lvds_chip_info2,
1866 reg_val);
1867 break;
1868 case 1:
1869 reg_val.Index = 0x09;
1870 reg_val.Mask = 0x1f;
1871 viafb_gpio_i2c_write_mask_lvds
1872 (viaparinfo->lvds_setting_info2,
1873 &viaparinfo->
1874 chip_info->lvds_chip_info2,
1875 reg_val);
1876 break;
1877 default:
1878 break;
1880 } else {
1881 break;
1884 break;
1885 default:
1886 break;
1888 return count;
1891 static void viafb_init_proc(struct proc_dir_entry **viafb_entry)
1893 struct proc_dir_entry *entry;
1894 *viafb_entry = proc_mkdir("viafb", NULL);
1895 if (viafb_entry) {
1896 entry = create_proc_entry("dvp0", 0, *viafb_entry);
1897 if (entry) {
1898 entry->read_proc = viafb_dvp0_proc_read;
1899 entry->write_proc = viafb_dvp0_proc_write;
1901 entry = create_proc_entry("dvp1", 0, *viafb_entry);
1902 if (entry) {
1903 entry->read_proc = viafb_dvp1_proc_read;
1904 entry->write_proc = viafb_dvp1_proc_write;
1906 entry = create_proc_entry("dfph", 0, *viafb_entry);
1907 if (entry) {
1908 entry->read_proc = viafb_dfph_proc_read;
1909 entry->write_proc = viafb_dfph_proc_write;
1911 entry = create_proc_entry("dfpl", 0, *viafb_entry);
1912 if (entry) {
1913 entry->read_proc = viafb_dfpl_proc_read;
1914 entry->write_proc = viafb_dfpl_proc_write;
1916 if (VT1636_LVDS == viaparinfo->chip_info->lvds_chip_info.
1917 lvds_chip_name || VT1636_LVDS ==
1918 viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) {
1919 entry = create_proc_entry("vt1636", 0, *viafb_entry);
1920 if (entry) {
1921 entry->read_proc = viafb_vt1636_proc_read;
1922 entry->write_proc = viafb_vt1636_proc_write;
1928 static void viafb_remove_proc(struct proc_dir_entry *viafb_entry)
1930 /* no problem if it was not registered */
1931 remove_proc_entry("dvp0", viafb_entry);/* parent dir */
1932 remove_proc_entry("dvp1", viafb_entry);
1933 remove_proc_entry("dfph", viafb_entry);
1934 remove_proc_entry("dfpl", viafb_entry);
1935 remove_proc_entry("vt1636", viafb_entry);
1936 remove_proc_entry("vt1625", viafb_entry);
1937 remove_proc_entry("viafb", NULL);
1940 static int __devinit via_pci_probe(void)
1942 unsigned long default_xres, default_yres;
1943 char *tmpc, *tmpm;
1944 char *tmpc_sec, *tmpm_sec;
1945 int vmode_index;
1946 u32 viafb_par_length;
1948 DEBUG_MSG(KERN_INFO "VIAFB PCI Probe!!\n");
1950 viafb_par_length = ALIGN(sizeof(struct viafb_par), BITS_PER_LONG/8);
1952 /* Allocate fb_info and ***_par here, also including some other needed
1953 * variables
1955 viafbinfo = framebuffer_alloc(viafb_par_length +
1956 ALIGN(sizeof(struct viafb_shared), BITS_PER_LONG/8), NULL);
1957 if (!viafbinfo) {
1958 printk(KERN_ERR"Could not allocate memory for viafb_info.\n");
1959 return -ENODEV;
1962 viaparinfo = (struct viafb_par *)viafbinfo->par;
1963 viaparinfo->shared = viafbinfo->par + viafb_par_length;
1964 viaparinfo->tmds_setting_info = &viaparinfo->shared->tmds_setting_info;
1965 viaparinfo->lvds_setting_info = &viaparinfo->shared->lvds_setting_info;
1966 viaparinfo->lvds_setting_info2 =
1967 &viaparinfo->shared->lvds_setting_info2;
1968 viaparinfo->crt_setting_info = &viaparinfo->shared->crt_setting_info;
1969 viaparinfo->chip_info = &viaparinfo->shared->chip_info;
1971 if (viafb_dual_fb)
1972 viafb_SAMM_ON = 1;
1973 parse_active_dev();
1974 parse_lcd_port();
1975 parse_dvi_port();
1977 /* for dual-fb must viafb_SAMM_ON=1 and viafb_dual_fb=1 */
1978 if (!viafb_SAMM_ON)
1979 viafb_dual_fb = 0;
1981 /* Set up I2C bus stuff */
1982 viafb_create_i2c_bus(viaparinfo);
1984 viafb_init_chip_info();
1985 viafb_get_fb_info(&viaparinfo->fbmem, &viaparinfo->memsize);
1986 viaparinfo->fbmem_free = viaparinfo->memsize;
1987 viaparinfo->fbmem_used = 0;
1988 viafbinfo->screen_base = ioremap_nocache(viaparinfo->fbmem,
1989 viaparinfo->memsize);
1990 if (!viafbinfo->screen_base) {
1991 printk(KERN_INFO "ioremap failed\n");
1992 return -ENOMEM;
1995 viafb_get_mmio_info(&viafbinfo->fix.mmio_start,
1996 &viafbinfo->fix.mmio_len);
1997 viaparinfo->io_virt = ioremap_nocache(viafbinfo->fix.mmio_start,
1998 viafbinfo->fix.mmio_len);
1999 if (!viaparinfo->io_virt) {
2000 printk(KERN_WARNING "ioremap failed: hardware acceleration disabled\n");
2001 viafb_accel = 0;
2004 viafbinfo->node = 0;
2005 viafbinfo->fbops = &viafb_ops;
2006 viafbinfo->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
2008 viafbinfo->pseudo_palette = pseudo_pal;
2009 if (viafb_accel) {
2010 viafb_init_accel();
2011 viafb_init_2d_engine();
2012 viafb_hw_cursor_init();
2015 if (viafb_second_size && (viafb_second_size < 8)) {
2016 viafb_second_offset = viaparinfo->fbmem_free -
2017 viafb_second_size * 1024 * 1024;
2018 } else {
2019 viafb_second_size = 8;
2020 viafb_second_offset = viaparinfo->fbmem_free -
2021 viafb_second_size * 1024 * 1024;
2024 tmpm = viafb_mode;
2025 tmpc = strsep(&tmpm, "x");
2026 strict_strtoul(tmpc, 0, &default_xres);
2027 strict_strtoul(tmpm, 0, &default_yres);
2029 vmode_index = viafb_get_mode_index(default_xres, default_yres);
2030 DEBUG_MSG(KERN_INFO "0->index=%d\n", vmode_index);
2032 if (viafb_SAMM_ON == 1) {
2033 if (strcmp(viafb_mode, viafb_mode1)) {
2034 tmpm_sec = viafb_mode1;
2035 tmpc_sec = strsep(&tmpm_sec, "x");
2036 strict_strtoul(tmpc_sec, 0,
2037 (unsigned long *)&viafb_second_xres);
2038 strict_strtoul(tmpm_sec, 0,
2039 (unsigned long *)&viafb_second_yres);
2040 } else {
2041 viafb_second_xres = default_xres;
2042 viafb_second_yres = default_yres;
2044 if (0 == viafb_second_virtual_xres) {
2045 switch (viafb_second_xres) {
2046 case 1400:
2047 viafb_second_virtual_xres = 1408;
2048 break;
2049 default:
2050 viafb_second_virtual_xres = viafb_second_xres;
2051 break;
2054 if (0 == viafb_second_virtual_yres)
2055 viafb_second_virtual_yres = viafb_second_yres;
2058 switch (viafb_bpp) {
2059 case 0 ... 8:
2060 viafb_bpp = 8;
2061 break;
2062 case 9 ... 16:
2063 viafb_bpp = 16;
2064 break;
2065 case 17 ... 32:
2066 viafb_bpp = 32;
2067 break;
2068 default:
2069 viafb_bpp = 8;
2071 default_var.xres = default_xres;
2072 default_var.yres = default_yres;
2073 switch (default_xres) {
2074 case 1400:
2075 default_var.xres_virtual = 1408;
2076 break;
2077 default:
2078 default_var.xres_virtual = default_xres;
2079 break;
2081 default_var.yres_virtual = default_yres;
2082 default_var.bits_per_pixel = viafb_bpp;
2083 if (default_var.bits_per_pixel == 15)
2084 default_var.bits_per_pixel = 16;
2085 default_var.pixclock =
2086 viafb_get_pixclock(default_xres, default_yres, viafb_refresh);
2087 default_var.left_margin = (default_xres >> 3) & 0xf8;
2088 default_var.right_margin = 32;
2089 default_var.upper_margin = 16;
2090 default_var.lower_margin = 4;
2091 default_var.hsync_len = default_var.left_margin;
2092 default_var.vsync_len = 4;
2093 default_var.accel_flags = 0;
2095 if (viafb_accel) {
2096 viafbinfo->flags |=
2097 (FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
2098 FBINFO_HWACCEL_IMAGEBLIT);
2099 default_var.accel_flags |= FB_ACCELF_TEXT;
2100 } else
2101 viafbinfo->flags |= FBINFO_HWACCEL_DISABLED;
2103 if (viafb_dual_fb) {
2104 viafbinfo1 = framebuffer_alloc(viafb_par_length, NULL);
2105 if (!viafbinfo1) {
2106 printk(KERN_ERR
2107 "allocate the second framebuffer struct error\n");
2108 framebuffer_release(viafbinfo);
2109 return -ENOMEM;
2111 viaparinfo1 = viafbinfo1->par;
2112 memcpy(viaparinfo1, viaparinfo, viafb_par_length);
2113 viaparinfo1->memsize = viaparinfo->memsize -
2114 viafb_second_offset;
2115 viaparinfo->memsize = viafb_second_offset;
2116 viaparinfo1->fbmem = viaparinfo->fbmem + viafb_second_offset;
2118 viaparinfo1->fbmem_used = viaparinfo->fbmem_used;
2119 viaparinfo1->fbmem_free = viaparinfo1->memsize -
2120 viaparinfo1->fbmem_used;
2121 viaparinfo->fbmem_free = viaparinfo->memsize;
2122 viaparinfo->fbmem_used = 0;
2123 if (viafb_accel) {
2124 viaparinfo1->cursor_start =
2125 viaparinfo->cursor_start - viafb_second_offset;
2126 viaparinfo1->VQ_start = viaparinfo->VQ_start -
2127 viafb_second_offset;
2128 viaparinfo1->VQ_end = viaparinfo->VQ_end -
2129 viafb_second_offset;
2132 viaparinfo->iga_path = IGA1;
2133 viaparinfo1->iga_path = IGA2;
2134 memcpy(viafbinfo1, viafbinfo, sizeof(struct fb_info));
2135 viafbinfo1->par = viaparinfo1;
2136 viafbinfo1->screen_base = viafbinfo->screen_base +
2137 viafb_second_offset;
2139 default_var.xres = viafb_second_xres;
2140 default_var.yres = viafb_second_yres;
2141 default_var.xres_virtual = viafb_second_virtual_xres;
2142 default_var.yres_virtual = viafb_second_virtual_yres;
2143 if (viafb_bpp1 != viafb_bpp)
2144 viafb_bpp1 = viafb_bpp;
2145 default_var.bits_per_pixel = viafb_bpp1;
2146 default_var.pixclock =
2147 viafb_get_pixclock(viafb_second_xres, viafb_second_yres,
2148 viafb_refresh);
2149 default_var.left_margin = (viafb_second_xres >> 3) & 0xf8;
2150 default_var.right_margin = 32;
2151 default_var.upper_margin = 16;
2152 default_var.lower_margin = 4;
2153 default_var.hsync_len = default_var.left_margin;
2154 default_var.vsync_len = 4;
2156 viafb_setup_fixinfo(&viafbinfo1->fix, viaparinfo1);
2157 viafb_check_var(&default_var, viafbinfo1);
2158 viafbinfo1->var = default_var;
2159 viafb_update_fix(viafbinfo1);
2162 viafb_setup_fixinfo(&viafbinfo->fix, viaparinfo);
2163 viafb_check_var(&default_var, viafbinfo);
2164 viafbinfo->var = default_var;
2165 viafb_update_fix(viafbinfo);
2166 default_var.activate = FB_ACTIVATE_NOW;
2167 fb_alloc_cmap(&viafbinfo->cmap, 256, 0);
2169 if (viafb_dual_fb && (viafb_primary_dev == LCD_Device)
2170 && (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)) {
2171 if (register_framebuffer(viafbinfo1) < 0)
2172 return -EINVAL;
2174 if (register_framebuffer(viafbinfo) < 0)
2175 return -EINVAL;
2177 if (viafb_dual_fb && ((viafb_primary_dev != LCD_Device)
2178 || (viaparinfo->chip_info->gfx_chip_name !=
2179 UNICHROME_CLE266))) {
2180 if (register_framebuffer(viafbinfo1) < 0)
2181 return -EINVAL;
2183 DEBUG_MSG(KERN_INFO "fb%d: %s frame buffer device %dx%d-%dbpp\n",
2184 viafbinfo->node, viafbinfo->fix.id, default_var.xres,
2185 default_var.yres, default_var.bits_per_pixel);
2187 viafb_init_proc(&viaparinfo->shared->proc_entry);
2188 viafb_init_dac(IGA2);
2189 return 0;
2192 static void __devexit via_pci_remove(void)
2194 DEBUG_MSG(KERN_INFO "via_pci_remove!\n");
2195 fb_dealloc_cmap(&viafbinfo->cmap);
2196 unregister_framebuffer(viafbinfo);
2197 if (viafb_dual_fb)
2198 unregister_framebuffer(viafbinfo1);
2199 iounmap((void *)viafbinfo->screen_base);
2200 iounmap(viaparinfo->io_virt);
2202 viafb_delete_i2c_buss(viaparinfo);
2204 framebuffer_release(viafbinfo);
2205 if (viafb_dual_fb)
2206 framebuffer_release(viafbinfo1);
2208 viafb_remove_proc(viaparinfo->shared->proc_entry);
2211 #ifndef MODULE
2212 static int __init viafb_setup(char *options)
2214 char *this_opt;
2215 DEBUG_MSG(KERN_INFO "viafb_setup!\n");
2217 if (!options || !*options)
2218 return 0;
2220 while ((this_opt = strsep(&options, ",")) != NULL) {
2221 if (!*this_opt)
2222 continue;
2224 if (!strncmp(this_opt, "viafb_mode1=", 12))
2225 viafb_mode1 = kstrdup(this_opt + 12, GFP_KERNEL);
2226 else if (!strncmp(this_opt, "viafb_mode=", 11))
2227 viafb_mode = kstrdup(this_opt + 11, GFP_KERNEL);
2228 else if (!strncmp(this_opt, "viafb_bpp1=", 11))
2229 strict_strtoul(this_opt + 11, 0,
2230 (unsigned long *)&viafb_bpp1);
2231 else if (!strncmp(this_opt, "viafb_bpp=", 10))
2232 strict_strtoul(this_opt + 10, 0,
2233 (unsigned long *)&viafb_bpp);
2234 else if (!strncmp(this_opt, "viafb_refresh1=", 15))
2235 strict_strtoul(this_opt + 15, 0,
2236 (unsigned long *)&viafb_refresh1);
2237 else if (!strncmp(this_opt, "viafb_refresh=", 14))
2238 strict_strtoul(this_opt + 14, 0,
2239 (unsigned long *)&viafb_refresh);
2240 else if (!strncmp(this_opt, "viafb_lcd_dsp_method=", 21))
2241 strict_strtoul(this_opt + 21, 0,
2242 (unsigned long *)&viafb_lcd_dsp_method);
2243 else if (!strncmp(this_opt, "viafb_lcd_panel_id=", 19))
2244 strict_strtoul(this_opt + 19, 0,
2245 (unsigned long *)&viafb_lcd_panel_id);
2246 else if (!strncmp(this_opt, "viafb_accel=", 12))
2247 strict_strtoul(this_opt + 12, 0,
2248 (unsigned long *)&viafb_accel);
2249 else if (!strncmp(this_opt, "viafb_SAMM_ON=", 14))
2250 strict_strtoul(this_opt + 14, 0,
2251 (unsigned long *)&viafb_SAMM_ON);
2252 else if (!strncmp(this_opt, "viafb_active_dev=", 17))
2253 viafb_active_dev = kstrdup(this_opt + 17, GFP_KERNEL);
2254 else if (!strncmp(this_opt,
2255 "viafb_display_hardware_layout=", 30))
2256 strict_strtoul(this_opt + 30, 0,
2257 (unsigned long *)&viafb_display_hardware_layout);
2258 else if (!strncmp(this_opt, "viafb_second_size=", 18))
2259 strict_strtoul(this_opt + 18, 0,
2260 (unsigned long *)&viafb_second_size);
2261 else if (!strncmp(this_opt,
2262 "viafb_platform_epia_dvi=", 24))
2263 strict_strtoul(this_opt + 24, 0,
2264 (unsigned long *)&viafb_platform_epia_dvi);
2265 else if (!strncmp(this_opt,
2266 "viafb_device_lcd_dualedge=", 26))
2267 strict_strtoul(this_opt + 26, 0,
2268 (unsigned long *)&viafb_device_lcd_dualedge);
2269 else if (!strncmp(this_opt, "viafb_bus_width=", 16))
2270 strict_strtoul(this_opt + 16, 0,
2271 (unsigned long *)&viafb_bus_width);
2272 else if (!strncmp(this_opt, "viafb_lcd_mode=", 15))
2273 strict_strtoul(this_opt + 15, 0,
2274 (unsigned long *)&viafb_lcd_mode);
2275 else if (!strncmp(this_opt, "viafb_lcd_port=", 15))
2276 viafb_lcd_port = kstrdup(this_opt + 15, GFP_KERNEL);
2277 else if (!strncmp(this_opt, "viafb_dvi_port=", 15))
2278 viafb_dvi_port = kstrdup(this_opt + 15, GFP_KERNEL);
2280 return 0;
2282 #endif
2284 static int __init viafb_init(void)
2286 #ifndef MODULE
2287 char *option = NULL;
2288 if (fb_get_options("viafb", &option))
2289 return -ENODEV;
2290 viafb_setup(option);
2291 #endif
2292 printk(KERN_INFO
2293 "VIA Graphics Intergration Chipset framebuffer %d.%d initializing\n",
2294 VERSION_MAJOR, VERSION_MINOR);
2295 return via_pci_probe();
2298 static void __exit viafb_exit(void)
2300 DEBUG_MSG(KERN_INFO "viafb_exit!\n");
2301 via_pci_remove();
2304 static struct fb_ops viafb_ops = {
2305 .owner = THIS_MODULE,
2306 .fb_open = viafb_open,
2307 .fb_release = viafb_release,
2308 .fb_check_var = viafb_check_var,
2309 .fb_set_par = viafb_set_par,
2310 .fb_setcolreg = viafb_setcolreg,
2311 .fb_pan_display = viafb_pan_display,
2312 .fb_blank = viafb_blank,
2313 .fb_fillrect = viafb_fillrect,
2314 .fb_copyarea = viafb_copyarea,
2315 .fb_imageblit = viafb_imageblit,
2316 .fb_cursor = viafb_cursor,
2317 .fb_ioctl = viafb_ioctl,
2318 .fb_sync = viafb_sync,
2319 .fb_setcmap = viafb_setcmap,
2322 module_init(viafb_init);
2323 module_exit(viafb_exit);
2325 #ifdef MODULE
2326 module_param(viafb_memsize, int, 0);
2328 module_param(viafb_mode, charp, 0);
2329 MODULE_PARM_DESC(viafb_mode, "Set resolution (default=640x480)");
2331 module_param(viafb_mode1, charp, 0);
2332 MODULE_PARM_DESC(viafb_mode1, "Set resolution (default=640x480)");
2334 module_param(viafb_bpp, int, 0);
2335 MODULE_PARM_DESC(viafb_bpp, "Set color depth (default=32bpp)");
2337 module_param(viafb_bpp1, int, 0);
2338 MODULE_PARM_DESC(viafb_bpp1, "Set color depth (default=32bpp)");
2340 module_param(viafb_refresh, int, 0);
2341 MODULE_PARM_DESC(viafb_refresh,
2342 "Set CRT viafb_refresh rate (default = 60)");
2344 module_param(viafb_refresh1, int, 0);
2345 MODULE_PARM_DESC(viafb_refresh1,
2346 "Set CRT refresh rate (default = 60)");
2348 module_param(viafb_lcd_panel_id, int, 0);
2349 MODULE_PARM_DESC(viafb_lcd_panel_id,
2350 "Set Flat Panel type(Default=1024x768)");
2352 module_param(viafb_lcd_dsp_method, int, 0);
2353 MODULE_PARM_DESC(viafb_lcd_dsp_method,
2354 "Set Flat Panel display scaling method.(Default=Expandsion)");
2356 module_param(viafb_SAMM_ON, int, 0);
2357 MODULE_PARM_DESC(viafb_SAMM_ON,
2358 "Turn on/off flag of SAMM(Default=OFF)");
2360 module_param(viafb_accel, int, 0);
2361 MODULE_PARM_DESC(viafb_accel,
2362 "Set 2D Hardware Acceleration.(Default = OFF)");
2364 module_param(viafb_active_dev, charp, 0);
2365 MODULE_PARM_DESC(viafb_active_dev, "Specify active devices.");
2367 module_param(viafb_display_hardware_layout, int, 0);
2368 MODULE_PARM_DESC(viafb_display_hardware_layout,
2369 "Display Hardware Layout (LCD Only, DVI Only...,etc)");
2371 module_param(viafb_second_size, int, 0);
2372 MODULE_PARM_DESC(viafb_second_size,
2373 "Set secondary device memory size");
2375 module_param(viafb_dual_fb, int, 0);
2376 MODULE_PARM_DESC(viafb_dual_fb,
2377 "Turn on/off flag of dual framebuffer devices.(Default = OFF)");
2379 module_param(viafb_platform_epia_dvi, int, 0);
2380 MODULE_PARM_DESC(viafb_platform_epia_dvi,
2381 "Turn on/off flag of DVI devices on EPIA board.(Default = OFF)");
2383 module_param(viafb_device_lcd_dualedge, int, 0);
2384 MODULE_PARM_DESC(viafb_device_lcd_dualedge,
2385 "Turn on/off flag of dual edge panel.(Default = OFF)");
2387 module_param(viafb_bus_width, int, 0);
2388 MODULE_PARM_DESC(viafb_bus_width,
2389 "Set bus width of panel.(Default = 12)");
2391 module_param(viafb_lcd_mode, int, 0);
2392 MODULE_PARM_DESC(viafb_lcd_mode,
2393 "Set Flat Panel mode(Default=OPENLDI)");
2395 module_param(viafb_lcd_port, charp, 0);
2396 MODULE_PARM_DESC(viafb_lcd_port, "Specify LCD output port.");
2398 module_param(viafb_dvi_port, charp, 0);
2399 MODULE_PARM_DESC(viafb_dvi_port, "Specify DVI output port.");
2401 MODULE_LICENSE("GPL");
2402 #endif