arch/x86_64/kernel/setup.c

   1 /*
   2  *  linux/arch/x86-64/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *
   6  *  Nov 2001 Dave Jones <davej@suse.de>
   7  *  Forked from i386 setup code.
   8  *
   9  *  $Id$
  10  */
  11
  12 /*
  13  * This file handles the architecture-dependent parts of initialization
  14  */
  15
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/slab.h>
  24 #include <linux/user.h>
  25 #include <linux/a.out.h>
  26 #include <linux/tty.h>
  27 #include <linux/ioport.h>
  28 #include <linux/delay.h>
  29 #include <linux/config.h>
  30 #include <linux/init.h>
  31 #include <linux/initrd.h>
  32 #include <linux/highmem.h>
  33 #include <linux/bootmem.h>
  34 #include <linux/module.h>
  35 #include <asm/processor.h>
  36 #include <linux/console.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/root_dev.h>
  39 #include <linux/pci.h>
  40 #include <linux/acpi.h>
  41 #include <linux/kallsyms.h>
  42 #include <linux/edd.h>
  43 #include <asm/mtrr.h>
  44 #include <asm/uaccess.h>
  45 #include <asm/system.h>
  46 #include <asm/io.h>
  47 #include <asm/smp.h>
  48 #include <asm/msr.h>
  49 #include <asm/desc.h>
  50 #include <video/edid.h>
  51 #include <asm/e820.h>
  52 #include <asm/dma.h>
  53 #include <asm/mpspec.h>
  54 #include <asm/mmu_context.h>
  55 #include <asm/bootsetup.h>
  56 #include <asm/proto.h>
  57 #include <asm/setup.h>
  58 #include <asm/mach_apic.h>
  59 #include <asm/numa.h>
  60
  61 /*
  62  * Machine setup..
  63  */
  64
  65 struct cpuinfo_x86 boot_cpu_data;
  66
  67 unsigned long mmu_cr4_features;
  68
  69 int acpi_disabled;
  70 EXPORT_SYMBOL(acpi_disabled);
  71 #ifdef  CONFIG_ACPI_BOOT
  72 extern int __initdata acpi_ht;
  73 extern acpi_interrupt_flags     acpi_sci_flags;
  74 int __initdata acpi_force = 0;
  75 #endif
  76
  77 int acpi_numa __initdata;
  78
  79 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
  80 int bootloader_type;
  81
  82 unsigned long saved_video_mode;
  83
  84 #ifdef CONFIG_SWIOTLB
  85 int swiotlb;
  86 EXPORT_SYMBOL(swiotlb);
  87 #endif
  88
  89 /*
  90  * Setup options
  91  */
  92 struct drive_info_struct { char dummy[32]; } drive_info;
  93 struct screen_info screen_info;
  94 struct sys_desc_table_struct {
  95         unsigned short length;
  96         unsigned char table[0];
  97 };
  98
  99 struct edid_info edid_info;
 100 struct e820map e820;
 101
 102 extern int root_mountflags;
 103 extern char _text, _etext, _edata, _end;
 104
 105 char command_line[COMMAND_LINE_SIZE];
 106
 107 struct resource standard_io_resources[] = {
 108         { .name = "dma1", .start = 0x00, .end = 0x1f,
 109                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 110         { .name = "pic1", .start = 0x20, .end = 0x21,
 111                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 112         { .name = "timer0", .start = 0x40, .end = 0x43,
 113                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 114         { .name = "timer1", .start = 0x50, .end = 0x53,
 115                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 116         { .name = "keyboard", .start = 0x60, .end = 0x6f,
 117                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 118         { .name = "dma page reg", .start = 0x80, .end = 0x8f,
 119                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 120         { .name = "pic2", .start = 0xa0, .end = 0xa1,
 121                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 122         { .name = "dma2", .start = 0xc0, .end = 0xdf,
 123                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 124         { .name = "fpu", .start = 0xf0, .end = 0xff,
 125                 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
 126 };
 127
 128 #define STANDARD_IO_RESOURCES \
 129         (sizeof standard_io_resources / sizeof standard_io_resources[0])
 130
 131 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
 132
 133 struct resource data_resource = {
 134         .name = "Kernel data",
 135         .start = 0,
 136         .end = 0,
 137         .flags = IORESOURCE_RAM,
 138 };
 139 struct resource code_resource = {
 140         .name = "Kernel code",
 141         .start = 0,
 142         .end = 0,
 143         .flags = IORESOURCE_RAM,
 144 };
 145
 146 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
 147
 148 static struct resource system_rom_resource = {
 149         .name = "System ROM",
 150         .start = 0xf0000,
 151         .end = 0xfffff,
 152         .flags = IORESOURCE_ROM,
 153 };
 154
 155 static struct resource extension_rom_resource = {
 156         .name = "Extension ROM",
 157         .start = 0xe0000,
 158         .end = 0xeffff,
 159         .flags = IORESOURCE_ROM,
 160 };
 161
 162 static struct resource adapter_rom_resources[] = {
 163         { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
 164                 .flags = IORESOURCE_ROM },
 165         { .name = "Adapter ROM", .start = 0, .end = 0,
 166                 .flags = IORESOURCE_ROM },
 167         { .name = "Adapter ROM", .start = 0, .end = 0,
 168                 .flags = IORESOURCE_ROM },
 169         { .name = "Adapter ROM", .start = 0, .end = 0,
 170                 .flags = IORESOURCE_ROM },
 171         { .name = "Adapter ROM", .start = 0, .end = 0,
 172                 .flags = IORESOURCE_ROM },
 173         { .name = "Adapter ROM", .start = 0, .end = 0,
 174                 .flags = IORESOURCE_ROM }
 175 };
 176
 177 #define ADAPTER_ROM_RESOURCES \
 178         (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
 179
 180 static struct resource video_rom_resource = {
 181         .name = "Video ROM",
 182         .start = 0xc0000,
 183         .end = 0xc7fff,
 184         .flags = IORESOURCE_ROM,
 185 };
 186
 187 static struct resource video_ram_resource = {
 188         .name = "Video RAM area",
 189         .start = 0xa0000,
 190         .end = 0xbffff,
 191         .flags = IORESOURCE_RAM,
 192 };
 193
 194 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
 195
 196 static int __init romchecksum(unsigned char *rom, unsigned long length)
 197 {
 198         unsigned char *p, sum = 0;
 199
 200         for (p = rom; p < rom + length; p++)
 201                 sum += *p;
 202         return sum == 0;
 203 }
 204
 205 static void __init probe_roms(void)
 206 {
 207         unsigned long start, length, upper;
 208         unsigned char *rom;
 209         int           i;
 210
 211         /* video rom */
 212         upper = adapter_rom_resources[0].start;
 213         for (start = video_rom_resource.start; start < upper; start += 2048) {
 214                 rom = isa_bus_to_virt(start);
 215                 if (!romsignature(rom))
 216                         continue;
 217
 218                 video_rom_resource.start = start;
 219
 220                 /* 0 < length <= 0x7f * 512, historically */
 221                 length = rom[2] * 512;
 222
 223                 /* if checksum okay, trust length byte */
 224                 if (length && romchecksum(rom, length))
 225                         video_rom_resource.end = start + length - 1;
 226
 227                 request_resource(&iomem_resource, &video_rom_resource);
 228                 break;
 229                         }
 230
 231         start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
 232         if (start < upper)
 233                 start = upper;
 234
 235         /* system rom */
 236         request_resource(&iomem_resource, &system_rom_resource);
 237         upper = system_rom_resource.start;
 238
 239         /* check for extension rom (ignore length byte!) */
 240         rom = isa_bus_to_virt(extension_rom_resource.start);
 241         if (romsignature(rom)) {
 242                 length = extension_rom_resource.end - extension_rom_resource.start + 1;
 243                 if (romchecksum(rom, length)) {
 244                         request_resource(&iomem_resource, &extension_rom_resource);
 245                         upper = extension_rom_resource.start;
 246                 }
 247         }
 248
 249         /* check for adapter roms on 2k boundaries */
 250         for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
 251                 rom = isa_bus_to_virt(start);
 252                 if (!romsignature(rom))
 253                         continue;
 254
 255                 /* 0 < length <= 0x7f * 512, historically */
 256                 length = rom[2] * 512;
 257
 258                 /* but accept any length that fits if checksum okay */
 259                 if (!length || start + length > upper || !romchecksum(rom, length))
 260                         continue;
 261
 262                 adapter_rom_resources[i].start = start;
 263                 adapter_rom_resources[i].end = start + length - 1;
 264                 request_resource(&iomem_resource, &adapter_rom_resources[i]);
 265
 266                 start = adapter_rom_resources[i++].end & ~2047UL;
 267         }
 268 }
 269
 270 static __init void parse_cmdline_early (char ** cmdline_p)
 271 {
 272         char c = ' ', *to = command_line, *from = COMMAND_LINE;
 273         int len = 0;
 274
 275         /* Save unparsed command line copy for /proc/cmdline */
 276         memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
 277         saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
 278
 279         for (;;) {
 280                 if (c != ' ')
 281                         goto next_char;
 282
 283 #ifdef  CONFIG_SMP
 284                 /*
 285                  * If the BIOS enumerates physical processors before logical,
 286                  * maxcpus=N at enumeration-time can be used to disable HT.
 287                  */
 288                 else if (!memcmp(from, "maxcpus=", 8)) {
 289                         extern unsigned int maxcpus;
 290
 291                         maxcpus = simple_strtoul(from + 8, NULL, 0);
 292                 }
 293 #endif
 294 #ifdef CONFIG_ACPI_BOOT
 295                 /* "acpi=off" disables both ACPI table parsing and interpreter init */
 296                 if (!memcmp(from, "acpi=off", 8))
 297                         disable_acpi();
 298
 299                 if (!memcmp(from, "acpi=force", 10)) {
 300                         /* add later when we do DMI horrors: */
 301                         acpi_force = 1;
 302                         acpi_disabled = 0;
 303                 }
 304
 305                 /* acpi=ht just means: do ACPI MADT parsing
 306                    at bootup, but don't enable the full ACPI interpreter */
 307                 if (!memcmp(from, "acpi=ht", 7)) {
 308                         if (!acpi_force)
 309                                 disable_acpi();
 310                         acpi_ht = 1;
 311                 }
 312                 else if (!memcmp(from, "pci=noacpi", 10))
 313                         acpi_disable_pci();
 314                 else if (!memcmp(from, "acpi=noirq", 10))
 315                         acpi_noirq_set();
 316
 317                 else if (!memcmp(from, "acpi_sci=edge", 13))
 318                         acpi_sci_flags.trigger =  1;
 319                 else if (!memcmp(from, "acpi_sci=level", 14))
 320                         acpi_sci_flags.trigger = 3;
 321                 else if (!memcmp(from, "acpi_sci=high", 13))
 322                         acpi_sci_flags.polarity = 1;
 323                 else if (!memcmp(from, "acpi_sci=low", 12))
 324                         acpi_sci_flags.polarity = 3;
 325
 326                 /* acpi=strict disables out-of-spec workarounds */
 327                 else if (!memcmp(from, "acpi=strict", 11)) {
 328                         acpi_strict = 1;
 329                 }
 330 #ifdef CONFIG_X86_IO_APIC
 331                 else if (!memcmp(from, "acpi_skip_timer_override", 24))
 332                         acpi_skip_timer_override = 1;
 333 #endif
 334 #endif
 335
 336                 if (!memcmp(from, "nolapic", 7) ||
 337                     !memcmp(from, "disableapic", 11))
 338                         disable_apic = 1;
 339
 340                 if (!memcmp(from, "noapic", 6))
 341                         skip_ioapic_setup = 1;
 342
 343                 if (!memcmp(from, "apic", 4)) {
 344                         skip_ioapic_setup = 0;
 345                         ioapic_force = 1;
 346                 }
 347
 348                 if (!memcmp(from, "mem=", 4))
 349                         parse_memopt(from+4, &from);
 350
 351 #ifdef CONFIG_DISCONTIGMEM
 352                 if (!memcmp(from, "numa=", 5))
 353                         numa_setup(from+5);
 354 #endif
 355
 356 #ifdef CONFIG_GART_IOMMU
 357                 if (!memcmp(from,"iommu=",6)) {
 358                         iommu_setup(from+6);
 359                 }
 360 #endif
 361
 362                 if (!memcmp(from,"oops=panic", 10))
 363                         panic_on_oops = 1;
 364
 365                 if (!memcmp(from, "noexec=", 7))
 366                         nonx_setup(from + 7);
 367
 368         next_char:
 369                 c = *(from++);
 370                 if (!c)
 371                         break;
 372                 if (COMMAND_LINE_SIZE <= ++len)
 373                         break;
 374                 *(to++) = c;
 375         }
 376         *to = '\0';
 377         *cmdline_p = command_line;
 378 }
 379
 380 #ifndef CONFIG_DISCONTIGMEM
 381 static void __init contig_initmem_init(void)
 382 {
 383         unsigned long bootmap_size, bootmap;
 384         bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
 385         bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
 386         if (bootmap == -1L)
 387                 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
 388         bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
 389         e820_bootmem_free(&contig_page_data, 0, end_pfn << PAGE_SHIFT);
 390         reserve_bootmem(bootmap, bootmap_size);
 391 }
 392 #endif
 393
 394 /* Use inline assembly to define this because the nops are defined
 395    as inline assembly strings in the include files and we cannot
 396    get them easily into strings. */
 397 asm("\t.data\nk8nops: "
 398     K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
 399     K8_NOP7 K8_NOP8);
 400
 401 extern unsigned char k8nops[];
 402 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
 403      NULL,
 404      k8nops,
 405      k8nops + 1,
 406      k8nops + 1 + 2,
 407      k8nops + 1 + 2 + 3,
 408      k8nops + 1 + 2 + 3 + 4,
 409      k8nops + 1 + 2 + 3 + 4 + 5,
 410      k8nops + 1 + 2 + 3 + 4 + 5 + 6,
 411      k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
 412 };
 413
 414 /* Replace instructions with better alternatives for this CPU type.
 415
 416    This runs before SMP is initialized to avoid SMP problems with
 417    self modifying code. This implies that assymetric systems where
 418    APs have less capabilities than the boot processor are not handled.
 419    In this case boot with "noreplacement". */
 420 void apply_alternatives(void *start, void *end)
 421 {
 422         struct alt_instr *a;
 423         int diff, i, k;
 424         for (a = start; (void *)a < end; a++) {
 425                 if (!boot_cpu_has(a->cpuid))
 426                         continue;
 427
 428                 BUG_ON(a->replacementlen > a->instrlen);
 429                 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
 430                 diff = a->instrlen - a->replacementlen;
 431
 432                 /* Pad the rest with nops */
 433                 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
 434                         k = diff;
 435                         if (k > ASM_NOP_MAX)
 436                                 k = ASM_NOP_MAX;
 437                         __inline_memcpy(a->instr + i, k8_nops[k], k);
 438                 }
 439         }
 440 }
 441
 442 static int no_replacement __initdata = 0;
 443
 444 void __init alternative_instructions(void)
 445 {
 446         extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
 447         if (no_replacement)
 448                 return;
 449         apply_alternatives(__alt_instructions, __alt_instructions_end);
 450 }
 451
 452 static int __init noreplacement_setup(char *s)
 453 {
 454      no_replacement = 1;
 455      return 0;
 456 }
 457
 458 __setup("noreplacement", noreplacement_setup);
 459
 460 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
 461 struct edd edd;
 462 #ifdef CONFIG_EDD_MODULE
 463 EXPORT_SYMBOL(edd);
 464 #endif
 465 /**
 466  * copy_edd() - Copy the BIOS EDD information
 467  *              from boot_params into a safe place.
 468  *
 469  */
 470 static inline void copy_edd(void)
 471 {
 472      memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
 473      memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
 474      edd.mbr_signature_nr = EDD_MBR_SIG_NR;
 475      edd.edd_info_nr = EDD_NR;
 476 }
 477 #else
 478 static inline void copy_edd(void)
 479 {
 480 }
 481 #endif
 482
 483 #define EBDA_ADDR_POINTER 0x40E
 484 static void __init reserve_ebda_region(void)
 485 {
 486         unsigned int addr;
 487         /**
 488          * there is a real-mode segmented pointer pointing to the
 489          * 4K EBDA area at 0x40E
 490          */
 491         addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
 492         addr <<= 4;
 493         if (addr)
 494                 reserve_bootmem_generic(addr, PAGE_SIZE);
 495 }
 496
 497 void __init setup_arch(char **cmdline_p)
 498 {
 499         unsigned long kernel_end;
 500
 501         ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
 502         drive_info = DRIVE_INFO;
 503         screen_info = SCREEN_INFO;
 504         edid_info = EDID_INFO;
 505         saved_video_mode = SAVED_VIDEO_MODE;
 506         bootloader_type = LOADER_TYPE;
 507
 508 #ifdef CONFIG_BLK_DEV_RAM
 509         rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
 510         rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
 511         rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
 512 #endif
 513         setup_memory_region();
 514         copy_edd();
 515
 516         if (!MOUNT_ROOT_RDONLY)
 517                 root_mountflags &= ~MS_RDONLY;
 518         init_mm.start_code = (unsigned long) &_text;
 519         init_mm.end_code = (unsigned long) &_etext;
 520         init_mm.end_data = (unsigned long) &_edata;
 521         init_mm.brk = (unsigned long) &_end;
 522
 523         code_resource.start = virt_to_phys(&_text);
 524         code_resource.end = virt_to_phys(&_etext)-1;
 525         data_resource.start = virt_to_phys(&_etext);
 526         data_resource.end = virt_to_phys(&_edata)-1;
 527
 528         parse_cmdline_early(cmdline_p);
 529
 530         early_identify_cpu(&boot_cpu_data);
 531
 532         /*
 533          * partially used pages are not usable - thus
 534          * we are rounding upwards:
 535          */
 536         end_pfn = e820_end_of_ram();
 537
 538         check_efer();
 539
 540         init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
 541
 542 #ifdef CONFIG_ACPI_BOOT
 543         /*
 544          * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
 545          * Call this early for SRAT node setup.
 546          */
 547         acpi_boot_table_init();
 548 #endif
 549
 550 #ifdef CONFIG_ACPI_NUMA
 551         /*
 552          * Parse SRAT to discover nodes.
 553          */
 554         acpi_numa_init();
 555 #endif
 556
 557 #ifdef CONFIG_DISCONTIGMEM
 558         numa_initmem_init(0, end_pfn);
 559 #else
 560         contig_initmem_init();
 561 #endif
 562
 563         /* Reserve direct mapping */
 564         reserve_bootmem_generic(table_start << PAGE_SHIFT,
 565                                 (table_end - table_start) << PAGE_SHIFT);
 566
 567         /* reserve kernel */
 568         kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
 569         reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
 570
 571         /*
 572          * reserve physical page 0 - it's a special BIOS page on many boxes,
 573          * enabling clean reboots, SMP operation, laptop functions.
 574          */
 575         reserve_bootmem_generic(0, PAGE_SIZE);
 576
 577         /* reserve ebda region */
 578         reserve_ebda_region();
 579
 580 #ifdef CONFIG_SMP
 581         /*
 582          * But first pinch a few for the stack/trampoline stuff
 583          * FIXME: Don't need the extra page at 4K, but need to fix
 584          * trampoline before removing it. (see the GDT stuff)
 585          */
 586         reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
 587
 588         /* Reserve SMP trampoline */
 589         reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
 590 #endif
 591
 592 #ifdef CONFIG_ACPI_SLEEP
 593        /*
 594         * Reserve low memory region for sleep support.
 595         */
 596        acpi_reserve_bootmem();
 597 #endif
 598 #ifdef CONFIG_X86_LOCAL_APIC
 599         /*
 600          * Find and reserve possible boot-time SMP configuration:
 601          */
 602         find_smp_config();
 603 #endif
 604 #ifdef CONFIG_BLK_DEV_INITRD
 605         if (LOADER_TYPE && INITRD_START) {
 606                 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
 607                         reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
 608                         initrd_start =
 609                                 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
 610                         initrd_end = initrd_start+INITRD_SIZE;
 611                 }
 612                 else {
 613                         printk(KERN_ERR "initrd extends beyond end of memory "
 614                             "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
 615                             (unsigned long)(INITRD_START + INITRD_SIZE),
 616                             (unsigned long)(end_pfn << PAGE_SHIFT));
 617                         initrd_start = 0;
 618                 }
 619         }
 620 #endif
 621         paging_init();
 622
 623         check_ioapic();
 624
 625 #ifdef CONFIG_ACPI_BOOT
 626         /*
 627          * Read APIC and some other early information from ACPI tables.
 628          */
 629         acpi_boot_init();
 630 #endif
 631
 632 #ifdef CONFIG_X86_LOCAL_APIC
 633         /*
 634          * get boot-time SMP configuration:
 635          */
 636         if (smp_found_config)
 637                 get_smp_config();
 638         init_apic_mappings();
 639 #endif
 640
 641         /*
 642          * Request address space for all standard RAM and ROM resources
 643          * and also for regions reported as reserved by the e820.
 644          */
 645         probe_roms();
 646         e820_reserve_resources();
 647
 648         request_resource(&iomem_resource, &video_ram_resource);
 649
 650         {
 651         unsigned i;
 652         /* request I/O space for devices used on all i[345]86 PCs */
 653         for (i = 0; i < STANDARD_IO_RESOURCES; i++)
 654                 request_resource(&ioport_resource, &standard_io_resources[i]);
 655         }
 656
 657         e820_setup_gap();
 658
 659 #ifdef CONFIG_GART_IOMMU
 660        iommu_hole_init();
 661 #endif
 662
 663 #ifdef CONFIG_VT
 664 #if defined(CONFIG_VGA_CONSOLE)
 665         conswitchp = &vga_con;
 666 #elif defined(CONFIG_DUMMY_CONSOLE)
 667         conswitchp = &dummy_con;
 668 #endif
 669 #endif
 670 }
 671
 672 static int __init get_model_name(struct cpuinfo_x86 *c)
 673 {
 674         unsigned int *v;
 675
 676         if (c->extended_cpuid_level < 0x80000004)
 677                 return 0;
 678
 679         v = (unsigned int *) c->x86_model_id;
 680         cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
 681         cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
 682         cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
 683         c->x86_model_id[48] = 0;
 684         return 1;
 685 }
 686
 687
 688 static void __init display_cacheinfo(struct cpuinfo_x86 *c)
 689 {
 690         unsigned int n, dummy, eax, ebx, ecx, edx;
 691
 692         n = c->extended_cpuid_level;
 693
 694         if (n >= 0x80000005) {
 695                 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
 696                 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
 697                         edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
 698                 c->x86_cache_size=(ecx>>24)+(edx>>24);
 699                 /* On K8 L1 TLB is inclusive, so don't count it */
 700                 c->x86_tlbsize = 0;
 701         }
 702
 703         if (n >= 0x80000006) {
 704                 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
 705                 ecx = cpuid_ecx(0x80000006);
 706                 c->x86_cache_size = ecx >> 16;
 707                 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
 708
 709                 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
 710                 c->x86_cache_size, ecx & 0xFF);
 711         }
 712
 713         if (n >= 0x80000007)
 714                 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
 715         if (n >= 0x80000008) {
 716                 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
 717                 c->x86_virt_bits = (eax >> 8) & 0xff;
 718                 c->x86_phys_bits = eax & 0xff;
 719         }
 720 }
 721
 722 #ifdef CONFIG_SMP
 723 /*
 724  * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
 725  * Assumes number of cores is a power of two.
 726  */
 727 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
 728 {
 729 #ifdef CONFIG_SMP
 730         int cpu = c->x86_apicid;
 731         int node = 0;
 732         if (c->x86_num_cores == 1)
 733                 return;
 734         cpu_core_id[cpu] = cpu >> hweight32(c->x86_num_cores - 1);
 735
 736 #ifdef CONFIG_NUMA
 737         /* When an ACPI SRAT table is available use the mappings from SRAT
 738            instead. */
 739         if (acpi_numa <= 0) {
 740                 node = cpu_core_id[cpu];
 741                 if (!node_online(node))
 742                         node = first_node(node_online_map);
 743                 cpu_to_node[cpu] = node;
 744         } else {
 745                 node = cpu_to_node[cpu];
 746         }
 747 #endif
 748         printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
 749                         cpu, c->x86_num_cores, node, cpu_core_id[cpu]);
 750 #endif
 751 }
 752 #else
 753 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
 754 {
 755 }
 756 #endif
 757
 758 static int __init init_amd(struct cpuinfo_x86 *c)
 759 {
 760         int r;
 761         int level;
 762
 763         /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
 764            3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
 765         clear_bit(0*32+31, &c->x86_capability);
 766
 767         /* C-stepping K8? */
 768         level = cpuid_eax(1);
 769         if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
 770                 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
 771
 772         r = get_model_name(c);
 773         if (!r) {
 774                 switch (c->x86) {
 775                 case 15:
 776                         /* Should distinguish Models here, but this is only
 777                            a fallback anyways. */
 778                         strcpy(c->x86_model_id, "Hammer");
 779                         break;
 780                 }
 781         }
 782         display_cacheinfo(c);
 783
 784         if (c->extended_cpuid_level >= 0x80000008) {
 785                 c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
 786                 if (c->x86_num_cores & (c->x86_num_cores - 1))
 787                         c->x86_num_cores = 1;
 788
 789                 amd_detect_cmp(c);
 790         }
 791
 792         return r;
 793 }
 794
 795 static void __init detect_ht(struct cpuinfo_x86 *c)
 796 {
 797 #ifdef CONFIG_SMP
 798         u32     eax, ebx, ecx, edx;
 799         int     index_msb, tmp;
 800         int     cpu = smp_processor_id();
 801
 802         if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
 803                 return;
 804
 805         cpuid(1, &eax, &ebx, &ecx, &edx);
 806         smp_num_siblings = (ebx & 0xff0000) >> 16;
 807
 808         if (smp_num_siblings == 1) {
 809                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
 810         } else if (smp_num_siblings > 1) {
 811                 index_msb = 31;
 812                 /*
 813                  * At this point we only support two siblings per
 814                  * processor package.
 815                  */
 816                 if (smp_num_siblings > NR_CPUS) {
 817                         printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
 818                         smp_num_siblings = 1;
 819                         return;
 820                 }
 821                 tmp = smp_num_siblings;
 822                 while ((tmp & 0x80000000 ) == 0) {
 823                         tmp <<=1 ;
 824                         index_msb--;
 825                 }
 826                 if (smp_num_siblings & (smp_num_siblings - 1))
 827                         index_msb++;
 828                 phys_proc_id[cpu] = phys_pkg_id(index_msb);
 829
 830                 printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
 831                        phys_proc_id[cpu]);
 832
 833                 smp_num_siblings = smp_num_siblings / c->x86_num_cores;
 834
 835                 tmp = smp_num_siblings;
 836                 index_msb = 31;
 837                 while ((tmp & 0x80000000) == 0) {
 838                         tmp <<=1 ;
 839                         index_msb--;
 840                 }
 841                 if (smp_num_siblings & (smp_num_siblings - 1))
 842                         index_msb++;
 843
 844                 cpu_core_id[cpu] = phys_pkg_id(index_msb);
 845
 846                 if (c->x86_num_cores > 1)
 847                         printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
 848                                cpu_core_id[cpu]);
 849         }
 850 #endif
 851 }
 852
 853 /*
 854  * find out the number of processor cores on the die
 855  */
 856 static int __init intel_num_cpu_cores(struct cpuinfo_x86 *c)
 857 {
 858         unsigned int eax;
 859
 860         if (c->cpuid_level < 4)
 861                 return 1;
 862
 863         __asm__("cpuid"
 864                 : "=a" (eax)
 865                 : "0" (4), "c" (0)
 866                 : "bx", "dx");
 867
 868         if (eax & 0x1f)
 869                 return ((eax >> 26) + 1);
 870         else
 871                 return 1;
 872 }
 873
 874 static void __init init_intel(struct cpuinfo_x86 *c)
 875 {
 876         /* Cache sizes */
 877         unsigned n;
 878
 879         init_intel_cacheinfo(c);
 880         n = c->extended_cpuid_level;
 881         if (n >= 0x80000008) {
 882                 unsigned eax = cpuid_eax(0x80000008);
 883                 c->x86_virt_bits = (eax >> 8) & 0xff;
 884                 c->x86_phys_bits = eax & 0xff;
 885         }
 886
 887         if (c->x86 == 15)
 888                 c->x86_cache_alignment = c->x86_clflush_size * 2;
 889         if (c->x86 >= 15)
 890                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
 891         c->x86_num_cores = intel_num_cpu_cores(c);
 892 }
 893
 894 void __init get_cpu_vendor(struct cpuinfo_x86 *c)
 895 {
 896         char *v = c->x86_vendor_id;
 897
 898         if (!strcmp(v, "AuthenticAMD"))
 899                 c->x86_vendor = X86_VENDOR_AMD;
 900         else if (!strcmp(v, "GenuineIntel"))
 901                 c->x86_vendor = X86_VENDOR_INTEL;
 902         else
 903                 c->x86_vendor = X86_VENDOR_UNKNOWN;
 904 }
 905
 906 struct cpu_model_info {
 907         int vendor;
 908         int family;
 909         char *model_names[16];
 910 };
 911
 912 /* Do some early cpuid on the boot CPU to get some parameter that are
 913    needed before check_bugs. Everything advanced is in identify_cpu
 914    below. */
 915 void __init early_identify_cpu(struct cpuinfo_x86 *c)
 916 {
 917         u32 tfms;
 918
 919         c->loops_per_jiffy = loops_per_jiffy;
 920         c->x86_cache_size = -1;
 921         c->x86_vendor = X86_VENDOR_UNKNOWN;
 922         c->x86_model = c->x86_mask = 0; /* So far unknown... */
 923         c->x86_vendor_id[0] = '\0'; /* Unset */
 924         c->x86_model_id[0] = '\0';  /* Unset */
 925         c->x86_clflush_size = 64;
 926         c->x86_cache_alignment = c->x86_clflush_size;
 927         c->x86_num_cores = 1;
 928         c->x86_apicid = c == &boot_cpu_data ? 0 : c - cpu_data;
 929         c->extended_cpuid_level = 0;
 930         memset(&c->x86_capability, 0, sizeof c->x86_capability);
 931
 932         /* Get vendor name */
 933         cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
 934               (unsigned int *)&c->x86_vendor_id[0],
 935               (unsigned int *)&c->x86_vendor_id[8],
 936               (unsigned int *)&c->x86_vendor_id[4]);
 937
 938         get_cpu_vendor(c);
 939
 940         /* Initialize the standard set of capabilities */
 941         /* Note that the vendor-specific code below might override */
 942
 943         /* Intel-defined flags: level 0x00000001 */
 944         if (c->cpuid_level >= 0x00000001) {
 945                 __u32 misc;
 946                 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
 947                       &c->x86_capability[0]);
 948                 c->x86 = (tfms >> 8) & 0xf;
 949                 c->x86_model = (tfms >> 4) & 0xf;
 950                 c->x86_mask = tfms & 0xf;
 951                 if (c->x86 == 0xf) {
 952                         c->x86 += (tfms >> 20) & 0xff;
 953                         c->x86_model += ((tfms >> 16) & 0xF) << 4;
 954                 }
 955                 if (c->x86_capability[0] & (1<<19))
 956                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
 957                 c->x86_apicid = misc >> 24;
 958         } else {
 959                 /* Have CPUID level 0 only - unheard of */
 960                 c->x86 = 4;
 961         }
 962 }
 963
 964 /*
 965  * This does the hard work of actually picking apart the CPU stuff...
 966  */
 967 void __init identify_cpu(struct cpuinfo_x86 *c)
 968 {
 969         int i;
 970         u32 xlvl;
 971
 972         early_identify_cpu(c);
 973
 974         /* AMD-defined flags: level 0x80000001 */
 975         xlvl = cpuid_eax(0x80000000);
 976         c->extended_cpuid_level = xlvl;
 977         if ((xlvl & 0xffff0000) == 0x80000000) {
 978                 if (xlvl >= 0x80000001) {
 979                         c->x86_capability[1] = cpuid_edx(0x80000001);
 980                         c->x86_capability[6] = cpuid_ecx(0x80000001);
 981                 }
 982                 if (xlvl >= 0x80000004)
 983                         get_model_name(c); /* Default name */
 984         }
 985
 986         /* Transmeta-defined flags: level 0x80860001 */
 987         xlvl = cpuid_eax(0x80860000);
 988         if ((xlvl & 0xffff0000) == 0x80860000) {
 989                 /* Don't set x86_cpuid_level here for now to not confuse. */
 990                 if (xlvl >= 0x80860001)
 991                         c->x86_capability[2] = cpuid_edx(0x80860001);
 992         }
 993
 994         /*
 995          * Vendor-specific initialization.  In this section we
 996          * canonicalize the feature flags, meaning if there are
 997          * features a certain CPU supports which CPUID doesn't
 998          * tell us, CPUID claiming incorrect flags, or other bugs,
 999          * we handle them here.
1000          *
1001          * At the end of this section, c->x86_capability better
1002          * indicate the features this CPU genuinely supports!
1003          */
1004         switch (c->x86_vendor) {
1005         case X86_VENDOR_AMD:
1006                 init_amd(c);
1007                 break;
1008
1009         case X86_VENDOR_INTEL:
1010                 init_intel(c);
1011                 break;
1012
1013         case X86_VENDOR_UNKNOWN:
1014         default:
1015                 display_cacheinfo(c);
1016                 break;
1017         }
1018
1019         select_idle_routine(c);
1020         detect_ht(c);
1021
1022         /*
1023          * On SMP, boot_cpu_data holds the common feature set between
1024          * all CPUs; so make sure that we indicate which features are
1025          * common between the CPUs.  The first time this routine gets
1026          * executed, c == &boot_cpu_data.
1027          */
1028         if (c != &boot_cpu_data) {
1029                 /* AND the already accumulated flags with these */
1030                 for (i = 0 ; i < NCAPINTS ; i++)
1031                         boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1032         }
1033
1034 #ifdef CONFIG_X86_MCE
1035         mcheck_init(c);
1036 #endif
1037 #ifdef CONFIG_NUMA
1038         if (c != &boot_cpu_data)
1039                 numa_add_cpu(c - cpu_data);
1040 #endif
1041 }
1042
1043
1044 void __init print_cpu_info(struct cpuinfo_x86 *c)
1045 {
1046         if (c->x86_model_id[0])
1047                 printk("%s", c->x86_model_id);
1048
1049         if (c->x86_mask || c->cpuid_level >= 0)
1050                 printk(" stepping %02x\n", c->x86_mask);
1051         else
1052                 printk("\n");
1053 }
1054
1055 /*
1056  *      Get CPU information for use by the procfs.
1057  */
1058
1059 static int show_cpuinfo(struct seq_file *m, void *v)
1060 {
1061         struct cpuinfo_x86 *c = v;
1062
1063         /*
1064          * These flag bits must match the definitions in <asm/cpufeature.h>.
1065          * NULL means this bit is undefined or reserved; either way it doesn't
1066          * have meaning as far as Linux is concerned.  Note that it's important
1067          * to realize there is a difference between this table and CPUID -- if
1068          * applications want to get the raw CPUID data, they should access
1069          * /dev/cpu/<cpu_nr>/cpuid instead.
1070          */
1071         static char *x86_cap_flags[] = {
1072                 /* Intel-defined */
1073                 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1074                 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1075                 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1076                 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1077
1078                 /* AMD-defined */
1079                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1080                 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1081                 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1082                 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1083
1084                 /* Transmeta-defined */
1085                 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1086                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1087                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1088                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1089
1090                 /* Other (Linux-defined) */
1091                 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", "k8c+",
1092                 "constant_tsc", NULL, NULL,
1093                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1094                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1095                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1096
1097                 /* Intel-defined (#2) */
1098                 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
1099                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1100                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1101                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1102
1103                 /* VIA/Cyrix/Centaur-defined */
1104                 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1105                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1106                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1107                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1108
1109                 /* AMD-defined (#2) */
1110                 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1111                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1112                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1113                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1114         };
1115         static char *x86_power_flags[] = {
1116                 "ts",   /* temperature sensor */
1117                 "fid",  /* frequency id control */
1118                 "vid",  /* voltage id control */
1119                 "ttp",  /* thermal trip */
1120                 "tm",
1121                 "stc"
1122         };
1123
1124
1125 #ifdef CONFIG_SMP
1126         if (!cpu_online(c-cpu_data))
1127                 return 0;
1128 #endif
1129
1130         seq_printf(m,"processor\t: %u\n"
1131                      "vendor_id\t: %s\n"
1132                      "cpu family\t: %d\n"
1133                      "model\t\t: %d\n"
1134                      "model name\t: %s\n",
1135                      (unsigned)(c-cpu_data),
1136                      c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1137                      c->x86,
1138                      (int)c->x86_model,
1139                      c->x86_model_id[0] ? c->x86_model_id : "unknown");
1140
1141         if (c->x86_mask || c->cpuid_level >= 0)
1142                 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1143         else
1144                 seq_printf(m, "stepping\t: unknown\n");
1145
1146         if (cpu_has(c,X86_FEATURE_TSC)) {
1147                 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1148                              cpu_khz / 1000, (cpu_khz % 1000));
1149         }
1150
1151         /* Cache size */
1152         if (c->x86_cache_size >= 0)
1153                 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1154
1155 #ifdef CONFIG_SMP
1156         if (smp_num_siblings * c->x86_num_cores > 1) {
1157                 int cpu = c - cpu_data;
1158                 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1159                 seq_printf(m, "siblings\t: %d\n",
1160                                 c->x86_num_cores * smp_num_siblings);
1161                 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1162                 seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
1163         }
1164 #endif
1165
1166         seq_printf(m,
1167                 "fpu\t\t: yes\n"
1168                 "fpu_exception\t: yes\n"
1169                 "cpuid level\t: %d\n"
1170                 "wp\t\t: yes\n"
1171                 "flags\t\t:",
1172                    c->cpuid_level);
1173
1174         {
1175                 int i;
1176                 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1177                         if ( test_bit(i, &c->x86_capability) &&
1178                              x86_cap_flags[i] != NULL )
1179                                 seq_printf(m, " %s", x86_cap_flags[i]);
1180         }
1181
1182         seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1183                    c->loops_per_jiffy/(500000/HZ),
1184                    (c->loops_per_jiffy/(5000/HZ)) % 100);
1185
1186         if (c->x86_tlbsize > 0)
1187                 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1188         seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1189         seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1190
1191         seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1192                    c->x86_phys_bits, c->x86_virt_bits);
1193
1194         seq_printf(m, "power management:");
1195         {
1196                 unsigned i;
1197                 for (i = 0; i < 32; i++)
1198                         if (c->x86_power & (1 << i)) {
1199                                 if (i < ARRAY_SIZE(x86_power_flags))
1200                                         seq_printf(m, " %s", x86_power_flags[i]);
1201                                 else
1202                                         seq_printf(m, " [%d]", i);
1203                         }
1204         }
1205
1206         seq_printf(m, "\n\n");
1207
1208         return 0;
1209 }
1210
1211 static void *c_start(struct seq_file *m, loff_t *pos)
1212 {
1213         return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1214 }
1215
1216 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1217 {
1218         ++*pos;
1219         return c_start(m, pos);
1220 }
1221
1222 static void c_stop(struct seq_file *m, void *v)
1223 {
1224 }
1225
1226 struct seq_operations cpuinfo_op = {
1227         .start =c_start,
1228         .next = c_next,
1229         .stop = c_stop,
1230         .show = show_cpuinfo,
1231 };