2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 * Added support for Audigy 2 Value.
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 #include <sound/driver.h>
33 #include <linux/delay.h>
34 #include <linux/init.h>
35 #include <linux/interrupt.h>
36 #include <linux/pci.h>
37 #include <linux/slab.h>
38 #include <linux/vmalloc.h>
40 #include <sound/core.h>
41 #include <sound/emu10k1.h>
46 /*************************************************************************
48 *************************************************************************/
50 void snd_emu10k1_voice_init(struct snd_emu10k1
* emu
, int ch
)
52 snd_emu10k1_ptr_write(emu
, DCYSUSV
, ch
, 0);
53 snd_emu10k1_ptr_write(emu
, IP
, ch
, 0);
54 snd_emu10k1_ptr_write(emu
, VTFT
, ch
, 0xffff);
55 snd_emu10k1_ptr_write(emu
, CVCF
, ch
, 0xffff);
56 snd_emu10k1_ptr_write(emu
, PTRX
, ch
, 0);
57 snd_emu10k1_ptr_write(emu
, CPF
, ch
, 0);
58 snd_emu10k1_ptr_write(emu
, CCR
, ch
, 0);
60 snd_emu10k1_ptr_write(emu
, PSST
, ch
, 0);
61 snd_emu10k1_ptr_write(emu
, DSL
, ch
, 0x10);
62 snd_emu10k1_ptr_write(emu
, CCCA
, ch
, 0);
63 snd_emu10k1_ptr_write(emu
, Z1
, ch
, 0);
64 snd_emu10k1_ptr_write(emu
, Z2
, ch
, 0);
65 snd_emu10k1_ptr_write(emu
, FXRT
, ch
, 0x32100000);
67 snd_emu10k1_ptr_write(emu
, ATKHLDM
, ch
, 0);
68 snd_emu10k1_ptr_write(emu
, DCYSUSM
, ch
, 0);
69 snd_emu10k1_ptr_write(emu
, IFATN
, ch
, 0xffff);
70 snd_emu10k1_ptr_write(emu
, PEFE
, ch
, 0);
71 snd_emu10k1_ptr_write(emu
, FMMOD
, ch
, 0);
72 snd_emu10k1_ptr_write(emu
, TREMFRQ
, ch
, 24); /* 1 Hz */
73 snd_emu10k1_ptr_write(emu
, FM2FRQ2
, ch
, 24); /* 1 Hz */
74 snd_emu10k1_ptr_write(emu
, TEMPENV
, ch
, 0);
76 /*** these are last so OFF prevents writing ***/
77 snd_emu10k1_ptr_write(emu
, LFOVAL2
, ch
, 0);
78 snd_emu10k1_ptr_write(emu
, LFOVAL1
, ch
, 0);
79 snd_emu10k1_ptr_write(emu
, ATKHLDV
, ch
, 0);
80 snd_emu10k1_ptr_write(emu
, ENVVOL
, ch
, 0);
81 snd_emu10k1_ptr_write(emu
, ENVVAL
, ch
, 0);
83 /* Audigy extra stuffs */
85 snd_emu10k1_ptr_write(emu
, 0x4c, ch
, 0); /* ?? */
86 snd_emu10k1_ptr_write(emu
, 0x4d, ch
, 0); /* ?? */
87 snd_emu10k1_ptr_write(emu
, 0x4e, ch
, 0); /* ?? */
88 snd_emu10k1_ptr_write(emu
, 0x4f, ch
, 0); /* ?? */
89 snd_emu10k1_ptr_write(emu
, A_FXRT1
, ch
, 0x03020100);
90 snd_emu10k1_ptr_write(emu
, A_FXRT2
, ch
, 0x3f3f3f3f);
91 snd_emu10k1_ptr_write(emu
, A_SENDAMOUNTS
, ch
, 0);
95 static unsigned int spi_dac_init
[] = {
119 static int snd_emu10k1_init(struct snd_emu10k1
*emu
, int enable_ir
, int resume
)
121 unsigned int silent_page
;
124 /* disable audio and lock cache */
125 outl(HCFG_LOCKSOUNDCACHE
| HCFG_LOCKTANKCACHE_MASK
| HCFG_MUTEBUTTONENABLE
,
128 /* reset recording buffers */
129 snd_emu10k1_ptr_write(emu
, MICBS
, 0, ADCBS_BUFSIZE_NONE
);
130 snd_emu10k1_ptr_write(emu
, MICBA
, 0, 0);
131 snd_emu10k1_ptr_write(emu
, FXBS
, 0, ADCBS_BUFSIZE_NONE
);
132 snd_emu10k1_ptr_write(emu
, FXBA
, 0, 0);
133 snd_emu10k1_ptr_write(emu
, ADCBS
, 0, ADCBS_BUFSIZE_NONE
);
134 snd_emu10k1_ptr_write(emu
, ADCBA
, 0, 0);
136 /* disable channel interrupt */
137 outl(0, emu
->port
+ INTE
);
138 snd_emu10k1_ptr_write(emu
, CLIEL
, 0, 0);
139 snd_emu10k1_ptr_write(emu
, CLIEH
, 0, 0);
140 snd_emu10k1_ptr_write(emu
, SOLEL
, 0, 0);
141 snd_emu10k1_ptr_write(emu
, SOLEH
, 0, 0);
144 /* set SPDIF bypass mode */
145 snd_emu10k1_ptr_write(emu
, SPBYPASS
, 0, SPBYPASS_FORMAT
);
146 /* enable rear left + rear right AC97 slots */
147 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_REAR_RIGHT
|
151 /* init envelope engine */
152 for (ch
= 0; ch
< NUM_G
; ch
++)
153 snd_emu10k1_voice_init(emu
, ch
);
155 snd_emu10k1_ptr_write(emu
, SPCS0
, 0, emu
->spdif_bits
[0]);
156 snd_emu10k1_ptr_write(emu
, SPCS1
, 0, emu
->spdif_bits
[1]);
157 snd_emu10k1_ptr_write(emu
, SPCS2
, 0, emu
->spdif_bits
[2]);
159 if (emu
->card_capabilities
->ca0151_chip
) { /* audigy2 */
160 /* Hacks for Alice3 to work independent of haP16V driver */
163 //Setup SRCMulti_I2S SamplingRate
164 tmp
= snd_emu10k1_ptr_read(emu
, A_SPDIF_SAMPLERATE
, 0);
167 snd_emu10k1_ptr_write(emu
, A_SPDIF_SAMPLERATE
, 0, tmp
);
169 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
170 snd_emu10k1_ptr20_write(emu
, SRCSel
, 0, 0x14);
171 /* Setup SRCMulti Input Audio Enable */
172 /* Use 0xFFFFFFFF to enable P16V sounds. */
173 snd_emu10k1_ptr20_write(emu
, SRCMULTI_ENABLE
, 0, 0xFFFFFFFF);
175 /* Enabled Phased (8-channel) P16V playback */
176 outl(0x0201, emu
->port
+ HCFG2
);
177 /* Set playback routing. */
178 snd_emu10k1_ptr20_write(emu
, CAPTURE_P16V_SOURCE
, 0, 0x78e4);
180 if (emu
->card_capabilities
->ca0108_chip
) { /* audigy2 Value */
181 /* Hacks for Alice3 to work independent of haP16V driver */
184 snd_printk(KERN_INFO
"Audigy2 value: Special config.\n");
185 //Setup SRCMulti_I2S SamplingRate
186 tmp
= snd_emu10k1_ptr_read(emu
, A_SPDIF_SAMPLERATE
, 0);
189 snd_emu10k1_ptr_write(emu
, A_SPDIF_SAMPLERATE
, 0, tmp
);
191 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
192 outl(0x600000, emu
->port
+ 0x20);
193 outl(0x14, emu
->port
+ 0x24);
195 /* Setup SRCMulti Input Audio Enable */
196 outl(0x7b0000, emu
->port
+ 0x20);
197 outl(0xFF000000, emu
->port
+ 0x24);
199 /* Setup SPDIF Out Audio Enable */
200 /* The Audigy 2 Value has a separate SPDIF out,
201 * so no need for a mixer switch
203 outl(0x7a0000, emu
->port
+ 0x20);
204 outl(0xFF000000, emu
->port
+ 0x24);
205 tmp
= inl(emu
->port
+ A_IOCFG
) & ~0x8; /* Clear bit 3 */
206 outl(tmp
, emu
->port
+ A_IOCFG
);
208 if (emu
->card_capabilities
->spi_dac
) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
211 size
= ARRAY_SIZE(spi_dac_init
);
212 for (n
=0; n
< size
; n
++)
213 snd_emu10k1_spi_write(emu
, spi_dac_init
[n
]);
215 snd_emu10k1_ptr20_write(emu
, 0x60, 0, 0x10);
218 * GPIO1: Speakers-enabled.
221 * GPIO4: IEC958 Output on.
226 outl(0x76, emu
->port
+ A_IOCFG
); /* Windows uses 0x3f76 */
230 snd_emu10k1_ptr_write(emu
, PTB
, 0, emu
->ptb_pages
.addr
);
231 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0); /* taken from original driver */
232 snd_emu10k1_ptr_write(emu
, TCBS
, 0, 4); /* taken from original driver */
234 silent_page
= (emu
->silent_page
.addr
<< 1) | MAP_PTI_MASK
;
235 for (ch
= 0; ch
< NUM_G
; ch
++) {
236 snd_emu10k1_ptr_write(emu
, MAPA
, ch
, silent_page
);
237 snd_emu10k1_ptr_write(emu
, MAPB
, ch
, silent_page
);
242 * Mute Disable Audio = 0
243 * Lock Tank Memory = 1
244 * Lock Sound Memory = 0
248 if (emu
->revision
== 4) /* audigy2 */
249 outl(HCFG_AUDIOENABLE
|
250 HCFG_AC3ENABLE_CDSPDIF
|
251 HCFG_AC3ENABLE_GPSPDIF
|
252 HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
254 outl(HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
255 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
256 * e.g. card_capabilities->joystick */
257 } else if (emu
->model
== 0x20 ||
258 emu
->model
== 0xc400 ||
259 (emu
->model
== 0x21 && emu
->revision
< 6))
260 outl(HCFG_LOCKTANKCACHE_MASK
| HCFG_AUTOMUTE
, emu
->port
+ HCFG
);
262 // With on-chip joystick
263 outl(HCFG_LOCKTANKCACHE_MASK
| HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
265 if (enable_ir
) { /* enable IR for SB Live */
266 if ( emu
->card_capabilities
->emu1212m
) {
267 ; /* Disable all access to A_IOCFG for the emu1212m */
268 } else if (emu
->audigy
) {
269 unsigned int reg
= inl(emu
->port
+ A_IOCFG
);
270 outl(reg
| A_IOCFG_GPOUT2
, emu
->port
+ A_IOCFG
);
272 outl(reg
| A_IOCFG_GPOUT1
| A_IOCFG_GPOUT2
, emu
->port
+ A_IOCFG
);
274 outl(reg
, emu
->port
+ A_IOCFG
);
276 unsigned int reg
= inl(emu
->port
+ HCFG
);
277 outl(reg
| HCFG_GPOUT2
, emu
->port
+ HCFG
);
279 outl(reg
| HCFG_GPOUT1
| HCFG_GPOUT2
, emu
->port
+ HCFG
);
281 outl(reg
, emu
->port
+ HCFG
);
285 if ( emu
->card_capabilities
->emu1212m
) {
286 ; /* Disable all access to A_IOCFG for the emu1212m */
287 } else if (emu
->audigy
) { /* enable analog output */
288 unsigned int reg
= inl(emu
->port
+ A_IOCFG
);
289 outl(reg
| A_IOCFG_GPOUT0
, emu
->port
+ A_IOCFG
);
295 static void snd_emu10k1_audio_enable(struct snd_emu10k1
*emu
)
298 * Enable the audio bit
300 outl(inl(emu
->port
+ HCFG
) | HCFG_AUDIOENABLE
, emu
->port
+ HCFG
);
302 /* Enable analog/digital outs on audigy */
303 if ( emu
->card_capabilities
->emu1212m
) {
304 ; /* Disable all access to A_IOCFG for the emu1212m */
305 } else if (emu
->audigy
) {
306 outl(inl(emu
->port
+ A_IOCFG
) & ~0x44, emu
->port
+ A_IOCFG
);
308 if (emu
->card_capabilities
->ca0151_chip
) { /* audigy2 */
309 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
310 * This has to be done after init ALice3 I2SOut beyond 48KHz.
311 * So, sequence is important. */
312 outl(inl(emu
->port
+ A_IOCFG
) | 0x0040, emu
->port
+ A_IOCFG
);
313 } else if (emu
->card_capabilities
->ca0108_chip
) { /* audigy2 value */
314 /* Unmute Analog now. */
315 outl(inl(emu
->port
+ A_IOCFG
) | 0x0060, emu
->port
+ A_IOCFG
);
317 /* Disable routing from AC97 line out to Front speakers */
318 outl(inl(emu
->port
+ A_IOCFG
) | 0x0080, emu
->port
+ A_IOCFG
);
325 /* FIXME: the following routine disables LiveDrive-II !! */
328 tmp
= inl(emu
->port
+ HCFG
);
329 if (tmp
& (HCFG_GPINPUT0
| HCFG_GPINPUT1
)) {
330 outl(tmp
|0x800, emu
->port
+ HCFG
);
332 if (tmp
!= (inl(emu
->port
+ HCFG
) & ~0x800)) {
334 outl(tmp
, emu
->port
+ HCFG
);
340 snd_emu10k1_intr_enable(emu
, INTE_PCIERRORENABLE
);
343 int snd_emu10k1_done(struct snd_emu10k1
* emu
)
347 outl(0, emu
->port
+ INTE
);
352 for (ch
= 0; ch
< NUM_G
; ch
++)
353 snd_emu10k1_ptr_write(emu
, DCYSUSV
, ch
, 0);
354 for (ch
= 0; ch
< NUM_G
; ch
++) {
355 snd_emu10k1_ptr_write(emu
, VTFT
, ch
, 0);
356 snd_emu10k1_ptr_write(emu
, CVCF
, ch
, 0);
357 snd_emu10k1_ptr_write(emu
, PTRX
, ch
, 0);
358 snd_emu10k1_ptr_write(emu
, CPF
, ch
, 0);
361 /* reset recording buffers */
362 snd_emu10k1_ptr_write(emu
, MICBS
, 0, 0);
363 snd_emu10k1_ptr_write(emu
, MICBA
, 0, 0);
364 snd_emu10k1_ptr_write(emu
, FXBS
, 0, 0);
365 snd_emu10k1_ptr_write(emu
, FXBA
, 0, 0);
366 snd_emu10k1_ptr_write(emu
, FXWC
, 0, 0);
367 snd_emu10k1_ptr_write(emu
, ADCBS
, 0, ADCBS_BUFSIZE_NONE
);
368 snd_emu10k1_ptr_write(emu
, ADCBA
, 0, 0);
369 snd_emu10k1_ptr_write(emu
, TCBS
, 0, TCBS_BUFFSIZE_16K
);
370 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0);
372 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, A_DBG_SINGLE_STEP
);
374 snd_emu10k1_ptr_write(emu
, DBG
, 0, EMU10K1_DBG_SINGLE_STEP
);
376 /* disable channel interrupt */
377 snd_emu10k1_ptr_write(emu
, CLIEL
, 0, 0);
378 snd_emu10k1_ptr_write(emu
, CLIEH
, 0, 0);
379 snd_emu10k1_ptr_write(emu
, SOLEL
, 0, 0);
380 snd_emu10k1_ptr_write(emu
, SOLEH
, 0, 0);
382 /* disable audio and lock cache */
383 outl(HCFG_LOCKSOUNDCACHE
| HCFG_LOCKTANKCACHE_MASK
| HCFG_MUTEBUTTONENABLE
, emu
->port
+ HCFG
);
384 snd_emu10k1_ptr_write(emu
, PTB
, 0, 0);
389 /*************************************************************************
390 * ECARD functional implementation
391 *************************************************************************/
393 /* In A1 Silicon, these bits are in the HC register */
394 #define HOOKN_BIT (1L << 12)
395 #define HANDN_BIT (1L << 11)
396 #define PULSEN_BIT (1L << 10)
398 #define EC_GDI1 (1 << 13)
399 #define EC_GDI0 (1 << 14)
401 #define EC_NUM_CONTROL_BITS 20
403 #define EC_AC3_DATA_SELN 0x0001L
404 #define EC_EE_DATA_SEL 0x0002L
405 #define EC_EE_CNTRL_SELN 0x0004L
406 #define EC_EECLK 0x0008L
407 #define EC_EECS 0x0010L
408 #define EC_EESDO 0x0020L
409 #define EC_TRIM_CSN 0x0040L
410 #define EC_TRIM_SCLK 0x0080L
411 #define EC_TRIM_SDATA 0x0100L
412 #define EC_TRIM_MUTEN 0x0200L
413 #define EC_ADCCAL 0x0400L
414 #define EC_ADCRSTN 0x0800L
415 #define EC_DACCAL 0x1000L
416 #define EC_DACMUTEN 0x2000L
417 #define EC_LEDN 0x4000L
419 #define EC_SPDIF0_SEL_SHIFT 15
420 #define EC_SPDIF1_SEL_SHIFT 17
421 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
422 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
423 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
424 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
425 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
426 * be incremented any time the EEPROM's
427 * format is changed. */
429 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
431 /* Addresses for special values stored in to EEPROM */
432 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
433 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
434 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
436 #define EC_LAST_PROMFILE_ADDR 0x2f
438 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
439 * can be up to 30 characters in length
440 * and is stored as a NULL-terminated
441 * ASCII string. Any unused bytes must be
442 * filled with zeros */
443 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
446 /* Most of this stuff is pretty self-evident. According to the hardware
447 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
448 * offset problem. Weird.
450 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
454 #define EC_DEFAULT_ADC_GAIN 0xC4C4
455 #define EC_DEFAULT_SPDIF0_SEL 0x0
456 #define EC_DEFAULT_SPDIF1_SEL 0x4
458 /**************************************************************************
459 * @func Clock bits into the Ecard's control latch. The Ecard uses a
460 * control latch will is loaded bit-serially by toggling the Modem control
461 * lines from function 2 on the E8010. This function hides these details
462 * and presents the illusion that we are actually writing to a distinct
466 static void snd_emu10k1_ecard_write(struct snd_emu10k1
* emu
, unsigned int value
)
468 unsigned short count
;
470 unsigned long hc_port
;
471 unsigned int hc_value
;
473 hc_port
= emu
->port
+ HCFG
;
474 hc_value
= inl(hc_port
) & ~(HOOKN_BIT
| HANDN_BIT
| PULSEN_BIT
);
475 outl(hc_value
, hc_port
);
477 for (count
= 0; count
< EC_NUM_CONTROL_BITS
; count
++) {
479 /* Set up the value */
480 data
= ((value
& 0x1) ? PULSEN_BIT
: 0);
483 outl(hc_value
| data
, hc_port
);
485 /* Clock the shift register */
486 outl(hc_value
| data
| HANDN_BIT
, hc_port
);
487 outl(hc_value
| data
, hc_port
);
491 outl(hc_value
| HOOKN_BIT
, hc_port
);
492 outl(hc_value
, hc_port
);
495 /**************************************************************************
496 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
497 * trim value consists of a 16bit value which is composed of two
498 * 8 bit gain/trim values, one for the left channel and one for the
499 * right channel. The following table maps from the Gain/Attenuation
500 * value in decibels into the corresponding bit pattern for a single
504 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1
* emu
,
509 /* Enable writing to the TRIM registers */
510 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
& ~EC_TRIM_CSN
);
512 /* Do it again to insure that we meet hold time requirements */
513 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
& ~EC_TRIM_CSN
);
515 for (bit
= (1 << 15); bit
; bit
>>= 1) {
518 value
= emu
->ecard_ctrl
& ~(EC_TRIM_CSN
| EC_TRIM_SDATA
);
521 value
|= EC_TRIM_SDATA
;
524 snd_emu10k1_ecard_write(emu
, value
);
525 snd_emu10k1_ecard_write(emu
, value
| EC_TRIM_SCLK
);
526 snd_emu10k1_ecard_write(emu
, value
);
529 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
);
532 static int __devinit
snd_emu10k1_ecard_init(struct snd_emu10k1
* emu
)
534 unsigned int hc_value
;
536 /* Set up the initial settings */
537 emu
->ecard_ctrl
= EC_RAW_RUN_MODE
|
538 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL
) |
539 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL
);
541 /* Step 0: Set the codec type in the hardware control register
542 * and enable audio output */
543 hc_value
= inl(emu
->port
+ HCFG
);
544 outl(hc_value
| HCFG_AUDIOENABLE
| HCFG_CODECFORMAT_I2S
, emu
->port
+ HCFG
);
545 inl(emu
->port
+ HCFG
);
547 /* Step 1: Turn off the led and deassert TRIM_CS */
548 snd_emu10k1_ecard_write(emu
, EC_ADCCAL
| EC_LEDN
| EC_TRIM_CSN
);
550 /* Step 2: Calibrate the ADC and DAC */
551 snd_emu10k1_ecard_write(emu
, EC_DACCAL
| EC_LEDN
| EC_TRIM_CSN
);
553 /* Step 3: Wait for awhile; XXX We can't get away with this
554 * under a real operating system; we'll need to block and wait that
556 snd_emu10k1_wait(emu
, 48000);
558 /* Step 4: Switch off the DAC and ADC calibration. Note
559 * That ADC_CAL is actually an inverted signal, so we assert
560 * it here to stop calibration. */
561 snd_emu10k1_ecard_write(emu
, EC_ADCCAL
| EC_LEDN
| EC_TRIM_CSN
);
563 /* Step 4: Switch into run mode */
564 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
);
566 /* Step 5: Set the analog input gain */
567 snd_emu10k1_ecard_setadcgain(emu
, EC_DEFAULT_ADC_GAIN
);
572 static int __devinit
snd_emu10k1_cardbus_init(struct snd_emu10k1
* emu
)
574 unsigned long special_port
;
577 /* Special initialisation routine
578 * before the rest of the IO-Ports become active.
580 special_port
= emu
->port
+ 0x38;
581 value
= inl(special_port
);
582 outl(0x00d00000, special_port
);
583 value
= inl(special_port
);
584 outl(0x00d00001, special_port
);
585 value
= inl(special_port
);
586 outl(0x00d0005f, special_port
);
587 value
= inl(special_port
);
588 outl(0x00d0007f, special_port
);
589 value
= inl(special_port
);
590 outl(0x0090007f, special_port
);
591 value
= inl(special_port
);
593 snd_emu10k1_ptr20_write(emu
, TINA2_VOLUME
, 0, 0xfefefefe); /* Defaults to 0x30303030 */
597 static int snd_emu1212m_fpga_write(struct snd_emu10k1
* emu
, int reg
, int value
)
599 if (reg
<0 || reg
>0x3f)
601 reg
+=0x40; /* 0x40 upwards are registers. */
602 if (value
<0 || value
>0x3f) /* 0 to 0x3f are values */
604 outl(reg
, emu
->port
+ A_IOCFG
);
605 outl(reg
| 0x80, emu
->port
+ A_IOCFG
); /* High bit clocks the value into the fpga. */
606 outl(value
, emu
->port
+ A_IOCFG
);
607 outl(value
| 0x80 , emu
->port
+ A_IOCFG
); /* High bit clocks the value into the fpga. */
612 static int snd_emu1212m_fpga_read(struct snd_emu10k1
* emu
, int reg
, int *value
)
614 if (reg
<0 || reg
>0x3f)
616 reg
+=0x40; /* 0x40 upwards are registers. */
617 outl(reg
, emu
->port
+ A_IOCFG
);
618 outl(reg
| 0x80, emu
->port
+ A_IOCFG
); /* High bit clocks the value into the fpga. */
619 *value
= inl(emu
->port
+ A_IOCFG
);
624 static int snd_emu1212m_fpga_netlist_write(struct snd_emu10k1
* emu
, int reg
, int value
)
626 snd_emu1212m_fpga_write(emu
, 0x00, ((reg
>> 8) & 0x3f) );
627 snd_emu1212m_fpga_write(emu
, 0x01, (reg
& 0x3f) );
628 snd_emu1212m_fpga_write(emu
, 0x02, ((value
>> 8) & 0x3f) );
629 snd_emu1212m_fpga_write(emu
, 0x03, (value
& 0x3f) );
634 static int __devinit
snd_emu10k1_emu1212m_init(struct snd_emu10k1
* emu
)
639 snd_printk(KERN_ERR
"emu1212m: Special config.\n");
640 outl(0x0005a00c, emu
->port
+ HCFG
);
641 outl(0x0005a004, emu
->port
+ HCFG
);
642 outl(0x0005a000, emu
->port
+ HCFG
);
643 outl(0x0005a000, emu
->port
+ HCFG
);
645 snd_emu1212m_fpga_read(emu
, 0x22, &tmp
);
646 snd_emu1212m_fpga_read(emu
, 0x23, &tmp
);
647 snd_emu1212m_fpga_read(emu
, 0x24, &tmp
);
648 snd_emu1212m_fpga_write(emu
, 0x04, 0x01 );
649 snd_emu1212m_fpga_read(emu
, 0x0b, &tmp
);
650 snd_emu1212m_fpga_write(emu
, 0x0b, 0x01 );
651 snd_emu1212m_fpga_read(emu
, 0x10, &tmp
);
652 snd_emu1212m_fpga_write(emu
, 0x10, 0x00 );
653 snd_emu1212m_fpga_read(emu
, 0x11, &tmp
);
654 snd_emu1212m_fpga_write(emu
, 0x11, 0x30 );
655 snd_emu1212m_fpga_read(emu
, 0x13, &tmp
);
656 snd_emu1212m_fpga_write(emu
, 0x13, 0x0f );
657 snd_emu1212m_fpga_read(emu
, 0x11, &tmp
);
658 snd_emu1212m_fpga_write(emu
, 0x11, 0x30 );
659 snd_emu1212m_fpga_read(emu
, 0x0a, &tmp
);
660 snd_emu1212m_fpga_write(emu
, 0x0a, 0x10 );
661 snd_emu1212m_fpga_write(emu
, 0x0c, 0x19 );
662 snd_emu1212m_fpga_write(emu
, 0x12, 0x0c );
663 snd_emu1212m_fpga_write(emu
, 0x09, 0x0f );
664 snd_emu1212m_fpga_write(emu
, 0x06, 0x00 );
665 snd_emu1212m_fpga_write(emu
, 0x05, 0x00 );
666 snd_emu1212m_fpga_write(emu
, 0x0e, 0x12 );
667 snd_emu1212m_fpga_netlist_write(emu
, 0x0000, 0x0200);
668 snd_emu1212m_fpga_netlist_write(emu
, 0x0001, 0x0201);
669 snd_emu1212m_fpga_netlist_write(emu
, 0x0002, 0x0500);
670 snd_emu1212m_fpga_netlist_write(emu
, 0x0003, 0x0501);
671 snd_emu1212m_fpga_netlist_write(emu
, 0x0004, 0x0400);
672 snd_emu1212m_fpga_netlist_write(emu
, 0x0005, 0x0401);
673 snd_emu1212m_fpga_netlist_write(emu
, 0x0006, 0x0402);
674 snd_emu1212m_fpga_netlist_write(emu
, 0x0007, 0x0403);
675 snd_emu1212m_fpga_netlist_write(emu
, 0x0008, 0x0404);
676 snd_emu1212m_fpga_netlist_write(emu
, 0x0009, 0x0405);
677 snd_emu1212m_fpga_netlist_write(emu
, 0x000a, 0x0406);
678 snd_emu1212m_fpga_netlist_write(emu
, 0x000b, 0x0407);
679 snd_emu1212m_fpga_netlist_write(emu
, 0x000c, 0x0100);
680 snd_emu1212m_fpga_netlist_write(emu
, 0x000d, 0x0104);
681 snd_emu1212m_fpga_netlist_write(emu
, 0x000e, 0x0200);
682 snd_emu1212m_fpga_netlist_write(emu
, 0x000f, 0x0201);
683 for (i
=0;i
< 0x20;i
++) {
684 snd_emu1212m_fpga_netlist_write(emu
, 0x0100+i
, 0x0000);
686 for (i
=0;i
< 4;i
++) {
687 snd_emu1212m_fpga_netlist_write(emu
, 0x0200+i
, 0x0000);
689 for (i
=0;i
< 7;i
++) {
690 snd_emu1212m_fpga_netlist_write(emu
, 0x0300+i
, 0x0000);
692 for (i
=0;i
< 7;i
++) {
693 snd_emu1212m_fpga_netlist_write(emu
, 0x0400+i
, 0x0000);
695 snd_emu1212m_fpga_netlist_write(emu
, 0x0500, 0x0108);
696 snd_emu1212m_fpga_netlist_write(emu
, 0x0501, 0x010c);
697 snd_emu1212m_fpga_netlist_write(emu
, 0x0600, 0x0110);
698 snd_emu1212m_fpga_netlist_write(emu
, 0x0601, 0x0114);
699 snd_emu1212m_fpga_netlist_write(emu
, 0x0700, 0x0118);
700 snd_emu1212m_fpga_netlist_write(emu
, 0x0701, 0x011c);
701 snd_emu1212m_fpga_write(emu
, 0x07, 0x01 );
703 snd_emu1212m_fpga_read(emu
, 0x21, &tmp
);
705 outl(0x0000a000, emu
->port
+ HCFG
);
706 outl(0x0000a001, emu
->port
+ HCFG
);
707 /* Initial boot complete. Now patches */
709 snd_emu1212m_fpga_read(emu
, 0x21, &tmp
);
710 snd_emu1212m_fpga_write(emu
, 0x0c, 0x19 );
711 snd_emu1212m_fpga_write(emu
, 0x12, 0x0c );
712 snd_emu1212m_fpga_write(emu
, 0x0c, 0x19 );
713 snd_emu1212m_fpga_write(emu
, 0x12, 0x0c );
714 snd_emu1212m_fpga_read(emu
, 0x0a, &tmp
);
715 snd_emu1212m_fpga_write(emu
, 0x0a, 0x10 );
717 snd_emu1212m_fpga_read(emu
, 0x20, &tmp
);
718 snd_emu1212m_fpga_read(emu
, 0x21, &tmp
);
720 snd_emu1212m_fpga_netlist_write(emu
, 0x0300, 0x0312);
721 snd_emu1212m_fpga_netlist_write(emu
, 0x0301, 0x0313);
722 snd_emu1212m_fpga_netlist_write(emu
, 0x0200, 0x0302);
723 snd_emu1212m_fpga_netlist_write(emu
, 0x0201, 0x0303);
728 * Create the EMU10K1 instance
732 static int alloc_pm_buffer(struct snd_emu10k1
*emu
);
733 static void free_pm_buffer(struct snd_emu10k1
*emu
);
736 static int snd_emu10k1_free(struct snd_emu10k1
*emu
)
738 if (emu
->port
) { /* avoid access to already used hardware */
739 snd_emu10k1_fx8010_tram_setup(emu
, 0);
740 snd_emu10k1_done(emu
);
741 /* remove reserved page */
742 if (emu
->reserved_page
) {
743 snd_emu10k1_synth_free(emu
, (struct snd_util_memblk
*)emu
->reserved_page
);
744 emu
->reserved_page
= NULL
;
746 snd_emu10k1_free_efx(emu
);
749 snd_util_memhdr_free(emu
->memhdr
);
750 if (emu
->silent_page
.area
)
751 snd_dma_free_pages(&emu
->silent_page
);
752 if (emu
->ptb_pages
.area
)
753 snd_dma_free_pages(&emu
->ptb_pages
);
754 vfree(emu
->page_ptr_table
);
755 vfree(emu
->page_addr_table
);
760 free_irq(emu
->irq
, (void *)emu
);
762 pci_release_regions(emu
->pci
);
763 if (emu
->card_capabilities
->ca0151_chip
) /* P16V */
765 pci_disable_device(emu
->pci
);
770 static int snd_emu10k1_dev_free(struct snd_device
*device
)
772 struct snd_emu10k1
*emu
= device
->device_data
;
773 return snd_emu10k1_free(emu
);
776 static struct snd_emu_chip_details emu_chip_details
[] = {
777 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
778 /* Tested by James@superbug.co.uk 3rd July 2005 */
785 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x10011102,
786 .driver
= "Audigy2", .name
= "Audigy 2 Value [SB0400]",
792 /* Audigy 2 ZS Notebook Cardbus card.*/
793 /* Tested by James@superbug.co.uk 22th December 2005 */
794 /* Audio output 7.1/Headphones working.
795 * Digital output working. (AC3 not checked, only PCM)
796 * Audio inputs not tested.
799 * DAC: Wolfson WM8768/WM8568
800 * ADC: Wolfson WM8775
804 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x20011102,
805 .driver
= "Audigy2", .name
= "Audigy 2 ZS Notebook [SB0530]",
809 .ca_cardbus_chip
= 1,
812 {.vendor
= 0x1102, .device
= 0x0008,
813 .driver
= "Audigy2", .name
= "Audigy 2 Value [Unknown]",
818 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
819 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x40011102,
820 .driver
= "Audigy2", .name
= "E-mu 1212m [4001]",
825 /* Tested by James@superbug.co.uk 3rd July 2005 */
826 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20071102,
827 .driver
= "Audigy2", .name
= "Audigy 4 PRO [SB0380]",
835 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
836 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20061102,
837 .driver
= "Audigy2", .name
= "Audigy 2 [2006]",
845 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20021102,
846 .driver
= "Audigy2", .name
= "Audigy 2 ZS [SB0350]",
854 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20011102,
855 .driver
= "Audigy2", .name
= "Audigy 2 ZS [2001]",
864 /* Tested by James@superbug.co.uk 3rd July 2005 */
871 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10071102,
872 .driver
= "Audigy2", .name
= "Audigy 2 [SB0240]",
880 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10051102,
881 .driver
= "Audigy2", .name
= "Audigy 2 EX [1005]",
888 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10021102,
889 .driver
= "Audigy2", .name
= "Audigy 2 Platinum [SB0240P]",
897 {.vendor
= 0x1102, .device
= 0x0004, .revision
= 0x04,
898 .driver
= "Audigy2", .name
= "Audigy 2 [Unknown]",
905 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00531102,
906 .driver
= "Audigy", .name
= "Audigy 1 [SB0090]",
911 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00521102,
912 .driver
= "Audigy", .name
= "Audigy 1 ES [SB0160]",
918 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00511102,
919 .driver
= "Audigy", .name
= "Audigy 1 [SB0090]",
924 {.vendor
= 0x1102, .device
= 0x0004,
925 .driver
= "Audigy", .name
= "Audigy 1 [Unknown]",
930 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x806B1102,
931 .driver
= "EMU10K1", .name
= "SBLive! [SB0105]",
936 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x806A1102,
937 .driver
= "EMU10K1", .name
= "SBLive! Value [SB0103]",
942 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80691102,
943 .driver
= "EMU10K1", .name
= "SBLive! Value [SB0101]",
948 /* Tested by ALSA bug#1680 26th December 2005 */
949 /* note: It really has SB0220 written on the card. */
950 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80661102,
951 .driver
= "EMU10K1", .name
= "SB Live 5.1 Dell OEM [SB0220]",
956 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
957 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80651102,
958 .driver
= "EMU10K1", .name
= "SB Live 5.1 [SB0220]",
963 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x100a1102,
964 .driver
= "EMU10K1", .name
= "SB Live 5.1 [SB0220]",
969 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80641102,
970 .driver
= "EMU10K1", .name
= "SB Live 5.1",
975 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
976 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80611102,
977 .driver
= "EMU10K1", .name
= "SBLive 5.1 [SB0060]",
980 .ac97_chip
= 2, /* ac97 is optional; both SBLive 5.1 and platinum
981 * share the same IDs!
984 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80511102,
985 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4850]",
990 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80401102,
991 .driver
= "EMU10K1", .name
= "SBLive! Platinum [CT4760P]",
995 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80321102,
996 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4871]",
1001 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80311102,
1002 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4831]",
1007 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80281102,
1008 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4870]",
1013 /* Tested by James@superbug.co.uk 3rd July 2005 */
1014 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80271102,
1015 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4832]",
1020 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80261102,
1021 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4830]",
1026 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80231102,
1027 .driver
= "EMU10K1", .name
= "SB PCI512 [CT4790]",
1032 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80221102,
1033 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4780]",
1038 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x40011102,
1039 .driver
= "EMU10K1", .name
= "E-mu APS [4001]",
1043 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x00211102,
1044 .driver
= "EMU10K1", .name
= "SBLive! [CT4620]",
1049 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x00201102,
1050 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4670]",
1055 {.vendor
= 0x1102, .device
= 0x0002,
1056 .driver
= "EMU10K1", .name
= "SB Live [Unknown]",
1061 { } /* terminator */
1064 int __devinit
snd_emu10k1_create(struct snd_card
*card
,
1065 struct pci_dev
* pci
,
1066 unsigned short extin_mask
,
1067 unsigned short extout_mask
,
1068 long max_cache_bytes
,
1071 struct snd_emu10k1
** remu
)
1073 struct snd_emu10k1
*emu
;
1076 unsigned char revision
;
1077 unsigned int silent_page
;
1078 const struct snd_emu_chip_details
*c
;
1079 static struct snd_device_ops ops
= {
1080 .dev_free
= snd_emu10k1_dev_free
,
1085 /* enable PCI device */
1086 if ((err
= pci_enable_device(pci
)) < 0)
1089 emu
= kzalloc(sizeof(*emu
), GFP_KERNEL
);
1091 pci_disable_device(pci
);
1095 spin_lock_init(&emu
->reg_lock
);
1096 spin_lock_init(&emu
->emu_lock
);
1097 spin_lock_init(&emu
->voice_lock
);
1098 spin_lock_init(&emu
->synth_lock
);
1099 spin_lock_init(&emu
->memblk_lock
);
1100 init_MUTEX(&emu
->ptb_lock
);
1101 init_MUTEX(&emu
->fx8010
.lock
);
1102 INIT_LIST_HEAD(&emu
->mapped_link_head
);
1103 INIT_LIST_HEAD(&emu
->mapped_order_link_head
);
1107 emu
->get_synth_voice
= NULL
;
1108 /* read revision & serial */
1109 pci_read_config_byte(pci
, PCI_REVISION_ID
, &revision
);
1110 emu
->revision
= revision
;
1111 pci_read_config_dword(pci
, PCI_SUBSYSTEM_VENDOR_ID
, &emu
->serial
);
1112 pci_read_config_word(pci
, PCI_SUBSYSTEM_ID
, &emu
->model
);
1113 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci
->vendor
, pci
->device
, emu
->serial
, emu
->model
);
1115 for (c
= emu_chip_details
; c
->vendor
; c
++) {
1116 if (c
->vendor
== pci
->vendor
&& c
->device
== pci
->device
) {
1118 if (c
->subsystem
&& (c
->subsystem
== subsystem
) ) {
1122 if (c
->subsystem
&& (c
->subsystem
!= emu
->serial
) )
1124 if (c
->revision
&& c
->revision
!= emu
->revision
)
1130 if (c
->vendor
== 0) {
1131 snd_printk(KERN_ERR
"emu10k1: Card not recognised\n");
1133 pci_disable_device(pci
);
1136 emu
->card_capabilities
= c
;
1137 if (c
->subsystem
&& !subsystem
)
1138 snd_printdd("Sound card name=%s\n", c
->name
);
1140 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1141 c
->name
, pci
->vendor
, pci
->device
, emu
->serial
, c
->subsystem
);
1143 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1144 c
->name
, pci
->vendor
, pci
->device
, emu
->serial
);
1146 if (!*card
->id
&& c
->id
) {
1148 strlcpy(card
->id
, c
->id
, sizeof(card
->id
));
1150 for (i
= 0; i
< snd_ecards_limit
; i
++) {
1151 if (snd_cards
[i
] && !strcmp(snd_cards
[i
]->id
, card
->id
))
1154 if (i
>= snd_ecards_limit
)
1157 if (n
>= SNDRV_CARDS
)
1159 snprintf(card
->id
, sizeof(card
->id
), "%s_%d", c
->id
, n
);
1163 is_audigy
= emu
->audigy
= c
->emu10k2_chip
;
1165 /* set the DMA transfer mask */
1166 emu
->dma_mask
= is_audigy
? AUDIGY_DMA_MASK
: EMU10K1_DMA_MASK
;
1167 if (pci_set_dma_mask(pci
, emu
->dma_mask
) < 0 ||
1168 pci_set_consistent_dma_mask(pci
, emu
->dma_mask
) < 0) {
1169 snd_printk(KERN_ERR
"architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu
->dma_mask
);
1171 pci_disable_device(pci
);
1175 emu
->gpr_base
= A_FXGPREGBASE
;
1177 emu
->gpr_base
= FXGPREGBASE
;
1179 if ((err
= pci_request_regions(pci
, "EMU10K1")) < 0) {
1181 pci_disable_device(pci
);
1184 emu
->port
= pci_resource_start(pci
, 0);
1186 if (request_irq(pci
->irq
, snd_emu10k1_interrupt
, SA_INTERRUPT
|SA_SHIRQ
, "EMU10K1", (void *)emu
)) {
1190 emu
->irq
= pci
->irq
;
1192 emu
->max_cache_pages
= max_cache_bytes
>> PAGE_SHIFT
;
1193 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
1194 32 * 1024, &emu
->ptb_pages
) < 0) {
1199 emu
->page_ptr_table
= (void **)vmalloc(emu
->max_cache_pages
* sizeof(void*));
1200 emu
->page_addr_table
= (unsigned long*)vmalloc(emu
->max_cache_pages
* sizeof(unsigned long));
1201 if (emu
->page_ptr_table
== NULL
|| emu
->page_addr_table
== NULL
) {
1206 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
1207 EMUPAGESIZE
, &emu
->silent_page
) < 0) {
1211 emu
->memhdr
= snd_util_memhdr_new(emu
->max_cache_pages
* PAGE_SIZE
);
1212 if (emu
->memhdr
== NULL
) {
1216 emu
->memhdr
->block_extra_size
= sizeof(struct snd_emu10k1_memblk
) -
1217 sizeof(struct snd_util_memblk
);
1219 pci_set_master(pci
);
1221 emu
->fx8010
.fxbus_mask
= 0x303f;
1222 if (extin_mask
== 0)
1223 extin_mask
= 0x3fcf;
1224 if (extout_mask
== 0)
1225 extout_mask
= 0x7fff;
1226 emu
->fx8010
.extin_mask
= extin_mask
;
1227 emu
->fx8010
.extout_mask
= extout_mask
;
1228 emu
->enable_ir
= enable_ir
;
1230 if (emu
->card_capabilities
->ecard
) {
1231 if ((err
= snd_emu10k1_ecard_init(emu
)) < 0)
1233 } else if (emu
->card_capabilities
->ca_cardbus_chip
) {
1234 if ((err
= snd_emu10k1_cardbus_init(emu
)) < 0)
1236 } else if (emu
->card_capabilities
->emu1212m
) {
1237 if ((err
= snd_emu10k1_emu1212m_init(emu
)) < 0) {
1238 snd_emu10k1_free(emu
);
1242 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1243 does not support this, it shouldn't do any harm */
1244 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_CNTR
|AC97SLOT_LFE
);
1247 /* initialize TRAM setup */
1248 emu
->fx8010
.itram_size
= (16 * 1024)/2;
1249 emu
->fx8010
.etram_pages
.area
= NULL
;
1250 emu
->fx8010
.etram_pages
.bytes
= 0;
1253 * Init to 0x02109204 :
1254 * Clock accuracy = 0 (1000ppm)
1255 * Sample Rate = 2 (48kHz)
1256 * Audio Channel = 1 (Left of 2)
1257 * Source Number = 0 (Unspecified)
1258 * Generation Status = 1 (Original for Cat Code 12)
1259 * Cat Code = 12 (Digital Signal Mixer)
1261 * Emphasis = 0 (None)
1262 * CP = 1 (Copyright unasserted)
1263 * AN = 0 (Audio data)
1266 emu
->spdif_bits
[0] = emu
->spdif_bits
[1] =
1267 emu
->spdif_bits
[2] = SPCS_CLKACCY_1000PPM
| SPCS_SAMPLERATE_48
|
1268 SPCS_CHANNELNUM_LEFT
| SPCS_SOURCENUM_UNSPEC
|
1269 SPCS_GENERATIONSTATUS
| 0x00001200 |
1270 0x00000000 | SPCS_EMPHASIS_NONE
| SPCS_COPYRIGHT
;
1272 emu
->reserved_page
= (struct snd_emu10k1_memblk
*)
1273 snd_emu10k1_synth_alloc(emu
, 4096);
1274 if (emu
->reserved_page
)
1275 emu
->reserved_page
->map_locked
= 1;
1277 /* Clear silent pages and set up pointers */
1278 memset(emu
->silent_page
.area
, 0, PAGE_SIZE
);
1279 silent_page
= emu
->silent_page
.addr
<< 1;
1280 for (idx
= 0; idx
< MAXPAGES
; idx
++)
1281 ((u32
*)emu
->ptb_pages
.area
)[idx
] = cpu_to_le32(silent_page
| idx
);
1283 /* set up voice indices */
1284 for (idx
= 0; idx
< NUM_G
; idx
++) {
1285 emu
->voices
[idx
].emu
= emu
;
1286 emu
->voices
[idx
].number
= idx
;
1289 if ((err
= snd_emu10k1_init(emu
, enable_ir
, 0)) < 0)
1292 if ((err
= alloc_pm_buffer(emu
)) < 0)
1296 /* Initialize the effect engine */
1297 if ((err
= snd_emu10k1_init_efx(emu
)) < 0)
1299 snd_emu10k1_audio_enable(emu
);
1301 if ((err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
, emu
, &ops
)) < 0)
1304 #ifdef CONFIG_PROC_FS
1305 snd_emu10k1_proc_init(emu
);
1308 snd_card_set_dev(card
, &pci
->dev
);
1313 snd_emu10k1_free(emu
);
1318 static unsigned char saved_regs
[] = {
1319 CPF
, PTRX
, CVCF
, VTFT
, Z1
, Z2
, PSST
, DSL
, CCCA
, CCR
, CLP
,
1320 FXRT
, MAPA
, MAPB
, ENVVOL
, ATKHLDV
, DCYSUSV
, LFOVAL1
, ENVVAL
,
1321 ATKHLDM
, DCYSUSM
, LFOVAL2
, IP
, IFATN
, PEFE
, FMMOD
, TREMFRQ
, FM2FRQ2
,
1322 TEMPENV
, ADCCR
, FXWC
, MICBA
, ADCBA
, FXBA
,
1323 MICBS
, ADCBS
, FXBS
, CDCS
, GPSCS
, SPCS0
, SPCS1
, SPCS2
,
1324 SPBYPASS
, AC97SLOT
, CDSRCS
, GPSRCS
, ZVSRCS
, MICIDX
, ADCIDX
, FXIDX
,
1327 static unsigned char saved_regs_audigy
[] = {
1328 A_ADCIDX
, A_MICIDX
, A_FXWC1
, A_FXWC2
, A_SAMPLE_RATE
,
1329 A_FXRT2
, A_SENDAMOUNTS
, A_FXRT1
,
1333 static int __devinit
alloc_pm_buffer(struct snd_emu10k1
*emu
)
1337 size
= ARRAY_SIZE(saved_regs
);
1339 size
+= ARRAY_SIZE(saved_regs_audigy
);
1340 emu
->saved_ptr
= vmalloc(4 * NUM_G
* size
);
1341 if (! emu
->saved_ptr
)
1343 if (snd_emu10k1_efx_alloc_pm_buffer(emu
) < 0)
1345 if (emu
->card_capabilities
->ca0151_chip
&&
1346 snd_p16v_alloc_pm_buffer(emu
) < 0)
1351 static void free_pm_buffer(struct snd_emu10k1
*emu
)
1353 vfree(emu
->saved_ptr
);
1354 snd_emu10k1_efx_free_pm_buffer(emu
);
1355 if (emu
->card_capabilities
->ca0151_chip
)
1356 snd_p16v_free_pm_buffer(emu
);
1359 void snd_emu10k1_suspend_regs(struct snd_emu10k1
*emu
)
1365 val
= emu
->saved_ptr
;
1366 for (reg
= saved_regs
; *reg
!= 0xff; reg
++)
1367 for (i
= 0; i
< NUM_G
; i
++, val
++)
1368 *val
= snd_emu10k1_ptr_read(emu
, *reg
, i
);
1370 for (reg
= saved_regs_audigy
; *reg
!= 0xff; reg
++)
1371 for (i
= 0; i
< NUM_G
; i
++, val
++)
1372 *val
= snd_emu10k1_ptr_read(emu
, *reg
, i
);
1375 emu
->saved_a_iocfg
= inl(emu
->port
+ A_IOCFG
);
1376 emu
->saved_hcfg
= inl(emu
->port
+ HCFG
);
1379 void snd_emu10k1_resume_init(struct snd_emu10k1
*emu
)
1381 if (emu
->card_capabilities
->ecard
)
1382 snd_emu10k1_ecard_init(emu
);
1384 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_CNTR
|AC97SLOT_LFE
);
1385 snd_emu10k1_init(emu
, emu
->enable_ir
, 1);
1388 void snd_emu10k1_resume_regs(struct snd_emu10k1
*emu
)
1394 snd_emu10k1_audio_enable(emu
);
1396 /* resore for spdif */
1398 outl(emu
->port
+ A_IOCFG
, emu
->saved_a_iocfg
);
1399 outl(emu
->port
+ HCFG
, emu
->saved_hcfg
);
1401 val
= emu
->saved_ptr
;
1402 for (reg
= saved_regs
; *reg
!= 0xff; reg
++)
1403 for (i
= 0; i
< NUM_G
; i
++, val
++)
1404 snd_emu10k1_ptr_write(emu
, *reg
, i
, *val
);
1406 for (reg
= saved_regs_audigy
; *reg
!= 0xff; reg
++)
1407 for (i
= 0; i
< NUM_G
; i
++, val
++)
1408 snd_emu10k1_ptr_write(emu
, *reg
, i
, *val
);
1414 EXPORT_SYMBOL(snd_emu10k1_synth_alloc
);
1415 EXPORT_SYMBOL(snd_emu10k1_synth_free
);
1416 EXPORT_SYMBOL(snd_emu10k1_synth_bzero
);
1417 EXPORT_SYMBOL(snd_emu10k1_synth_copy_from_user
);
1418 EXPORT_SYMBOL(snd_emu10k1_memblk_map
);
1420 EXPORT_SYMBOL(snd_emu10k1_voice_alloc
);
1421 EXPORT_SYMBOL(snd_emu10k1_voice_free
);
1423 EXPORT_SYMBOL(snd_emu10k1_ptr_read
);
1424 EXPORT_SYMBOL(snd_emu10k1_ptr_write
);