2 * linux/include/asm-arm/arch-sa1100/dma.h
4 * Generic SA1100 DMA support
6 * Copyright (C) 2000 Nicolas Pitre
10 #ifndef __ASM_ARCH_DMA_H
11 #define __ASM_ARCH_DMA_H
13 #include <linux/config.h>
18 * The SA1100 has six internal DMA channels.
20 #define SA1100_DMA_CHANNELS 6
23 * Maximum physical DMA buffer size
25 #define MAX_DMA_SIZE 0x1fff
26 #define CUT_DMA_SIZE 0x1000
29 * All possible SA1100 devices a DMA channel can be attached to.
32 DMA_Ser0UDCWr
= DDAR_Ser0UDCWr
, /* Ser. port 0 UDC Write */
33 DMA_Ser0UDCRd
= DDAR_Ser0UDCRd
, /* Ser. port 0 UDC Read */
34 DMA_Ser1UARTWr
= DDAR_Ser1UARTWr
, /* Ser. port 1 UART Write */
35 DMA_Ser1UARTRd
= DDAR_Ser1UARTRd
, /* Ser. port 1 UART Read */
36 DMA_Ser1SDLCWr
= DDAR_Ser1SDLCWr
, /* Ser. port 1 SDLC Write */
37 DMA_Ser1SDLCRd
= DDAR_Ser1SDLCRd
, /* Ser. port 1 SDLC Read */
38 DMA_Ser2UARTWr
= DDAR_Ser2UARTWr
, /* Ser. port 2 UART Write */
39 DMA_Ser2UARTRd
= DDAR_Ser2UARTRd
, /* Ser. port 2 UART Read */
40 DMA_Ser2HSSPWr
= DDAR_Ser2HSSPWr
, /* Ser. port 2 HSSP Write */
41 DMA_Ser2HSSPRd
= DDAR_Ser2HSSPRd
, /* Ser. port 2 HSSP Read */
42 DMA_Ser3UARTWr
= DDAR_Ser3UARTWr
, /* Ser. port 3 UART Write */
43 DMA_Ser3UARTRd
= DDAR_Ser3UARTRd
, /* Ser. port 3 UART Read */
44 DMA_Ser4MCP0Wr
= DDAR_Ser4MCP0Wr
, /* Ser. port 4 MCP 0 Write (audio) */
45 DMA_Ser4MCP0Rd
= DDAR_Ser4MCP0Rd
, /* Ser. port 4 MCP 0 Read (audio) */
46 DMA_Ser4MCP1Wr
= DDAR_Ser4MCP1Wr
, /* Ser. port 4 MCP 1 Write */
47 DMA_Ser4MCP1Rd
= DDAR_Ser4MCP1Rd
, /* Ser. port 4 MCP 1 Read */
48 DMA_Ser4SSPWr
= DDAR_Ser4SSPWr
, /* Ser. port 4 SSP Write (16 bits) */
49 DMA_Ser4SSPRd
= DDAR_Ser4SSPRd
/* Ser. port 4 SSP Read (16 bits) */
54 volatile u_long SetDCSR
;
55 volatile u_long ClrDCSR
;
56 volatile u_long RdDCSR
;
57 volatile dma_addr_t DBSA
;
59 volatile dma_addr_t DBSB
;
63 typedef void (*dma_callback_t
)(void *data
);
66 * DMA function prototypes
69 extern int sa1100_request_dma( dma_device_t device
, const char *device_id
,
70 dma_callback_t callback
, void *data
,
72 extern void sa1100_free_dma( dma_regs_t
*regs
);
73 extern int sa1100_start_dma( dma_regs_t
*regs
, dma_addr_t dma_ptr
, u_int size
);
74 extern dma_addr_t
sa1100_get_dma_pos(dma_regs_t
*regs
);
75 extern void sa1100_reset_dma(dma_regs_t
*regs
);
78 * sa1100_stop_dma - stop DMA in progress
79 * @regs: identifier for the channel to use
81 * This stops DMA without clearing buffer pointers. Unlike
82 * sa1100_clear_dma() this allows subsequent use of sa1100_resume_dma()
83 * or sa1100_get_dma_pos().
85 * The @regs identifier is provided by a successful call to
86 * sa1100_request_dma().
89 #define sa1100_stop_dma(regs) ((regs)->ClrDCSR = DCSR_IE|DCSR_RUN)
92 * sa1100_resume_dma - resume DMA on a stopped channel
93 * @regs: identifier for the channel to use
95 * This resumes DMA on a channel previously stopped with
98 * The @regs identifier is provided by a successful call to
99 * sa1100_request_dma().
102 #define sa1100_resume_dma(regs) ((regs)->SetDCSR = DCSR_IE|DCSR_RUN)
105 * sa1100_clear_dma - clear DMA pointers
106 * @regs: identifier for the channel to use
108 * This clear any DMA state so the DMA engine is ready to restart
109 * with new buffers through sa1100_start_dma(). Any buffers in flight
112 * The @regs identifier is provided by a successful call to
113 * sa1100_request_dma().
116 #define sa1100_clear_dma(regs) ((regs)->ClrDCSR = DCSR_IE|DCSR_RUN|DCSR_STRTA|DCSR_STRTB)
118 #endif /* _ASM_ARCH_DMA_H */