2 * linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver
4 * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/clk.h>
14 #include <linux/mmc/host.h>
15 #include <linux/platform_device.h>
16 #include <linux/irq.h>
21 #include <asm/arch/regs-sdi.h>
22 #include <asm/arch/regs-gpio.h>
24 #include <asm/plat-s3c24xx/mci.h>
28 #define DRIVER_NAME "s3c-mci"
42 static const int dbgmap_err
= dbg_err
| dbg_fail
;
43 static const int dbgmap_info
= dbg_info
| dbg_conf
;
44 static const int dbgmap_debug
= dbg_debug
;
46 #define dbg(host, channels, args...) \
48 if (dbgmap_err & channels) \
49 dev_err(&host->pdev->dev, args); \
50 else if (dbgmap_info & channels) \
51 dev_info(&host->pdev->dev, args); \
52 else if (dbgmap_debug & channels) \
53 dev_dbg(&host->pdev->dev, args); \
56 #define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
58 static struct s3c2410_dma_client s3cmci_dma_client
= {
62 static void finalize_request(struct s3cmci_host
*host
);
63 static void s3cmci_send_request(struct mmc_host
*mmc
);
64 static void s3cmci_reset(struct s3cmci_host
*host
);
66 #ifdef CONFIG_MMC_DEBUG
68 static void dbg_dumpregs(struct s3cmci_host
*host
, char *prefix
)
70 u32 con
, pre
, cmdarg
, cmdcon
, cmdsta
, r0
, r1
, r2
, r3
, timer
, bsize
;
71 u32 datcon
, datcnt
, datsta
, fsta
, imask
;
73 con
= readl(host
->base
+ S3C2410_SDICON
);
74 pre
= readl(host
->base
+ S3C2410_SDIPRE
);
75 cmdarg
= readl(host
->base
+ S3C2410_SDICMDARG
);
76 cmdcon
= readl(host
->base
+ S3C2410_SDICMDCON
);
77 cmdsta
= readl(host
->base
+ S3C2410_SDICMDSTAT
);
78 r0
= readl(host
->base
+ S3C2410_SDIRSP0
);
79 r1
= readl(host
->base
+ S3C2410_SDIRSP1
);
80 r2
= readl(host
->base
+ S3C2410_SDIRSP2
);
81 r3
= readl(host
->base
+ S3C2410_SDIRSP3
);
82 timer
= readl(host
->base
+ S3C2410_SDITIMER
);
83 bsize
= readl(host
->base
+ S3C2410_SDIBSIZE
);
84 datcon
= readl(host
->base
+ S3C2410_SDIDCON
);
85 datcnt
= readl(host
->base
+ S3C2410_SDIDCNT
);
86 datsta
= readl(host
->base
+ S3C2410_SDIDSTA
);
87 fsta
= readl(host
->base
+ S3C2410_SDIFSTA
);
88 imask
= readl(host
->base
+ host
->sdiimsk
);
90 dbg(host
, dbg_debug
, "%s CON:[%08x] PRE:[%08x] TMR:[%08x]\n",
91 prefix
, con
, pre
, timer
);
93 dbg(host
, dbg_debug
, "%s CCON:[%08x] CARG:[%08x] CSTA:[%08x]\n",
94 prefix
, cmdcon
, cmdarg
, cmdsta
);
96 dbg(host
, dbg_debug
, "%s DCON:[%08x] FSTA:[%08x]"
97 " DSTA:[%08x] DCNT:[%08x]\n",
98 prefix
, datcon
, fsta
, datsta
, datcnt
);
100 dbg(host
, dbg_debug
, "%s R0:[%08x] R1:[%08x]"
101 " R2:[%08x] R3:[%08x]\n",
102 prefix
, r0
, r1
, r2
, r3
);
105 static void prepare_dbgmsg(struct s3cmci_host
*host
, struct mmc_command
*cmd
,
108 snprintf(host
->dbgmsg_cmd
, 300,
109 "#%u%s op:%i arg:0x%08x flags:0x08%x retries:%u",
110 host
->ccnt
, (stop
? " (STOP)" : ""),
111 cmd
->opcode
, cmd
->arg
, cmd
->flags
, cmd
->retries
);
114 snprintf(host
->dbgmsg_dat
, 300,
115 "#%u bsize:%u blocks:%u bytes:%u",
116 host
->dcnt
, cmd
->data
->blksz
,
118 cmd
->data
->blocks
* cmd
->data
->blksz
);
120 host
->dbgmsg_dat
[0] = '\0';
124 static void dbg_dumpcmd(struct s3cmci_host
*host
, struct mmc_command
*cmd
,
127 unsigned int dbglvl
= fail
? dbg_fail
: dbg_debug
;
132 if (cmd
->error
== 0) {
133 dbg(host
, dbglvl
, "CMD[OK] %s R0:0x%08x\n",
134 host
->dbgmsg_cmd
, cmd
->resp
[0]);
136 dbg(host
, dbglvl
, "CMD[ERR %i] %s Status:%s\n",
137 cmd
->error
, host
->dbgmsg_cmd
, host
->status
);
143 if (cmd
->data
->error
== 0) {
144 dbg(host
, dbglvl
, "DAT[OK] %s\n", host
->dbgmsg_dat
);
146 dbg(host
, dbglvl
, "DAT[ERR %i] %s DCNT:0x%08x\n",
147 cmd
->data
->error
, host
->dbgmsg_dat
,
148 readl(host
->base
+ S3C2410_SDIDCNT
));
152 static void dbg_dumpcmd(struct s3cmci_host
*host
,
153 struct mmc_command
*cmd
, int fail
) { }
155 static void prepare_dbgmsg(struct s3cmci_host
*host
, struct mmc_command
*cmd
,
158 static void dbg_dumpregs(struct s3cmci_host
*host
, char *prefix
) { }
160 #endif /* CONFIG_MMC_DEBUG */
162 static inline u32
enable_imask(struct s3cmci_host
*host
, u32 imask
)
166 newmask
= readl(host
->base
+ host
->sdiimsk
);
169 writel(newmask
, host
->base
+ host
->sdiimsk
);
174 static inline u32
disable_imask(struct s3cmci_host
*host
, u32 imask
)
178 newmask
= readl(host
->base
+ host
->sdiimsk
);
181 writel(newmask
, host
->base
+ host
->sdiimsk
);
186 static inline void clear_imask(struct s3cmci_host
*host
)
188 writel(0, host
->base
+ host
->sdiimsk
);
191 static inline int get_data_buffer(struct s3cmci_host
*host
,
192 u32
*words
, u32
**pointer
)
194 struct scatterlist
*sg
;
196 if (host
->pio_active
== XFER_NONE
)
199 if ((!host
->mrq
) || (!host
->mrq
->data
))
202 if (host
->pio_sgptr
>= host
->mrq
->data
->sg_len
) {
203 dbg(host
, dbg_debug
, "no more buffers (%i/%i)\n",
204 host
->pio_sgptr
, host
->mrq
->data
->sg_len
);
207 sg
= &host
->mrq
->data
->sg
[host
->pio_sgptr
];
209 *words
= sg
->length
>> 2;
210 *pointer
= sg_virt(sg
);
214 dbg(host
, dbg_sg
, "new buffer (%i/%i)\n",
215 host
->pio_sgptr
, host
->mrq
->data
->sg_len
);
220 static inline u32
fifo_count(struct s3cmci_host
*host
)
222 u32 fifostat
= readl(host
->base
+ S3C2410_SDIFSTA
);
224 fifostat
&= S3C2410_SDIFSTA_COUNTMASK
;
225 return fifostat
>> 2;
228 static inline u32
fifo_free(struct s3cmci_host
*host
)
230 u32 fifostat
= readl(host
->base
+ S3C2410_SDIFSTA
);
232 fifostat
&= S3C2410_SDIFSTA_COUNTMASK
;
233 return (63 - fifostat
) >> 2;
236 static void do_pio_read(struct s3cmci_host
*host
)
240 void __iomem
*from_ptr
;
242 /* write real prescaler to host, it might be set slow to fix */
243 writel(host
->prescaler
, host
->base
+ S3C2410_SDIPRE
);
245 from_ptr
= host
->base
+ host
->sdidata
;
247 while ((fifo
= fifo_count(host
))) {
248 if (!host
->pio_words
) {
249 res
= get_data_buffer(host
, &host
->pio_words
,
252 host
->pio_active
= XFER_NONE
;
253 host
->complete_what
= COMPLETION_FINALIZE
;
255 dbg(host
, dbg_pio
, "pio_read(): "
256 "complete (no more data).\n");
261 "pio_read(): new target: [%i]@[%p]\n",
262 host
->pio_words
, host
->pio_ptr
);
266 "pio_read(): fifo:[%02i] buffer:[%03i] dcnt:[%08X]\n",
267 fifo
, host
->pio_words
,
268 readl(host
->base
+ S3C2410_SDIDCNT
));
270 if (fifo
> host
->pio_words
)
271 fifo
= host
->pio_words
;
273 host
->pio_words
-= fifo
;
274 host
->pio_count
+= fifo
;
277 *(host
->pio_ptr
++) = readl(from_ptr
);
280 if (!host
->pio_words
) {
281 res
= get_data_buffer(host
, &host
->pio_words
, &host
->pio_ptr
);
284 "pio_read(): complete (no more buffers).\n");
285 host
->pio_active
= XFER_NONE
;
286 host
->complete_what
= COMPLETION_FINALIZE
;
293 S3C2410_SDIIMSK_RXFIFOHALF
| S3C2410_SDIIMSK_RXFIFOLAST
);
296 static void do_pio_write(struct s3cmci_host
*host
)
298 void __iomem
*to_ptr
;
302 to_ptr
= host
->base
+ host
->sdidata
;
304 while ((fifo
= fifo_free(host
))) {
305 if (!host
->pio_words
) {
306 res
= get_data_buffer(host
, &host
->pio_words
,
310 "pio_write(): complete (no more data).\n");
311 host
->pio_active
= XFER_NONE
;
317 "pio_write(): new source: [%i]@[%p]\n",
318 host
->pio_words
, host
->pio_ptr
);
322 if (fifo
> host
->pio_words
)
323 fifo
= host
->pio_words
;
325 host
->pio_words
-= fifo
;
326 host
->pio_count
+= fifo
;
329 writel(*(host
->pio_ptr
++), to_ptr
);
332 enable_imask(host
, S3C2410_SDIIMSK_TXFIFOHALF
);
335 static void pio_tasklet(unsigned long data
)
337 struct s3cmci_host
*host
= (struct s3cmci_host
*) data
;
340 disable_irq(host
->irq
);
342 if (host
->pio_active
== XFER_WRITE
)
345 if (host
->pio_active
== XFER_READ
)
348 if (host
->complete_what
== COMPLETION_FINALIZE
) {
350 if (host
->pio_active
!= XFER_NONE
) {
351 dbg(host
, dbg_err
, "unfinished %s "
352 "- pio_count:[%u] pio_words:[%u]\n",
353 (host
->pio_active
== XFER_READ
) ? "read" : "write",
354 host
->pio_count
, host
->pio_words
);
357 host
->mrq
->data
->error
= -EINVAL
;
360 finalize_request(host
);
362 enable_irq(host
->irq
);
366 * ISR for SDI Interface IRQ
367 * Communication between driver and ISR works as follows:
368 * host->mrq points to current request
369 * host->complete_what Indicates when the request is considered done
370 * COMPLETION_CMDSENT when the command was sent
371 * COMPLETION_RSPFIN when a response was received
372 * COMPLETION_XFERFINISH when the data transfer is finished
373 * COMPLETION_XFERFINISH_RSPFIN both of the above.
374 * host->complete_request is the completion-object the driver waits for
376 * 1) Driver sets up host->mrq and host->complete_what
377 * 2) Driver prepares the transfer
378 * 3) Driver enables interrupts
379 * 4) Driver starts transfer
380 * 5) Driver waits for host->complete_rquest
381 * 6) ISR checks for request status (errors and success)
382 * 6) ISR sets host->mrq->cmd->error and host->mrq->data->error
383 * 7) ISR completes host->complete_request
384 * 8) ISR disables interrupts
385 * 9) Driver wakes up and takes care of the request
387 * Note: "->error"-fields are expected to be set to 0 before the request
388 * was issued by mmc.c - therefore they are only set, when an error
392 static irqreturn_t
s3cmci_irq(int irq
, void *dev_id
)
394 struct s3cmci_host
*host
= dev_id
;
395 struct mmc_command
*cmd
;
396 u32 mci_csta
, mci_dsta
, mci_fsta
, mci_dcnt
, mci_imsk
;
397 u32 mci_cclear
, mci_dclear
;
398 unsigned long iflags
;
400 spin_lock_irqsave(&host
->complete_lock
, iflags
);
402 mci_csta
= readl(host
->base
+ S3C2410_SDICMDSTAT
);
403 mci_dsta
= readl(host
->base
+ S3C2410_SDIDSTA
);
404 mci_dcnt
= readl(host
->base
+ S3C2410_SDIDCNT
);
405 mci_fsta
= readl(host
->base
+ S3C2410_SDIFSTA
);
406 mci_imsk
= readl(host
->base
+ host
->sdiimsk
);
410 if ((host
->complete_what
== COMPLETION_NONE
) ||
411 (host
->complete_what
== COMPLETION_FINALIZE
)) {
412 host
->status
= "nothing to complete";
418 host
->status
= "no active mrq";
423 cmd
= host
->cmd_is_stop
? host
->mrq
->stop
: host
->mrq
->cmd
;
426 host
->status
= "no active cmd";
432 if ((host
->pio_active
== XFER_WRITE
) &&
433 (mci_fsta
& S3C2410_SDIFSTA_TFDET
)) {
435 disable_imask(host
, S3C2410_SDIIMSK_TXFIFOHALF
);
436 tasklet_schedule(&host
->pio_tasklet
);
437 host
->status
= "pio tx";
440 if ((host
->pio_active
== XFER_READ
) &&
441 (mci_fsta
& S3C2410_SDIFSTA_RFDET
)) {
444 S3C2410_SDIIMSK_RXFIFOHALF
|
445 S3C2410_SDIIMSK_RXFIFOLAST
);
447 tasklet_schedule(&host
->pio_tasklet
);
448 host
->status
= "pio rx";
452 if (mci_csta
& S3C2410_SDICMDSTAT_CMDTIMEOUT
) {
453 dbg(host
, dbg_err
, "CMDSTAT: error CMDTIMEOUT\n");
454 cmd
->error
= -ETIMEDOUT
;
455 host
->status
= "error: command timeout";
459 if (mci_csta
& S3C2410_SDICMDSTAT_CMDSENT
) {
460 if (host
->complete_what
== COMPLETION_CMDSENT
) {
461 host
->status
= "ok: command sent";
465 mci_cclear
|= S3C2410_SDICMDSTAT_CMDSENT
;
468 if (mci_csta
& S3C2410_SDICMDSTAT_CRCFAIL
) {
469 if (cmd
->flags
& MMC_RSP_CRC
) {
470 if (host
->mrq
->cmd
->flags
& MMC_RSP_136
) {
472 "fixup: ignore CRC fail with long rsp\n");
474 /* note, we used to fail the transfer
475 * here, but it seems that this is just
476 * the hardware getting it wrong.
478 * cmd->error = -EILSEQ;
479 * host->status = "error: bad command crc";
480 * goto fail_transfer;
485 mci_cclear
|= S3C2410_SDICMDSTAT_CRCFAIL
;
488 if (mci_csta
& S3C2410_SDICMDSTAT_RSPFIN
) {
489 if (host
->complete_what
== COMPLETION_RSPFIN
) {
490 host
->status
= "ok: command response received";
494 if (host
->complete_what
== COMPLETION_XFERFINISH_RSPFIN
)
495 host
->complete_what
= COMPLETION_XFERFINISH
;
497 mci_cclear
|= S3C2410_SDICMDSTAT_RSPFIN
;
500 /* errors handled after this point are only relevant
501 when a data transfer is in progress */
504 goto clear_status_bits
;
506 /* Check for FIFO failure */
508 if (mci_fsta
& S3C2440_SDIFSTA_FIFOFAIL
) {
509 dbg(host
, dbg_err
, "FIFO failure\n");
510 host
->mrq
->data
->error
= -EILSEQ
;
511 host
->status
= "error: 2440 fifo failure";
515 if (mci_dsta
& S3C2410_SDIDSTA_FIFOFAIL
) {
516 dbg(host
, dbg_err
, "FIFO failure\n");
517 cmd
->data
->error
= -EILSEQ
;
518 host
->status
= "error: fifo failure";
523 if (mci_dsta
& S3C2410_SDIDSTA_RXCRCFAIL
) {
524 dbg(host
, dbg_err
, "bad data crc (outgoing)\n");
525 cmd
->data
->error
= -EILSEQ
;
526 host
->status
= "error: bad data crc (outgoing)";
530 if (mci_dsta
& S3C2410_SDIDSTA_CRCFAIL
) {
531 dbg(host
, dbg_err
, "bad data crc (incoming)\n");
532 cmd
->data
->error
= -EILSEQ
;
533 host
->status
= "error: bad data crc (incoming)";
537 if (mci_dsta
& S3C2410_SDIDSTA_DATATIMEOUT
) {
538 dbg(host
, dbg_err
, "data timeout\n");
539 cmd
->data
->error
= -ETIMEDOUT
;
540 host
->status
= "error: data timeout";
544 if (mci_dsta
& S3C2410_SDIDSTA_XFERFINISH
) {
545 if (host
->complete_what
== COMPLETION_XFERFINISH
) {
546 host
->status
= "ok: data transfer completed";
550 if (host
->complete_what
== COMPLETION_XFERFINISH_RSPFIN
)
551 host
->complete_what
= COMPLETION_RSPFIN
;
553 mci_dclear
|= S3C2410_SDIDSTA_XFERFINISH
;
557 writel(mci_cclear
, host
->base
+ S3C2410_SDICMDSTAT
);
558 writel(mci_dclear
, host
->base
+ S3C2410_SDIDSTA
);
563 host
->pio_active
= XFER_NONE
;
566 host
->complete_what
= COMPLETION_FINALIZE
;
569 tasklet_schedule(&host
->pio_tasklet
);
575 "csta:0x%08x dsta:0x%08x fsta:0x%08x dcnt:0x%08x status:%s.\n",
576 mci_csta
, mci_dsta
, mci_fsta
, mci_dcnt
, host
->status
);
578 spin_unlock_irqrestore(&host
->complete_lock
, iflags
);
584 * ISR for the CardDetect Pin
587 static irqreturn_t
s3cmci_irq_cd(int irq
, void *dev_id
)
589 struct s3cmci_host
*host
= (struct s3cmci_host
*)dev_id
;
591 dbg(host
, dbg_irq
, "card detect\n");
593 mmc_detect_change(host
->mmc
, msecs_to_jiffies(500));
598 void s3cmci_dma_done_callback(struct s3c2410_dma_chan
*dma_ch
, void *buf_id
,
599 int size
, enum s3c2410_dma_buffresult result
)
601 struct s3cmci_host
*host
= buf_id
;
602 unsigned long iflags
;
603 u32 mci_csta
, mci_dsta
, mci_fsta
, mci_dcnt
;
605 mci_csta
= readl(host
->base
+ S3C2410_SDICMDSTAT
);
606 mci_dsta
= readl(host
->base
+ S3C2410_SDIDSTA
);
607 mci_fsta
= readl(host
->base
+ S3C2410_SDIFSTA
);
608 mci_dcnt
= readl(host
->base
+ S3C2410_SDIDCNT
);
611 BUG_ON(!host
->mrq
->data
);
612 BUG_ON(!host
->dmatogo
);
614 spin_lock_irqsave(&host
->complete_lock
, iflags
);
616 if (result
!= S3C2410_RES_OK
) {
617 dbg(host
, dbg_fail
, "DMA FAILED: csta=0x%08x dsta=0x%08x "
618 "fsta=0x%08x dcnt:0x%08x result:0x%08x toGo:%u\n",
619 mci_csta
, mci_dsta
, mci_fsta
,
620 mci_dcnt
, result
, host
->dmatogo
);
627 dbg(host
, dbg_dma
, "DMA DONE Size:%i DSTA:[%08x] "
628 "DCNT:[%08x] toGo:%u\n",
629 size
, mci_dsta
, mci_dcnt
, host
->dmatogo
);
634 dbg(host
, dbg_dma
, "DMA FINISHED Size:%i DSTA:%08x DCNT:%08x\n",
635 size
, mci_dsta
, mci_dcnt
);
637 host
->complete_what
= COMPLETION_FINALIZE
;
640 tasklet_schedule(&host
->pio_tasklet
);
641 spin_unlock_irqrestore(&host
->complete_lock
, iflags
);
645 host
->mrq
->data
->error
= -EINVAL
;
646 host
->complete_what
= COMPLETION_FINALIZE
;
647 writel(0, host
->base
+ host
->sdiimsk
);
652 static void finalize_request(struct s3cmci_host
*host
)
654 struct mmc_request
*mrq
= host
->mrq
;
655 struct mmc_command
*cmd
= host
->cmd_is_stop
? mrq
->stop
: mrq
->cmd
;
656 int debug_as_failure
= 0;
658 if (host
->complete_what
!= COMPLETION_FINALIZE
)
664 if (cmd
->data
&& (cmd
->error
== 0) &&
665 (cmd
->data
->error
== 0)) {
666 if (host
->dodma
&& (!host
->dma_complete
)) {
667 dbg(host
, dbg_dma
, "DMA Missing!\n");
672 /* Read response from controller. */
673 cmd
->resp
[0] = readl(host
->base
+ S3C2410_SDIRSP0
);
674 cmd
->resp
[1] = readl(host
->base
+ S3C2410_SDIRSP1
);
675 cmd
->resp
[2] = readl(host
->base
+ S3C2410_SDIRSP2
);
676 cmd
->resp
[3] = readl(host
->base
+ S3C2410_SDIRSP3
);
678 writel(host
->prescaler
, host
->base
+ S3C2410_SDIPRE
);
681 debug_as_failure
= 1;
683 if (cmd
->data
&& cmd
->data
->error
)
684 debug_as_failure
= 1;
686 dbg_dumpcmd(host
, cmd
, debug_as_failure
);
688 /* Cleanup controller */
689 writel(0, host
->base
+ S3C2410_SDICMDARG
);
690 writel(S3C2410_SDIDCON_STOP
, host
->base
+ S3C2410_SDIDCON
);
691 writel(0, host
->base
+ S3C2410_SDICMDCON
);
692 writel(0, host
->base
+ host
->sdiimsk
);
694 if (cmd
->data
&& cmd
->error
)
695 cmd
->data
->error
= cmd
->error
;
697 if (cmd
->data
&& cmd
->data
->stop
&& (!host
->cmd_is_stop
)) {
698 host
->cmd_is_stop
= 1;
699 s3cmci_send_request(host
->mmc
);
703 /* If we have no data transfer we are finished here */
707 /* Calulate the amout of bytes transfer if there was no error */
708 if (mrq
->data
->error
== 0) {
709 mrq
->data
->bytes_xfered
=
710 (mrq
->data
->blocks
* mrq
->data
->blksz
);
712 mrq
->data
->bytes_xfered
= 0;
715 /* If we had an error while transfering data we flush the
716 * DMA channel and the fifo to clear out any garbage. */
717 if (mrq
->data
->error
!= 0) {
719 s3c2410_dma_ctrl(host
->dma
, S3C2410_DMAOP_FLUSH
);
722 /* Clear failure register and reset fifo. */
723 writel(S3C2440_SDIFSTA_FIFORESET
|
724 S3C2440_SDIFSTA_FIFOFAIL
,
725 host
->base
+ S3C2410_SDIFSTA
);
730 mci_con
= readl(host
->base
+ S3C2410_SDICON
);
731 mci_con
|= S3C2410_SDICON_FIFORESET
;
733 writel(mci_con
, host
->base
+ S3C2410_SDICON
);
738 host
->complete_what
= COMPLETION_NONE
;
740 mmc_request_done(host
->mmc
, mrq
);
744 void s3cmci_dma_setup(struct s3cmci_host
*host
, enum s3c2410_dmasrc source
)
746 static enum s3c2410_dmasrc last_source
= -1;
749 if (last_source
== source
)
752 last_source
= source
;
754 s3c2410_dma_devconfig(host
->dma
, source
, 3,
755 host
->mem
->start
+ host
->sdidata
);
758 s3c2410_dma_config(host
->dma
, 4,
759 (S3C2410_DCON_HWTRIG
| S3C2410_DCON_CH0_SDI
));
760 s3c2410_dma_set_buffdone_fn(host
->dma
,
761 s3cmci_dma_done_callback
);
762 s3c2410_dma_setflags(host
->dma
, S3C2410_DMAF_AUTOSTART
);
767 static void s3cmci_send_command(struct s3cmci_host
*host
,
768 struct mmc_command
*cmd
)
772 imsk
= S3C2410_SDIIMSK_CRCSTATUS
| S3C2410_SDIIMSK_CMDTIMEOUT
|
773 S3C2410_SDIIMSK_RESPONSEND
| S3C2410_SDIIMSK_CMDSENT
|
774 S3C2410_SDIIMSK_RESPONSECRC
;
776 enable_imask(host
, imsk
);
779 host
->complete_what
= COMPLETION_XFERFINISH_RSPFIN
;
780 else if (cmd
->flags
& MMC_RSP_PRESENT
)
781 host
->complete_what
= COMPLETION_RSPFIN
;
783 host
->complete_what
= COMPLETION_CMDSENT
;
785 writel(cmd
->arg
, host
->base
+ S3C2410_SDICMDARG
);
787 ccon
= cmd
->opcode
& S3C2410_SDICMDCON_INDEX
;
788 ccon
|= S3C2410_SDICMDCON_SENDERHOST
| S3C2410_SDICMDCON_CMDSTART
;
790 if (cmd
->flags
& MMC_RSP_PRESENT
)
791 ccon
|= S3C2410_SDICMDCON_WAITRSP
;
793 if (cmd
->flags
& MMC_RSP_136
)
794 ccon
|= S3C2410_SDICMDCON_LONGRSP
;
796 writel(ccon
, host
->base
+ S3C2410_SDICMDCON
);
799 static int s3cmci_setup_data(struct s3cmci_host
*host
, struct mmc_data
*data
)
801 u32 dcon
, imsk
, stoptries
= 3;
803 /* write DCON register */
806 writel(0, host
->base
+ S3C2410_SDIDCON
);
810 if ((data
->blksz
& 3) != 0) {
811 /* We cannot deal with unaligned blocks with more than
812 * one block being transfered. */
814 if (data
->blocks
> 1)
817 /* No support yet for non-word block transfers. */
821 while (readl(host
->base
+ S3C2410_SDIDSTA
) &
822 (S3C2410_SDIDSTA_TXDATAON
| S3C2410_SDIDSTA_RXDATAON
)) {
825 "mci_setup_data() transfer stillin progress.\n");
827 writel(S3C2410_SDIDCON_STOP
, host
->base
+ S3C2410_SDIDCON
);
830 if ((stoptries
--) == 0) {
831 dbg_dumpregs(host
, "DRF");
836 dcon
= data
->blocks
& S3C2410_SDIDCON_BLKNUM_MASK
;
839 dcon
|= S3C2410_SDIDCON_DMAEN
;
841 if (host
->bus_width
== MMC_BUS_WIDTH_4
)
842 dcon
|= S3C2410_SDIDCON_WIDEBUS
;
844 if (!(data
->flags
& MMC_DATA_STREAM
))
845 dcon
|= S3C2410_SDIDCON_BLOCKMODE
;
847 if (data
->flags
& MMC_DATA_WRITE
) {
848 dcon
|= S3C2410_SDIDCON_TXAFTERRESP
;
849 dcon
|= S3C2410_SDIDCON_XFER_TXSTART
;
852 if (data
->flags
& MMC_DATA_READ
) {
853 dcon
|= S3C2410_SDIDCON_RXAFTERCMD
;
854 dcon
|= S3C2410_SDIDCON_XFER_RXSTART
;
858 dcon
|= S3C2440_SDIDCON_DS_WORD
;
859 dcon
|= S3C2440_SDIDCON_DATSTART
;
862 writel(dcon
, host
->base
+ S3C2410_SDIDCON
);
864 /* write BSIZE register */
866 writel(data
->blksz
, host
->base
+ S3C2410_SDIBSIZE
);
868 /* add to IMASK register */
869 imsk
= S3C2410_SDIIMSK_FIFOFAIL
| S3C2410_SDIIMSK_DATACRC
|
870 S3C2410_SDIIMSK_DATATIMEOUT
| S3C2410_SDIIMSK_DATAFINISH
;
872 enable_imask(host
, imsk
);
874 /* write TIMER register */
877 writel(0x007FFFFF, host
->base
+ S3C2410_SDITIMER
);
879 writel(0x0000FFFF, host
->base
+ S3C2410_SDITIMER
);
881 /* FIX: set slow clock to prevent timeouts on read */
882 if (data
->flags
& MMC_DATA_READ
)
883 writel(0xFF, host
->base
+ S3C2410_SDIPRE
);
889 #define BOTH_DIR (MMC_DATA_WRITE | MMC_DATA_READ)
891 static int s3cmci_prepare_pio(struct s3cmci_host
*host
, struct mmc_data
*data
)
893 int rw
= (data
->flags
& MMC_DATA_WRITE
) ? 1 : 0;
895 BUG_ON((data
->flags
& BOTH_DIR
) == BOTH_DIR
);
900 host
->pio_active
= rw
? XFER_WRITE
: XFER_READ
;
904 enable_imask(host
, S3C2410_SDIIMSK_TXFIFOHALF
);
906 enable_imask(host
, S3C2410_SDIIMSK_RXFIFOHALF
907 | S3C2410_SDIIMSK_RXFIFOLAST
);
913 static int s3cmci_prepare_dma(struct s3cmci_host
*host
, struct mmc_data
*data
)
916 int rw
= (data
->flags
& MMC_DATA_WRITE
) ? 1 : 0;
918 BUG_ON((data
->flags
& BOTH_DIR
) == BOTH_DIR
);
920 s3cmci_dma_setup(host
, rw
? S3C2410_DMASRC_MEM
: S3C2410_DMASRC_HW
);
921 s3c2410_dma_ctrl(host
->dma
, S3C2410_DMAOP_FLUSH
);
923 dma_len
= dma_map_sg(mmc_dev(host
->mmc
), data
->sg
, data
->sg_len
,
924 (rw
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
929 host
->dma_complete
= 0;
930 host
->dmatogo
= dma_len
;
932 for (i
= 0; i
< dma_len
; i
++) {
935 dbg(host
, dbg_dma
, "enqueue %i:%u@%u\n", i
,
936 sg_dma_address(&data
->sg
[i
]),
937 sg_dma_len(&data
->sg
[i
]));
939 res
= s3c2410_dma_enqueue(host
->dma
, (void *) host
,
940 sg_dma_address(&data
->sg
[i
]),
941 sg_dma_len(&data
->sg
[i
]));
944 s3c2410_dma_ctrl(host
->dma
, S3C2410_DMAOP_FLUSH
);
949 s3c2410_dma_ctrl(host
->dma
, S3C2410_DMAOP_START
);
954 static void s3cmci_send_request(struct mmc_host
*mmc
)
956 struct s3cmci_host
*host
= mmc_priv(mmc
);
957 struct mmc_request
*mrq
= host
->mrq
;
958 struct mmc_command
*cmd
= host
->cmd_is_stop
? mrq
->stop
: mrq
->cmd
;
961 prepare_dbgmsg(host
, cmd
, host
->cmd_is_stop
);
963 /* Clear command, data and fifo status registers
964 Fifo clear only necessary on 2440, but doesn't hurt on 2410
966 writel(0xFFFFFFFF, host
->base
+ S3C2410_SDICMDSTAT
);
967 writel(0xFFFFFFFF, host
->base
+ S3C2410_SDIDSTA
);
968 writel(0xFFFFFFFF, host
->base
+ S3C2410_SDIFSTA
);
971 int res
= s3cmci_setup_data(host
, cmd
->data
);
976 dbg(host
, dbg_err
, "setup data error %d\n", res
);
978 cmd
->data
->error
= res
;
980 mmc_request_done(mmc
, mrq
);
985 res
= s3cmci_prepare_dma(host
, cmd
->data
);
987 res
= s3cmci_prepare_pio(host
, cmd
->data
);
990 dbg(host
, dbg_err
, "data prepare error %d\n", res
);
992 cmd
->data
->error
= res
;
994 mmc_request_done(mmc
, mrq
);
1000 s3cmci_send_command(host
, cmd
);
1002 /* Enable Interrupt */
1003 enable_irq(host
->irq
);
1006 static int s3cmci_card_present(struct s3cmci_host
*host
)
1008 struct s3c24xx_mci_pdata
*pdata
= host
->pdata
;
1011 if (pdata
->gpio_detect
== 0)
1014 ret
= s3c2410_gpio_getpin(pdata
->gpio_detect
) ? 0 : 1;
1015 return ret
^ pdata
->detect_invert
;
1018 static void s3cmci_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
1020 struct s3cmci_host
*host
= mmc_priv(mmc
);
1022 host
->status
= "mmc request";
1023 host
->cmd_is_stop
= 0;
1026 if (s3cmci_card_present(host
) == 0) {
1027 dbg(host
, dbg_err
, "%s: no medium present\n", __func__
);
1028 host
->mrq
->cmd
->error
= -ENOMEDIUM
;
1029 mmc_request_done(mmc
, mrq
);
1031 s3cmci_send_request(mmc
);
1034 static void s3cmci_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
1036 struct s3cmci_host
*host
= mmc_priv(mmc
);
1037 u32 mci_psc
, mci_con
;
1039 /* Set the power state */
1041 mci_con
= readl(host
->base
+ S3C2410_SDICON
);
1043 switch (ios
->power_mode
) {
1046 s3c2410_gpio_cfgpin(S3C2410_GPE5
, S3C2410_GPE5_SDCLK
);
1047 s3c2410_gpio_cfgpin(S3C2410_GPE6
, S3C2410_GPE6_SDCMD
);
1048 s3c2410_gpio_cfgpin(S3C2410_GPE7
, S3C2410_GPE7_SDDAT0
);
1049 s3c2410_gpio_cfgpin(S3C2410_GPE8
, S3C2410_GPE8_SDDAT1
);
1050 s3c2410_gpio_cfgpin(S3C2410_GPE9
, S3C2410_GPE9_SDDAT2
);
1051 s3c2410_gpio_cfgpin(S3C2410_GPE10
, S3C2410_GPE10_SDDAT3
);
1053 if (host
->pdata
->set_power
)
1054 host
->pdata
->set_power(ios
->power_mode
, ios
->vdd
);
1057 mci_con
|= S3C2410_SDICON_FIFORESET
;
1063 s3c2410_gpio_setpin(S3C2410_GPE5
, 0);
1064 s3c2410_gpio_cfgpin(S3C2410_GPE5
, S3C2410_GPE5_OUTP
);
1067 mci_con
|= S3C2440_SDICON_SDRESET
;
1069 if (host
->pdata
->set_power
)
1070 host
->pdata
->set_power(ios
->power_mode
, ios
->vdd
);
1076 for (mci_psc
= 0; mci_psc
< 255; mci_psc
++) {
1077 host
->real_rate
= host
->clk_rate
/ (host
->clk_div
*(mci_psc
+1));
1079 if (host
->real_rate
<= ios
->clock
)
1086 host
->prescaler
= mci_psc
;
1087 writel(host
->prescaler
, host
->base
+ S3C2410_SDIPRE
);
1089 /* If requested clock is 0, real_rate will be 0, too */
1090 if (ios
->clock
== 0)
1091 host
->real_rate
= 0;
1093 /* Set CLOCK_ENABLE */
1095 mci_con
|= S3C2410_SDICON_CLOCKTYPE
;
1097 mci_con
&= ~S3C2410_SDICON_CLOCKTYPE
;
1099 writel(mci_con
, host
->base
+ S3C2410_SDICON
);
1101 if ((ios
->power_mode
== MMC_POWER_ON
) ||
1102 (ios
->power_mode
== MMC_POWER_UP
)) {
1103 dbg(host
, dbg_conf
, "running at %lukHz (requested: %ukHz).\n",
1104 host
->real_rate
/1000, ios
->clock
/1000);
1106 dbg(host
, dbg_conf
, "powered down.\n");
1109 host
->bus_width
= ios
->bus_width
;
1112 static void s3cmci_reset(struct s3cmci_host
*host
)
1114 u32 con
= readl(host
->base
+ S3C2410_SDICON
);
1116 con
|= S3C2440_SDICON_SDRESET
;
1117 writel(con
, host
->base
+ S3C2410_SDICON
);
1120 static int s3cmci_get_ro(struct mmc_host
*mmc
)
1122 struct s3cmci_host
*host
= mmc_priv(mmc
);
1123 struct s3c24xx_mci_pdata
*pdata
= host
->pdata
;
1126 if (pdata
->gpio_wprotect
== 0)
1129 ret
= s3c2410_gpio_getpin(pdata
->gpio_wprotect
);
1131 if (pdata
->wprotect_invert
)
1137 static struct mmc_host_ops s3cmci_ops
= {
1138 .request
= s3cmci_request
,
1139 .set_ios
= s3cmci_set_ios
,
1140 .get_ro
= s3cmci_get_ro
,
1143 static struct s3c24xx_mci_pdata s3cmci_def_pdata
= {
1144 /* This is currently here to avoid a number of if (host->pdata)
1145 * checks. Any zero fields to ensure reaonable defaults are picked. */
1148 static int __devinit
s3cmci_probe(struct platform_device
*pdev
, int is2440
)
1150 struct s3cmci_host
*host
;
1151 struct mmc_host
*mmc
;
1154 mmc
= mmc_alloc_host(sizeof(struct s3cmci_host
), &pdev
->dev
);
1160 host
= mmc_priv(mmc
);
1163 host
->is2440
= is2440
;
1165 host
->pdata
= pdev
->dev
.platform_data
;
1167 pdev
->dev
.platform_data
= &s3cmci_def_pdata
;
1168 host
->pdata
= &s3cmci_def_pdata
;
1171 spin_lock_init(&host
->complete_lock
);
1172 tasklet_init(&host
->pio_tasklet
, pio_tasklet
, (unsigned long) host
);
1175 host
->sdiimsk
= S3C2440_SDIIMSK
;
1176 host
->sdidata
= S3C2440_SDIDATA
;
1179 host
->sdiimsk
= S3C2410_SDIIMSK
;
1180 host
->sdidata
= S3C2410_SDIDATA
;
1185 host
->complete_what
= COMPLETION_NONE
;
1186 host
->pio_active
= XFER_NONE
;
1188 host
->dma
= S3CMCI_DMA
;
1190 host
->mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1193 "failed to get io memory region resouce.\n");
1196 goto probe_free_host
;
1199 host
->mem
= request_mem_region(host
->mem
->start
,
1200 RESSIZE(host
->mem
), pdev
->name
);
1203 dev_err(&pdev
->dev
, "failed to request io memory region.\n");
1205 goto probe_free_host
;
1208 host
->base
= ioremap(host
->mem
->start
, RESSIZE(host
->mem
));
1209 if (host
->base
== 0) {
1210 dev_err(&pdev
->dev
, "failed to ioremap() io memory region.\n");
1212 goto probe_free_mem_region
;
1215 host
->irq
= platform_get_irq(pdev
, 0);
1216 if (host
->irq
== 0) {
1217 dev_err(&pdev
->dev
, "failed to get interrupt resouce.\n");
1222 if (request_irq(host
->irq
, s3cmci_irq
, 0, DRIVER_NAME
, host
)) {
1223 dev_err(&pdev
->dev
, "failed to request mci interrupt.\n");
1228 /* We get spurious interrupts even when we have set the IMSK
1229 * register to ignore everything, so use disable_irq() to make
1230 * ensure we don't lock the system with un-serviceable requests. */
1232 disable_irq(host
->irq
);
1234 host
->irq_cd
= s3c2410_gpio_getirq(host
->pdata
->gpio_detect
);
1236 if (host
->irq_cd
>= 0) {
1237 if (request_irq(host
->irq_cd
, s3cmci_irq_cd
,
1238 IRQF_TRIGGER_RISING
| IRQF_TRIGGER_FALLING
,
1239 DRIVER_NAME
, host
)) {
1240 dev_err(&pdev
->dev
, "can't get card detect irq.\n");
1242 goto probe_free_irq
;
1245 dev_warn(&pdev
->dev
, "host detect has no irq available\n");
1246 s3c2410_gpio_cfgpin(host
->pdata
->gpio_detect
,
1247 S3C2410_GPIO_INPUT
);
1250 if (host
->pdata
->gpio_wprotect
)
1251 s3c2410_gpio_cfgpin(host
->pdata
->gpio_wprotect
,
1252 S3C2410_GPIO_INPUT
);
1254 if (s3c2410_dma_request(S3CMCI_DMA
, &s3cmci_dma_client
, NULL
) < 0) {
1255 dev_err(&pdev
->dev
, "unable to get DMA channel.\n");
1257 goto probe_free_irq_cd
;
1260 host
->clk
= clk_get(&pdev
->dev
, "sdi");
1261 if (IS_ERR(host
->clk
)) {
1262 dev_err(&pdev
->dev
, "failed to find clock source.\n");
1263 ret
= PTR_ERR(host
->clk
);
1265 goto probe_free_host
;
1268 ret
= clk_enable(host
->clk
);
1270 dev_err(&pdev
->dev
, "failed to enable clock source.\n");
1274 host
->clk_rate
= clk_get_rate(host
->clk
);
1276 mmc
->ops
= &s3cmci_ops
;
1277 mmc
->ocr_avail
= MMC_VDD_32_33
| MMC_VDD_33_34
;
1278 mmc
->caps
= MMC_CAP_4_BIT_DATA
;
1279 mmc
->f_min
= host
->clk_rate
/ (host
->clk_div
* 256);
1280 mmc
->f_max
= host
->clk_rate
/ host
->clk_div
;
1282 if (host
->pdata
->ocr_avail
)
1283 mmc
->ocr_avail
= host
->pdata
->ocr_avail
;
1285 mmc
->max_blk_count
= 4095;
1286 mmc
->max_blk_size
= 4095;
1287 mmc
->max_req_size
= 4095 * 512;
1288 mmc
->max_seg_size
= mmc
->max_req_size
;
1290 mmc
->max_phys_segs
= 128;
1291 mmc
->max_hw_segs
= 128;
1293 dbg(host
, dbg_debug
,
1294 "probe: mode:%s mapped mci_base:%p irq:%u irq_cd:%u dma:%u.\n",
1295 (host
->is2440
?"2440":""),
1296 host
->base
, host
->irq
, host
->irq_cd
, host
->dma
);
1298 ret
= mmc_add_host(mmc
);
1300 dev_err(&pdev
->dev
, "failed to add mmc host.\n");
1304 platform_set_drvdata(pdev
, mmc
);
1305 dev_info(&pdev
->dev
, "initialisation done.\n");
1310 clk_disable(host
->clk
);
1316 if (host
->irq_cd
>= 0)
1317 free_irq(host
->irq_cd
, host
);
1320 free_irq(host
->irq
, host
);
1323 iounmap(host
->base
);
1325 probe_free_mem_region
:
1326 release_mem_region(host
->mem
->start
, RESSIZE(host
->mem
));
1334 static int __devexit
s3cmci_remove(struct platform_device
*pdev
)
1336 struct mmc_host
*mmc
= platform_get_drvdata(pdev
);
1337 struct s3cmci_host
*host
= mmc_priv(mmc
);
1339 mmc_remove_host(mmc
);
1341 clk_disable(host
->clk
);
1344 tasklet_disable(&host
->pio_tasklet
);
1345 s3c2410_dma_free(S3CMCI_DMA
, &s3cmci_dma_client
);
1347 if (host
->irq_cd
>= 0)
1348 free_irq(host
->irq_cd
, host
);
1349 free_irq(host
->irq
, host
);
1351 iounmap(host
->base
);
1352 release_mem_region(host
->mem
->start
, RESSIZE(host
->mem
));
1358 static int __devinit
s3cmci_2410_probe(struct platform_device
*dev
)
1360 return s3cmci_probe(dev
, 0);
1363 static int __devinit
s3cmci_2412_probe(struct platform_device
*dev
)
1365 return s3cmci_probe(dev
, 1);
1368 static int __devinit
s3cmci_2440_probe(struct platform_device
*dev
)
1370 return s3cmci_probe(dev
, 1);
1375 static int s3cmci_suspend(struct platform_device
*dev
, pm_message_t state
)
1377 struct mmc_host
*mmc
= platform_get_drvdata(dev
);
1379 return mmc_suspend_host(mmc
, state
);
1382 static int s3cmci_resume(struct platform_device
*dev
)
1384 struct mmc_host
*mmc
= platform_get_drvdata(dev
);
1386 return mmc_resume_host(mmc
);
1389 #else /* CONFIG_PM */
1390 #define s3cmci_suspend NULL
1391 #define s3cmci_resume NULL
1392 #endif /* CONFIG_PM */
1395 static struct platform_driver s3cmci_2410_driver
= {
1396 .driver
.name
= "s3c2410-sdi",
1397 .driver
.owner
= THIS_MODULE
,
1398 .probe
= s3cmci_2410_probe
,
1399 .remove
= __devexit_p(s3cmci_remove
),
1400 .suspend
= s3cmci_suspend
,
1401 .resume
= s3cmci_resume
,
1404 static struct platform_driver s3cmci_2412_driver
= {
1405 .driver
.name
= "s3c2412-sdi",
1406 .driver
.owner
= THIS_MODULE
,
1407 .probe
= s3cmci_2412_probe
,
1408 .remove
= __devexit_p(s3cmci_remove
),
1409 .suspend
= s3cmci_suspend
,
1410 .resume
= s3cmci_resume
,
1413 static struct platform_driver s3cmci_2440_driver
= {
1414 .driver
.name
= "s3c2440-sdi",
1415 .driver
.owner
= THIS_MODULE
,
1416 .probe
= s3cmci_2440_probe
,
1417 .remove
= __devexit_p(s3cmci_remove
),
1418 .suspend
= s3cmci_suspend
,
1419 .resume
= s3cmci_resume
,
1423 static int __init
s3cmci_init(void)
1425 platform_driver_register(&s3cmci_2410_driver
);
1426 platform_driver_register(&s3cmci_2412_driver
);
1427 platform_driver_register(&s3cmci_2440_driver
);
1431 static void __exit
s3cmci_exit(void)
1433 platform_driver_unregister(&s3cmci_2410_driver
);
1434 platform_driver_unregister(&s3cmci_2412_driver
);
1435 platform_driver_unregister(&s3cmci_2440_driver
);
1438 module_init(s3cmci_init
);
1439 module_exit(s3cmci_exit
);
1441 MODULE_DESCRIPTION("Samsung S3C MMC/SD Card Interface driver");
1442 MODULE_LICENSE("GPL v2");
1443 MODULE_AUTHOR("Thomas Kleffel <tk@maintech.de>");
1444 MODULE_ALIAS("platform:s3c2410-sdi");
1445 MODULE_ALIAS("platform:s3c2412-sdi");
1446 MODULE_ALIAS("platform:s3c2440-sdi");