2 * Copyright (C) 1999 Ulf Karlsson <ulfc@bun.falkenberg.se>
3 * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
9 #define VINO_BASE 0x00080000 /* Vino is in the EISA address space,
10 * but it is not an EISA bus card */
12 struct sgi_vino_channel
{
16 #define VINO_CLIP_X(x) ((x) & 0x3ff) /* bits 0:9 */
17 #define VINO_CLIP_ODD(x) (((x) & 0x1ff) << 10) /* bits 10:18 */
18 #define VINO_CLIP_EVEN(x) (((x) & 0x1ff) << 19) /* bits 19:27 */
20 volatile u32 clip_start
;
22 volatile u32 clip_end
;
24 #define VINO_FRAMERT_PAL (1<<0) /* 0=NTSC 1=PAL */
25 #define VINO_FRAMERT_RT(x) (((x) & 0x1fff) << 1) /* bits 1:12 */
27 volatile u32 frame_rate
;
29 u32 _pad_field_counter
;
30 volatile u32 field_counter
;
32 volatile u32 line_size
;
34 volatile u32 line_count
;
36 volatile u32 page_index
;
38 volatile u32 next_4_desc
;
39 u32 _pad_start_desc_tbl
;
40 volatile u32 start_desc_tbl
;
42 #define VINO_DESC_JUMP (1<<30)
43 #define VINO_DESC_STOP (1<<31)
44 #define VINO_DESC_VALID (1<<32)
55 volatile u32 fifo_thres
;
57 volatile u32 fifo_read
;
59 volatile u32 fifo_write
;
63 #define VINO_CHIP_ID 0xb
64 #define VINO_REV_NUM(x) ((x) & 0x0f)
65 #define VINO_ID_VALUE(x) (((x) & 0xf0) >> 4)
69 #define VINO_CTRL_LITTLE_ENDIAN (1<<0)
70 #define VINO_CTRL_A_FIELD_TRANS_INT (1<<1) /* Field transferred int */
71 #define VINO_CTRL_A_FIFO_OF_INT (1<<2) /* FIFO overflow int */
72 #define VINO_CTRL_A_END_DESC_TBL_INT (1<<3) /* End of desc table int */
73 #define VINO_CTRL_A_INT (VINO_CTRL_A_FIELD_TRANS_INT | \
74 VINO_CTRL_A_FIFO_OF_INT | \
75 VINO_CTRL_A_END_DESC_TBL_INT)
76 #define VINO_CTRL_B_FIELD_TRANS_INT (1<<4) /* Field transferred int */
77 #define VINO_CTRL_B_FIFO_OF_INT (1<<5) /* FIFO overflow int */
78 #define VINO_CTRL_B_END_DESC_TBL_INT (1<<6) /* End of desc table int */
79 #define VINO_CTRL_B_INT (VINO_CTRL_B_FIELD_TRANS_INT | \
80 VINO_CTRL_B_FIFO_OF_INT | \
81 VINO_CTRL_B_END_DESC_TBL_INT)
82 #define VINO_CTRL_A_DMA_ENBL (1<<7)
83 #define VINO_CTRL_A_INTERLEAVE_ENBL (1<<8)
84 #define VINO_CTRL_A_SYNC_ENBL (1<<9)
85 #define VINO_CTRL_A_SELECT (1<<10) /* 1=D1 0=Philips */
86 #define VINO_CTRL_A_RGB (1<<11) /* 1=RGB 0=YUV */
87 #define VINO_CTRL_A_LUMA_ONLY (1<<12)
88 #define VINO_CTRL_A_DEC_ENBL (1<<13) /* Decimation */
89 #define VINO_CTRL_A_DEC_SCALE_MASK 0x1c000 /* bits 14:17 */
90 #define VINO_CTRL_A_DEC_SCALE_SHIFT (14)
91 #define VINO_CTRL_A_DEC_HOR_ONLY (1<<17) /* Horizontal only */
92 #define VINO_CTRL_A_DITHER (1<<18) /* 24 -> 8 bit dither */
93 #define VINO_CTRL_B_DMA_ENBL (1<<19)
94 #define VINO_CTRL_B_INTERLEAVE_ENBL (1<<20)
95 #define VINO_CTRL_B_SYNC_ENBL (1<<21)
96 #define VINO_CTRL_B_SELECT (1<<22) /* 1=D1 0=Philips */
97 #define VINO_CTRL_B_RGB (1<<23) /* 1=RGB 0=YUV */
98 #define VINO_CTRL_B_LUMA_ONLY (1<<24)
99 #define VINO_CTRL_B_DEC_ENBL (1<<25) /* Decimation */
100 #define VINO_CTRL_B_DEC_SCALE_MASK 0x1c000000 /* bits 26:28 */
101 #define VINO_CTRL_B_DEC_SCALE_SHIFT (26)
102 #define VINO_CTRL_B_DEC_HOR_ONLY (1<<29) /* Decimation horizontal only */
103 #define VINO_CTRL_B_DITHER (1<<30) /* ChanB 24 -> 8 bit dither */
105 volatile u32 control
;
107 #define VINO_INTSTAT_A_FIELD_TRANS (1<<0) /* Field transferred int */
108 #define VINO_INTSTAT_A_FIFO_OF (1<<1) /* FIFO overflow int */
109 #define VINO_INTSTAT_A_END_DESC_TBL (1<<2) /* End of desc table int */
110 #define VINO_INTSTAT_A (VINO_INTSTAT_A_FIELD_TRANS | \
111 VINO_INTSTAT_A_FIFO_OF | \
112 VINO_INTSTAT_A_END_DESC_TBL)
113 #define VINO_INTSTAT_B_FIELD_TRANS (1<<3) /* Field transferred int */
114 #define VINO_INTSTAT_B_FIFO_OF (1<<4) /* FIFO overflow int */
115 #define VINO_INTSTAT_B_END_DESC_TBL (1<<5) /* End of desc table int */
116 #define VINO_INTSTAT_B (VINO_INTSTAT_B_FIELD_TRANS | \
117 VINO_INTSTAT_B_FIFO_OF | \
118 VINO_INTSTAT_B_END_DESC_TBL)
119 u32 _pad_intr_status
;
120 volatile u32 intr_status
;
122 u32 _pad_i2c_control
;
123 volatile u32 i2c_control
;
125 volatile u32 i2c_data
;
127 struct sgi_vino_channel a
;
128 struct sgi_vino_channel b
;