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[XFRM]: skb_cow_data() does not set proper owner for new skbs.
[linux-2.6/verdex.git] / drivers / net / sunlance.c
blobb7d87d4690b489c6cf8c32f90a145127de4f1a78
1 /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
2 * lance.c: Linux/Sparc/Lance driver
3 *
4 * Written 1995, 1996 by Miguel de Icaza
5 * Sources:
6 * The Linux depca driver
7 * The Linux lance driver.
8 * The Linux skeleton driver.
9 * The NetBSD Sparc/Lance driver.
10 * Theo de Raadt (deraadt@openbsd.org)
11 * NCR92C990 Lan Controller manual
12 *
13 * 1.4:
14 * Added support to run with a ledma on the Sun4m
15 *
16 * 1.5:
17 * Added multiple card detection.
18 *
19 * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
20 * (ecd@skynet.be)
21 *
22 * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
23 * (ecd@skynet.be)
24 *
25 * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
26 * (davem@caip.rutgers.edu)
27 *
28 * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
29 * this disables auto carrier detection on sun4m. Eddie C. Dost
30 * (ecd@skynet.be)
31 *
32 * 1.7:
33 * 6/26/96: Bug fix for multiple ledmas, miguel.
34 *
35 * 1.8:
36 * Stole multicast code from depca.c, fixed lance_tx.
37 *
38 * 1.9:
39 * 8/21/96: Fixed the multicast code (Pedro Roque)
40 *
41 * 8/28/96: Send fake packet in lance_open() if auto_select is true,
42 * so we can detect the carrier loss condition in time.
43 * Eddie C. Dost (ecd@skynet.be)
44 *
45 * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
46 * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
47 *
48 * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
49 *
50 * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
51 * This was the sun4c killer. Shit, stupid bug.
52 * (ecd@skynet.be)
53 *
54 * 1.10:
55 * 1/26/97: Modularize driver. (ecd@skynet.be)
56 *
57 * 1.11:
58 * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
59 *
60 * 1.12:
61 * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
62 * Anton Blanchard (anton@progsoc.uts.edu.au)
63 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
64 * David S. Miller (davem@redhat.com)
65 * 2.01:
66 * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
67 *
68 */
69
70 #undef DEBUG_DRIVER
71
72 static char lancestr[] = "LANCE";
73
74 #include <linux/config.h>
75 #include <linux/module.h>
76 #include <linux/kernel.h>
77 #include <linux/types.h>
78 #include <linux/fcntl.h>
79 #include <linux/interrupt.h>
80 #include <linux/ioport.h>
81 #include <linux/in.h>
82 #include <linux/slab.h>
83 #include <linux/string.h>
84 #include <linux/delay.h>
85 #include <linux/init.h>
86 #include <linux/crc32.h>
87 #include <linux/errno.h>
88 #include <linux/socket.h> /* Used for the temporal inet entries and routing */
89 #include <linux/route.h>
90 #include <linux/netdevice.h>
91 #include <linux/etherdevice.h>
92 #include <linux/skbuff.h>
93 #include <linux/ethtool.h>
94 #include <linux/bitops.h>
95
96 #include <asm/system.h>
97 #include <asm/io.h>
98 #include <asm/dma.h>
99 #include <asm/pgtable.h>
100 #include <asm/byteorder.h> /* Used by the checksum routines */
101 #include <asm/idprom.h>
102 #include <asm/sbus.h>
103 #include <asm/openprom.h>
104 #include <asm/oplib.h>
105 #include <asm/auxio.h> /* For tpe-link-test? setting */
106 #include <asm/irq.h>
107
108 #define DRV_NAME "sunlance"
109 #define DRV_VERSION "2.02"
110 #define DRV_RELDATE "8/24/03"
111 #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)"
112
113 static char version[] =
114 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
115
116 MODULE_VERSION(DRV_VERSION);
117 MODULE_AUTHOR(DRV_AUTHOR);
118 MODULE_DESCRIPTION("Sun Lance ethernet driver");
119 MODULE_LICENSE("GPL");
120
121 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
122 #ifndef LANCE_LOG_TX_BUFFERS
123 #define LANCE_LOG_TX_BUFFERS 4
124 #define LANCE_LOG_RX_BUFFERS 4
125 #endif
126
127 #define LE_CSR0 0
128 #define LE_CSR1 1
129 #define LE_CSR2 2
130 #define LE_CSR3 3
131
132 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
133
134 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
135 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
136 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
137 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
138 #define LE_C0_MERR 0x0800 /* ME: Memory error */
139 #define LE_C0_RINT 0x0400 /* Received interrupt */
140 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
141 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
142 #define LE_C0_INTR 0x0080 /* Interrupt or error */
143 #define LE_C0_INEA 0x0040 /* Interrupt enable */
144 #define LE_C0_RXON 0x0020 /* Receiver on */
145 #define LE_C0_TXON 0x0010 /* Transmitter on */
146 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
147 #define LE_C0_STOP 0x0004 /* Stop the card */
148 #define LE_C0_STRT 0x0002 /* Start the card */
149 #define LE_C0_INIT 0x0001 /* Init the card */
150
151 #define LE_C3_BSWP 0x4 /* SWAP */
152 #define LE_C3_ACON 0x2 /* ALE Control */
153 #define LE_C3_BCON 0x1 /* Byte control */
154
155 /* Receive message descriptor 1 */
156 #define LE_R1_OWN 0x80 /* Who owns the entry */
157 #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
158 #define LE_R1_FRA 0x20 /* FRA: Frame error */
159 #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
160 #define LE_R1_CRC 0x08 /* CRC error */
161 #define LE_R1_BUF 0x04 /* BUF: Buffer error */
162 #define LE_R1_SOP 0x02 /* Start of packet */
163 #define LE_R1_EOP 0x01 /* End of packet */
164 #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
165
166 #define LE_T1_OWN 0x80 /* Lance owns the packet */
167 #define LE_T1_ERR 0x40 /* Error summary */
168 #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
169 #define LE_T1_EONE 0x08 /* Error: one retry needed */
170 #define LE_T1_EDEF 0x04 /* Error: deferred */
171 #define LE_T1_SOP 0x02 /* Start of packet */
172 #define LE_T1_EOP 0x01 /* End of packet */
173 #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
174
175 #define LE_T3_BUF 0x8000 /* Buffer error */
176 #define LE_T3_UFL 0x4000 /* Error underflow */
177 #define LE_T3_LCOL 0x1000 /* Error late collision */
178 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
179 #define LE_T3_RTY 0x0400 /* Error retry */
180 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
181
182 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
183 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
184 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
185 #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
186
187 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
188 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
189 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
190 #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
191
192 #define PKT_BUF_SZ 1544
193 #define RX_BUFF_SIZE PKT_BUF_SZ
194 #define TX_BUFF_SIZE PKT_BUF_SZ
195
196 struct lance_rx_desc {
197 u16 rmd0; /* low address of packet */
198 u8 rmd1_bits; /* descriptor bits */
199 u8 rmd1_hadr; /* high address of packet */
200 s16 length; /* This length is 2s complement (negative)!
201 * Buffer length
202 */
203 u16 mblength; /* This is the actual number of bytes received */
204 };
205
206 struct lance_tx_desc {
207 u16 tmd0; /* low address of packet */
208 u8 tmd1_bits; /* descriptor bits */
209 u8 tmd1_hadr; /* high address of packet */
210 s16 length; /* Length is 2s complement (negative)! */
211 u16 misc;
212 };
213
214 /* The LANCE initialization block, described in databook. */
215 /* On the Sparc, this block should be on a DMA region */
216 struct lance_init_block {
217 u16 mode; /* Pre-set mode (reg. 15) */
218 u8 phys_addr[6]; /* Physical ethernet address */
219 u32 filter[2]; /* Multicast filter. */
220
221 /* Receive and transmit ring base, along with extra bits. */
222 u16 rx_ptr; /* receive descriptor addr */
223 u16 rx_len; /* receive len and high addr */
224 u16 tx_ptr; /* transmit descriptor addr */
225 u16 tx_len; /* transmit len and high addr */
226
227 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
228 struct lance_rx_desc brx_ring[RX_RING_SIZE];
229 struct lance_tx_desc btx_ring[TX_RING_SIZE];
230
231 u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
232 u8 pad[2]; /* align rx_buf for copy_and_sum(). */
233 u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
234 };
235
236 #define libdesc_offset(rt, elem) \
237 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
238
239 #define libbuff_offset(rt, elem) \
240 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
241
242 struct lance_private {
243 void __iomem *lregs; /* Lance RAP/RDP regs. */
244 void __iomem *dregs; /* DMA controller regs. */
245 struct lance_init_block __iomem *init_block_iomem;
246 struct lance_init_block *init_block_mem;
247
248 spinlock_t lock;
249
250 int rx_new, tx_new;
251 int rx_old, tx_old;
252
253 struct net_device_stats stats;
254 struct sbus_dma *ledma; /* If set this points to ledma */
255 char tpe; /* cable-selection is TPE */
256 char auto_select; /* cable-selection by carrier */
257 char burst_sizes; /* ledma SBus burst sizes */
258 char pio_buffer; /* init block in PIO space? */
259
260 unsigned short busmaster_regval;
261
262 void (*init_ring)(struct net_device *);
263 void (*rx)(struct net_device *);
264 void (*tx)(struct net_device *);
265
266 char *name;
267 dma_addr_t init_block_dvma;
268 struct net_device *dev; /* Backpointer */
269 struct lance_private *next_module;
270 struct sbus_dev *sdev;
271 struct timer_list multicast_timer;
272 };
273
274 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
275 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
276 lp->tx_old - lp->tx_new-1)
277
278 /* Lance registers. */
279 #define RDP 0x00UL /* register data port */
280 #define RAP 0x02UL /* register address port */
281 #define LANCE_REG_SIZE 0x04UL
282
283 #define STOP_LANCE(__lp) \
284 do { void __iomem *__base = (__lp)->lregs; \
285 sbus_writew(LE_CSR0, __base + RAP); \
286 sbus_writew(LE_C0_STOP, __base + RDP); \
287 } while (0)
288
289 int sparc_lance_debug = 2;
290
291 /* The Lance uses 24 bit addresses */
292 /* On the Sun4c the DVMA will provide the remaining bytes for us */
293 /* On the Sun4m we have to instruct the ledma to provide them */
294 /* Even worse, on scsi/ether SBUS cards, the init block and the
295 * transmit/receive buffers are addresses as offsets from absolute
296 * zero on the lebuffer PIO area. -DaveM
297 */
298
299 #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
300
301 static struct lance_private *root_lance_dev;
302
303 /* Load the CSR registers */
304 static void load_csrs(struct lance_private *lp)
305 {
306 u32 leptr;
307
308 if (lp->pio_buffer)
309 leptr = 0;
310 else
311 leptr = LANCE_ADDR(lp->init_block_dvma);
312
313 sbus_writew(LE_CSR1, lp->lregs + RAP);
314 sbus_writew(leptr & 0xffff, lp->lregs + RDP);
315 sbus_writew(LE_CSR2, lp->lregs + RAP);
316 sbus_writew(leptr >> 16, lp->lregs + RDP);
317 sbus_writew(LE_CSR3, lp->lregs + RAP);
318 sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
319
320 /* Point back to csr0 */
321 sbus_writew(LE_CSR0, lp->lregs + RAP);
322 }
323
324 /* Setup the Lance Rx and Tx rings */
325 static void lance_init_ring_dvma(struct net_device *dev)
326 {
327 struct lance_private *lp = netdev_priv(dev);
328 struct lance_init_block *ib = lp->init_block_mem;
329 dma_addr_t aib = lp->init_block_dvma;
330 __u32 leptr;
331 int i;
332
333 /* Lock out other processes while setting up hardware */
334 netif_stop_queue(dev);
335 lp->rx_new = lp->tx_new = 0;
336 lp->rx_old = lp->tx_old = 0;
337
338 /* Copy the ethernet address to the lance init block
339 * Note that on the sparc you need to swap the ethernet address.
340 */
341 ib->phys_addr [0] = dev->dev_addr [1];
342 ib->phys_addr [1] = dev->dev_addr [0];
343 ib->phys_addr [2] = dev->dev_addr [3];
344 ib->phys_addr [3] = dev->dev_addr [2];
345 ib->phys_addr [4] = dev->dev_addr [5];
346 ib->phys_addr [5] = dev->dev_addr [4];
347
348 /* Setup the Tx ring entries */
349 for (i = 0; i <= TX_RING_SIZE; i++) {
350 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
351 ib->btx_ring [i].tmd0 = leptr;
352 ib->btx_ring [i].tmd1_hadr = leptr >> 16;
353 ib->btx_ring [i].tmd1_bits = 0;
354 ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
355 ib->btx_ring [i].misc = 0;
356 }
357
358 /* Setup the Rx ring entries */
359 for (i = 0; i < RX_RING_SIZE; i++) {
360 leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
361
362 ib->brx_ring [i].rmd0 = leptr;
363 ib->brx_ring [i].rmd1_hadr = leptr >> 16;
364 ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
365 ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
366 ib->brx_ring [i].mblength = 0;
367 }
368
369 /* Setup the initialization block */
370
371 /* Setup rx descriptor pointer */
372 leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
373 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
374 ib->rx_ptr = leptr;
375
376 /* Setup tx descriptor pointer */
377 leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
378 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
379 ib->tx_ptr = leptr;
380 }
381
382 static void lance_init_ring_pio(struct net_device *dev)
383 {
384 struct lance_private *lp = netdev_priv(dev);
385 struct lance_init_block __iomem *ib = lp->init_block_iomem;
386 u32 leptr;
387 int i;
388
389 /* Lock out other processes while setting up hardware */
390 netif_stop_queue(dev);
391 lp->rx_new = lp->tx_new = 0;
392 lp->rx_old = lp->tx_old = 0;
393
394 /* Copy the ethernet address to the lance init block
395 * Note that on the sparc you need to swap the ethernet address.
396 */
397 sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
398 sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
399 sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
400 sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
401 sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
402 sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
403
404 /* Setup the Tx ring entries */
405 for (i = 0; i <= TX_RING_SIZE; i++) {
406 leptr = libbuff_offset(tx_buf, i);
407 sbus_writew(leptr, &ib->btx_ring [i].tmd0);
408 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
409 sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
410
411 /* The ones required by tmd2 */
412 sbus_writew(0xf000, &ib->btx_ring [i].length);
413 sbus_writew(0, &ib->btx_ring [i].misc);
414 }
415
416 /* Setup the Rx ring entries */
417 for (i = 0; i < RX_RING_SIZE; i++) {
418 leptr = libbuff_offset(rx_buf, i);
419
420 sbus_writew(leptr, &ib->brx_ring [i].rmd0);
421 sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
422 sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
423 sbus_writew(-RX_BUFF_SIZE|0xf000,
424 &ib->brx_ring [i].length);
425 sbus_writew(0, &ib->brx_ring [i].mblength);
426 }
427
428 /* Setup the initialization block */
429
430 /* Setup rx descriptor pointer */
431 leptr = libdesc_offset(brx_ring, 0);
432 sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
433 &ib->rx_len);
434 sbus_writew(leptr, &ib->rx_ptr);
435
436 /* Setup tx descriptor pointer */
437 leptr = libdesc_offset(btx_ring, 0);
438 sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
439 &ib->tx_len);
440 sbus_writew(leptr, &ib->tx_ptr);
441 }
442
443 static void init_restart_ledma(struct lance_private *lp)
444 {
445 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
446
447 if (!(csr & DMA_HNDL_ERROR)) {
448 /* E-Cache draining */
449 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
450 barrier();
451 }
452
453 csr = sbus_readl(lp->dregs + DMA_CSR);
454 csr &= ~DMA_E_BURSTS;
455 if (lp->burst_sizes & DMA_BURST32)
456 csr |= DMA_E_BURST32;
457 else
458 csr |= DMA_E_BURST16;
459
460 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
461
462 if (lp->tpe)
463 csr |= DMA_EN_ENETAUI;
464 else
465 csr &= ~DMA_EN_ENETAUI;
466 udelay(20);
467 sbus_writel(csr, lp->dregs + DMA_CSR);
468 udelay(200);
469 }
470
471 static int init_restart_lance(struct lance_private *lp)
472 {
473 u16 regval = 0;
474 int i;
475
476 if (lp->dregs)
477 init_restart_ledma(lp);
478
479 sbus_writew(LE_CSR0, lp->lregs + RAP);
480 sbus_writew(LE_C0_INIT, lp->lregs + RDP);
481
482 /* Wait for the lance to complete initialization */
483 for (i = 0; i < 100; i++) {
484 regval = sbus_readw(lp->lregs + RDP);
485
486 if (regval & (LE_C0_ERR | LE_C0_IDON))
487 break;
488 barrier();
489 }
490 if (i == 100 || (regval & LE_C0_ERR)) {
491 printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
492 i, regval);
493 if (lp->dregs)
494 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
495 return -1;
496 }
497
498 /* Clear IDON by writing a "1", enable interrupts and start lance */
499 sbus_writew(LE_C0_IDON, lp->lregs + RDP);
500 sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
501
502 if (lp->dregs) {
503 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
504
505 csr |= DMA_INT_ENAB;
506 sbus_writel(csr, lp->dregs + DMA_CSR);
507 }
508
509 return 0;
510 }
511
512 static void lance_rx_dvma(struct net_device *dev)
513 {
514 struct lance_private *lp = netdev_priv(dev);
515 struct lance_init_block *ib = lp->init_block_mem;
516 struct lance_rx_desc *rd;
517 u8 bits;
518 int len, entry = lp->rx_new;
519 struct sk_buff *skb;
520
521 for (rd = &ib->brx_ring [entry];
522 !((bits = rd->rmd1_bits) & LE_R1_OWN);
523 rd = &ib->brx_ring [entry]) {
524
525 /* We got an incomplete frame? */
526 if ((bits & LE_R1_POK) != LE_R1_POK) {
527 lp->stats.rx_over_errors++;
528 lp->stats.rx_errors++;
529 } else if (bits & LE_R1_ERR) {
530 /* Count only the end frame as a rx error,
531 * not the beginning
532 */
533 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
534 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
535 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
536 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
537 if (bits & LE_R1_EOP) lp->stats.rx_errors++;
538 } else {
539 len = (rd->mblength & 0xfff) - 4;
540 skb = dev_alloc_skb(len + 2);
541
542 if (skb == NULL) {
543 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
544 dev->name);
545 lp->stats.rx_dropped++;
546 rd->mblength = 0;
547 rd->rmd1_bits = LE_R1_OWN;
548 lp->rx_new = RX_NEXT(entry);
549 return;
550 }
551
552 lp->stats.rx_bytes += len;
553
554 skb->dev = dev;
555 skb_reserve(skb, 2); /* 16 byte align */
556 skb_put(skb, len); /* make room */
557 eth_copy_and_sum(skb,
558 (unsigned char *)&(ib->rx_buf [entry][0]),
559 len, 0);
560 skb->protocol = eth_type_trans(skb, dev);
561 netif_rx(skb);
562 dev->last_rx = jiffies;
563 lp->stats.rx_packets++;
564 }
565
566 /* Return the packet to the pool */
567 rd->mblength = 0;
568 rd->rmd1_bits = LE_R1_OWN;
569 entry = RX_NEXT(entry);
570 }
571
572 lp->rx_new = entry;
573 }
574
575 static void lance_tx_dvma(struct net_device *dev)
576 {
577 struct lance_private *lp = netdev_priv(dev);
578 struct lance_init_block *ib = lp->init_block_mem;
579 int i, j;
580
581 spin_lock(&lp->lock);
582
583 j = lp->tx_old;
584 for (i = j; i != lp->tx_new; i = j) {
585 struct lance_tx_desc *td = &ib->btx_ring [i];
586 u8 bits = td->tmd1_bits;
587
588 /* If we hit a packet not owned by us, stop */
589 if (bits & LE_T1_OWN)
590 break;
591
592 if (bits & LE_T1_ERR) {
593 u16 status = td->misc;
594
595 lp->stats.tx_errors++;
596 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
597 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
598
599 if (status & LE_T3_CLOS) {
600 lp->stats.tx_carrier_errors++;
601 if (lp->auto_select) {
602 lp->tpe = 1 - lp->tpe;
603 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
604 dev->name, lp->tpe?"TPE":"AUI");
605 STOP_LANCE(lp);
606 lp->init_ring(dev);
607 load_csrs(lp);
608 init_restart_lance(lp);
609 goto out;
610 }
611 }
612
613 /* Buffer errors and underflows turn off the
614 * transmitter, restart the adapter.
615 */
616 if (status & (LE_T3_BUF|LE_T3_UFL)) {
617 lp->stats.tx_fifo_errors++;
618
619 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
620 dev->name);
621 STOP_LANCE(lp);
622 lp->init_ring(dev);
623 load_csrs(lp);
624 init_restart_lance(lp);
625 goto out;
626 }
627 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
628 /*
629 * So we don't count the packet more than once.
630 */
631 td->tmd1_bits = bits & ~(LE_T1_POK);
632
633 /* One collision before packet was sent. */
634 if (bits & LE_T1_EONE)
635 lp->stats.collisions++;
636
637 /* More than one collision, be optimistic. */
638 if (bits & LE_T1_EMORE)
639 lp->stats.collisions += 2;
640
641 lp->stats.tx_packets++;
642 }
643
644 j = TX_NEXT(j);
645 }
646 lp->tx_old = j;
647 out:
648 if (netif_queue_stopped(dev) &&
649 TX_BUFFS_AVAIL > 0)
650 netif_wake_queue(dev);
651
652 spin_unlock(&lp->lock);
653 }
654
655 static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
656 {
657 u16 *p16 = (u16 *) skb->data;
658 u32 *p32;
659 u8 *p8;
660 void __iomem *pbuf = piobuf;
661
662 /* We know here that both src and dest are on a 16bit boundary. */
663 *p16++ = sbus_readw(pbuf);
664 p32 = (u32 *) p16;
665 pbuf += 2;
666 len -= 2;
667
668 while (len >= 4) {
669 *p32++ = sbus_readl(pbuf);
670 pbuf += 4;
671 len -= 4;
672 }
673 p8 = (u8 *) p32;
674 if (len >= 2) {
675 p16 = (u16 *) p32;
676 *p16++ = sbus_readw(pbuf);
677 pbuf += 2;
678 len -= 2;
679 p8 = (u8 *) p16;
680 }
681 if (len >= 1)
682 *p8 = sbus_readb(pbuf);
683 }
684
685 static void lance_rx_pio(struct net_device *dev)
686 {
687 struct lance_private *lp = netdev_priv(dev);
688 struct lance_init_block __iomem *ib = lp->init_block_iomem;
689 struct lance_rx_desc __iomem *rd;
690 unsigned char bits;
691 int len, entry;
692 struct sk_buff *skb;
693
694 entry = lp->rx_new;
695 for (rd = &ib->brx_ring [entry];
696 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
697 rd = &ib->brx_ring [entry]) {
698
699 /* We got an incomplete frame? */
700 if ((bits & LE_R1_POK) != LE_R1_POK) {
701 lp->stats.rx_over_errors++;
702 lp->stats.rx_errors++;
703 } else if (bits & LE_R1_ERR) {
704 /* Count only the end frame as a rx error,
705 * not the beginning
706 */
707 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
708 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
709 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
710 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
711 if (bits & LE_R1_EOP) lp->stats.rx_errors++;
712 } else {
713 len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
714 skb = dev_alloc_skb(len + 2);
715
716 if (skb == NULL) {
717 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
718 dev->name);
719 lp->stats.rx_dropped++;
720 sbus_writew(0, &rd->mblength);
721 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
722 lp->rx_new = RX_NEXT(entry);
723 return;
724 }
725
726 lp->stats.rx_bytes += len;
727
728 skb->dev = dev;
729 skb_reserve (skb, 2); /* 16 byte align */
730 skb_put(skb, len); /* make room */
731 lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
732 skb->protocol = eth_type_trans(skb, dev);
733 netif_rx(skb);
734 dev->last_rx = jiffies;
735 lp->stats.rx_packets++;
736 }
737
738 /* Return the packet to the pool */
739 sbus_writew(0, &rd->mblength);
740 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
741 entry = RX_NEXT(entry);
742 }
743
744 lp->rx_new = entry;
745 }
746
747 static void lance_tx_pio(struct net_device *dev)
748 {
749 struct lance_private *lp = netdev_priv(dev);
750 struct lance_init_block __iomem *ib = lp->init_block_iomem;
751 int i, j;
752
753 spin_lock(&lp->lock);
754
755 j = lp->tx_old;
756 for (i = j; i != lp->tx_new; i = j) {
757 struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
758 u8 bits = sbus_readb(&td->tmd1_bits);
759
760 /* If we hit a packet not owned by us, stop */
761 if (bits & LE_T1_OWN)
762 break;
763
764 if (bits & LE_T1_ERR) {
765 u16 status = sbus_readw(&td->misc);
766
767 lp->stats.tx_errors++;
768 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
769 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
770
771 if (status & LE_T3_CLOS) {
772 lp->stats.tx_carrier_errors++;
773 if (lp->auto_select) {
774 lp->tpe = 1 - lp->tpe;
775 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
776 dev->name, lp->tpe?"TPE":"AUI");
777 STOP_LANCE(lp);
778 lp->init_ring(dev);
779 load_csrs(lp);
780 init_restart_lance(lp);
781 goto out;
782 }
783 }
784
785 /* Buffer errors and underflows turn off the
786 * transmitter, restart the adapter.
787 */
788 if (status & (LE_T3_BUF|LE_T3_UFL)) {
789 lp->stats.tx_fifo_errors++;
790
791 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
792 dev->name);
793 STOP_LANCE(lp);
794 lp->init_ring(dev);
795 load_csrs(lp);
796 init_restart_lance(lp);
797 goto out;
798 }
799 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
800 /*
801 * So we don't count the packet more than once.
802 */
803 sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
804
805 /* One collision before packet was sent. */
806 if (bits & LE_T1_EONE)
807 lp->stats.collisions++;
808
809 /* More than one collision, be optimistic. */
810 if (bits & LE_T1_EMORE)
811 lp->stats.collisions += 2;
812
813 lp->stats.tx_packets++;
814 }
815
816 j = TX_NEXT(j);
817 }
818 lp->tx_old = j;
819
820 if (netif_queue_stopped(dev) &&
821 TX_BUFFS_AVAIL > 0)
822 netif_wake_queue(dev);
823 out:
824 spin_unlock(&lp->lock);
825 }
826
827 static irqreturn_t lance_interrupt(int irq, void *dev_id, struct pt_regs *regs)
828 {
829 struct net_device *dev = (struct net_device *)dev_id;
830 struct lance_private *lp = netdev_priv(dev);
831 int csr0;
832
833 sbus_writew(LE_CSR0, lp->lregs + RAP);
834 csr0 = sbus_readw(lp->lregs + RDP);
835
836 /* Acknowledge all the interrupt sources ASAP */
837 sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
838 lp->lregs + RDP);
839
840 if ((csr0 & LE_C0_ERR) != 0) {
841 /* Clear the error condition */
842 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
843 LE_C0_CERR | LE_C0_MERR),
844 lp->lregs + RDP);
845 }
846
847 if (csr0 & LE_C0_RINT)
848 lp->rx(dev);
849
850 if (csr0 & LE_C0_TINT)
851 lp->tx(dev);
852
853 if (csr0 & LE_C0_BABL)
854 lp->stats.tx_errors++;
855
856 if (csr0 & LE_C0_MISS)
857 lp->stats.rx_errors++;
858
859 if (csr0 & LE_C0_MERR) {
860 if (lp->dregs) {
861 u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
862
863 printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
864 dev->name, csr0, addr & 0xffffff);
865 } else {
866 printk(KERN_ERR "%s: Memory error, status %04x\n",
867 dev->name, csr0);
868 }
869
870 sbus_writew(LE_C0_STOP, lp->lregs + RDP);
871
872 if (lp->dregs) {
873 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
874
875 dma_csr |= DMA_FIFO_INV;
876 sbus_writel(dma_csr, lp->dregs + DMA_CSR);
877 }
878
879 lp->init_ring(dev);
880 load_csrs(lp);
881 init_restart_lance(lp);
882 netif_wake_queue(dev);
883 }
884
885 sbus_writew(LE_C0_INEA, lp->lregs + RDP);
886
887 return IRQ_HANDLED;
888 }
889
890 /* Build a fake network packet and send it to ourselves. */
891 static void build_fake_packet(struct lance_private *lp)
892 {
893 struct net_device *dev = lp->dev;
894 int i, entry;
895
896 entry = lp->tx_new & TX_RING_MOD_MASK;
897 if (lp->pio_buffer) {
898 struct lance_init_block __iomem *ib = lp->init_block_iomem;
899 u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
900 struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
901 for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
902 sbus_writew(0, &packet[i]);
903 for (i = 0; i < 6; i++) {
904 sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
905 sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
906 }
907 sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
908 sbus_writew(0, &ib->btx_ring[entry].misc);
909 sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
910 } else {
911 struct lance_init_block *ib = lp->init_block_mem;
912 u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
913 struct ethhdr *eth = (struct ethhdr *) packet;
914 memset(packet, 0, ETH_ZLEN);
915 for (i = 0; i < 6; i++) {
916 eth->h_dest[i] = dev->dev_addr[i];
917 eth->h_source[i] = dev->dev_addr[i];
918 }
919 ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
920 ib->btx_ring[entry].misc = 0;
921 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
922 }
923 lp->tx_new = TX_NEXT(entry);
924 }
925
926 struct net_device *last_dev;
927
928 static int lance_open(struct net_device *dev)
929 {
930 struct lance_private *lp = netdev_priv(dev);
931 int status = 0;
932
933 last_dev = dev;
934
935 STOP_LANCE(lp);
936
937 if (request_irq(dev->irq, &lance_interrupt, SA_SHIRQ,
938 lancestr, (void *) dev)) {
939 printk(KERN_ERR "Lance: Can't get irq %s\n", __irq_itoa(dev->irq));
940 return -EAGAIN;
941 }
942
943 /* On the 4m, setup the ledma to provide the upper bits for buffers */
944 if (lp->dregs) {
945 u32 regval = lp->init_block_dvma & 0xff000000;
946
947 sbus_writel(regval, lp->dregs + DMA_TEST);
948 }
949
950 /* Set mode and clear multicast filter only at device open,
951 * so that lance_init_ring() called at any error will not
952 * forget multicast filters.
953 *
954 * BTW it is common bug in all lance drivers! --ANK
955 */
956 if (lp->pio_buffer) {
957 struct lance_init_block __iomem *ib = lp->init_block_iomem;
958 sbus_writew(0, &ib->mode);
959 sbus_writel(0, &ib->filter[0]);
960 sbus_writel(0, &ib->filter[1]);
961 } else {
962 struct lance_init_block *ib = lp->init_block_mem;
963 ib->mode = 0;
964 ib->filter [0] = 0;
965 ib->filter [1] = 0;
966 }
967
968 lp->init_ring(dev);
969 load_csrs(lp);
970
971 netif_start_queue(dev);
972
973 status = init_restart_lance(lp);
974 if (!status && lp->auto_select) {
975 build_fake_packet(lp);
976 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
977 }
978
979 return status;
980 }
981
982 static int lance_close(struct net_device *dev)
983 {
984 struct lance_private *lp = netdev_priv(dev);
985
986 netif_stop_queue(dev);
987 del_timer_sync(&lp->multicast_timer);
988
989 STOP_LANCE(lp);
990
991 free_irq(dev->irq, (void *) dev);
992 return 0;
993 }
994
995 static int lance_reset(struct net_device *dev)
996 {
997 struct lance_private *lp = netdev_priv(dev);
998 int status;
999
1000 STOP_LANCE(lp);
1001
1002 /* On the 4m, reset the dma too */
1003 if (lp->dregs) {
1004 u32 csr, addr;
1005
1006 printk(KERN_ERR "resetting ledma\n");
1007 csr = sbus_readl(lp->dregs + DMA_CSR);
1008 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
1009 udelay(200);
1010 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
1011
1012 addr = lp->init_block_dvma & 0xff000000;
1013 sbus_writel(addr, lp->dregs + DMA_TEST);
1014 }
1015 lp->init_ring(dev);
1016 load_csrs(lp);
1017 dev->trans_start = jiffies;
1018 status = init_restart_lance(lp);
1019 return status;
1020 }
1021
1022 static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
1023 {
1024 void __iomem *piobuf = dest;
1025 u32 *p32;
1026 u16 *p16;
1027 u8 *p8;
1028
1029 switch ((unsigned long)src & 0x3) {
1030 case 0:
1031 p32 = (u32 *) src;
1032 while (len >= 4) {
1033 sbus_writel(*p32, piobuf);
1034 p32++;
1035 piobuf += 4;
1036 len -= 4;
1037 }
1038 src = (char *) p32;
1039 break;
1040 case 1:
1041 case 3:
1042 p8 = (u8 *) src;
1043 while (len >= 4) {
1044 u32 val;
1045
1046 val = p8[0] << 24;
1047 val |= p8[1] << 16;
1048 val |= p8[2] << 8;
1049 val |= p8[3];
1050 sbus_writel(val, piobuf);
1051 p8 += 4;
1052 piobuf += 4;
1053 len -= 4;
1054 }
1055 src = (char *) p8;
1056 break;
1057 case 2:
1058 p16 = (u16 *) src;
1059 while (len >= 4) {
1060 u32 val = p16[0]<<16 | p16[1];
1061 sbus_writel(val, piobuf);
1062 p16 += 2;
1063 piobuf += 4;
1064 len -= 4;
1065 }
1066 src = (char *) p16;
1067 break;
1068 };
1069 if (len >= 2) {
1070 u16 val = src[0] << 8 | src[1];
1071 sbus_writew(val, piobuf);
1072 src += 2;
1073 piobuf += 2;
1074 len -= 2;
1075 }
1076 if (len >= 1)
1077 sbus_writeb(src[0], piobuf);
1078 }
1079
1080 static void lance_piozero(void __iomem *dest, int len)
1081 {
1082 void __iomem *piobuf = dest;
1083
1084 if ((unsigned long)piobuf & 1) {
1085 sbus_writeb(0, piobuf);
1086 piobuf += 1;
1087 len -= 1;
1088 if (len == 0)
1089 return;
1090 }
1091 if (len == 1) {
1092 sbus_writeb(0, piobuf);
1093 return;
1094 }
1095 if ((unsigned long)piobuf & 2) {
1096 sbus_writew(0, piobuf);
1097 piobuf += 2;
1098 len -= 2;
1099 if (len == 0)
1100 return;
1101 }
1102 while (len >= 4) {
1103 sbus_writel(0, piobuf);
1104 piobuf += 4;
1105 len -= 4;
1106 }
1107 if (len >= 2) {
1108 sbus_writew(0, piobuf);
1109 piobuf += 2;
1110 len -= 2;
1111 }
1112 if (len >= 1)
1113 sbus_writeb(0, piobuf);
1114 }
1115
1116 static void lance_tx_timeout(struct net_device *dev)
1117 {
1118 struct lance_private *lp = netdev_priv(dev);
1119
1120 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
1121 dev->name, sbus_readw(lp->lregs + RDP));
1122 lance_reset(dev);
1123 netif_wake_queue(dev);
1124 }
1125
1126 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
1127 {
1128 struct lance_private *lp = netdev_priv(dev);
1129 int entry, skblen, len;
1130
1131 skblen = skb->len;
1132
1133 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
1134
1135 spin_lock_irq(&lp->lock);
1136
1137 lp->stats.tx_bytes += len;
1138
1139 entry = lp->tx_new & TX_RING_MOD_MASK;
1140 if (lp->pio_buffer) {
1141 struct lance_init_block __iomem *ib = lp->init_block_iomem;
1142 sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
1143 sbus_writew(0, &ib->btx_ring[entry].misc);
1144 lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
1145 if (len != skblen)
1146 lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
1147 sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
1148 } else {
1149 struct lance_init_block *ib = lp->init_block_mem;
1150 ib->btx_ring [entry].length = (-len) | 0xf000;
1151 ib->btx_ring [entry].misc = 0;
1152 memcpy((char *)&ib->tx_buf [entry][0], skb->data, skblen);
1153 if (len != skblen)
1154 memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
1155 ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
1156 }
1157
1158 lp->tx_new = TX_NEXT(entry);
1159
1160 if (TX_BUFFS_AVAIL <= 0)
1161 netif_stop_queue(dev);
1162
1163 /* Kick the lance: transmit now */
1164 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
1165
1166 /* Read back CSR to invalidate the E-Cache.
1167 * This is needed, because DMA_DSBL_WR_INV is set.
1168 */
1169 if (lp->dregs)
1170 sbus_readw(lp->lregs + RDP);
1171
1172 spin_unlock_irq(&lp->lock);
1173
1174 dev->trans_start = jiffies;
1175 dev_kfree_skb(skb);
1176
1177 return 0;
1178 }
1179
1180 static struct net_device_stats *lance_get_stats(struct net_device *dev)
1181 {
1182 struct lance_private *lp = netdev_priv(dev);
1183
1184 return &lp->stats;
1185 }
1186
1187 /* taken from the depca driver */
1188 static void lance_load_multicast(struct net_device *dev)
1189 {
1190 struct lance_private *lp = netdev_priv(dev);
1191 struct dev_mc_list *dmi = dev->mc_list;
1192 char *addrs;
1193 int i;
1194 u32 crc;
1195 u32 val;
1196
1197 /* set all multicast bits */
1198 if (dev->flags & IFF_ALLMULTI)
1199 val = ~0;
1200 else
1201 val = 0;
1202
1203 if (lp->pio_buffer) {
1204 struct lance_init_block __iomem *ib = lp->init_block_iomem;
1205 sbus_writel(val, &ib->filter[0]);
1206 sbus_writel(val, &ib->filter[1]);
1207 } else {
1208 struct lance_init_block *ib = lp->init_block_mem;
1209 ib->filter [0] = val;
1210 ib->filter [1] = val;
1211 }
1212
1213 if (dev->flags & IFF_ALLMULTI)
1214 return;
1215
1216 /* Add addresses */
1217 for (i = 0; i < dev->mc_count; i++) {
1218 addrs = dmi->dmi_addr;
1219 dmi = dmi->next;
1220
1221 /* multicast address? */
1222 if (!(*addrs & 1))
1223 continue;
1224 crc = ether_crc_le(6, addrs);
1225 crc = crc >> 26;
1226 if (lp->pio_buffer) {
1227 struct lance_init_block __iomem *ib = lp->init_block_iomem;
1228 u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
1229 u16 tmp = sbus_readw(&mcast_table[crc>>4]);
1230 tmp |= 1 << (crc & 0xf);
1231 sbus_writew(tmp, &mcast_table[crc>>4]);
1232 } else {
1233 struct lance_init_block *ib = lp->init_block_mem;
1234 u16 *mcast_table = (u16 *) &ib->filter;
1235 mcast_table [crc >> 4] |= 1 << (crc & 0xf);
1236 }
1237 }
1238 }
1239
1240 static void lance_set_multicast(struct net_device *dev)
1241 {
1242 struct lance_private *lp = netdev_priv(dev);
1243 struct lance_init_block *ib_mem = lp->init_block_mem;
1244 struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
1245 u16 mode;
1246
1247 if (!netif_running(dev))
1248 return;
1249
1250 if (lp->tx_old != lp->tx_new) {
1251 mod_timer(&lp->multicast_timer, jiffies + 4);
1252 netif_wake_queue(dev);
1253 return;
1254 }
1255
1256 netif_stop_queue(dev);
1257
1258 STOP_LANCE(lp);
1259 lp->init_ring(dev);
1260
1261 if (lp->pio_buffer)
1262 mode = sbus_readw(&ib_iomem->mode);
1263 else
1264 mode = ib_mem->mode;
1265 if (dev->flags & IFF_PROMISC) {
1266 mode |= LE_MO_PROM;
1267 if (lp->pio_buffer)
1268 sbus_writew(mode, &ib_iomem->mode);
1269 else
1270 ib_mem->mode = mode;
1271 } else {
1272 mode &= ~LE_MO_PROM;
1273 if (lp->pio_buffer)
1274 sbus_writew(mode, &ib_iomem->mode);
1275 else
1276 ib_mem->mode = mode;
1277 lance_load_multicast(dev);
1278 }
1279 load_csrs(lp);
1280 init_restart_lance(lp);
1281 netif_wake_queue(dev);
1282 }
1283
1284 static void lance_set_multicast_retry(unsigned long _opaque)
1285 {
1286 struct net_device *dev = (struct net_device *) _opaque;
1287
1288 lance_set_multicast(dev);
1289 }
1290
1291 static void lance_free_hwresources(struct lance_private *lp)
1292 {
1293 if (lp->lregs)
1294 sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
1295 if (lp->init_block_iomem) {
1296 sbus_iounmap(lp->init_block_iomem,
1297 sizeof(struct lance_init_block));
1298 } else if (lp->init_block_mem) {
1299 sbus_free_consistent(lp->sdev,
1300 sizeof(struct lance_init_block),
1301 lp->init_block_mem,
1302 lp->init_block_dvma);
1303 }
1304 }
1305
1306 /* Ethtool support... */
1307 static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1308 {
1309 struct lance_private *lp = netdev_priv(dev);
1310
1311 strcpy(info->driver, "sunlance");
1312 strcpy(info->version, "2.02");
1313 sprintf(info->bus_info, "SBUS:%d",
1314 lp->sdev->slot);
1315 }
1316
1317 static u32 sparc_lance_get_link(struct net_device *dev)
1318 {
1319 /* We really do not keep track of this, but this
1320 * is better than not reporting anything at all.
1321 */
1322 return 1;
1323 }
1324
1325 static struct ethtool_ops sparc_lance_ethtool_ops = {
1326 .get_drvinfo = sparc_lance_get_drvinfo,
1327 .get_link = sparc_lance_get_link,
1328 };
1329
1330 static int __init sparc_lance_init(struct sbus_dev *sdev,
1331 struct sbus_dma *ledma,
1332 struct sbus_dev *lebuffer)
1333 {
1334 static unsigned version_printed;
1335 struct net_device *dev;
1336 struct lance_private *lp;
1337 int i;
1338
1339 dev = alloc_etherdev(sizeof(struct lance_private) + 8);
1340 if (!dev)
1341 return -ENOMEM;
1342
1343 lp = netdev_priv(dev);
1344 memset(lp, 0, sizeof(*lp));
1345
1346 if (sparc_lance_debug && version_printed++ == 0)
1347 printk (KERN_INFO "%s", version);
1348
1349 spin_lock_init(&lp->lock);
1350
1351 /* Copy the IDPROM ethernet address to the device structure, later we
1352 * will copy the address in the device structure to the lance
1353 * initialization block.
1354 */
1355 for (i = 0; i < 6; i++)
1356 dev->dev_addr[i] = idprom->id_ethaddr[i];
1357
1358 /* Get the IO region */
1359 lp->lregs = sbus_ioremap(&sdev->resource[0], 0,
1360 LANCE_REG_SIZE, lancestr);
1361 if (!lp->lregs) {
1362 printk(KERN_ERR "SunLance: Cannot map registers.\n");
1363 goto fail;
1364 }
1365
1366 lp->sdev = sdev;
1367 if (lebuffer) {
1368 /* sanity check */
1369 if (lebuffer->resource[0].start & 7) {
1370 printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
1371 goto fail;
1372 }
1373 lp->init_block_iomem =
1374 sbus_ioremap(&lebuffer->resource[0], 0,
1375 sizeof(struct lance_init_block), "lebuffer");
1376 if (!lp->init_block_iomem) {
1377 printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
1378 goto fail;
1379 }
1380 lp->init_block_dvma = 0;
1381 lp->pio_buffer = 1;
1382 lp->init_ring = lance_init_ring_pio;
1383 lp->rx = lance_rx_pio;
1384 lp->tx = lance_tx_pio;
1385 } else {
1386 lp->init_block_mem =
1387 sbus_alloc_consistent(sdev, sizeof(struct lance_init_block),
1388 &lp->init_block_dvma);
1389 if (!lp->init_block_mem || lp->init_block_dvma == 0) {
1390 printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n");
1391 goto fail;
1392 }
1393 lp->pio_buffer = 0;
1394 lp->init_ring = lance_init_ring_dvma;
1395 lp->rx = lance_rx_dvma;
1396 lp->tx = lance_tx_dvma;
1397 }
1398 lp->busmaster_regval = prom_getintdefault(sdev->prom_node,
1399 "busmaster-regval",
1400 (LE_C3_BSWP | LE_C3_ACON |
1401 LE_C3_BCON));
1402
1403 lp->name = lancestr;
1404 lp->ledma = ledma;
1405
1406 lp->burst_sizes = 0;
1407 if (lp->ledma) {
1408 char prop[6];
1409 unsigned int sbmask;
1410 u32 csr;
1411
1412 /* Find burst-size property for ledma */
1413 lp->burst_sizes = prom_getintdefault(ledma->sdev->prom_node,
1414 "burst-sizes", 0);
1415
1416 /* ledma may be capable of fast bursts, but sbus may not. */
1417 sbmask = prom_getintdefault(ledma->sdev->bus->prom_node,
1418 "burst-sizes", DMA_BURSTBITS);
1419 lp->burst_sizes &= sbmask;
1420
1421 /* Get the cable-selection property */
1422 memset(prop, 0, sizeof(prop));
1423 prom_getstring(ledma->sdev->prom_node, "cable-selection",
1424 prop, sizeof(prop));
1425 if (prop[0] == 0) {
1426 int topnd, nd;
1427
1428 printk(KERN_INFO "SunLance: using auto-carrier-detection.\n");
1429
1430 /* Is this found at /options .attributes in all
1431 * Prom versions? XXX
1432 */
1433 topnd = prom_getchild(prom_root_node);
1434
1435 nd = prom_searchsiblings(topnd, "options");
1436 if (!nd)
1437 goto no_link_test;
1438
1439 if (!prom_node_has_property(nd, "tpe-link-test?"))
1440 goto no_link_test;
1441
1442 memset(prop, 0, sizeof(prop));
1443 prom_getstring(nd, "tpe-link-test?", prop,
1444 sizeof(prop));
1445
1446 if (strcmp(prop, "true")) {
1447 printk(KERN_NOTICE "SunLance: warning: overriding option "
1448 "'tpe-link-test?'\n");
1449 printk(KERN_NOTICE "SunLance: warning: mail any problems "
1450 "to ecd@skynet.be\n");
1451 auxio_set_lte(AUXIO_LTE_ON);
1452 }
1453 no_link_test:
1454 lp->auto_select = 1;
1455 lp->tpe = 0;
1456 } else if (!strcmp(prop, "aui")) {
1457 lp->auto_select = 0;
1458 lp->tpe = 0;
1459 } else {
1460 lp->auto_select = 0;
1461 lp->tpe = 1;
1462 }
1463
1464 lp->dregs = ledma->regs;
1465
1466 /* Reset ledma */
1467 csr = sbus_readl(lp->dregs + DMA_CSR);
1468 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
1469 udelay(200);
1470 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
1471 } else
1472 lp->dregs = NULL;
1473
1474 lp->dev = dev;
1475 SET_MODULE_OWNER(dev);
1476 dev->open = &lance_open;
1477 dev->stop = &lance_close;
1478 dev->hard_start_xmit = &lance_start_xmit;
1479 dev->tx_timeout = &lance_tx_timeout;
1480 dev->watchdog_timeo = 5*HZ;
1481 dev->get_stats = &lance_get_stats;
1482 dev->set_multicast_list = &lance_set_multicast;
1483 dev->ethtool_ops = &sparc_lance_ethtool_ops;
1484
1485 dev->irq = sdev->irqs[0];
1486
1487 dev->dma = 0;
1488
1489 /* We cannot sleep if the chip is busy during a
1490 * multicast list update event, because such events
1491 * can occur from interrupts (ex. IPv6). So we
1492 * use a timer to try again later when necessary. -DaveM
1493 */
1494 init_timer(&lp->multicast_timer);
1495 lp->multicast_timer.data = (unsigned long) dev;
1496 lp->multicast_timer.function = &lance_set_multicast_retry;
1497
1498 if (register_netdev(dev)) {
1499 printk(KERN_ERR "SunLance: Cannot register device.\n");
1500 goto fail;
1501 }
1502
1503 lp->next_module = root_lance_dev;
1504 root_lance_dev = lp;
1505
1506 printk(KERN_INFO "%s: LANCE ", dev->name);
1507
1508 for (i = 0; i < 6; i++)
1509 printk("%2.2x%c", dev->dev_addr[i],
1510 i == 5 ? ' ': ':');
1511 printk("\n");
1512
1513 return 0;
1514
1515 fail:
1516 lance_free_hwresources(lp);
1517 free_netdev(dev);
1518 return -ENODEV;
1519 }
1520
1521 /* On 4m, find the associated dma for the lance chip */
1522 static inline struct sbus_dma *find_ledma(struct sbus_dev *sdev)
1523 {
1524 struct sbus_dma *p;
1525
1526 for_each_dvma(p) {
1527 if (p->sdev == sdev)
1528 return p;
1529 }
1530 return NULL;
1531 }
1532
1533 #ifdef CONFIG_SUN4
1534
1535 #include <asm/sun4paddr.h>
1536 #include <asm/machines.h>
1537
1538 /* Find all the lance cards on the system and initialize them */
1539 static int __init sparc_lance_probe(void)
1540 {
1541 static struct sbus_dev sdev;
1542 static int called;
1543
1544 root_lance_dev = NULL;
1545
1546 if (called)
1547 return -ENODEV;
1548 called++;
1549
1550 if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) ||
1551 (idprom->id_machtype == (SM_SUN4|SM_4_470))) {
1552 memset(&sdev, 0, sizeof(sdev));
1553 sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr;
1554 sdev.irqs[0] = 6;
1555 return sparc_lance_init(&sdev, NULL, NULL);
1556 }
1557 return -ENODEV;
1558 }
1559
1560 #else /* !CONFIG_SUN4 */
1561
1562 /* Find all the lance cards on the system and initialize them */
1563 static int __init sparc_lance_probe(void)
1564 {
1565 struct sbus_bus *bus;
1566 struct sbus_dev *sdev = NULL;
1567 struct sbus_dma *ledma = NULL;
1568 static int called;
1569 int cards = 0, v;
1570
1571 root_lance_dev = NULL;
1572
1573 if (called)
1574 return -ENODEV;
1575 called++;
1576
1577 for_each_sbus (bus) {
1578 for_each_sbusdev (sdev, bus) {
1579 if (strcmp(sdev->prom_name, "le") == 0) {
1580 cards++;
1581 if ((v = sparc_lance_init(sdev, NULL, NULL)))
1582 return v;
1583 continue;
1584 }
1585 if (strcmp(sdev->prom_name, "ledma") == 0) {
1586 cards++;
1587 ledma = find_ledma(sdev);
1588 if ((v = sparc_lance_init(sdev->child,
1589 ledma, NULL)))
1590 return v;
1591 continue;
1592 }
1593 if (strcmp(sdev->prom_name, "lebuffer") == 0){
1594 cards++;
1595 if ((v = sparc_lance_init(sdev->child,
1596 NULL, sdev)))
1597 return v;
1598 continue;
1599 }
1600 } /* for each sbusdev */
1601 } /* for each sbus */
1602 if (!cards)
1603 return -ENODEV;
1604 return 0;
1605 }
1606 #endif /* !CONFIG_SUN4 */
1607
1608 static void __exit sparc_lance_cleanup(void)
1609 {
1610 struct lance_private *lp;
1611
1612 while (root_lance_dev) {
1613 lp = root_lance_dev->next_module;
1614
1615 unregister_netdev(root_lance_dev->dev);
1616 lance_free_hwresources(root_lance_dev);
1617 free_netdev(root_lance_dev->dev);
1618 root_lance_dev = lp;
1619 }
1620 }
1621
1622 module_init(sparc_lance_probe);
1623 module_exit(sparc_lance_cleanup);
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