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[XFRM]: skb_cow_data() does not set proper owner for new skbs.
[linux-2.6/verdex.git] / drivers / serial / imx.c
blob01a8726a3f97289b9a85e21eeab51c1703aaac8d
1 /*
2 * linux/drivers/serial/imx.c
3 *
4 * Driver for Motorola IMX serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Author: Sascha Hauer <sascha@saschahauer.de>
9 * Copyright (C) 2004 Pengutronix
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * [29-Mar-2005] Mike Lee
26 * Added hardware handshake
27 */
28 #include <linux/config.h>
29
30 #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31 #define SUPPORT_SYSRQ
32 #endif
33
34 #include <linux/module.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/device.h>
40 #include <linux/tty.h>
41 #include <linux/tty_flip.h>
42 #include <linux/serial_core.h>
43 #include <linux/serial.h>
44
45 #include <asm/io.h>
46 #include <asm/irq.h>
47 #include <asm/hardware.h>
48
49 /* We've been assigned a range on the "Low-density serial ports" major */
50 #define SERIAL_IMX_MAJOR 204
51 #define MINOR_START 41
52
53 #define NR_PORTS 2
54
55 #define IMX_ISR_PASS_LIMIT 256
56
57 /*
58 * This is the size of our serial port register set.
59 */
60 #define UART_PORT_SIZE 0x100
61
62 /*
63 * This determines how often we check the modem status signals
64 * for any change. They generally aren't connected to an IRQ
65 * so we have to poll them. We also check immediately before
66 * filling the TX fifo incase CTS has been dropped.
67 */
68 #define MCTRL_TIMEOUT (250*HZ/1000)
69
70 #define DRIVER_NAME "IMX-uart"
71
72 struct imx_port {
73 struct uart_port port;
74 struct timer_list timer;
75 unsigned int old_status;
76 int txirq,rxirq;
77 };
78
79 /*
80 * Handle any change of modem status signal since we were last called.
81 */
82 static void imx_mctrl_check(struct imx_port *sport)
83 {
84 unsigned int status, changed;
85
86 status = sport->port.ops->get_mctrl(&sport->port);
87 changed = status ^ sport->old_status;
88
89 if (changed == 0)
90 return;
91
92 sport->old_status = status;
93
94 if (changed & TIOCM_RI)
95 sport->port.icount.rng++;
96 if (changed & TIOCM_DSR)
97 sport->port.icount.dsr++;
98 if (changed & TIOCM_CAR)
99 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
100 if (changed & TIOCM_CTS)
101 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
102
103 wake_up_interruptible(&sport->port.info->delta_msr_wait);
104 }
105
106 /*
107 * This is our per-port timeout handler, for checking the
108 * modem status signals.
109 */
110 static void imx_timeout(unsigned long data)
111 {
112 struct imx_port *sport = (struct imx_port *)data;
113 unsigned long flags;
114
115 if (sport->port.info) {
116 spin_lock_irqsave(&sport->port.lock, flags);
117 imx_mctrl_check(sport);
118 spin_unlock_irqrestore(&sport->port.lock, flags);
119
120 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
121 }
122 }
123
124 /*
125 * interrupts disabled on entry
126 */
127 static void imx_stop_tx(struct uart_port *port, unsigned int tty_stop)
128 {
129 struct imx_port *sport = (struct imx_port *)port;
130 UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
131 }
132
133 /*
134 * interrupts disabled on entry
135 */
136 static void imx_stop_rx(struct uart_port *port)
137 {
138 struct imx_port *sport = (struct imx_port *)port;
139 UCR2((u32)sport->port.membase) &= ~UCR2_RXEN;
140 }
141
142 /*
143 * Set the modem control timer to fire immediately.
144 */
145 static void imx_enable_ms(struct uart_port *port)
146 {
147 struct imx_port *sport = (struct imx_port *)port;
148
149 mod_timer(&sport->timer, jiffies);
150 }
151
152 static inline void imx_transmit_buffer(struct imx_port *sport)
153 {
154 struct circ_buf *xmit = &sport->port.info->xmit;
155
156 do {
157 /* send xmit->buf[xmit->tail]
158 * out the port here */
159 URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail];
160 xmit->tail = (xmit->tail + 1) &
161 (UART_XMIT_SIZE - 1);
162 sport->port.icount.tx++;
163 if (uart_circ_empty(xmit))
164 break;
165 } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL));
166
167 if (uart_circ_empty(xmit))
168 imx_stop_tx(&sport->port, 0);
169 }
170
171 /*
172 * interrupts disabled on entry
173 */
174 static void imx_start_tx(struct uart_port *port, unsigned int tty_start)
175 {
176 struct imx_port *sport = (struct imx_port *)port;
177
178 UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN;
179
180 if(UTS((u32)sport->port.membase) & UTS_TXEMPTY)
181 imx_transmit_buffer(sport);
182 }
183
184 static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs)
185 {
186 struct imx_port *sport = (struct imx_port *)dev_id;
187 struct circ_buf *xmit = &sport->port.info->xmit;
188 unsigned long flags;
189
190 spin_lock_irqsave(&sport->port.lock,flags);
191 if (sport->port.x_char)
192 {
193 /* Send next char */
194 URTX0((u32)sport->port.membase) = sport->port.x_char;
195 goto out;
196 }
197
198 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
199 imx_stop_tx(&sport->port, 0);
200 goto out;
201 }
202
203 imx_transmit_buffer(sport);
204
205 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
206 uart_write_wakeup(&sport->port);
207
208 out:
209 spin_unlock_irqrestore(&sport->port.lock,flags);
210 return IRQ_HANDLED;
211 }
212
213 static irqreturn_t imx_rxint(int irq, void *dev_id, struct pt_regs *regs)
214 {
215 struct imx_port *sport = dev_id;
216 unsigned int rx,flg,ignored = 0;
217 struct tty_struct *tty = sport->port.info->tty;
218 unsigned long flags;
219
220 rx = URXD0((u32)sport->port.membase);
221 spin_lock_irqsave(&sport->port.lock,flags);
222
223 do {
224 flg = TTY_NORMAL;
225 sport->port.icount.rx++;
226
227 if( USR2((u32)sport->port.membase) & USR2_BRCD ) {
228 USR2((u32)sport->port.membase) |= USR2_BRCD;
229 if(uart_handle_break(&sport->port))
230 goto ignore_char;
231 }
232
233 if (uart_handle_sysrq_char
234 (&sport->port, (unsigned char)rx, regs))
235 goto ignore_char;
236
237 if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) )
238 goto handle_error;
239
240 error_return:
241 tty_insert_flip_char(tty, rx, flg);
242
243 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
244 goto out;
245
246 ignore_char:
247 rx = URXD0((u32)sport->port.membase);
248 } while(rx & URXD_CHARRDY);
249
250 out:
251 spin_unlock_irqrestore(&sport->port.lock,flags);
252 tty_flip_buffer_push(tty);
253 return IRQ_HANDLED;
254
255 handle_error:
256 if (rx & URXD_PRERR)
257 sport->port.icount.parity++;
258 else if (rx & URXD_FRMERR)
259 sport->port.icount.frame++;
260 if (rx & URXD_OVRRUN)
261 sport->port.icount.overrun++;
262
263 if (rx & sport->port.ignore_status_mask) {
264 if (++ignored > 100)
265 goto out;
266 goto ignore_char;
267 }
268
269 rx &= sport->port.read_status_mask;
270
271 if (rx & URXD_PRERR)
272 flg = TTY_PARITY;
273 else if (rx & URXD_FRMERR)
274 flg = TTY_FRAME;
275 if (rx & URXD_OVRRUN)
276 flg = TTY_OVERRUN;
277
278 #ifdef SUPPORT_SYSRQ
279 sport->port.sysrq = 0;
280 #endif
281 goto error_return;
282 }
283
284 /*
285 * Return TIOCSER_TEMT when transmitter is not busy.
286 */
287 static unsigned int imx_tx_empty(struct uart_port *port)
288 {
289 struct imx_port *sport = (struct imx_port *)port;
290
291 return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
292 }
293
294 static unsigned int imx_get_mctrl(struct uart_port *port)
295 {
296 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
297 }
298
299 static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
300 {
301 }
302
303 /*
304 * Interrupts always disabled.
305 */
306 static void imx_break_ctl(struct uart_port *port, int break_state)
307 {
308 struct imx_port *sport = (struct imx_port *)port;
309 unsigned long flags;
310
311 spin_lock_irqsave(&sport->port.lock, flags);
312
313 if ( break_state != 0 )
314 UCR1((u32)sport->port.membase) |= UCR1_SNDBRK;
315 else
316 UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK;
317
318 spin_unlock_irqrestore(&sport->port.lock, flags);
319 }
320
321 #define TXTL 2 /* reset default */
322 #define RXTL 1 /* reset default */
323
324 static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
325 {
326 unsigned int val;
327 unsigned int ufcr_rfdiv;
328
329 /* set receiver / transmitter trigger level.
330 * RFDIV is set such way to satisfy requested uartclk value
331 */
332 val = TXTL<<10 | RXTL;
333 ufcr_rfdiv = (imx_get_perclk1() + sport->port.uartclk / 2) / sport->port.uartclk;
334
335 if(!ufcr_rfdiv)
336 ufcr_rfdiv = 1;
337
338 if(ufcr_rfdiv >= 7)
339 ufcr_rfdiv = 6;
340 else
341 ufcr_rfdiv = 6 - ufcr_rfdiv;
342
343 val |= UFCR_RFDIV & (ufcr_rfdiv << 7);
344
345 UFCR((u32)sport->port.membase) = val;
346
347 return 0;
348 }
349
350 static int imx_startup(struct uart_port *port)
351 {
352 struct imx_port *sport = (struct imx_port *)port;
353 int retval;
354 unsigned long flags;
355
356 imx_setup_ufcr(sport, 0);
357
358 /* disable the DREN bit (Data Ready interrupt enable) before
359 * requesting IRQs
360 */
361 UCR4((u32)sport->port.membase) &= ~UCR4_DREN;
362
363 /*
364 * Allocate the IRQ
365 */
366 retval = request_irq(sport->rxirq, imx_rxint, 0,
367 DRIVER_NAME, sport);
368 if (retval) goto error_out2;
369
370 retval = request_irq(sport->txirq, imx_txint, 0,
371 "imx-uart", sport);
372 if (retval) goto error_out1;
373
374 /*
375 * Finally, clear and enable interrupts
376 */
377
378 UCR1((u32)sport->port.membase) |=
379 (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
380
381 UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
382 /*
383 * Enable modem status interrupts
384 */
385 spin_lock_irqsave(&sport->port.lock,flags);
386 imx_enable_ms(&sport->port);
387 spin_unlock_irqrestore(&sport->port.lock,flags);
388
389 return 0;
390
391 error_out1:
392 free_irq(sport->rxirq, sport);
393 error_out2:
394 free_irq(sport->txirq, sport);
395 return retval;
396 }
397
398 static void imx_shutdown(struct uart_port *port)
399 {
400 struct imx_port *sport = (struct imx_port *)port;
401
402 /*
403 * Stop our timer.
404 */
405 del_timer_sync(&sport->timer);
406
407 /*
408 * Free the interrupts
409 */
410 free_irq(sport->txirq, sport);
411 free_irq(sport->rxirq, sport);
412
413 /*
414 * Disable all interrupts, port and break condition.
415 */
416
417 UCR1((u32)sport->port.membase) &=
418 ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
419 }
420
421 static void
422 imx_set_termios(struct uart_port *port, struct termios *termios,
423 struct termios *old)
424 {
425 struct imx_port *sport = (struct imx_port *)port;
426 unsigned long flags;
427 unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
428 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
429
430 /*
431 * If we don't support modem control lines, don't allow
432 * these to be set.
433 */
434 if (0) {
435 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
436 termios->c_cflag |= CLOCAL;
437 }
438
439 /*
440 * We only support CS7 and CS8.
441 */
442 while ((termios->c_cflag & CSIZE) != CS7 &&
443 (termios->c_cflag & CSIZE) != CS8) {
444 termios->c_cflag &= ~CSIZE;
445 termios->c_cflag |= old_csize;
446 old_csize = CS8;
447 }
448
449 if ((termios->c_cflag & CSIZE) == CS8)
450 ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
451 else
452 ucr2 = UCR2_SRST | UCR2_IRTS;
453
454 if (termios->c_cflag & CRTSCTS) {
455 ucr2 &= ~UCR2_IRTS;
456 ucr2 |= UCR2_CTSC;
457 }
458
459 if (termios->c_cflag & CSTOPB)
460 ucr2 |= UCR2_STPB;
461 if (termios->c_cflag & PARENB) {
462 ucr2 |= UCR2_PREN;
463 if (!(termios->c_cflag & PARODD))
464 ucr2 |= UCR2_PROE;
465 }
466
467 /*
468 * Ask the core to calculate the divisor for us.
469 */
470 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
471 quot = uart_get_divisor(port, baud);
472
473 spin_lock_irqsave(&sport->port.lock, flags);
474
475 sport->port.read_status_mask = 0;
476 if (termios->c_iflag & INPCK)
477 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
478 if (termios->c_iflag & (BRKINT | PARMRK))
479 sport->port.read_status_mask |= URXD_BRK;
480
481 /*
482 * Characters to ignore
483 */
484 sport->port.ignore_status_mask = 0;
485 if (termios->c_iflag & IGNPAR)
486 sport->port.ignore_status_mask |= URXD_PRERR;
487 if (termios->c_iflag & IGNBRK) {
488 sport->port.ignore_status_mask |= URXD_BRK;
489 /*
490 * If we're ignoring parity and break indicators,
491 * ignore overruns too (for real raw support).
492 */
493 if (termios->c_iflag & IGNPAR)
494 sport->port.ignore_status_mask |= URXD_OVRRUN;
495 }
496
497 del_timer_sync(&sport->timer);
498
499 /*
500 * Update the per-port timeout.
501 */
502 uart_update_timeout(port, termios->c_cflag, baud);
503
504 /*
505 * disable interrupts and drain transmitter
506 */
507 old_ucr1 = UCR1((u32)sport->port.membase);
508 UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
509
510 while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
511 barrier();
512
513 /* then, disable everything */
514 old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );
515 UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);
516
517 /* set the parity, stop bits and data size */
518 UCR2((u32)sport->port.membase) = ucr2;
519
520 /* set the baud rate. We assume uartclk = 16 MHz
521 *
522 * baud * 16 UBIR - 1
523 * --------- = --------
524 * uartclk UBMR - 1
525 */
526 UBIR((u32)sport->port.membase) = (baud / 100) - 1;
527 UBMR((u32)sport->port.membase) = 10000 - 1;
528
529 UCR1((u32)sport->port.membase) = old_ucr1;
530 UCR2((u32)sport->port.membase) |= old_txrxen;
531
532 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
533 imx_enable_ms(&sport->port);
534
535 spin_unlock_irqrestore(&sport->port.lock, flags);
536 }
537
538 static const char *imx_type(struct uart_port *port)
539 {
540 struct imx_port *sport = (struct imx_port *)port;
541
542 return sport->port.type == PORT_IMX ? "IMX" : NULL;
543 }
544
545 /*
546 * Release the memory region(s) being used by 'port'.
547 */
548 static void imx_release_port(struct uart_port *port)
549 {
550 struct imx_port *sport = (struct imx_port *)port;
551
552 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
553 }
554
555 /*
556 * Request the memory region(s) being used by 'port'.
557 */
558 static int imx_request_port(struct uart_port *port)
559 {
560 struct imx_port *sport = (struct imx_port *)port;
561
562 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
563 "imx-uart") != NULL ? 0 : -EBUSY;
564 }
565
566 /*
567 * Configure/autoconfigure the port.
568 */
569 static void imx_config_port(struct uart_port *port, int flags)
570 {
571 struct imx_port *sport = (struct imx_port *)port;
572
573 if (flags & UART_CONFIG_TYPE &&
574 imx_request_port(&sport->port) == 0)
575 sport->port.type = PORT_IMX;
576 }
577
578 /*
579 * Verify the new serial_struct (for TIOCSSERIAL).
580 * The only change we allow are to the flags and type, and
581 * even then only between PORT_IMX and PORT_UNKNOWN
582 */
583 static int
584 imx_verify_port(struct uart_port *port, struct serial_struct *ser)
585 {
586 struct imx_port *sport = (struct imx_port *)port;
587 int ret = 0;
588
589 if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
590 ret = -EINVAL;
591 if (sport->port.irq != ser->irq)
592 ret = -EINVAL;
593 if (ser->io_type != UPIO_MEM)
594 ret = -EINVAL;
595 if (sport->port.uartclk / 16 != ser->baud_base)
596 ret = -EINVAL;
597 if ((void *)sport->port.mapbase != ser->iomem_base)
598 ret = -EINVAL;
599 if (sport->port.iobase != ser->port)
600 ret = -EINVAL;
601 if (ser->hub6 != 0)
602 ret = -EINVAL;
603 return ret;
604 }
605
606 static struct uart_ops imx_pops = {
607 .tx_empty = imx_tx_empty,
608 .set_mctrl = imx_set_mctrl,
609 .get_mctrl = imx_get_mctrl,
610 .stop_tx = imx_stop_tx,
611 .start_tx = imx_start_tx,
612 .stop_rx = imx_stop_rx,
613 .enable_ms = imx_enable_ms,
614 .break_ctl = imx_break_ctl,
615 .startup = imx_startup,
616 .shutdown = imx_shutdown,
617 .set_termios = imx_set_termios,
618 .type = imx_type,
619 .release_port = imx_release_port,
620 .request_port = imx_request_port,
621 .config_port = imx_config_port,
622 .verify_port = imx_verify_port,
623 };
624
625 static struct imx_port imx_ports[] = {
626 {
627 .txirq = UART1_MINT_TX,
628 .rxirq = UART1_MINT_RX,
629 .port = {
630 .type = PORT_IMX,
631 .iotype = SERIAL_IO_MEM,
632 .membase = (void *)IMX_UART1_BASE,
633 .mapbase = IMX_UART1_BASE, /* FIXME */
634 .irq = UART1_MINT_RX,
635 .uartclk = 16000000,
636 .fifosize = 8,
637 .flags = ASYNC_BOOT_AUTOCONF,
638 .ops = &imx_pops,
639 .line = 0,
640 },
641 }, {
642 .txirq = UART2_MINT_TX,
643 .rxirq = UART2_MINT_RX,
644 .port = {
645 .type = PORT_IMX,
646 .iotype = SERIAL_IO_MEM,
647 .membase = (void *)IMX_UART2_BASE,
648 .mapbase = IMX_UART2_BASE, /* FIXME */
649 .irq = UART2_MINT_RX,
650 .uartclk = 16000000,
651 .fifosize = 8,
652 .flags = ASYNC_BOOT_AUTOCONF,
653 .ops = &imx_pops,
654 .line = 1,
655 },
656 }
657 };
658
659 /*
660 * Setup the IMX serial ports.
661 * Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
662 * Which serial port this ends up being depends on the machine you're
663 * running this kernel on. I'm not convinced that this is a good idea,
664 * but that's the way it traditionally works.
665 *
666 */
667 static void __init imx_init_ports(void)
668 {
669 static int first = 1;
670 int i;
671
672 if (!first)
673 return;
674 first = 0;
675
676 for (i = 0; i < ARRAY_SIZE(imx_ports); i++) {
677 init_timer(&imx_ports[i].timer);
678 imx_ports[i].timer.function = imx_timeout;
679 imx_ports[i].timer.data = (unsigned long)&imx_ports[i];
680 }
681
682 imx_gpio_mode(PC9_PF_UART1_CTS);
683 imx_gpio_mode(PC10_PF_UART1_RTS);
684 imx_gpio_mode(PC11_PF_UART1_TXD);
685 imx_gpio_mode(PC12_PF_UART1_RXD);
686 imx_gpio_mode(PB28_PF_UART2_CTS);
687 imx_gpio_mode(PB29_PF_UART2_RTS);
688
689 imx_gpio_mode(PB30_PF_UART2_TXD);
690 imx_gpio_mode(PB31_PF_UART2_RXD);
691
692 #if 0 /* We don't need these, on the mx1 the _modem_ side of the uart
693 * is implemented.
694 */
695 imx_gpio_mode(PD7_AF_UART2_DTR);
696 imx_gpio_mode(PD8_AF_UART2_DCD);
697 imx_gpio_mode(PD9_AF_UART2_RI);
698 imx_gpio_mode(PD10_AF_UART2_DSR);
699 #endif
700
701
702 }
703
704 #ifdef CONFIG_SERIAL_IMX_CONSOLE
705
706 /*
707 * Interrupts are disabled on entering
708 */
709 static void
710 imx_console_write(struct console *co, const char *s, unsigned int count)
711 {
712 struct imx_port *sport = &imx_ports[co->index];
713 unsigned int old_ucr1, old_ucr2, i;
714
715 /*
716 * First, save UCR1/2 and then disable interrupts
717 */
718 old_ucr1 = UCR1((u32)sport->port.membase);
719 old_ucr2 = UCR2((u32)sport->port.membase);
720
721 UCR1((u32)sport->port.membase) =
722 (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
723 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
724 UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
725
726 /*
727 * Now, do each character
728 */
729 for (i = 0; i < count; i++) {
730
731 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
732 barrier();
733
734 URTX0((u32)sport->port.membase) = s[i];
735
736 if (s[i] == '\n') {
737 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
738 barrier();
739 URTX0((u32)sport->port.membase) = '\r';
740 }
741 }
742
743 /*
744 * Finally, wait for transmitter to become empty
745 * and restore UCR1/2
746 */
747 while (!(USR2((u32)sport->port.membase) & USR2_TXDC));
748
749 UCR1((u32)sport->port.membase) = old_ucr1;
750 UCR2((u32)sport->port.membase) = old_ucr2;
751 }
752
753 /*
754 * If the port was already initialised (eg, by a boot loader),
755 * try to determine the current setup.
756 */
757 static void __init
758 imx_console_get_options(struct imx_port *sport, int *baud,
759 int *parity, int *bits)
760 {
761
762 if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) {
763 /* ok, the port was enabled */
764 unsigned int ucr2, ubir,ubmr, uartclk;
765 unsigned int baud_raw;
766 unsigned int ucfr_rfdiv;
767
768 ucr2 = UCR2((u32)sport->port.membase);
769
770 *parity = 'n';
771 if (ucr2 & UCR2_PREN) {
772 if (ucr2 & UCR2_PROE)
773 *parity = 'o';
774 else
775 *parity = 'e';
776 }
777
778 if (ucr2 & UCR2_WS)
779 *bits = 8;
780 else
781 *bits = 7;
782
783 ubir = UBIR((u32)sport->port.membase) & 0xffff;
784 ubmr = UBMR((u32)sport->port.membase) & 0xffff;
785
786
787 ucfr_rfdiv = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) >> 7;
788 if (ucfr_rfdiv == 6)
789 ucfr_rfdiv = 7;
790 else
791 ucfr_rfdiv = 6 - ucfr_rfdiv;
792
793 uartclk = imx_get_perclk1();
794 uartclk /= ucfr_rfdiv;
795
796 { /*
797 * The next code provides exact computation of
798 * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1))
799 * without need of float support or long long division,
800 * which would be required to prevent 32bit arithmetic overflow
801 */
802 unsigned int mul = ubir + 1;
803 unsigned int div = 16 * (ubmr + 1);
804 unsigned int rem = uartclk % div;
805
806 baud_raw = (uartclk / div) * mul;
807 baud_raw += (rem * mul + div / 2) / div;
808 *baud = (baud_raw + 50) / 100 * 100;
809 }
810
811 if(*baud != baud_raw)
812 printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n",
813 baud_raw, *baud);
814 }
815 }
816
817 static int __init
818 imx_console_setup(struct console *co, char *options)
819 {
820 struct imx_port *sport;
821 int baud = 9600;
822 int bits = 8;
823 int parity = 'n';
824 int flow = 'n';
825
826 /*
827 * Check whether an invalid uart number has been specified, and
828 * if so, search for the first available port that does have
829 * console support.
830 */
831 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
832 co->index = 0;
833 sport = &imx_ports[co->index];
834
835 if (options)
836 uart_parse_options(options, &baud, &parity, &bits, &flow);
837 else
838 imx_console_get_options(sport, &baud, &parity, &bits);
839
840 imx_setup_ufcr(sport, 0);
841
842 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
843 }
844
845 extern struct uart_driver imx_reg;
846 static struct console imx_console = {
847 .name = "ttySMX",
848 .write = imx_console_write,
849 .device = uart_console_device,
850 .setup = imx_console_setup,
851 .flags = CON_PRINTBUFFER,
852 .index = -1,
853 .data = &imx_reg,
854 };
855
856 static int __init imx_rs_console_init(void)
857 {
858 imx_init_ports();
859 register_console(&imx_console);
860 return 0;
861 }
862 console_initcall(imx_rs_console_init);
863
864 #define IMX_CONSOLE &imx_console
865 #else
866 #define IMX_CONSOLE NULL
867 #endif
868
869 static struct uart_driver imx_reg = {
870 .owner = THIS_MODULE,
871 .driver_name = DRIVER_NAME,
872 .dev_name = "ttySMX",
873 .devfs_name = "ttsmx/",
874 .major = SERIAL_IMX_MAJOR,
875 .minor = MINOR_START,
876 .nr = ARRAY_SIZE(imx_ports),
877 .cons = IMX_CONSOLE,
878 };
879
880 static int serial_imx_suspend(struct device *_dev, pm_message_t state, u32 level)
881 {
882 struct imx_port *sport = dev_get_drvdata(_dev);
883
884 if (sport && level == SUSPEND_DISABLE)
885 uart_suspend_port(&imx_reg, &sport->port);
886
887 return 0;
888 }
889
890 static int serial_imx_resume(struct device *_dev, u32 level)
891 {
892 struct imx_port *sport = dev_get_drvdata(_dev);
893
894 if (sport && level == RESUME_ENABLE)
895 uart_resume_port(&imx_reg, &sport->port);
896
897 return 0;
898 }
899
900 static int serial_imx_probe(struct device *_dev)
901 {
902 struct platform_device *dev = to_platform_device(_dev);
903
904 imx_ports[dev->id].port.dev = _dev;
905 uart_add_one_port(&imx_reg, &imx_ports[dev->id].port);
906 dev_set_drvdata(_dev, &imx_ports[dev->id]);
907 return 0;
908 }
909
910 static int serial_imx_remove(struct device *_dev)
911 {
912 struct imx_port *sport = dev_get_drvdata(_dev);
913
914 dev_set_drvdata(_dev, NULL);
915
916 if (sport)
917 uart_remove_one_port(&imx_reg, &sport->port);
918
919 return 0;
920 }
921
922 static struct device_driver serial_imx_driver = {
923 .name = "imx-uart",
924 .bus = &platform_bus_type,
925 .probe = serial_imx_probe,
926 .remove = serial_imx_remove,
927
928 .suspend = serial_imx_suspend,
929 .resume = serial_imx_resume,
930 };
931
932 static int __init imx_serial_init(void)
933 {
934 int ret;
935
936 printk(KERN_INFO "Serial: IMX driver\n");
937
938 imx_init_ports();
939
940 ret = uart_register_driver(&imx_reg);
941 if (ret)
942 return ret;
943
944 ret = driver_register(&serial_imx_driver);
945 if (ret != 0)
946 uart_unregister_driver(&imx_reg);
947
948 return 0;
949 }
950
951 static void __exit imx_serial_exit(void)
952 {
953 uart_unregister_driver(&imx_reg);
954 }
955
956 module_init(imx_serial_init);
957 module_exit(imx_serial_exit);
958
959 MODULE_AUTHOR("Sascha Hauer");
960 MODULE_DESCRIPTION("IMX generic serial port driver");
961 MODULE_LICENSE("GPL");
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