[PATCH] ppc32: Fix address checking on lmw/stmw align exception
[linux-2.6/verdex.git] / drivers / parisc / superio.c
blobe0efed796b923176b8d5c67f7f9196ee33bd60db
1 /* National Semiconductor NS87560UBD Super I/O controller used in
2 * HP [BCJ]x000 workstations.
4 * This chip is a horrid piece of engineering, and National
5 * denies any knowledge of its existence. Thus no datasheet is
6 * available off www.national.com.
8 * (C) Copyright 2000 Linuxcare, Inc.
9 * (C) Copyright 2000 Linuxcare Canada, Inc.
10 * (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
11 * (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
12 * (C) Copyright 2001 John Marvin <jsm fc hp com>
13 * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * The initial version of this is by Martin Peterson. Alex deVries
21 * has spent a bit of time trying to coax it into working.
23 * Major changes to get basic interrupt infrastructure working to
24 * hopefully be able to support all SuperIO devices. Currently
25 * works with serial. -- John Marvin <jsm@fc.hp.com>
29 /* NOTES:
31 * Function 0 is an IDE controller. It is identical to a PC87415 IDE
32 * controller (and identifies itself as such).
34 * Function 1 is a "Legacy I/O" controller. Under this function is a
35 * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
36 * all the functionality in hardware, but the following is available:
38 * Two 16550A compatible serial controllers
39 * An IEEE 1284 compatible parallel port
40 * A floppy disk controller
42 * Function 2 is a USB controller.
44 * We must be incredibly careful during initialization. Since all
45 * interrupts are routed through function 1 (which is not allowed by
46 * the PCI spec), we need to program the PICs on the legacy I/O port
47 * *before* we attempt to set up IDE and USB. @#$!&
49 * According to HP, devices are only enabled by firmware if they have
50 * a physical device connected.
52 * Configuration register bits:
53 * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
54 * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
58 #include <linux/errno.h>
59 #include <linux/init.h>
60 #include <linux/module.h>
61 #include <linux/types.h>
62 #include <linux/interrupt.h>
63 #include <linux/ioport.h>
64 #include <linux/serial.h>
65 #include <linux/pci.h>
66 #include <linux/parport.h>
67 #include <linux/parport_pc.h>
68 #include <linux/termios.h>
69 #include <linux/tty.h>
70 #include <linux/serial_core.h>
71 #include <linux/delay.h>
73 #include <asm/io.h>
74 #include <asm/hardware.h>
75 #include <asm/superio.h>
77 static struct superio_device sio_dev;
80 #undef DEBUG_SUPERIO_INIT
82 #ifdef DEBUG_SUPERIO_INIT
83 #define DBG_INIT(x...) printk(x)
84 #else
85 #define DBG_INIT(x...)
86 #endif
88 static irqreturn_t
89 superio_interrupt(int parent_irq, void *devp, struct pt_regs *regs)
91 u8 results;
92 u8 local_irq;
94 /* Poll the 8259 to see if there's an interrupt. */
95 outb (OCW3_POLL,IC_PIC1+0);
97 results = inb(IC_PIC1+0);
100 * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
101 * Bits 6-3: zero
102 * Bits 2-0: highest priority, active requesting interrupt ID (0-7)
104 if ((results & 0x80) == 0) {
105 /* I suspect "spurious" interrupts are from unmasking an IRQ.
106 * We don't know if an interrupt was/is pending and thus
107 * just call the handler for that IRQ as if it were pending.
109 return IRQ_NONE;
112 /* Check to see which device is interrupting */
113 local_irq = results & 0x0f;
115 if (local_irq == 2 || local_irq > 7) {
116 printk(KERN_ERR "SuperIO: slave interrupted!\n");
117 return IRQ_HANDLED;
120 if (local_irq == 7) {
122 /* Could be spurious. Check in service bits */
124 outb(OCW3_ISR,IC_PIC1+0);
125 results = inb(IC_PIC1+0);
126 if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
127 printk(KERN_WARNING "SuperIO: spurious interrupt!\n");
128 return IRQ_HANDLED;
132 /* Call the appropriate device's interrupt */
133 __do_IRQ(local_irq, regs);
135 /* set EOI - forces a new interrupt if a lower priority device
136 * still needs service.
138 outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
139 return IRQ_HANDLED;
142 /* Initialize Super I/O device */
144 static void __devinit
145 superio_init(struct superio_device *sio)
147 struct pci_dev *pdev = sio->lio_pdev;
148 u16 word;
150 if (sio->suckyio_irq_enabled)
151 return;
153 if (!pdev) BUG();
154 if (!sio->usb_pdev) BUG();
156 /* use the IRQ iosapic found for USB INT D... */
157 pdev->irq = sio->usb_pdev->irq;
159 /* ...then properly fixup the USB to point at suckyio PIC */
160 sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
162 printk (KERN_INFO "SuperIO: Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
163 pci_name(pdev),pdev->irq);
165 pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
166 sio->sp1_base &= ~1;
167 printk (KERN_INFO "SuperIO: Serial port 1 at 0x%x\n", sio->sp1_base);
169 pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
170 sio->sp2_base &= ~1;
171 printk (KERN_INFO "SuperIO: Serial port 2 at 0x%x\n", sio->sp2_base);
173 pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
174 sio->pp_base &= ~1;
175 printk (KERN_INFO "SuperIO: Parallel port at 0x%x\n", sio->pp_base);
177 pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
178 sio->fdc_base &= ~1;
179 printk (KERN_INFO "SuperIO: Floppy controller at 0x%x\n", sio->fdc_base);
180 pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
181 sio->acpi_base &= ~1;
182 printk (KERN_INFO "SuperIO: ACPI at 0x%x\n", sio->acpi_base);
184 request_region (IC_PIC1, 0x1f, "pic1");
185 request_region (IC_PIC2, 0x1f, "pic2");
186 request_region (sio->acpi_base, 0x1f, "acpi");
188 /* Enable the legacy I/O function */
189 pci_read_config_word (pdev, PCI_COMMAND, &word);
190 word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
191 pci_write_config_word (pdev, PCI_COMMAND, word);
193 pci_set_master (pdev);
194 pci_enable_device(pdev);
197 * Next project is programming the onboard interrupt controllers.
198 * PDC hasn't done this for us, since it's using polled I/O.
200 * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
201 * space access. PCI is by nature a 32-bit bus and config
202 * space can be sensitive to that.
205 /* 0x64 - 0x67 :
206 DMA Rtg 2
207 DMA Rtg 3
208 DMA Chan Ctl
209 TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
211 pci_write_config_dword (pdev, 0x64, 0x82000000U);
213 /* 0x68 - 0x6b :
214 TRIGGER_2 == 0x00 all edge triggered (not used)
215 CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
216 CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
217 CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
219 pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
221 /* 0x6c - 0x6f :
222 CFG_IR_INTAB == 0x00
223 CFG_IR_INTCD == 0x10 USB = IRQ1
224 CFG_IR_PS2 == 0x00
225 CFG_IR_FXBUS == 0x00
227 pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
229 /* 0x70 - 0x73 :
230 CFG_IR_USB == 0x00 not used. USB is connected to INTD.
231 CFG_IR_ACPI == 0x00 not used.
232 DMA Priority == 0x4c88 Power on default value. NFC.
234 pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
236 /* PIC1 Initialization Command Word register programming */
237 outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */
238 outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
239 outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
240 outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
242 /* PIC1 Program Operational Control Words */
243 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
244 outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
246 /* PIC2 Initialization Command Word register programming */
247 outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */
248 outb (0x00,IC_PIC2+1); /* ICW2: N/A */
249 outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
250 outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
252 /* Program Operational Control Words */
253 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
254 outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select | ESMM | SMM */
256 /* Write master mask reg */
257 outb (0xff,IC_PIC1+1);
259 /* Setup USB power regulation */
260 outb(1, sio->acpi_base + USB_REG_CR);
261 if (inb(sio->acpi_base + USB_REG_CR) & 1)
262 printk(KERN_INFO "SuperIO: USB regulator enabled\n");
263 else
264 printk(KERN_ERR "USB regulator not initialized!\n");
266 if (request_irq(pdev->irq, superio_interrupt, SA_INTERRUPT,
267 "SuperIO", (void *)sio)) {
269 printk(KERN_ERR "SuperIO: could not get irq\n");
270 BUG();
271 return;
274 sio->suckyio_irq_enabled = 1;
278 static void superio_disable_irq(unsigned int irq)
280 u8 r8;
282 if ((irq < 1) || (irq == 2) || (irq > 7)) {
283 printk(KERN_ERR "SuperIO: Illegal irq number.\n");
284 BUG();
285 return;
288 /* Mask interrupt */
290 r8 = inb(IC_PIC1+1);
291 r8 |= (1 << irq);
292 outb (r8,IC_PIC1+1);
295 static void superio_enable_irq(unsigned int irq)
297 u8 r8;
299 if ((irq < 1) || (irq == 2) || (irq > 7)) {
300 printk(KERN_ERR "SuperIO: Illegal irq number (%d).\n", irq);
301 BUG();
302 return;
305 /* Unmask interrupt */
306 r8 = inb(IC_PIC1+1);
307 r8 &= ~(1 << irq);
308 outb (r8,IC_PIC1+1);
311 static unsigned int superio_startup_irq(unsigned int irq)
313 superio_enable_irq(irq);
314 return 0;
317 static struct hw_interrupt_type superio_interrupt_type = {
318 .typename = "SuperIO",
319 .startup = superio_startup_irq,
320 .shutdown = superio_disable_irq,
321 .enable = superio_enable_irq,
322 .disable = superio_disable_irq,
323 .ack = no_ack_irq,
324 .end = no_end_irq,
327 #ifdef DEBUG_SUPERIO_INIT
328 static unsigned short expected_device[3] = {
329 PCI_DEVICE_ID_NS_87415,
330 PCI_DEVICE_ID_NS_87560_LIO,
331 PCI_DEVICE_ID_NS_87560_USB
333 #endif
335 int superio_fixup_irq(struct pci_dev *pcidev)
337 int local_irq, i;
339 #ifdef DEBUG_SUPERIO_INIT
340 int fn;
341 fn = PCI_FUNC(pcidev->devfn);
343 /* Verify the function number matches the expected device id. */
344 if (expected_device[fn] != pcidev->device) {
345 BUG();
346 return -1;
348 printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
349 pci_name(pcidev),
350 pcidev->vendor, pcidev->device,
351 __builtin_return_address(0));
352 #endif
354 for (i = 0; i < 16; i++) {
355 irq_desc[i].handler = &superio_interrupt_type;
359 * We don't allocate a SuperIO irq for the legacy IO function,
360 * since it is a "bridge". Instead, we will allocate irq's for
361 * each legacy device as they are initialized.
364 switch(pcidev->device) {
365 case PCI_DEVICE_ID_NS_87415: /* Function 0 */
366 local_irq = IDE_IRQ;
367 break;
368 case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
369 sio_dev.lio_pdev = pcidev; /* save for superio_init() */
370 return -1;
371 case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
372 sio_dev.usb_pdev = pcidev; /* save for superio_init() */
373 local_irq = USB_IRQ;
374 break;
375 default:
376 local_irq = -1;
377 BUG();
378 break;
381 return local_irq;
384 static struct uart_port serial[] = {
386 .iotype = UPIO_PORT,
387 .line = 0,
388 .type = PORT_16550A,
389 .uartclk = 115200*16,
390 .fifosize = 16,
393 .iotype = UPIO_PORT,
394 .line = 1,
395 .type = PORT_16550A,
396 .uartclk = 115200*16,
397 .fifosize = 16,
401 static void __devinit superio_serial_init(void)
403 #ifdef CONFIG_SERIAL_8250
404 int retval;
406 serial[0].iobase = sio_dev.sp1_base;
407 serial[0].irq = SP1_IRQ;
409 retval = early_serial_setup(&serial[0]);
410 if (retval < 0) {
411 printk(KERN_WARNING "SuperIO: Register Serial #0 failed.\n");
412 return;
415 serial[1].iobase = sio_dev.sp2_base;
416 serial[1].irq = SP2_IRQ;
417 retval = early_serial_setup(&serial[1]);
419 if (retval < 0)
420 printk(KERN_WARNING "SuperIO: Register Serial #1 failed.\n");
421 #endif /* CONFIG_SERIAL_8250 */
425 static void __devinit superio_parport_init(void)
427 #ifdef CONFIG_PARPORT_PC
428 if (!parport_pc_probe_port(sio_dev.pp_base,
429 0 /*base_hi*/,
430 PAR_IRQ,
431 PARPORT_DMA_NONE /* dma */,
432 NULL /*struct pci_dev* */) )
434 printk(KERN_WARNING "SuperIO: Probing parallel port failed.\n");
435 #endif /* CONFIG_PARPORT_PC */
439 static void superio_fixup_pci(struct pci_dev *pdev)
441 u8 prog;
443 pdev->class |= 0x5;
444 pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
446 pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
447 printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
449 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
452 static int __devinit superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
456 ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
457 ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
458 ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
460 DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
461 pci_name(dev),
462 dev->vendor, dev->device,
463 dev->subsystem_vendor, dev->subsystem_device,
464 dev->class);
466 superio_init(&sio_dev);
468 if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
469 superio_parport_init();
470 superio_serial_init();
471 /* REVISIT XXX : superio_fdc_init() ? */
472 return 0;
473 } else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
474 DBG_INIT("superio_probe: ignoring IDE 87415\n");
475 } else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
476 DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
477 } else {
478 DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
481 /* Let appropriate other driver claim this device. */
482 return -ENODEV;
485 static struct pci_device_id superio_tbl[] = {
486 { PCI_VENDOR_ID_NS, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
487 { 0, }
490 static struct pci_driver superio_driver = {
491 .name = "SuperIO",
492 .id_table = superio_tbl,
493 .probe = superio_probe,
496 static int __init superio_modinit(void)
498 return pci_register_driver(&superio_driver);
501 static void __exit superio_exit(void)
503 pci_unregister_driver(&superio_driver);
507 module_init(superio_modinit);
508 module_exit(superio_exit);