[PATCH] ppc32: Fix address checking on lmw/stmw align exception
[linux-2.6/verdex.git] / drivers / scsi / sun3_scsi.c
blobe3ea99f23d60187dbc3c2a7e3ec0f160ca3f8f9e
1 /*
2 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
4 * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
6 * Adapted from mac_scsinew.c:
7 */
8 /*
9 * Generic Macintosh NCR5380 driver
11 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
13 * derived in part from:
16 * Generic Generic NCR5380 driver
18 * Copyright 1995, Russell King
20 * ALPHA RELEASE 1.
22 * For more information, please consult
24 * NCR 5380 Family
25 * SCSI Protocol Controller
26 * Databook
28 * NCR Microelectronics
29 * 1635 Aeroplaza Drive
30 * Colorado Springs, CO 80916
31 * 1+ (719) 578-3400
32 * 1+ (800) 334-5454
37 * This is from mac_scsi.h, but hey, maybe this is useful for Sun3 too! :)
39 * Options :
41 * PARITY - enable parity checking. Not supported.
43 * SCSI2 - enable support for SCSI-II tagged queueing. Untested.
45 * USLEEP - enable support for devices that don't disconnect. Untested.
49 * $Log: sun3_NCR5380.c,v $
52 #define AUTOSENSE
54 #include <linux/types.h>
55 #include <linux/stddef.h>
56 #include <linux/ctype.h>
57 #include <linux/delay.h>
59 #include <linux/module.h>
60 #include <linux/signal.h>
61 #include <linux/sched.h>
62 #include <linux/ioport.h>
63 #include <linux/init.h>
64 #include <linux/blkdev.h>
66 #include <asm/io.h>
67 #include <asm/system.h>
69 #include <asm/sun3ints.h>
70 #include <asm/dvma.h>
71 #include <asm/idprom.h>
72 #include <asm/machines.h>
74 /* dma on! */
75 #define REAL_DMA
77 #include "scsi.h"
78 #include <scsi/scsi_host.h>
79 #include "sun3_scsi.h"
80 #include "NCR5380.h"
82 static void NCR5380_print(struct Scsi_Host *instance);
84 /* #define OLDDMA */
86 #define USE_WRAPPER
87 /*#define RESET_BOOT */
88 #define DRIVER_SETUP
90 #define NDEBUG 0
93 * BUG can be used to trigger a strange code-size related hang on 2.1 kernels
95 #ifdef BUG
96 #undef RESET_BOOT
97 #undef DRIVER_SETUP
98 #endif
100 /* #define SUPPORT_TAGS */
102 #define ENABLE_IRQ() enable_irq( IRQ_SUN3_SCSI );
105 static irqreturn_t scsi_sun3_intr(int irq, void *dummy, struct pt_regs *fp);
106 static inline unsigned char sun3scsi_read(int reg);
107 static inline void sun3scsi_write(int reg, int value);
109 static int setup_can_queue = -1;
110 module_param(setup_can_queue, int, 0);
111 static int setup_cmd_per_lun = -1;
112 module_param(setup_cmd_per_lun, int, 0);
113 static int setup_sg_tablesize = -1;
114 module_param(setup_sg_tablesize, int, 0);
115 #ifdef SUPPORT_TAGS
116 static int setup_use_tagged_queuing = -1;
117 module_param(setup_use_tagged_queuing, int, 0);
118 #endif
119 static int setup_hostid = -1;
120 module_param(setup_hostid, int, 0);
122 static Scsi_Cmnd *sun3_dma_setup_done = NULL;
124 #define AFTER_RESET_DELAY (HZ/2)
126 /* ms to wait after hitting dma regs */
127 #define SUN3_DMA_DELAY 10
129 /* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
130 #define SUN3_DVMA_BUFSIZE 0xe000
132 /* minimum number of bytes to do dma on */
133 #define SUN3_DMA_MINSIZE 128
135 static volatile unsigned char *sun3_scsi_regp;
136 static volatile struct sun3_dma_regs *dregs;
137 #ifdef OLDDMA
138 static unsigned char *dmabuf = NULL; /* dma memory buffer */
139 #endif
140 static struct sun3_udc_regs *udc_regs = NULL;
141 static unsigned char *sun3_dma_orig_addr = NULL;
142 static unsigned long sun3_dma_orig_count = 0;
143 static int sun3_dma_active = 0;
144 static unsigned long last_residual = 0;
147 * NCR 5380 register access functions
150 static inline unsigned char sun3scsi_read(int reg)
152 return( sun3_scsi_regp[reg] );
155 static inline void sun3scsi_write(int reg, int value)
157 sun3_scsi_regp[reg] = value;
160 /* dma controller register access functions */
162 static inline unsigned short sun3_udc_read(unsigned char reg)
164 unsigned short ret;
166 dregs->udc_addr = UDC_CSR;
167 udelay(SUN3_DMA_DELAY);
168 ret = dregs->udc_data;
169 udelay(SUN3_DMA_DELAY);
171 return ret;
174 static inline void sun3_udc_write(unsigned short val, unsigned char reg)
176 dregs->udc_addr = reg;
177 udelay(SUN3_DMA_DELAY);
178 dregs->udc_data = val;
179 udelay(SUN3_DMA_DELAY);
183 * XXX: status debug
185 static struct Scsi_Host *default_instance;
188 * Function : int sun3scsi_detect(Scsi_Host_Template * tpnt)
190 * Purpose : initializes mac NCR5380 driver based on the
191 * command line / compile time port and irq definitions.
193 * Inputs : tpnt - template for this SCSI adapter.
195 * Returns : 1 if a host adapter was found, 0 if not.
199 int sun3scsi_detect(Scsi_Host_Template * tpnt)
201 unsigned long ioaddr;
202 static int called = 0;
203 struct Scsi_Host *instance;
205 /* check that this machine has an onboard 5380 */
206 switch(idprom->id_machtype) {
207 case SM_SUN3|SM_3_50:
208 case SM_SUN3|SM_3_60:
209 break;
211 default:
212 return 0;
215 if(called)
216 return 0;
218 tpnt->proc_name = "Sun3 5380 SCSI";
220 /* setup variables */
221 tpnt->can_queue =
222 (setup_can_queue > 0) ? setup_can_queue : CAN_QUEUE;
223 tpnt->cmd_per_lun =
224 (setup_cmd_per_lun > 0) ? setup_cmd_per_lun : CMD_PER_LUN;
225 tpnt->sg_tablesize =
226 (setup_sg_tablesize >= 0) ? setup_sg_tablesize : SG_TABLESIZE;
228 if (setup_hostid >= 0)
229 tpnt->this_id = setup_hostid;
230 else {
231 /* use 7 as default */
232 tpnt->this_id = 7;
235 ioaddr = (unsigned long)ioremap(IOBASE_SUN3_SCSI, PAGE_SIZE);
236 sun3_scsi_regp = (unsigned char *)ioaddr;
238 dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8);
240 if((udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs)))
241 == NULL) {
242 printk("SUN3 Scsi couldn't allocate DVMA memory!\n");
243 return 0;
245 #ifdef OLDDMA
246 if((dmabuf = dvma_malloc_align(SUN3_DVMA_BUFSIZE, 0x10000)) == NULL) {
247 printk("SUN3 Scsi couldn't allocate DVMA memory!\n");
248 return 0;
250 #endif
251 #ifdef SUPPORT_TAGS
252 if (setup_use_tagged_queuing < 0)
253 setup_use_tagged_queuing = USE_TAGGED_QUEUING;
254 #endif
256 instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata));
257 if(instance == NULL)
258 return 0;
260 default_instance = instance;
262 instance->io_port = (unsigned long) ioaddr;
263 instance->irq = IRQ_SUN3_SCSI;
265 NCR5380_init(instance, 0);
267 instance->n_io_port = 32;
269 ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0;
271 if (request_irq(instance->irq, scsi_sun3_intr,
272 0, "Sun3SCSI-5380", NULL)) {
273 #ifndef REAL_DMA
274 printk("scsi%d: IRQ%d not free, interrupts disabled\n",
275 instance->host_no, instance->irq);
276 instance->irq = SCSI_IRQ_NONE;
277 #else
278 printk("scsi%d: IRQ%d not free, bailing out\n",
279 instance->host_no, instance->irq);
280 return 0;
281 #endif
284 printk("scsi%d: Sun3 5380 at port %lX irq", instance->host_no, instance->io_port);
285 if (instance->irq == SCSI_IRQ_NONE)
286 printk ("s disabled");
287 else
288 printk (" %d", instance->irq);
289 printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d",
290 instance->can_queue, instance->cmd_per_lun,
291 SUN3SCSI_PUBLIC_RELEASE);
292 printk("\nscsi%d:", instance->host_no);
293 NCR5380_print_options(instance);
294 printk("\n");
296 dregs->csr = 0;
297 udelay(SUN3_DMA_DELAY);
298 dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;
299 udelay(SUN3_DMA_DELAY);
300 dregs->fifo_count = 0;
302 called = 1;
304 #ifdef RESET_BOOT
305 sun3_scsi_reset_boot(instance);
306 #endif
308 return 1;
311 int sun3scsi_release (struct Scsi_Host *shpnt)
313 if (shpnt->irq != SCSI_IRQ_NONE)
314 free_irq (shpnt->irq, NULL);
316 iounmap((void *)sun3_scsi_regp);
318 return 0;
321 #ifdef RESET_BOOT
323 * Our 'bus reset on boot' function
326 static void sun3_scsi_reset_boot(struct Scsi_Host *instance)
328 unsigned long end;
330 NCR5380_local_declare();
331 NCR5380_setup(instance);
334 * Do a SCSI reset to clean up the bus during initialization. No
335 * messing with the queues, interrupts, or locks necessary here.
338 printk( "Sun3 SCSI: resetting the SCSI bus..." );
340 /* switch off SCSI IRQ - catch an interrupt without IRQ bit set else */
341 // sun3_disable_irq( IRQ_SUN3_SCSI );
343 /* get in phase */
344 NCR5380_write( TARGET_COMMAND_REG,
345 PHASE_SR_TO_TCR( NCR5380_read(STATUS_REG) ));
347 /* assert RST */
348 NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST );
350 /* The min. reset hold time is 25us, so 40us should be enough */
351 udelay( 50 );
353 /* reset RST and interrupt */
354 NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE );
355 NCR5380_read( RESET_PARITY_INTERRUPT_REG );
357 for( end = jiffies + AFTER_RESET_DELAY; time_before(jiffies, end); )
358 barrier();
360 /* switch on SCSI IRQ again */
361 // sun3_enable_irq( IRQ_SUN3_SCSI );
363 printk( " done\n" );
365 #endif
367 const char * sun3scsi_info (struct Scsi_Host *spnt) {
368 return "";
371 // safe bits for the CSR
372 #define CSR_GOOD 0x060f
374 static irqreturn_t scsi_sun3_intr(int irq, void *dummy, struct pt_regs *fp)
376 unsigned short csr = dregs->csr;
377 int handled = 0;
379 if(csr & ~CSR_GOOD) {
380 if(csr & CSR_DMA_BUSERR) {
381 printk("scsi%d: bus error in dma\n", default_instance->host_no);
384 if(csr & CSR_DMA_CONFLICT) {
385 printk("scsi%d: dma conflict\n", default_instance->host_no);
387 handled = 1;
390 if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {
391 NCR5380_intr(irq, dummy, fp);
392 handled = 1;
395 return IRQ_RETVAL(handled);
399 * Debug stuff - to be called on NMI, or sysrq key. Use at your own risk;
400 * reentering NCR5380_print_status seems to have ugly side effects
403 /* this doesn't seem to get used at all -- sam */
404 #if 0
405 void sun3_sun3_debug (void)
407 unsigned long flags;
408 NCR5380_local_declare();
410 if (default_instance) {
411 local_irq_save(flags);
412 NCR5380_print_status(default_instance);
413 local_irq_restore(flags);
416 #endif
419 /* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
420 static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag)
422 #ifdef OLDDMA
423 if(write_flag)
424 memcpy(dmabuf, data, count);
425 else {
426 sun3_dma_orig_addr = data;
427 sun3_dma_orig_count = count;
429 #else
430 void *addr;
432 if(sun3_dma_orig_addr != NULL)
433 dvma_unmap(sun3_dma_orig_addr);
435 // addr = sun3_dvma_page((unsigned long)data, (unsigned long)dmabuf);
436 addr = (void *)dvma_map((unsigned long) data, count);
438 sun3_dma_orig_addr = addr;
439 sun3_dma_orig_count = count;
440 #endif
441 dregs->fifo_count = 0;
442 sun3_udc_write(UDC_RESET, UDC_CSR);
444 /* reset fifo */
445 dregs->csr &= ~CSR_FIFO;
446 dregs->csr |= CSR_FIFO;
448 /* set direction */
449 if(write_flag)
450 dregs->csr |= CSR_SEND;
451 else
452 dregs->csr &= ~CSR_SEND;
454 /* byte count for fifo */
455 dregs->fifo_count = count;
457 sun3_udc_write(UDC_RESET, UDC_CSR);
459 /* reset fifo */
460 dregs->csr &= ~CSR_FIFO;
461 dregs->csr |= CSR_FIFO;
463 if(dregs->fifo_count != count) {
464 printk("scsi%d: fifo_mismatch %04x not %04x\n",
465 default_instance->host_no, dregs->fifo_count,
466 (unsigned int) count);
467 NCR5380_print(default_instance);
470 /* setup udc */
471 #ifdef OLDDMA
472 udc_regs->addr_hi = ((dvma_vtob(dmabuf) & 0xff0000) >> 8);
473 udc_regs->addr_lo = (dvma_vtob(dmabuf) & 0xffff);
474 #else
475 udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
476 udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
477 #endif
478 udc_regs->count = count/2; /* count in words */
479 udc_regs->mode_hi = UDC_MODE_HIWORD;
480 if(write_flag) {
481 if(count & 1)
482 udc_regs->count++;
483 udc_regs->mode_lo = UDC_MODE_LSEND;
484 udc_regs->rsel = UDC_RSEL_SEND;
485 } else {
486 udc_regs->mode_lo = UDC_MODE_LRECV;
487 udc_regs->rsel = UDC_RSEL_RECV;
490 /* announce location of regs block */
491 sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
492 UDC_CHN_HI);
494 sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);
496 /* set dma master on */
497 sun3_udc_write(0xd, UDC_MODE);
499 /* interrupt enable */
500 sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
502 return count;
506 static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance)
508 unsigned short resid;
510 dregs->udc_addr = 0x32;
511 udelay(SUN3_DMA_DELAY);
512 resid = dregs->udc_data;
513 udelay(SUN3_DMA_DELAY);
514 resid *= 2;
516 return (unsigned long) resid;
519 static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
521 return last_residual;
524 static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted, Scsi_Cmnd *cmd,
525 int write_flag)
527 if(cmd->request->flags & REQ_CMD)
528 return wanted;
529 else
530 return 0;
533 static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
536 sun3_udc_write(UDC_CHN_START, UDC_CSR);
538 return 0;
541 /* clean up after our dma is done */
542 static int sun3scsi_dma_finish(int write_flag)
544 unsigned short count;
545 unsigned short fifo;
546 int ret = 0;
548 sun3_dma_active = 0;
549 #if 1
550 // check to empty the fifo on a read
551 if(!write_flag) {
552 int tmo = 20000; /* .2 sec */
554 while(1) {
555 if(dregs->csr & CSR_FIFO_EMPTY)
556 break;
558 if(--tmo <= 0) {
559 printk("sun3scsi: fifo failed to empty!\n");
560 return 1;
562 udelay(10);
566 #endif
568 count = sun3scsi_dma_count(default_instance);
569 #ifdef OLDDMA
571 /* if we've finished a read, copy out the data we read */
572 if(sun3_dma_orig_addr) {
573 /* check for residual bytes after dma end */
574 if(count && (NCR5380_read(BUS_AND_STATUS_REG) &
575 (BASR_PHASE_MATCH | BASR_ACK))) {
576 printk("scsi%d: sun3_scsi_finish: read overrun baby... ", default_instance->host_no);
577 printk("basr now %02x\n", NCR5380_read(BUS_AND_STATUS_REG));
578 ret = count;
581 /* copy in what we dma'd no matter what */
582 memcpy(sun3_dma_orig_addr, dmabuf, sun3_dma_orig_count);
583 sun3_dma_orig_addr = NULL;
586 #else
588 fifo = dregs->fifo_count;
589 last_residual = fifo;
591 /* empty bytes from the fifo which didn't make it */
592 if((!write_flag) && (count - fifo) == 2) {
593 unsigned short data;
594 unsigned char *vaddr;
596 data = dregs->fifo_data;
597 vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
599 vaddr += (sun3_dma_orig_count - fifo);
601 vaddr[-2] = (data & 0xff00) >> 8;
602 vaddr[-1] = (data & 0xff);
605 dvma_unmap(sun3_dma_orig_addr);
606 sun3_dma_orig_addr = NULL;
607 #endif
608 sun3_udc_write(UDC_RESET, UDC_CSR);
609 dregs->fifo_count = 0;
610 dregs->csr &= ~CSR_SEND;
612 /* reset fifo */
613 dregs->csr &= ~CSR_FIFO;
614 dregs->csr |= CSR_FIFO;
616 sun3_dma_setup_done = NULL;
618 return ret;
622 #include "sun3_NCR5380.c"
624 static Scsi_Host_Template driver_template = {
625 .name = SUN3_SCSI_NAME,
626 .detect = sun3scsi_detect,
627 .release = sun3scsi_release,
628 .info = sun3scsi_info,
629 .queuecommand = sun3scsi_queue_command,
630 .eh_abort_handler = sun3scsi_abort,
631 .eh_bus_reset_handler = sun3scsi_bus_reset,
632 .can_queue = CAN_QUEUE,
633 .this_id = 7,
634 .sg_tablesize = SG_TABLESIZE,
635 .cmd_per_lun = CMD_PER_LUN,
636 .use_clustering = DISABLE_CLUSTERING
640 #include "scsi_module.c"
642 MODULE_LICENSE("GPL");