drivers/serial/clps711x.c

   1 /*
   2  *  linux/drivers/char/clps711x.c
   3  *
   4  *  Driver for CLPS711x serial ports
   5  *
   6  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   7  *
   8  *  Copyright 1999 ARM Limited
   9  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  24  *
  25  *  $Id: clps711x.c,v 1.42 2002/07/28 10:03:28 rmk Exp $
  26  *
  27  */
  28 #include <linux/config.h>
  29
  30 #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  31 #define SUPPORT_SYSRQ
  32 #endif
  33
  34 #include <linux/module.h>
  35 #include <linux/ioport.h>
  36 #include <linux/init.h>
  37 #include <linux/console.h>
  38 #include <linux/sysrq.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/device.h>
  41 #include <linux/tty.h>
  42 #include <linux/tty_flip.h>
  43 #include <linux/serial_core.h>
  44 #include <linux/serial.h>
  45
  46 #include <asm/hardware.h>
  47 #include <asm/io.h>
  48 #include <asm/irq.h>
  49 #include <asm/hardware/clps7111.h>
  50
  51 #define UART_NR         2
  52
  53 #define SERIAL_CLPS711X_MAJOR   204
  54 #define SERIAL_CLPS711X_MINOR   40
  55 #define SERIAL_CLPS711X_NR      UART_NR
  56
  57 /*
  58  * We use the relevant SYSCON register as a base address for these ports.
  59  */
  60 #define UBRLCR(port)            ((port)->iobase + UBRLCR1 - SYSCON1)
  61 #define UARTDR(port)            ((port)->iobase + UARTDR1 - SYSCON1)
  62 #define SYSFLG(port)            ((port)->iobase + SYSFLG1 - SYSCON1)
  63 #define SYSCON(port)            ((port)->iobase + SYSCON1 - SYSCON1)
  64
  65 #define TX_IRQ(port)            ((port)->irq)
  66 #define RX_IRQ(port)            ((port)->irq + 1)
  67
  68 #define UART_ANY_ERR            (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR)
  69
  70 #define tx_enabled(port)        ((port)->unused[0])
  71
  72 static void
  73 clps711xuart_stop_tx(struct uart_port *port, unsigned int tty_stop)
  74 {
  75         if (tx_enabled(port)) {
  76                 disable_irq(TX_IRQ(port));
  77                 tx_enabled(port) = 0;
  78         }
  79 }
  80
  81 static void
  82 clps711xuart_start_tx(struct uart_port *port, unsigned int tty_start)
  83 {
  84         if (!tx_enabled(port)) {
  85                 enable_irq(TX_IRQ(port));
  86                 tx_enabled(port) = 1;
  87         }
  88 }
  89
  90 static void clps711xuart_stop_rx(struct uart_port *port)
  91 {
  92         disable_irq(RX_IRQ(port));
  93 }
  94
  95 static void clps711xuart_enable_ms(struct uart_port *port)
  96 {
  97 }
  98
  99 static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id, struct pt_regs *regs)
 100 {
 101         struct uart_port *port = dev_id;
 102         struct tty_struct *tty = port->info->tty;
 103         unsigned int status, ch, flg, ignored = 0;
 104
 105         status = clps_readl(SYSFLG(port));
 106         while (!(status & SYSFLG_URXFE)) {
 107                 ch = clps_readl(UARTDR(port));
 108
 109                 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
 110                         goto ignore_char;
 111                 port->icount.rx++;
 112
 113                 flg = TTY_NORMAL;
 114
 115                 /*
 116                  * Note that the error handling code is
 117                  * out of the main execution path
 118                  */
 119                 if (unlikely(ch & UART_ANY_ERR)) {
 120                         if (ch & UARTDR_PARERR)
 121                                 port->icount.parity++;
 122                         else if (ch & UARTDR_FRMERR)
 123                                 port->icount.frame++;
 124                         if (ch & UARTDR_OVERR)
 125                                 port->icount.overrun++;
 126
 127                         ch &= port->read_status_mask;
 128
 129                         if (ch & UARTDR_PARERR)
 130                                 flg = TTY_PARITY;
 131                         else if (ch & UARTDR_FRMERR)
 132                                 flg = TTY_FRAME;
 133
 134 #ifdef SUPPORT_SYSRQ
 135                         port->sysrq = 0;
 136 #endif
 137                 }
 138
 139                 if (uart_handle_sysrq_char(port, ch, regs))
 140                         goto ignore_char;
 141
 142                 /*
 143                  * CHECK: does overrun affect the current character?
 144                  * ASSUMPTION: it does not.
 145                  */
 146                 if ((ch & port->ignore_status_mask & ~RXSTAT_OVERRUN) == 0)
 147                         tty_insert_flip_char(tty, ch, flg);
 148                 if ((ch & ~port->ignore_status_mask & RXSTAT_OVERRUN) == 0)
 149                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 150
 151         ignore_char:
 152                 status = clps_readl(SYSFLG(port));
 153         }
 154         tty_flip_buffer_push(tty);
 155         return IRQ_HANDLED;
 156 }
 157
 158 static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id, struct pt_regs *regs)
 159 {
 160         struct uart_port *port = dev_id;
 161         struct circ_buf *xmit = &port->info->xmit;
 162         int count;
 163
 164         if (port->x_char) {
 165                 clps_writel(port->x_char, UARTDR(port));
 166                 port->icount.tx++;
 167                 port->x_char = 0;
 168                 return IRQ_HANDLED;
 169         }
 170         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 171                 clps711xuart_stop_tx(port, 0);
 172                 return IRQ_HANDLED;
 173         }
 174
 175         count = port->fifosize >> 1;
 176         do {
 177                 clps_writel(xmit->buf[xmit->tail], UARTDR(port));
 178                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 179                 port->icount.tx++;
 180                 if (uart_circ_empty(xmit))
 181                         break;
 182         } while (--count > 0);
 183
 184         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 185                 uart_write_wakeup(port);
 186
 187         if (uart_circ_empty(xmit))
 188                 clps711xuart_stop_tx(port, 0);
 189
 190         return IRQ_HANDLED;
 191 }
 192
 193 static unsigned int clps711xuart_tx_empty(struct uart_port *port)
 194 {
 195         unsigned int status = clps_readl(SYSFLG(port));
 196         return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT;
 197 }
 198
 199 static unsigned int clps711xuart_get_mctrl(struct uart_port *port)
 200 {
 201         unsigned int port_addr;
 202         unsigned int result = 0;
 203         unsigned int status;
 204
 205         port_addr = SYSFLG(port);
 206         if (port_addr == SYSFLG1) {
 207                 status = clps_readl(SYSFLG1);
 208                 if (status & SYSFLG1_DCD)
 209                         result |= TIOCM_CAR;
 210                 if (status & SYSFLG1_DSR)
 211                         result |= TIOCM_DSR;
 212                 if (status & SYSFLG1_CTS)
 213                         result |= TIOCM_CTS;
 214         }
 215
 216         return result;
 217 }
 218
 219 static void
 220 clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
 221 {
 222 }
 223
 224 static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
 225 {
 226         unsigned long flags;
 227         unsigned int ubrlcr;
 228
 229         spin_lock_irqsave(&port->lock, flags);
 230         ubrlcr = clps_readl(UBRLCR(port));
 231         if (break_state == -1)
 232                 ubrlcr |= UBRLCR_BREAK;
 233         else
 234                 ubrlcr &= ~UBRLCR_BREAK;
 235         clps_writel(ubrlcr, UBRLCR(port));
 236         spin_unlock_irqrestore(&port->lock, flags);
 237 }
 238
 239 static int clps711xuart_startup(struct uart_port *port)
 240 {
 241         unsigned int syscon;
 242         int retval;
 243
 244         tx_enabled(port) = 1;
 245
 246         /*
 247          * Allocate the IRQs
 248          */
 249         retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0,
 250                              "clps711xuart_tx", port);
 251         if (retval)
 252                 return retval;
 253
 254         retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0,
 255                              "clps711xuart_rx", port);
 256         if (retval) {
 257                 free_irq(TX_IRQ(port), port);
 258                 return retval;
 259         }
 260
 261         /*
 262          * enable the port
 263          */
 264         syscon = clps_readl(SYSCON(port));
 265         syscon |= SYSCON_UARTEN;
 266         clps_writel(syscon, SYSCON(port));
 267
 268         return 0;
 269 }
 270
 271 static void clps711xuart_shutdown(struct uart_port *port)
 272 {
 273         unsigned int ubrlcr, syscon;
 274
 275         /*
 276          * Free the interrupt
 277          */
 278         free_irq(TX_IRQ(port), port);   /* TX interrupt */
 279         free_irq(RX_IRQ(port), port);   /* RX interrupt */
 280
 281         /*
 282          * disable the port
 283          */
 284         syscon = clps_readl(SYSCON(port));
 285         syscon &= ~SYSCON_UARTEN;
 286         clps_writel(syscon, SYSCON(port));
 287
 288         /*
 289          * disable break condition and fifos
 290          */
 291         ubrlcr = clps_readl(UBRLCR(port));
 292         ubrlcr &= ~(UBRLCR_FIFOEN | UBRLCR_BREAK);
 293         clps_writel(ubrlcr, UBRLCR(port));
 294 }
 295
 296 static void
 297 clps711xuart_set_termios(struct uart_port *port, struct termios *termios,
 298                          struct termios *old)
 299 {
 300         unsigned int ubrlcr, baud, quot;
 301         unsigned long flags;
 302
 303         /*
 304          * We don't implement CREAD.
 305          */
 306         termios->c_cflag |= CREAD;
 307
 308         /*
 309          * Ask the core to calculate the divisor for us.
 310          */
 311         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 312         quot = uart_get_divisor(port, baud);
 313
 314         switch (termios->c_cflag & CSIZE) {
 315         case CS5:
 316                 ubrlcr = UBRLCR_WRDLEN5;
 317                 break;
 318         case CS6:
 319                 ubrlcr = UBRLCR_WRDLEN6;
 320                 break;
 321         case CS7:
 322                 ubrlcr = UBRLCR_WRDLEN7;
 323                 break;
 324         default: // CS8
 325                 ubrlcr = UBRLCR_WRDLEN8;
 326                 break;
 327         }
 328         if (termios->c_cflag & CSTOPB)
 329                 ubrlcr |= UBRLCR_XSTOP;
 330         if (termios->c_cflag & PARENB) {
 331                 ubrlcr |= UBRLCR_PRTEN;
 332                 if (!(termios->c_cflag & PARODD))
 333                         ubrlcr |= UBRLCR_EVENPRT;
 334         }
 335         if (port->fifosize > 1)
 336                 ubrlcr |= UBRLCR_FIFOEN;
 337
 338         spin_lock_irqsave(&port->lock, flags);
 339
 340         /*
 341          * Update the per-port timeout.
 342          */
 343         uart_update_timeout(port, termios->c_cflag, baud);
 344
 345         port->read_status_mask = UARTDR_OVERR;
 346         if (termios->c_iflag & INPCK)
 347                 port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
 348
 349         /*
 350          * Characters to ignore
 351          */
 352         port->ignore_status_mask = 0;
 353         if (termios->c_iflag & IGNPAR)
 354                 port->ignore_status_mask |= UARTDR_FRMERR | UARTDR_PARERR;
 355         if (termios->c_iflag & IGNBRK) {
 356                 /*
 357                  * If we're ignoring parity and break indicators,
 358                  * ignore overruns to (for real raw support).
 359                  */
 360                 if (termios->c_iflag & IGNPAR)
 361                         port->ignore_status_mask |= UARTDR_OVERR;
 362         }
 363
 364         quot -= 1;
 365
 366         clps_writel(ubrlcr | quot, UBRLCR(port));
 367
 368         spin_unlock_irqrestore(&port->lock, flags);
 369 }
 370
 371 static const char *clps711xuart_type(struct uart_port *port)
 372 {
 373         return port->type == PORT_CLPS711X ? "CLPS711x" : NULL;
 374 }
 375
 376 /*
 377  * Configure/autoconfigure the port.
 378  */
 379 static void clps711xuart_config_port(struct uart_port *port, int flags)
 380 {
 381         if (flags & UART_CONFIG_TYPE)
 382                 port->type = PORT_CLPS711X;
 383 }
 384
 385 static void clps711xuart_release_port(struct uart_port *port)
 386 {
 387 }
 388
 389 static int clps711xuart_request_port(struct uart_port *port)
 390 {
 391         return 0;
 392 }
 393
 394 static struct uart_ops clps711x_pops = {
 395         .tx_empty       = clps711xuart_tx_empty,
 396         .set_mctrl      = clps711xuart_set_mctrl_null,
 397         .get_mctrl      = clps711xuart_get_mctrl,
 398         .stop_tx        = clps711xuart_stop_tx,
 399         .start_tx       = clps711xuart_start_tx,
 400         .stop_rx        = clps711xuart_stop_rx,
 401         .enable_ms      = clps711xuart_enable_ms,
 402         .break_ctl      = clps711xuart_break_ctl,
 403         .startup        = clps711xuart_startup,
 404         .shutdown       = clps711xuart_shutdown,
 405         .set_termios    = clps711xuart_set_termios,
 406         .type           = clps711xuart_type,
 407         .config_port    = clps711xuart_config_port,
 408         .release_port   = clps711xuart_release_port,
 409         .request_port   = clps711xuart_request_port,
 410 };
 411
 412 static struct uart_port clps711x_ports[UART_NR] = {
 413         {
 414                 .iobase         = SYSCON1,
 415                 .irq            = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */
 416                 .uartclk        = 3686400,
 417                 .fifosize       = 16,
 418                 .ops            = &clps711x_pops,
 419                 .line           = 0,
 420                 .flags          = ASYNC_BOOT_AUTOCONF,
 421         },
 422         {
 423                 .iobase         = SYSCON2,
 424                 .irq            = IRQ_UTXINT2, /* IRQ_URXINT2 */
 425                 .uartclk        = 3686400,
 426                 .fifosize       = 16,
 427                 .ops            = &clps711x_pops,
 428                 .line           = 1,
 429                 .flags          = ASYNC_BOOT_AUTOCONF,
 430         }
 431 };
 432
 433 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
 434 /*
 435  *      Print a string to the serial port trying not to disturb
 436  *      any possible real use of the port...
 437  *
 438  *      The console_lock must be held when we get here.
 439  *
 440  *      Note that this is called with interrupts already disabled
 441  */
 442 static void
 443 clps711xuart_console_write(struct console *co, const char *s,
 444                            unsigned int count)
 445 {
 446         struct uart_port *port = clps711x_ports + co->index;
 447         unsigned int status, syscon;
 448         int i;
 449
 450         /*
 451          *      Ensure that the port is enabled.
 452          */
 453         syscon = clps_readl(SYSCON(port));
 454         clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
 455
 456         /*
 457          *      Now, do each character
 458          */
 459         for (i = 0; i < count; i++) {
 460                 do {
 461                         status = clps_readl(SYSFLG(port));
 462                 } while (status & SYSFLG_UTXFF);
 463                 clps_writel(s[i], UARTDR(port));
 464                 if (s[i] == '\n') {
 465                         do {
 466                                 status = clps_readl(SYSFLG(port));
 467                         } while (status & SYSFLG_UTXFF);
 468                         clps_writel('\r', UARTDR(port));
 469                 }
 470         }
 471
 472         /*
 473          *      Finally, wait for transmitter to become empty
 474          *      and restore the uart state.
 475          */
 476         do {
 477                 status = clps_readl(SYSFLG(port));
 478         } while (status & SYSFLG_UBUSY);
 479
 480         clps_writel(syscon, SYSCON(port));
 481 }
 482
 483 static void __init
 484 clps711xuart_console_get_options(struct uart_port *port, int *baud,
 485                                  int *parity, int *bits)
 486 {
 487         if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
 488                 unsigned int ubrlcr, quot;
 489
 490                 ubrlcr = clps_readl(UBRLCR(port));
 491
 492                 *parity = 'n';
 493                 if (ubrlcr & UBRLCR_PRTEN) {
 494                         if (ubrlcr & UBRLCR_EVENPRT)
 495                                 *parity = 'e';
 496                         else
 497                                 *parity = 'o';
 498                 }
 499
 500                 if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
 501                         *bits = 7;
 502                 else
 503                         *bits = 8;
 504
 505                 quot = ubrlcr & UBRLCR_BAUD_MASK;
 506                 *baud = port->uartclk / (16 * (quot + 1));
 507         }
 508 }
 509
 510 static int __init clps711xuart_console_setup(struct console *co, char *options)
 511 {
 512         struct uart_port *port;
 513         int baud = 38400;
 514         int bits = 8;
 515         int parity = 'n';
 516         int flow = 'n';
 517
 518         /*
 519          * Check whether an invalid uart number has been specified, and
 520          * if so, search for the first available port that does have
 521          * console support.
 522          */
 523         port = uart_get_console(clps711x_ports, UART_NR, co);
 524
 525         if (options)
 526                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 527         else
 528                 clps711xuart_console_get_options(port, &baud, &parity, &bits);
 529
 530         return uart_set_options(port, co, baud, parity, bits, flow);
 531 }
 532
 533 extern struct uart_driver clps711x_reg;
 534 static struct console clps711x_console = {
 535         .name           = "ttyCL",
 536         .write          = clps711xuart_console_write,
 537         .device         = uart_console_device,
 538         .setup          = clps711xuart_console_setup,
 539         .flags          = CON_PRINTBUFFER,
 540         .index          = -1,
 541         .data           = &clps711x_reg,
 542 };
 543
 544 static int __init clps711xuart_console_init(void)
 545 {
 546         register_console(&clps711x_console);
 547         return 0;
 548 }
 549 console_initcall(clps711xuart_console_init);
 550
 551 #define CLPS711X_CONSOLE        &clps711x_console
 552 #else
 553 #define CLPS711X_CONSOLE        NULL
 554 #endif
 555
 556 static struct uart_driver clps711x_reg = {
 557         .driver_name            = "ttyCL",
 558         .dev_name               = "ttyCL",
 559         .major                  = SERIAL_CLPS711X_MAJOR,
 560         .minor                  = SERIAL_CLPS711X_MINOR,
 561         .nr                     = UART_NR,
 562
 563         .cons                   = CLPS711X_CONSOLE,
 564 };
 565
 566 static int __init clps711xuart_init(void)
 567 {
 568         int ret, i;
 569
 570         printk(KERN_INFO "Serial: CLPS711x driver $Revision: 1.42 $\n");
 571
 572         ret = uart_register_driver(&clps711x_reg);
 573         if (ret)
 574                 return ret;
 575
 576         for (i = 0; i < UART_NR; i++)
 577                 uart_add_one_port(&clps711x_reg, &clps711x_ports[i]);
 578
 579         return 0;
 580 }
 581
 582 static void __exit clps711xuart_exit(void)
 583 {
 584         int i;
 585
 586         for (i = 0; i < UART_NR; i++)
 587                 uart_remove_one_port(&clps711x_reg, &clps711x_ports[i]);
 588
 589         uart_unregister_driver(&clps711x_reg);
 590 }
 591
 592 module_init(clps711xuart_init);
 593 module_exit(clps711xuart_exit);
 594
 595 MODULE_AUTHOR("Deep Blue Solutions Ltd");
 596 MODULE_DESCRIPTION("CLPS-711x generic serial driver $Revision: 1.42 $");
 597 MODULE_LICENSE("GPL");
 598 MODULE_ALIAS_CHARDEV(SERIAL_CLPS711X_MAJOR, SERIAL_CLPS711X_MINOR);