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[PATCH] ppc32: Fix address checking on lmw/stmw align exception
[linux-2.6/verdex.git] / drivers / serial / sa1100.c
blob157218bc6c6fba4ddbce2e2294d381903a620eb5
1 /*
2 * linux/drivers/char/sa1100.c
3 *
4 * Driver for SA11x0 serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Copyright (C) 2000 Deep Blue Solutions Ltd.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 * $Id: sa1100.c,v 1.50 2002/07/29 14:41:04 rmk Exp $
25 *
26 */
27 #include <linux/config.h>
28
29 #if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
30 #define SUPPORT_SYSRQ
31 #endif
32
33 #include <linux/module.h>
34 #include <linux/ioport.h>
35 #include <linux/init.h>
36 #include <linux/console.h>
37 #include <linux/sysrq.h>
38 #include <linux/device.h>
39 #include <linux/tty.h>
40 #include <linux/tty_flip.h>
41 #include <linux/serial_core.h>
42 #include <linux/serial.h>
43
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/hardware.h>
47 #include <asm/mach/serial_sa1100.h>
48
49 /* We've been assigned a range on the "Low-density serial ports" major */
50 #define SERIAL_SA1100_MAJOR 204
51 #define MINOR_START 5
52
53 #define NR_PORTS 3
54
55 #define SA1100_ISR_PASS_LIMIT 256
56
57 /*
58 * Convert from ignore_status_mask or read_status_mask to UTSR[01]
59 */
60 #define SM_TO_UTSR0(x) ((x) & 0xff)
61 #define SM_TO_UTSR1(x) ((x) >> 8)
62 #define UTSR0_TO_SM(x) ((x))
63 #define UTSR1_TO_SM(x) ((x) << 8)
64
65 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
66 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
67 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
68 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
69 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
70 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
71 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
72
73 #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
74 #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
75 #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
76 #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
77 #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
78 #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
79 #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
80
81 /*
82 * This is the size of our serial port register set.
83 */
84 #define UART_PORT_SIZE 0x24
85
86 /*
87 * This determines how often we check the modem status signals
88 * for any change. They generally aren't connected to an IRQ
89 * so we have to poll them. We also check immediately before
90 * filling the TX fifo incase CTS has been dropped.
91 */
92 #define MCTRL_TIMEOUT (250*HZ/1000)
93
94 struct sa1100_port {
95 struct uart_port port;
96 struct timer_list timer;
97 unsigned int old_status;
98 };
99
100 /*
101 * Handle any change of modem status signal since we were last called.
102 */
103 static void sa1100_mctrl_check(struct sa1100_port *sport)
104 {
105 unsigned int status, changed;
106
107 status = sport->port.ops->get_mctrl(&sport->port);
108 changed = status ^ sport->old_status;
109
110 if (changed == 0)
111 return;
112
113 sport->old_status = status;
114
115 if (changed & TIOCM_RI)
116 sport->port.icount.rng++;
117 if (changed & TIOCM_DSR)
118 sport->port.icount.dsr++;
119 if (changed & TIOCM_CAR)
120 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
121 if (changed & TIOCM_CTS)
122 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
123
124 wake_up_interruptible(&sport->port.info->delta_msr_wait);
125 }
126
127 /*
128 * This is our per-port timeout handler, for checking the
129 * modem status signals.
130 */
131 static void sa1100_timeout(unsigned long data)
132 {
133 struct sa1100_port *sport = (struct sa1100_port *)data;
134 unsigned long flags;
135
136 if (sport->port.info) {
137 spin_lock_irqsave(&sport->port.lock, flags);
138 sa1100_mctrl_check(sport);
139 spin_unlock_irqrestore(&sport->port.lock, flags);
140
141 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
142 }
143 }
144
145 /*
146 * interrupts disabled on entry
147 */
148 static void sa1100_stop_tx(struct uart_port *port, unsigned int tty_stop)
149 {
150 struct sa1100_port *sport = (struct sa1100_port *)port;
151 u32 utcr3;
152
153 utcr3 = UART_GET_UTCR3(sport);
154 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
155 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
156 }
157
158 /*
159 * interrupts may not be disabled on entry
160 */
161 static void sa1100_start_tx(struct uart_port *port, unsigned int tty_start)
162 {
163 struct sa1100_port *sport = (struct sa1100_port *)port;
164 unsigned long flags;
165 u32 utcr3;
166
167 spin_lock_irqsave(&sport->port.lock, flags);
168 utcr3 = UART_GET_UTCR3(sport);
169 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
170 UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
171 spin_unlock_irqrestore(&sport->port.lock, flags);
172 }
173
174 /*
175 * Interrupts enabled
176 */
177 static void sa1100_stop_rx(struct uart_port *port)
178 {
179 struct sa1100_port *sport = (struct sa1100_port *)port;
180 u32 utcr3;
181
182 utcr3 = UART_GET_UTCR3(sport);
183 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
184 }
185
186 /*
187 * Set the modem control timer to fire immediately.
188 */
189 static void sa1100_enable_ms(struct uart_port *port)
190 {
191 struct sa1100_port *sport = (struct sa1100_port *)port;
192
193 mod_timer(&sport->timer, jiffies);
194 }
195
196 static void
197 sa1100_rx_chars(struct sa1100_port *sport, struct pt_regs *regs)
198 {
199 struct tty_struct *tty = sport->port.info->tty;
200 unsigned int status, ch, flg, ignored = 0;
201
202 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
203 UTSR0_TO_SM(UART_GET_UTSR0(sport));
204 while (status & UTSR1_TO_SM(UTSR1_RNE)) {
205 ch = UART_GET_CHAR(sport);
206
207 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
208 goto ignore_char;
209 sport->port.icount.rx++;
210
211 flg = TTY_NORMAL;
212
213 /*
214 * note that the error handling code is
215 * out of the main execution path
216 */
217 if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
218 if (status & UTSR1_TO_SM(UTSR1_PRE))
219 sport->port.icount.parity++;
220 else if (status & UTSR1_TO_SM(UTSR1_FRE))
221 sport->port.icount.frame++;
222 if (status & UTSR1_TO_SM(UTSR1_ROR))
223 sport->port.icount.overrun++;
224
225 status &= sport->port.read_status_mask;
226
227 if (status & UTSR1_TO_SM(UTSR1_PRE))
228 flg = TTY_PARITY;
229 else if (status & UTSR1_TO_SM(UTSR1_FRE))
230 flg = TTY_FRAME;
231
232 #ifdef SUPPORT_SYSRQ
233 sport->port.sysrq = 0;
234 #endif
235 }
236
237 if (uart_handle_sysrq_char(&sport->port, ch, regs))
238 goto ignore_char;
239
240 if ((status & port->ignore_status_mask & ~UTSR1_TO_SM(UTSR1_ROR)) == 0)
241 tty_insert_flip_char(tty, ch, flg);
242 if (status & ~port->ignore_status_mask & UTSR1_TO_SM(UTSR1_ROR))
243 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
244
245 ignore_char:
246 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
247 UTSR0_TO_SM(UART_GET_UTSR0(sport));
248 }
249 tty_flip_buffer_push(tty);
250 }
251
252 static void sa1100_tx_chars(struct sa1100_port *sport)
253 {
254 struct circ_buf *xmit = &sport->port.info->xmit;
255
256 if (sport->port.x_char) {
257 UART_PUT_CHAR(sport, sport->port.x_char);
258 sport->port.icount.tx++;
259 sport->port.x_char = 0;
260 return;
261 }
262
263 /*
264 * Check the modem control lines before
265 * transmitting anything.
266 */
267 sa1100_mctrl_check(sport);
268
269 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
270 sa1100_stop_tx(&sport->port, 0);
271 return;
272 }
273
274 /*
275 * Tried using FIFO (not checking TNF) for fifo fill:
276 * still had the '4 bytes repeated' problem.
277 */
278 while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
279 UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
280 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
281 sport->port.icount.tx++;
282 if (uart_circ_empty(xmit))
283 break;
284 }
285
286 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
287 uart_write_wakeup(&sport->port);
288
289 if (uart_circ_empty(xmit))
290 sa1100_stop_tx(&sport->port, 0);
291 }
292
293 static irqreturn_t sa1100_int(int irq, void *dev_id, struct pt_regs *regs)
294 {
295 struct sa1100_port *sport = dev_id;
296 unsigned int status, pass_counter = 0;
297
298 spin_lock(&sport->port.lock);
299 status = UART_GET_UTSR0(sport);
300 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
301 do {
302 if (status & (UTSR0_RFS | UTSR0_RID)) {
303 /* Clear the receiver idle bit, if set */
304 if (status & UTSR0_RID)
305 UART_PUT_UTSR0(sport, UTSR0_RID);
306 sa1100_rx_chars(sport, regs);
307 }
308
309 /* Clear the relevant break bits */
310 if (status & (UTSR0_RBB | UTSR0_REB))
311 UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
312
313 if (status & UTSR0_RBB)
314 sport->port.icount.brk++;
315
316 if (status & UTSR0_REB)
317 uart_handle_break(&sport->port);
318
319 if (status & UTSR0_TFS)
320 sa1100_tx_chars(sport);
321 if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
322 break;
323 status = UART_GET_UTSR0(sport);
324 status &= SM_TO_UTSR0(sport->port.read_status_mask) |
325 ~UTSR0_TFS;
326 } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
327 spin_unlock(&sport->port.lock);
328
329 return IRQ_HANDLED;
330 }
331
332 /*
333 * Return TIOCSER_TEMT when transmitter is not busy.
334 */
335 static unsigned int sa1100_tx_empty(struct uart_port *port)
336 {
337 struct sa1100_port *sport = (struct sa1100_port *)port;
338
339 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
340 }
341
342 static unsigned int sa1100_get_mctrl(struct uart_port *port)
343 {
344 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
345 }
346
347 static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
348 {
349 }
350
351 /*
352 * Interrupts always disabled.
353 */
354 static void sa1100_break_ctl(struct uart_port *port, int break_state)
355 {
356 struct sa1100_port *sport = (struct sa1100_port *)port;
357 unsigned long flags;
358 unsigned int utcr3;
359
360 spin_lock_irqsave(&sport->port.lock, flags);
361 utcr3 = UART_GET_UTCR3(sport);
362 if (break_state == -1)
363 utcr3 |= UTCR3_BRK;
364 else
365 utcr3 &= ~UTCR3_BRK;
366 UART_PUT_UTCR3(sport, utcr3);
367 spin_unlock_irqrestore(&sport->port.lock, flags);
368 }
369
370 static int sa1100_startup(struct uart_port *port)
371 {
372 struct sa1100_port *sport = (struct sa1100_port *)port;
373 int retval;
374
375 /*
376 * Allocate the IRQ
377 */
378 retval = request_irq(sport->port.irq, sa1100_int, 0,
379 "sa11x0-uart", sport);
380 if (retval)
381 return retval;
382
383 /*
384 * Finally, clear and enable interrupts
385 */
386 UART_PUT_UTSR0(sport, -1);
387 UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
388
389 /*
390 * Enable modem status interrupts
391 */
392 spin_lock_irq(&sport->port.lock);
393 sa1100_enable_ms(&sport->port);
394 spin_unlock_irq(&sport->port.lock);
395
396 return 0;
397 }
398
399 static void sa1100_shutdown(struct uart_port *port)
400 {
401 struct sa1100_port *sport = (struct sa1100_port *)port;
402
403 /*
404 * Stop our timer.
405 */
406 del_timer_sync(&sport->timer);
407
408 /*
409 * Free the interrupt
410 */
411 free_irq(sport->port.irq, sport);
412
413 /*
414 * Disable all interrupts, port and break condition.
415 */
416 UART_PUT_UTCR3(sport, 0);
417 }
418
419 static void
420 sa1100_set_termios(struct uart_port *port, struct termios *termios,
421 struct termios *old)
422 {
423 struct sa1100_port *sport = (struct sa1100_port *)port;
424 unsigned long flags;
425 unsigned int utcr0, old_utcr3, baud, quot;
426 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
427
428 /*
429 * We only support CS7 and CS8.
430 */
431 while ((termios->c_cflag & CSIZE) != CS7 &&
432 (termios->c_cflag & CSIZE) != CS8) {
433 termios->c_cflag &= ~CSIZE;
434 termios->c_cflag |= old_csize;
435 old_csize = CS8;
436 }
437
438 if ((termios->c_cflag & CSIZE) == CS8)
439 utcr0 = UTCR0_DSS;
440 else
441 utcr0 = 0;
442
443 if (termios->c_cflag & CSTOPB)
444 utcr0 |= UTCR0_SBS;
445 if (termios->c_cflag & PARENB) {
446 utcr0 |= UTCR0_PE;
447 if (!(termios->c_cflag & PARODD))
448 utcr0 |= UTCR0_OES;
449 }
450
451 /*
452 * Ask the core to calculate the divisor for us.
453 */
454 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
455 quot = uart_get_divisor(port, baud);
456
457 spin_lock_irqsave(&sport->port.lock, flags);
458
459 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
460 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
461 if (termios->c_iflag & INPCK)
462 sport->port.read_status_mask |=
463 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
464 if (termios->c_iflag & (BRKINT | PARMRK))
465 sport->port.read_status_mask |=
466 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
467
468 /*
469 * Characters to ignore
470 */
471 sport->port.ignore_status_mask = 0;
472 if (termios->c_iflag & IGNPAR)
473 sport->port.ignore_status_mask |=
474 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
475 if (termios->c_iflag & IGNBRK) {
476 sport->port.ignore_status_mask |=
477 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
478 /*
479 * If we're ignoring parity and break indicators,
480 * ignore overruns too (for real raw support).
481 */
482 if (termios->c_iflag & IGNPAR)
483 sport->port.ignore_status_mask |=
484 UTSR1_TO_SM(UTSR1_ROR);
485 }
486
487 del_timer_sync(&sport->timer);
488
489 /*
490 * Update the per-port timeout.
491 */
492 uart_update_timeout(port, termios->c_cflag, baud);
493
494 /*
495 * disable interrupts and drain transmitter
496 */
497 old_utcr3 = UART_GET_UTCR3(sport);
498 UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
499
500 while (UART_GET_UTSR1(sport) & UTSR1_TBY)
501 barrier();
502
503 /* then, disable everything */
504 UART_PUT_UTCR3(sport, 0);
505
506 /* set the parity, stop bits and data size */
507 UART_PUT_UTCR0(sport, utcr0);
508
509 /* set the baud rate */
510 quot -= 1;
511 UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
512 UART_PUT_UTCR2(sport, (quot & 0xff));
513
514 UART_PUT_UTSR0(sport, -1);
515
516 UART_PUT_UTCR3(sport, old_utcr3);
517
518 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
519 sa1100_enable_ms(&sport->port);
520
521 spin_unlock_irqrestore(&sport->port.lock, flags);
522 }
523
524 static const char *sa1100_type(struct uart_port *port)
525 {
526 struct sa1100_port *sport = (struct sa1100_port *)port;
527
528 return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
529 }
530
531 /*
532 * Release the memory region(s) being used by 'port'.
533 */
534 static void sa1100_release_port(struct uart_port *port)
535 {
536 struct sa1100_port *sport = (struct sa1100_port *)port;
537
538 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
539 }
540
541 /*
542 * Request the memory region(s) being used by 'port'.
543 */
544 static int sa1100_request_port(struct uart_port *port)
545 {
546 struct sa1100_port *sport = (struct sa1100_port *)port;
547
548 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
549 "sa11x0-uart") != NULL ? 0 : -EBUSY;
550 }
551
552 /*
553 * Configure/autoconfigure the port.
554 */
555 static void sa1100_config_port(struct uart_port *port, int flags)
556 {
557 struct sa1100_port *sport = (struct sa1100_port *)port;
558
559 if (flags & UART_CONFIG_TYPE &&
560 sa1100_request_port(&sport->port) == 0)
561 sport->port.type = PORT_SA1100;
562 }
563
564 /*
565 * Verify the new serial_struct (for TIOCSSERIAL).
566 * The only change we allow are to the flags and type, and
567 * even then only between PORT_SA1100 and PORT_UNKNOWN
568 */
569 static int
570 sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
571 {
572 struct sa1100_port *sport = (struct sa1100_port *)port;
573 int ret = 0;
574
575 if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
576 ret = -EINVAL;
577 if (sport->port.irq != ser->irq)
578 ret = -EINVAL;
579 if (ser->io_type != SERIAL_IO_MEM)
580 ret = -EINVAL;
581 if (sport->port.uartclk / 16 != ser->baud_base)
582 ret = -EINVAL;
583 if ((void *)sport->port.mapbase != ser->iomem_base)
584 ret = -EINVAL;
585 if (sport->port.iobase != ser->port)
586 ret = -EINVAL;
587 if (ser->hub6 != 0)
588 ret = -EINVAL;
589 return ret;
590 }
591
592 static struct uart_ops sa1100_pops = {
593 .tx_empty = sa1100_tx_empty,
594 .set_mctrl = sa1100_set_mctrl,
595 .get_mctrl = sa1100_get_mctrl,
596 .stop_tx = sa1100_stop_tx,
597 .start_tx = sa1100_start_tx,
598 .stop_rx = sa1100_stop_rx,
599 .enable_ms = sa1100_enable_ms,
600 .break_ctl = sa1100_break_ctl,
601 .startup = sa1100_startup,
602 .shutdown = sa1100_shutdown,
603 .set_termios = sa1100_set_termios,
604 .type = sa1100_type,
605 .release_port = sa1100_release_port,
606 .request_port = sa1100_request_port,
607 .config_port = sa1100_config_port,
608 .verify_port = sa1100_verify_port,
609 };
610
611 static struct sa1100_port sa1100_ports[NR_PORTS];
612
613 /*
614 * Setup the SA1100 serial ports. Note that we don't include the IrDA
615 * port here since we have our own SIR/FIR driver (see drivers/net/irda)
616 *
617 * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
618 * Which serial port this ends up being depends on the machine you're
619 * running this kernel on. I'm not convinced that this is a good idea,
620 * but that's the way it traditionally works.
621 *
622 * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
623 * used here.
624 */
625 static void __init sa1100_init_ports(void)
626 {
627 static int first = 1;
628 int i;
629
630 if (!first)
631 return;
632 first = 0;
633
634 for (i = 0; i < NR_PORTS; i++) {
635 sa1100_ports[i].port.uartclk = 3686400;
636 sa1100_ports[i].port.ops = &sa1100_pops;
637 sa1100_ports[i].port.fifosize = 8;
638 sa1100_ports[i].port.line = i;
639 sa1100_ports[i].port.iotype = SERIAL_IO_MEM;
640 init_timer(&sa1100_ports[i].timer);
641 sa1100_ports[i].timer.function = sa1100_timeout;
642 sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];
643 }
644
645 /*
646 * make transmit lines outputs, so that when the port
647 * is closed, the output is in the MARK state.
648 */
649 PPDR |= PPC_TXD1 | PPC_TXD3;
650 PPSR |= PPC_TXD1 | PPC_TXD3;
651 }
652
653 void __init sa1100_register_uart_fns(struct sa1100_port_fns *fns)
654 {
655 if (fns->get_mctrl)
656 sa1100_pops.get_mctrl = fns->get_mctrl;
657 if (fns->set_mctrl)
658 sa1100_pops.set_mctrl = fns->set_mctrl;
659
660 sa1100_pops.pm = fns->pm;
661 sa1100_pops.set_wake = fns->set_wake;
662 }
663
664 void __init sa1100_register_uart(int idx, int port)
665 {
666 if (idx >= NR_PORTS) {
667 printk(KERN_ERR "%s: bad index number %d\n", __FUNCTION__, idx);
668 return;
669 }
670
671 switch (port) {
672 case 1:
673 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
674 sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
675 sa1100_ports[idx].port.irq = IRQ_Ser1UART;
676 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
677 break;
678
679 case 2:
680 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
681 sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
682 sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
683 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
684 break;
685
686 case 3:
687 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
688 sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
689 sa1100_ports[idx].port.irq = IRQ_Ser3UART;
690 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
691 break;
692
693 default:
694 printk(KERN_ERR "%s: bad port number %d\n", __FUNCTION__, port);
695 }
696 }
697
698
699 #ifdef CONFIG_SERIAL_SA1100_CONSOLE
700
701 /*
702 * Interrupts are disabled on entering
703 */
704 static void
705 sa1100_console_write(struct console *co, const char *s, unsigned int count)
706 {
707 struct sa1100_port *sport = &sa1100_ports[co->index];
708 unsigned int old_utcr3, status, i;
709
710 /*
711 * First, save UTCR3 and then disable interrupts
712 */
713 old_utcr3 = UART_GET_UTCR3(sport);
714 UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
715 UTCR3_TXE);
716
717 /*
718 * Now, do each character
719 */
720 for (i = 0; i < count; i++) {
721 do {
722 status = UART_GET_UTSR1(sport);
723 } while (!(status & UTSR1_TNF));
724 UART_PUT_CHAR(sport, s[i]);
725 if (s[i] == '\n') {
726 do {
727 status = UART_GET_UTSR1(sport);
728 } while (!(status & UTSR1_TNF));
729 UART_PUT_CHAR(sport, '\r');
730 }
731 }
732
733 /*
734 * Finally, wait for transmitter to become empty
735 * and restore UTCR3
736 */
737 do {
738 status = UART_GET_UTSR1(sport);
739 } while (status & UTSR1_TBY);
740 UART_PUT_UTCR3(sport, old_utcr3);
741 }
742
743 /*
744 * If the port was already initialised (eg, by a boot loader),
745 * try to determine the current setup.
746 */
747 static void __init
748 sa1100_console_get_options(struct sa1100_port *sport, int *baud,
749 int *parity, int *bits)
750 {
751 unsigned int utcr3;
752
753 utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
754 if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
755 /* ok, the port was enabled */
756 unsigned int utcr0, quot;
757
758 utcr0 = UART_GET_UTCR0(sport);
759
760 *parity = 'n';
761 if (utcr0 & UTCR0_PE) {
762 if (utcr0 & UTCR0_OES)
763 *parity = 'e';
764 else
765 *parity = 'o';
766 }
767
768 if (utcr0 & UTCR0_DSS)
769 *bits = 8;
770 else
771 *bits = 7;
772
773 quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
774 quot &= 0xfff;
775 *baud = sport->port.uartclk / (16 * (quot + 1));
776 }
777 }
778
779 static int __init
780 sa1100_console_setup(struct console *co, char *options)
781 {
782 struct sa1100_port *sport;
783 int baud = 9600;
784 int bits = 8;
785 int parity = 'n';
786 int flow = 'n';
787
788 /*
789 * Check whether an invalid uart number has been specified, and
790 * if so, search for the first available port that does have
791 * console support.
792 */
793 if (co->index == -1 || co->index >= NR_PORTS)
794 co->index = 0;
795 sport = &sa1100_ports[co->index];
796
797 if (options)
798 uart_parse_options(options, &baud, &parity, &bits, &flow);
799 else
800 sa1100_console_get_options(sport, &baud, &parity, &bits);
801
802 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
803 }
804
805 extern struct uart_driver sa1100_reg;
806 static struct console sa1100_console = {
807 .name = "ttySA",
808 .write = sa1100_console_write,
809 .device = uart_console_device,
810 .setup = sa1100_console_setup,
811 .flags = CON_PRINTBUFFER,
812 .index = -1,
813 .data = &sa1100_reg,
814 };
815
816 static int __init sa1100_rs_console_init(void)
817 {
818 sa1100_init_ports();
819 register_console(&sa1100_console);
820 return 0;
821 }
822 console_initcall(sa1100_rs_console_init);
823
824 #define SA1100_CONSOLE &sa1100_console
825 #else
826 #define SA1100_CONSOLE NULL
827 #endif
828
829 static struct uart_driver sa1100_reg = {
830 .owner = THIS_MODULE,
831 .driver_name = "ttySA",
832 .dev_name = "ttySA",
833 .devfs_name = "ttySA",
834 .major = SERIAL_SA1100_MAJOR,
835 .minor = MINOR_START,
836 .nr = NR_PORTS,
837 .cons = SA1100_CONSOLE,
838 };
839
840 static int sa1100_serial_suspend(struct device *_dev, pm_message_t state, u32 level)
841 {
842 struct sa1100_port *sport = dev_get_drvdata(_dev);
843
844 if (sport && level == SUSPEND_DISABLE)
845 uart_suspend_port(&sa1100_reg, &sport->port);
846
847 return 0;
848 }
849
850 static int sa1100_serial_resume(struct device *_dev, u32 level)
851 {
852 struct sa1100_port *sport = dev_get_drvdata(_dev);
853
854 if (sport && level == RESUME_ENABLE)
855 uart_resume_port(&sa1100_reg, &sport->port);
856
857 return 0;
858 }
859
860 static int sa1100_serial_probe(struct device *_dev)
861 {
862 struct platform_device *dev = to_platform_device(_dev);
863 struct resource *res = dev->resource;
864 int i;
865
866 for (i = 0; i < dev->num_resources; i++, res++)
867 if (res->flags & IORESOURCE_MEM)
868 break;
869
870 if (i < dev->num_resources) {
871 for (i = 0; i < NR_PORTS; i++) {
872 if (sa1100_ports[i].port.mapbase != res->start)
873 continue;
874
875 sa1100_ports[i].port.dev = _dev;
876 uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port);
877 dev_set_drvdata(_dev, &sa1100_ports[i]);
878 break;
879 }
880 }
881
882 return 0;
883 }
884
885 static int sa1100_serial_remove(struct device *_dev)
886 {
887 struct sa1100_port *sport = dev_get_drvdata(_dev);
888
889 dev_set_drvdata(_dev, NULL);
890
891 if (sport)
892 uart_remove_one_port(&sa1100_reg, &sport->port);
893
894 return 0;
895 }
896
897 static struct device_driver sa11x0_serial_driver = {
898 .name = "sa11x0-uart",
899 .bus = &platform_bus_type,
900 .probe = sa1100_serial_probe,
901 .remove = sa1100_serial_remove,
902 .suspend = sa1100_serial_suspend,
903 .resume = sa1100_serial_resume,
904 };
905
906 static int __init sa1100_serial_init(void)
907 {
908 int ret;
909
910 printk(KERN_INFO "Serial: SA11x0 driver $Revision: 1.50 $\n");
911
912 sa1100_init_ports();
913
914 ret = uart_register_driver(&sa1100_reg);
915 if (ret == 0) {
916 ret = driver_register(&sa11x0_serial_driver);
917 if (ret)
918 uart_unregister_driver(&sa1100_reg);
919 }
920 return ret;
921 }
922
923 static void __exit sa1100_serial_exit(void)
924 {
925 driver_unregister(&sa11x0_serial_driver);
926 uart_unregister_driver(&sa1100_reg);
927 }
928
929 module_init(sa1100_serial_init);
930 module_exit(sa1100_serial_exit);
931
932 MODULE_AUTHOR("Deep Blue Solutions Ltd");
933 MODULE_DESCRIPTION("SA1100 generic serial port driver $Revision: 1.50 $");
934 MODULE_LICENSE("GPL");
935 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR);
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