3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
10 #include <linux/irq.h>
11 #include <linux/interrupt.h>
12 #include <linux/init.h>
13 #include <linux/config.h>
14 #include <linux/ioport.h>
15 #include <linux/smp_lock.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
19 #include <asm/errno.h>
26 #define MSI_TARGET_CPU first_cpu(cpu_online_map)
28 static DEFINE_SPINLOCK(msi_lock
);
29 static struct msi_desc
* msi_desc
[NR_IRQS
] = { [0 ... NR_IRQS
-1] = NULL
};
30 static kmem_cache_t
* msi_cachep
;
32 static int pci_msi_enable
= 1;
33 static int last_alloc_vector
;
34 static int nr_released_vectors
;
35 static int nr_reserved_vectors
= NR_HP_RESERVED_VECTORS
;
36 static int nr_msix_devices
;
38 #ifndef CONFIG_X86_IO_APIC
39 int vector_irq
[NR_VECTORS
] = { [0 ... NR_VECTORS
- 1] = -1};
40 u8 irq_vector
[NR_IRQ_VECTORS
] = { FIRST_DEVICE_VECTOR
, 0 };
43 static void msi_cache_ctor(void *p
, kmem_cache_t
*cache
, unsigned long flags
)
45 memset(p
, 0, NR_IRQS
* sizeof(struct msi_desc
));
48 static int msi_cache_init(void)
50 msi_cachep
= kmem_cache_create("msi_cache",
51 NR_IRQS
* sizeof(struct msi_desc
),
52 0, SLAB_HWCACHE_ALIGN
, msi_cache_ctor
, NULL
);
59 static void msi_set_mask_bit(unsigned int vector
, int flag
)
61 struct msi_desc
*entry
;
63 entry
= (struct msi_desc
*)msi_desc
[vector
];
64 if (!entry
|| !entry
->dev
|| !entry
->mask_base
)
66 switch (entry
->msi_attrib
.type
) {
72 pos
= (long)entry
->mask_base
;
73 pci_read_config_dword(entry
->dev
, pos
, &mask_bits
);
76 pci_write_config_dword(entry
->dev
, pos
, mask_bits
);
81 int offset
= entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
+
82 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET
;
83 writel(flag
, entry
->mask_base
+ offset
);
92 static void set_msi_affinity(unsigned int vector
, cpumask_t cpu_mask
)
94 struct msi_desc
*entry
;
95 struct msg_address address
;
96 unsigned int irq
= vector
;
97 unsigned int dest_cpu
= first_cpu(cpu_mask
);
99 entry
= (struct msi_desc
*)msi_desc
[vector
];
100 if (!entry
|| !entry
->dev
)
103 switch (entry
->msi_attrib
.type
) {
106 int pos
= pci_find_capability(entry
->dev
, PCI_CAP_ID_MSI
);
111 pci_read_config_dword(entry
->dev
, msi_lower_address_reg(pos
),
112 &address
.lo_address
.value
);
113 address
.lo_address
.value
&= MSI_ADDRESS_DEST_ID_MASK
;
114 address
.lo_address
.value
|= (cpu_physical_id(dest_cpu
) <<
115 MSI_TARGET_CPU_SHIFT
);
116 entry
->msi_attrib
.current_cpu
= cpu_physical_id(dest_cpu
);
117 pci_write_config_dword(entry
->dev
, msi_lower_address_reg(pos
),
118 address
.lo_address
.value
);
119 set_native_irq_info(irq
, cpu_mask
);
122 case PCI_CAP_ID_MSIX
:
124 int offset
= entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
+
125 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
;
127 address
.lo_address
.value
= readl(entry
->mask_base
+ offset
);
128 address
.lo_address
.value
&= MSI_ADDRESS_DEST_ID_MASK
;
129 address
.lo_address
.value
|= (cpu_physical_id(dest_cpu
) <<
130 MSI_TARGET_CPU_SHIFT
);
131 entry
->msi_attrib
.current_cpu
= cpu_physical_id(dest_cpu
);
132 writel(address
.lo_address
.value
, entry
->mask_base
+ offset
);
133 set_native_irq_info(irq
, cpu_mask
);
141 #define set_msi_affinity NULL
142 #endif /* CONFIG_SMP */
144 static void mask_MSI_irq(unsigned int vector
)
146 msi_set_mask_bit(vector
, 1);
149 static void unmask_MSI_irq(unsigned int vector
)
151 msi_set_mask_bit(vector
, 0);
154 static unsigned int startup_msi_irq_wo_maskbit(unsigned int vector
)
156 struct msi_desc
*entry
;
159 spin_lock_irqsave(&msi_lock
, flags
);
160 entry
= msi_desc
[vector
];
161 if (!entry
|| !entry
->dev
) {
162 spin_unlock_irqrestore(&msi_lock
, flags
);
165 entry
->msi_attrib
.state
= 1; /* Mark it active */
166 spin_unlock_irqrestore(&msi_lock
, flags
);
168 return 0; /* never anything pending */
171 static unsigned int startup_msi_irq_w_maskbit(unsigned int vector
)
173 startup_msi_irq_wo_maskbit(vector
);
174 unmask_MSI_irq(vector
);
175 return 0; /* never anything pending */
178 static void shutdown_msi_irq(unsigned int vector
)
180 struct msi_desc
*entry
;
183 spin_lock_irqsave(&msi_lock
, flags
);
184 entry
= msi_desc
[vector
];
185 if (entry
&& entry
->dev
)
186 entry
->msi_attrib
.state
= 0; /* Mark it not active */
187 spin_unlock_irqrestore(&msi_lock
, flags
);
190 static void end_msi_irq_wo_maskbit(unsigned int vector
)
192 move_native_irq(vector
);
196 static void end_msi_irq_w_maskbit(unsigned int vector
)
198 move_native_irq(vector
);
199 unmask_MSI_irq(vector
);
203 static void do_nothing(unsigned int vector
)
208 * Interrupt Type for MSI-X PCI/PCI-X/PCI-Express Devices,
209 * which implement the MSI-X Capability Structure.
211 static struct hw_interrupt_type msix_irq_type
= {
212 .typename
= "PCI-MSI-X",
213 .startup
= startup_msi_irq_w_maskbit
,
214 .shutdown
= shutdown_msi_irq
,
215 .enable
= unmask_MSI_irq
,
216 .disable
= mask_MSI_irq
,
218 .end
= end_msi_irq_w_maskbit
,
219 .set_affinity
= set_msi_affinity
223 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
224 * which implement the MSI Capability Structure with
225 * Mask-and-Pending Bits.
227 static struct hw_interrupt_type msi_irq_w_maskbit_type
= {
228 .typename
= "PCI-MSI",
229 .startup
= startup_msi_irq_w_maskbit
,
230 .shutdown
= shutdown_msi_irq
,
231 .enable
= unmask_MSI_irq
,
232 .disable
= mask_MSI_irq
,
234 .end
= end_msi_irq_w_maskbit
,
235 .set_affinity
= set_msi_affinity
239 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
240 * which implement the MSI Capability Structure without
241 * Mask-and-Pending Bits.
243 static struct hw_interrupt_type msi_irq_wo_maskbit_type
= {
244 .typename
= "PCI-MSI",
245 .startup
= startup_msi_irq_wo_maskbit
,
246 .shutdown
= shutdown_msi_irq
,
247 .enable
= do_nothing
,
248 .disable
= do_nothing
,
250 .end
= end_msi_irq_wo_maskbit
,
251 .set_affinity
= set_msi_affinity
254 static void msi_data_init(struct msg_data
*msi_data
,
257 memset(msi_data
, 0, sizeof(struct msg_data
));
258 msi_data
->vector
= (u8
)vector
;
259 msi_data
->delivery_mode
= MSI_DELIVERY_MODE
;
260 msi_data
->level
= MSI_LEVEL_MODE
;
261 msi_data
->trigger
= MSI_TRIGGER_MODE
;
264 static void msi_address_init(struct msg_address
*msi_address
)
266 unsigned int dest_id
;
267 unsigned long dest_phys_id
= cpu_physical_id(MSI_TARGET_CPU
);
269 memset(msi_address
, 0, sizeof(struct msg_address
));
270 msi_address
->hi_address
= (u32
)0;
271 dest_id
= (MSI_ADDRESS_HEADER
<< MSI_ADDRESS_HEADER_SHIFT
);
272 msi_address
->lo_address
.u
.dest_mode
= MSI_PHYSICAL_MODE
;
273 msi_address
->lo_address
.u
.redirection_hint
= MSI_REDIRECTION_HINT_MODE
;
274 msi_address
->lo_address
.u
.dest_id
= dest_id
;
275 msi_address
->lo_address
.value
|= (dest_phys_id
<< MSI_TARGET_CPU_SHIFT
);
278 static int msi_free_vector(struct pci_dev
* dev
, int vector
, int reassign
);
279 static int assign_msi_vector(void)
281 static int new_vector_avail
= 1;
286 * msi_lock is provided to ensure that successful allocation of MSI
287 * vector is assigned unique among drivers.
289 spin_lock_irqsave(&msi_lock
, flags
);
291 if (!new_vector_avail
) {
295 * vector_irq[] = -1 indicates that this specific vector is:
296 * - assigned for MSI (since MSI have no associated IRQ) or
297 * - assigned for legacy if less than 16, or
298 * - having no corresponding 1:1 vector-to-IOxAPIC IRQ mapping
299 * vector_irq[] = 0 indicates that this vector, previously
300 * assigned for MSI, is freed by hotplug removed operations.
301 * This vector will be reused for any subsequent hotplug added
303 * vector_irq[] > 0 indicates that this vector is assigned for
304 * IOxAPIC IRQs. This vector and its value provides a 1-to-1
305 * vector-to-IOxAPIC IRQ mapping.
307 for (vector
= FIRST_DEVICE_VECTOR
; vector
< NR_IRQS
; vector
++) {
308 if (vector_irq
[vector
] != 0)
310 free_vector
= vector
;
311 if (!msi_desc
[vector
])
317 spin_unlock_irqrestore(&msi_lock
, flags
);
320 vector_irq
[free_vector
] = -1;
321 nr_released_vectors
--;
322 spin_unlock_irqrestore(&msi_lock
, flags
);
323 if (msi_desc
[free_vector
] != NULL
) {
327 /* free all linked vectors before re-assign */
329 spin_lock_irqsave(&msi_lock
, flags
);
330 dev
= msi_desc
[free_vector
]->dev
;
331 tail
= msi_desc
[free_vector
]->link
.tail
;
332 spin_unlock_irqrestore(&msi_lock
, flags
);
333 msi_free_vector(dev
, tail
, 1);
334 } while (free_vector
!= tail
);
339 vector
= assign_irq_vector(AUTO_ASSIGN
);
340 last_alloc_vector
= vector
;
341 if (vector
== LAST_DEVICE_VECTOR
)
342 new_vector_avail
= 0;
344 spin_unlock_irqrestore(&msi_lock
, flags
);
348 static int get_new_vector(void)
350 int vector
= assign_msi_vector();
353 set_intr_gate(vector
, interrupt
[vector
]);
358 static int msi_init(void)
360 static int status
= -ENOMEM
;
367 printk(KERN_WARNING
"PCI: MSI quirk detected. MSI disabled.\n");
372 status
= msi_cache_init();
375 printk(KERN_WARNING
"PCI: MSI cache init failed\n");
378 last_alloc_vector
= assign_irq_vector(AUTO_ASSIGN
);
379 if (last_alloc_vector
< 0) {
381 printk(KERN_WARNING
"PCI: No interrupt vectors available for MSI\n");
385 vector_irq
[last_alloc_vector
] = 0;
386 nr_released_vectors
++;
391 static int get_msi_vector(struct pci_dev
*dev
)
393 return get_new_vector();
396 static struct msi_desc
* alloc_msi_entry(void)
398 struct msi_desc
*entry
;
400 entry
= kmem_cache_alloc(msi_cachep
, SLAB_KERNEL
);
404 memset(entry
, 0, sizeof(struct msi_desc
));
405 entry
->link
.tail
= entry
->link
.head
= 0; /* single message */
411 static void attach_msi_entry(struct msi_desc
*entry
, int vector
)
415 spin_lock_irqsave(&msi_lock
, flags
);
416 msi_desc
[vector
] = entry
;
417 spin_unlock_irqrestore(&msi_lock
, flags
);
420 static void irq_handler_init(int cap_id
, int pos
, int mask
)
424 spin_lock_irqsave(&irq_desc
[pos
].lock
, flags
);
425 if (cap_id
== PCI_CAP_ID_MSIX
)
426 irq_desc
[pos
].handler
= &msix_irq_type
;
429 irq_desc
[pos
].handler
= &msi_irq_wo_maskbit_type
;
431 irq_desc
[pos
].handler
= &msi_irq_w_maskbit_type
;
433 spin_unlock_irqrestore(&irq_desc
[pos
].lock
, flags
);
436 static void enable_msi_mode(struct pci_dev
*dev
, int pos
, int type
)
440 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
441 if (type
== PCI_CAP_ID_MSI
) {
442 /* Set enabled bits to single MSI & enable MSI_enable bit */
443 msi_enable(control
, 1);
444 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
446 msix_enable(control
);
447 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
449 if (pci_find_capability(dev
, PCI_CAP_ID_EXP
)) {
450 /* PCI Express Endpoint device detected */
451 pci_intx(dev
, 0); /* disable intx */
455 void disable_msi_mode(struct pci_dev
*dev
, int pos
, int type
)
459 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
460 if (type
== PCI_CAP_ID_MSI
) {
461 /* Set enabled bits to single MSI & enable MSI_enable bit */
462 msi_disable(control
);
463 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
465 msix_disable(control
);
466 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
468 if (pci_find_capability(dev
, PCI_CAP_ID_EXP
)) {
469 /* PCI Express Endpoint device detected */
470 pci_intx(dev
, 1); /* enable intx */
474 static int msi_lookup_vector(struct pci_dev
*dev
, int type
)
479 spin_lock_irqsave(&msi_lock
, flags
);
480 for (vector
= FIRST_DEVICE_VECTOR
; vector
< NR_IRQS
; vector
++) {
481 if (!msi_desc
[vector
] || msi_desc
[vector
]->dev
!= dev
||
482 msi_desc
[vector
]->msi_attrib
.type
!= type
||
483 msi_desc
[vector
]->msi_attrib
.default_vector
!= dev
->irq
)
485 spin_unlock_irqrestore(&msi_lock
, flags
);
486 /* This pre-assigned MSI vector for this device
487 already exits. Override dev->irq with this vector */
491 spin_unlock_irqrestore(&msi_lock
, flags
);
496 void pci_scan_msi_device(struct pci_dev
*dev
)
501 if (pci_find_capability(dev
, PCI_CAP_ID_MSIX
) > 0)
503 else if (pci_find_capability(dev
, PCI_CAP_ID_MSI
) > 0)
504 nr_reserved_vectors
++;
508 int pci_save_msi_state(struct pci_dev
*dev
)
512 struct pci_cap_saved_state
*save_state
;
515 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
516 if (pos
<= 0 || dev
->no_msi
)
519 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
520 if (!(control
& PCI_MSI_FLAGS_ENABLE
))
523 save_state
= kzalloc(sizeof(struct pci_cap_saved_state
) + sizeof(u32
) * 5,
526 printk(KERN_ERR
"Out of memory in pci_save_msi_state\n");
529 cap
= &save_state
->data
[0];
531 pci_read_config_dword(dev
, pos
, &cap
[i
++]);
532 control
= cap
[0] >> 16;
533 pci_read_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_LO
, &cap
[i
++]);
534 if (control
& PCI_MSI_FLAGS_64BIT
) {
535 pci_read_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_HI
, &cap
[i
++]);
536 pci_read_config_dword(dev
, pos
+ PCI_MSI_DATA_64
, &cap
[i
++]);
538 pci_read_config_dword(dev
, pos
+ PCI_MSI_DATA_32
, &cap
[i
++]);
539 if (control
& PCI_MSI_FLAGS_MASKBIT
)
540 pci_read_config_dword(dev
, pos
+ PCI_MSI_MASK_BIT
, &cap
[i
++]);
541 disable_msi_mode(dev
, pos
, PCI_CAP_ID_MSI
);
542 save_state
->cap_nr
= PCI_CAP_ID_MSI
;
543 pci_add_saved_cap(dev
, save_state
);
547 void pci_restore_msi_state(struct pci_dev
*dev
)
551 struct pci_cap_saved_state
*save_state
;
554 save_state
= pci_find_saved_cap(dev
, PCI_CAP_ID_MSI
);
555 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
556 if (!save_state
|| pos
<= 0)
558 cap
= &save_state
->data
[0];
560 control
= cap
[i
++] >> 16;
561 pci_write_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_LO
, cap
[i
++]);
562 if (control
& PCI_MSI_FLAGS_64BIT
) {
563 pci_write_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_HI
, cap
[i
++]);
564 pci_write_config_dword(dev
, pos
+ PCI_MSI_DATA_64
, cap
[i
++]);
566 pci_write_config_dword(dev
, pos
+ PCI_MSI_DATA_32
, cap
[i
++]);
567 if (control
& PCI_MSI_FLAGS_MASKBIT
)
568 pci_write_config_dword(dev
, pos
+ PCI_MSI_MASK_BIT
, cap
[i
++]);
569 pci_write_config_word(dev
, pos
+ PCI_MSI_FLAGS
, control
);
570 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSI
);
571 pci_remove_saved_cap(save_state
);
575 int pci_save_msix_state(struct pci_dev
*dev
)
579 struct pci_cap_saved_state
*save_state
;
581 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
582 if (pos
<= 0 || dev
->no_msi
)
585 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
586 if (!(control
& PCI_MSIX_FLAGS_ENABLE
))
588 save_state
= kzalloc(sizeof(struct pci_cap_saved_state
) + sizeof(u16
),
591 printk(KERN_ERR
"Out of memory in pci_save_msix_state\n");
594 *((u16
*)&save_state
->data
[0]) = control
;
596 disable_msi_mode(dev
, pos
, PCI_CAP_ID_MSIX
);
597 save_state
->cap_nr
= PCI_CAP_ID_MSIX
;
598 pci_add_saved_cap(dev
, save_state
);
602 void pci_restore_msix_state(struct pci_dev
*dev
)
606 int vector
, head
, tail
= 0;
609 struct msg_address address
;
610 struct msg_data data
;
611 struct msi_desc
*entry
;
613 struct pci_cap_saved_state
*save_state
;
615 save_state
= pci_find_saved_cap(dev
, PCI_CAP_ID_MSIX
);
618 save
= *((u16
*)&save_state
->data
[0]);
619 pci_remove_saved_cap(save_state
);
622 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
626 /* route the table */
628 if (msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
))
630 vector
= head
= dev
->irq
;
631 while (head
!= tail
) {
632 entry
= msi_desc
[vector
];
633 base
= entry
->mask_base
;
634 j
= entry
->msi_attrib
.entry_nr
;
636 msi_address_init(&address
);
637 msi_data_init(&data
, vector
);
639 address
.lo_address
.value
&= MSI_ADDRESS_DEST_ID_MASK
;
640 address
.lo_address
.value
|= entry
->msi_attrib
.current_cpu
<<
641 MSI_TARGET_CPU_SHIFT
;
643 writel(address
.lo_address
.value
,
644 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
645 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
);
646 writel(address
.hi_address
,
647 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
648 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
);
650 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
651 PCI_MSIX_ENTRY_DATA_OFFSET
);
653 tail
= msi_desc
[vector
]->link
.tail
;
658 pci_write_config_word(dev
, msi_control_reg(pos
), save
);
659 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSIX
);
663 static void msi_register_init(struct pci_dev
*dev
, struct msi_desc
*entry
)
665 struct msg_address address
;
666 struct msg_data data
;
667 int pos
, vector
= dev
->irq
;
670 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
671 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
672 /* Configure MSI capability structure */
673 msi_address_init(&address
);
674 msi_data_init(&data
, vector
);
675 entry
->msi_attrib
.current_cpu
= ((address
.lo_address
.u
.dest_id
>>
676 MSI_TARGET_CPU_SHIFT
) & MSI_TARGET_CPU_MASK
);
677 pci_write_config_dword(dev
, msi_lower_address_reg(pos
),
678 address
.lo_address
.value
);
679 if (is_64bit_address(control
)) {
680 pci_write_config_dword(dev
,
681 msi_upper_address_reg(pos
), address
.hi_address
);
682 pci_write_config_word(dev
,
683 msi_data_reg(pos
, 1), *((u32
*)&data
));
685 pci_write_config_word(dev
,
686 msi_data_reg(pos
, 0), *((u32
*)&data
));
687 if (entry
->msi_attrib
.maskbit
) {
688 unsigned int maskbits
, temp
;
689 /* All MSIs are unmasked by default, Mask them all */
690 pci_read_config_dword(dev
,
691 msi_mask_bits_reg(pos
, is_64bit_address(control
)),
693 temp
= (1 << multi_msi_capable(control
));
694 temp
= ((temp
- 1) & ~temp
);
696 pci_write_config_dword(dev
,
697 msi_mask_bits_reg(pos
, is_64bit_address(control
)),
703 * msi_capability_init - configure device's MSI capability structure
704 * @dev: pointer to the pci_dev data structure of MSI device function
706 * Setup the MSI capability structure of device function with a single
707 * MSI vector, regardless of device function is capable of handling
708 * multiple messages. A return of zero indicates the successful setup
709 * of an entry zero with the new MSI vector or non-zero for otherwise.
711 static int msi_capability_init(struct pci_dev
*dev
)
713 struct msi_desc
*entry
;
717 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
718 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
719 /* MSI Entry Initialization */
720 entry
= alloc_msi_entry();
724 vector
= get_msi_vector(dev
);
726 kmem_cache_free(msi_cachep
, entry
);
729 entry
->link
.head
= vector
;
730 entry
->link
.tail
= vector
;
731 entry
->msi_attrib
.type
= PCI_CAP_ID_MSI
;
732 entry
->msi_attrib
.state
= 0; /* Mark it not active */
733 entry
->msi_attrib
.entry_nr
= 0;
734 entry
->msi_attrib
.maskbit
= is_mask_bit_support(control
);
735 entry
->msi_attrib
.default_vector
= dev
->irq
; /* Save IOAPIC IRQ */
738 if (is_mask_bit_support(control
)) {
739 entry
->mask_base
= (void __iomem
*)(long)msi_mask_bits_reg(pos
,
740 is_64bit_address(control
));
742 /* Replace with MSI handler */
743 irq_handler_init(PCI_CAP_ID_MSI
, vector
, entry
->msi_attrib
.maskbit
);
744 /* Configure MSI capability structure */
745 msi_register_init(dev
, entry
);
747 attach_msi_entry(entry
, vector
);
748 /* Set MSI enabled bits */
749 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSI
);
755 * msix_capability_init - configure device's MSI-X capability
756 * @dev: pointer to the pci_dev data structure of MSI-X device function
757 * @entries: pointer to an array of struct msix_entry entries
758 * @nvec: number of @entries
760 * Setup the MSI-X capability structure of device function with a
761 * single MSI-X vector. A return of zero indicates the successful setup of
762 * requested MSI-X entries with allocated vectors or non-zero for otherwise.
764 static int msix_capability_init(struct pci_dev
*dev
,
765 struct msix_entry
*entries
, int nvec
)
767 struct msi_desc
*head
= NULL
, *tail
= NULL
, *entry
= NULL
;
768 struct msg_address address
;
769 struct msg_data data
;
770 int vector
, pos
, i
, j
, nr_entries
, temp
= 0;
771 unsigned long phys_addr
;
777 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
778 /* Request & Map MSI-X table region */
779 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
780 nr_entries
= multi_msix_capable(control
);
782 pci_read_config_dword(dev
, msix_table_offset_reg(pos
), &table_offset
);
783 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
784 table_offset
&= ~PCI_MSIX_FLAGS_BIRMASK
;
785 phys_addr
= pci_resource_start (dev
, bir
) + table_offset
;
786 base
= ioremap_nocache(phys_addr
, nr_entries
* PCI_MSIX_ENTRY_SIZE
);
790 /* MSI-X Table Initialization */
791 for (i
= 0; i
< nvec
; i
++) {
792 entry
= alloc_msi_entry();
795 vector
= get_msi_vector(dev
);
797 kmem_cache_free(msi_cachep
, entry
);
801 j
= entries
[i
].entry
;
802 entries
[i
].vector
= vector
;
803 entry
->msi_attrib
.type
= PCI_CAP_ID_MSIX
;
804 entry
->msi_attrib
.state
= 0; /* Mark it not active */
805 entry
->msi_attrib
.entry_nr
= j
;
806 entry
->msi_attrib
.maskbit
= 1;
807 entry
->msi_attrib
.default_vector
= dev
->irq
;
809 entry
->mask_base
= base
;
811 entry
->link
.head
= vector
;
812 entry
->link
.tail
= vector
;
815 entry
->link
.head
= temp
;
816 entry
->link
.tail
= tail
->link
.tail
;
817 tail
->link
.tail
= vector
;
818 head
->link
.head
= vector
;
822 /* Replace with MSI-X handler */
823 irq_handler_init(PCI_CAP_ID_MSIX
, vector
, 1);
824 /* Configure MSI-X capability structure */
825 msi_address_init(&address
);
826 msi_data_init(&data
, vector
);
827 entry
->msi_attrib
.current_cpu
=
828 ((address
.lo_address
.u
.dest_id
>>
829 MSI_TARGET_CPU_SHIFT
) & MSI_TARGET_CPU_MASK
);
830 writel(address
.lo_address
.value
,
831 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
832 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
);
833 writel(address
.hi_address
,
834 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
835 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
);
837 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
838 PCI_MSIX_ENTRY_DATA_OFFSET
);
839 attach_msi_entry(entry
, vector
);
843 for (; i
>= 0; i
--) {
844 vector
= (entries
+ i
)->vector
;
845 msi_free_vector(dev
, vector
, 0);
846 (entries
+ i
)->vector
= 0;
850 /* Set MSI-X enabled bits */
851 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSIX
);
857 * pci_enable_msi - configure device's MSI capability structure
858 * @dev: pointer to the pci_dev data structure of MSI device function
860 * Setup the MSI capability structure of device function with
861 * a single MSI vector upon its software driver call to request for
862 * MSI mode enabled on its hardware device function. A return of zero
863 * indicates the successful setup of an entry zero with the new MSI
864 * vector or non-zero for otherwise.
866 int pci_enable_msi(struct pci_dev
* dev
)
868 int pos
, temp
, status
= -EINVAL
;
871 if (!pci_msi_enable
|| !dev
)
877 if (dev
->bus
->bus_flags
& PCI_BUS_FLAGS_NO_MSI
)
886 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
890 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
891 if (control
& PCI_MSI_FLAGS_ENABLE
)
892 return 0; /* Already in MSI mode */
894 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
898 spin_lock_irqsave(&msi_lock
, flags
);
899 if (!vector_irq
[dev
->irq
]) {
900 msi_desc
[dev
->irq
]->msi_attrib
.state
= 0;
901 vector_irq
[dev
->irq
] = -1;
902 nr_released_vectors
--;
903 spin_unlock_irqrestore(&msi_lock
, flags
);
904 msi_register_init(dev
, msi_desc
[dev
->irq
]);
905 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSI
);
908 spin_unlock_irqrestore(&msi_lock
, flags
);
911 /* Check whether driver already requested for MSI-X vectors */
912 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
913 if (pos
> 0 && !msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
914 printk(KERN_INFO
"PCI: %s: Can't enable MSI. "
915 "Device already has MSI-X vectors assigned\n",
920 status
= msi_capability_init(dev
);
923 nr_reserved_vectors
--; /* Only MSI capable */
924 else if (nr_msix_devices
> 0)
925 nr_msix_devices
--; /* Both MSI and MSI-X capable,
926 but choose enabling MSI */
932 void pci_disable_msi(struct pci_dev
* dev
)
934 struct msi_desc
*entry
;
935 int pos
, default_vector
;
944 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
948 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
949 if (!(control
& PCI_MSI_FLAGS_ENABLE
))
952 spin_lock_irqsave(&msi_lock
, flags
);
953 entry
= msi_desc
[dev
->irq
];
954 if (!entry
|| !entry
->dev
|| entry
->msi_attrib
.type
!= PCI_CAP_ID_MSI
) {
955 spin_unlock_irqrestore(&msi_lock
, flags
);
958 if (entry
->msi_attrib
.state
) {
959 spin_unlock_irqrestore(&msi_lock
, flags
);
960 printk(KERN_WARNING
"PCI: %s: pci_disable_msi() called without "
961 "free_irq() on MSI vector %d\n",
962 pci_name(dev
), dev
->irq
);
963 BUG_ON(entry
->msi_attrib
.state
> 0);
965 vector_irq
[dev
->irq
] = 0; /* free it */
966 nr_released_vectors
++;
967 default_vector
= entry
->msi_attrib
.default_vector
;
968 spin_unlock_irqrestore(&msi_lock
, flags
);
969 /* Restore dev->irq to its default pin-assertion vector */
970 dev
->irq
= default_vector
;
971 disable_msi_mode(dev
, pci_find_capability(dev
, PCI_CAP_ID_MSI
),
976 static int msi_free_vector(struct pci_dev
* dev
, int vector
, int reassign
)
978 struct msi_desc
*entry
;
979 int head
, entry_nr
, type
;
983 spin_lock_irqsave(&msi_lock
, flags
);
984 entry
= msi_desc
[vector
];
985 if (!entry
|| entry
->dev
!= dev
) {
986 spin_unlock_irqrestore(&msi_lock
, flags
);
989 type
= entry
->msi_attrib
.type
;
990 entry_nr
= entry
->msi_attrib
.entry_nr
;
991 head
= entry
->link
.head
;
992 base
= entry
->mask_base
;
993 msi_desc
[entry
->link
.head
]->link
.tail
= entry
->link
.tail
;
994 msi_desc
[entry
->link
.tail
]->link
.head
= entry
->link
.head
;
997 vector_irq
[vector
] = 0;
998 nr_released_vectors
++;
1000 msi_desc
[vector
] = NULL
;
1001 spin_unlock_irqrestore(&msi_lock
, flags
);
1003 kmem_cache_free(msi_cachep
, entry
);
1005 if (type
== PCI_CAP_ID_MSIX
) {
1008 entry_nr
* PCI_MSIX_ENTRY_SIZE
+
1009 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET
);
1011 if (head
== vector
) {
1013 * Detect last MSI-X vector to be released.
1014 * Release the MSI-X memory-mapped table.
1017 int pos
, nr_entries
;
1018 unsigned long phys_addr
;
1023 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
1024 pci_read_config_word(dev
, msi_control_reg(pos
),
1026 nr_entries
= multi_msix_capable(control
);
1027 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
1029 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
1030 table_offset
&= ~PCI_MSIX_FLAGS_BIRMASK
;
1031 phys_addr
= pci_resource_start(dev
, bir
) + table_offset
;
1033 * FIXME! and what did you want to do with phys_addr?
1043 static int reroute_msix_table(int head
, struct msix_entry
*entries
, int *nvec
)
1045 int vector
= head
, tail
= 0;
1046 int i
, j
= 0, nr_entries
= 0;
1048 unsigned long flags
;
1050 spin_lock_irqsave(&msi_lock
, flags
);
1051 while (head
!= tail
) {
1053 tail
= msi_desc
[vector
]->link
.tail
;
1054 if (entries
[0].entry
== msi_desc
[vector
]->msi_attrib
.entry_nr
)
1058 if (*nvec
> nr_entries
) {
1059 spin_unlock_irqrestore(&msi_lock
, flags
);
1063 vector
= ((j
> 0) ? j
: head
);
1064 for (i
= 0; i
< *nvec
; i
++) {
1065 j
= msi_desc
[vector
]->msi_attrib
.entry_nr
;
1066 msi_desc
[vector
]->msi_attrib
.state
= 0; /* Mark it not active */
1067 vector_irq
[vector
] = -1; /* Mark it busy */
1068 nr_released_vectors
--;
1069 entries
[i
].vector
= vector
;
1070 if (j
!= (entries
+ i
)->entry
) {
1071 base
= msi_desc
[vector
]->mask_base
;
1072 msi_desc
[vector
]->msi_attrib
.entry_nr
=
1073 (entries
+ i
)->entry
;
1074 writel( readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
1075 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
), base
+
1076 (entries
+ i
)->entry
* PCI_MSIX_ENTRY_SIZE
+
1077 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
);
1078 writel( readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
1079 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
), base
+
1080 (entries
+ i
)->entry
* PCI_MSIX_ENTRY_SIZE
+
1081 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
);
1082 writel( (readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
1083 PCI_MSIX_ENTRY_DATA_OFFSET
) & 0xff00) | vector
,
1084 base
+ (entries
+i
)->entry
*PCI_MSIX_ENTRY_SIZE
+
1085 PCI_MSIX_ENTRY_DATA_OFFSET
);
1087 vector
= msi_desc
[vector
]->link
.tail
;
1089 spin_unlock_irqrestore(&msi_lock
, flags
);
1095 * pci_enable_msix - configure device's MSI-X capability structure
1096 * @dev: pointer to the pci_dev data structure of MSI-X device function
1097 * @entries: pointer to an array of MSI-X entries
1098 * @nvec: number of MSI-X vectors requested for allocation by device driver
1100 * Setup the MSI-X capability structure of device function with the number
1101 * of requested vectors upon its software driver call to request for
1102 * MSI-X mode enabled on its hardware device function. A return of zero
1103 * indicates the successful configuration of MSI-X capability structure
1104 * with new allocated MSI-X vectors. A return of < 0 indicates a failure.
1105 * Or a return of > 0 indicates that driver request is exceeding the number
1106 * of vectors available. Driver should use the returned value to re-send
1109 int pci_enable_msix(struct pci_dev
* dev
, struct msix_entry
*entries
, int nvec
)
1111 int status
, pos
, nr_entries
, free_vectors
;
1114 unsigned long flags
;
1116 if (!pci_msi_enable
|| !dev
|| !entries
)
1119 status
= msi_init();
1123 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
1127 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
1128 if (control
& PCI_MSIX_FLAGS_ENABLE
)
1129 return -EINVAL
; /* Already in MSI-X mode */
1131 nr_entries
= multi_msix_capable(control
);
1132 if (nvec
> nr_entries
)
1135 /* Check for any invalid entries */
1136 for (i
= 0; i
< nvec
; i
++) {
1137 if (entries
[i
].entry
>= nr_entries
)
1138 return -EINVAL
; /* invalid entry */
1139 for (j
= i
+ 1; j
< nvec
; j
++) {
1140 if (entries
[i
].entry
== entries
[j
].entry
)
1141 return -EINVAL
; /* duplicate entry */
1145 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
1148 /* Reroute MSI-X table */
1149 if (reroute_msix_table(dev
->irq
, entries
, &nr_entries
)) {
1150 /* #requested > #previous-assigned */
1155 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSIX
);
1158 /* Check whether driver already requested for MSI vector */
1159 if (pci_find_capability(dev
, PCI_CAP_ID_MSI
) > 0 &&
1160 !msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
1161 printk(KERN_INFO
"PCI: %s: Can't enable MSI-X. "
1162 "Device already has an MSI vector assigned\n",
1168 spin_lock_irqsave(&msi_lock
, flags
);
1170 * msi_lock is provided to ensure that enough vectors resources are
1171 * available before granting.
1173 free_vectors
= pci_vector_resources(last_alloc_vector
,
1174 nr_released_vectors
);
1175 /* Ensure that each MSI/MSI-X device has one vector reserved by
1176 default to avoid any MSI-X driver to take all available
1178 free_vectors
-= nr_reserved_vectors
;
1179 /* Find the average of free vectors among MSI-X devices */
1180 if (nr_msix_devices
> 0)
1181 free_vectors
/= nr_msix_devices
;
1182 spin_unlock_irqrestore(&msi_lock
, flags
);
1184 if (nvec
> free_vectors
) {
1185 if (free_vectors
> 0)
1186 return free_vectors
;
1191 status
= msix_capability_init(dev
, entries
, nvec
);
1192 if (!status
&& nr_msix_devices
> 0)
1198 void pci_disable_msix(struct pci_dev
* dev
)
1203 if (!pci_msi_enable
)
1208 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
1212 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
1213 if (!(control
& PCI_MSIX_FLAGS_ENABLE
))
1217 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
1218 int state
, vector
, head
, tail
= 0, warning
= 0;
1219 unsigned long flags
;
1221 vector
= head
= dev
->irq
;
1222 spin_lock_irqsave(&msi_lock
, flags
);
1223 while (head
!= tail
) {
1224 state
= msi_desc
[vector
]->msi_attrib
.state
;
1228 vector_irq
[vector
] = 0; /* free it */
1229 nr_released_vectors
++;
1231 tail
= msi_desc
[vector
]->link
.tail
;
1234 spin_unlock_irqrestore(&msi_lock
, flags
);
1237 printk(KERN_WARNING
"PCI: %s: pci_disable_msix() called without "
1238 "free_irq() on all MSI-X vectors\n",
1240 BUG_ON(warning
> 0);
1243 disable_msi_mode(dev
,
1244 pci_find_capability(dev
, PCI_CAP_ID_MSIX
),
1252 * msi_remove_pci_irq_vectors - reclaim MSI(X) vectors to unused state
1253 * @dev: pointer to the pci_dev data structure of MSI(X) device function
1255 * Being called during hotplug remove, from which the device function
1256 * is hot-removed. All previous assigned MSI/MSI-X vectors, if
1257 * allocated for this device function, are reclaimed to unused state,
1258 * which may be used later on.
1260 void msi_remove_pci_irq_vectors(struct pci_dev
* dev
)
1262 int state
, pos
, temp
;
1263 unsigned long flags
;
1265 if (!pci_msi_enable
|| !dev
)
1268 temp
= dev
->irq
; /* Save IOAPIC IRQ */
1269 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
1270 if (pos
> 0 && !msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
1271 spin_lock_irqsave(&msi_lock
, flags
);
1272 state
= msi_desc
[dev
->irq
]->msi_attrib
.state
;
1273 spin_unlock_irqrestore(&msi_lock
, flags
);
1275 printk(KERN_WARNING
"PCI: %s: msi_remove_pci_irq_vectors() "
1276 "called without free_irq() on MSI vector %d\n",
1277 pci_name(dev
), dev
->irq
);
1279 } else /* Release MSI vector assigned to this device */
1280 msi_free_vector(dev
, dev
->irq
, 0);
1281 dev
->irq
= temp
; /* Restore IOAPIC IRQ */
1283 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
1284 if (pos
> 0 && !msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
1285 int vector
, head
, tail
= 0, warning
= 0;
1286 void __iomem
*base
= NULL
;
1288 vector
= head
= dev
->irq
;
1289 while (head
!= tail
) {
1290 spin_lock_irqsave(&msi_lock
, flags
);
1291 state
= msi_desc
[vector
]->msi_attrib
.state
;
1292 tail
= msi_desc
[vector
]->link
.tail
;
1293 base
= msi_desc
[vector
]->mask_base
;
1294 spin_unlock_irqrestore(&msi_lock
, flags
);
1297 else if (vector
!= head
) /* Release MSI-X vector */
1298 msi_free_vector(dev
, vector
, 0);
1301 msi_free_vector(dev
, vector
, 0);
1303 /* Force to release the MSI-X memory-mapped table */
1305 unsigned long phys_addr
;
1310 pci_read_config_word(dev
, msi_control_reg(pos
),
1312 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
1314 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
1315 table_offset
&= ~PCI_MSIX_FLAGS_BIRMASK
;
1316 phys_addr
= pci_resource_start(dev
, bir
) + table_offset
;
1318 * FIXME! and what did you want to do with phys_addr?
1322 printk(KERN_WARNING
"PCI: %s: msi_remove_pci_irq_vectors() "
1323 "called without free_irq() on all MSI-X vectors\n",
1325 BUG_ON(warning
> 0);
1327 dev
->irq
= temp
; /* Restore IOAPIC IRQ */
1331 void pci_no_msi(void)
1336 EXPORT_SYMBOL(pci_enable_msi
);
1337 EXPORT_SYMBOL(pci_disable_msi
);
1338 EXPORT_SYMBOL(pci_enable_msix
);
1339 EXPORT_SYMBOL(pci_disable_msix
);