drivers/scsi/ipr.h

   1 /*
   2  * ipr.h -- driver for IBM Power Linux RAID adapters
   3  *
   4  * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
   5  *
   6  * Copyright (C) 2003, 2004 IBM Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
  23  *                              that broke 64bit platforms.
  24  */
  25
  26 #ifndef _IPR_H
  27 #define _IPR_H
  28
  29 #include <linux/types.h>
  30 #include <linux/completion.h>
  31 #include <linux/list.h>
  32 #include <linux/kref.h>
  33 #include <scsi/scsi.h>
  34 #include <scsi/scsi_cmnd.h>
  35
  36 /*
  37  * Literals
  38  */
  39 #define IPR_DRIVER_VERSION "2.1.3"
  40 #define IPR_DRIVER_DATE "(March 29, 2006)"
  41
  42 /*
  43  * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
  44  *      ops per device for devices not running tagged command queuing.
  45  *      This can be adjusted at runtime through sysfs device attributes.
  46  */
  47 #define IPR_MAX_CMD_PER_LUN                             6
  48
  49 /*
  50  * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
  51  *      ops the mid-layer can send to the adapter.
  52  */
  53 #define IPR_NUM_BASE_CMD_BLKS                           100
  54
  55 #define IPR_SUBS_DEV_ID_2780    0x0264
  56 #define IPR_SUBS_DEV_ID_5702    0x0266
  57 #define IPR_SUBS_DEV_ID_5703    0x0278
  58 #define IPR_SUBS_DEV_ID_572E  0x028D
  59 #define IPR_SUBS_DEV_ID_573E  0x02D3
  60 #define IPR_SUBS_DEV_ID_573D  0x02D4
  61 #define IPR_SUBS_DEV_ID_571A    0x02C0
  62 #define IPR_SUBS_DEV_ID_571B    0x02BE
  63 #define IPR_SUBS_DEV_ID_571E  0x02BF
  64 #define IPR_SUBS_DEV_ID_571F    0x02D5
  65 #define IPR_SUBS_DEV_ID_572A    0x02C1
  66 #define IPR_SUBS_DEV_ID_572B    0x02C2
  67 #define IPR_SUBS_DEV_ID_575B    0x030D
  68
  69 #define IPR_NAME                                "ipr"
  70
  71 /*
  72  * Return codes
  73  */
  74 #define IPR_RC_JOB_CONTINUE             1
  75 #define IPR_RC_JOB_RETURN               2
  76
  77 /*
  78  * IOASCs
  79  */
  80 #define IPR_IOASC_NR_INIT_CMD_REQUIRED          0x02040200
  81 #define IPR_IOASC_SYNC_REQUIRED                 0x023f0000
  82 #define IPR_IOASC_MED_DO_NOT_REALLOC            0x03110C00
  83 #define IPR_IOASC_HW_SEL_TIMEOUT                        0x04050000
  84 #define IPR_IOASC_HW_DEV_BUS_STATUS                     0x04448500
  85 #define IPR_IOASC_IOASC_MASK                    0xFFFFFF00
  86 #define IPR_IOASC_SCSI_STATUS_MASK              0x000000FF
  87 #define IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT    0x05240000
  88 #define IPR_IOASC_IR_RESOURCE_HANDLE            0x05250000
  89 #define IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA         0x05258100
  90 #define IPR_IOASA_IR_DUAL_IOA_DISABLED          0x052C8000
  91 #define IPR_IOASC_BUS_WAS_RESET                 0x06290000
  92 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER                0x06298000
  93 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST      0x0B5A0000
  94
  95 #define IPR_FIRST_DRIVER_IOASC                  0x10000000
  96 #define IPR_IOASC_IOA_WAS_RESET                 0x10000001
  97 #define IPR_IOASC_PCI_ACCESS_ERROR                      0x10000002
  98
  99 #define IPR_NUM_LOG_HCAMS                               2
 100 #define IPR_NUM_CFG_CHG_HCAMS                           2
 101 #define IPR_NUM_HCAMS   (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
 102 #define IPR_MAX_NUM_TARGETS_PER_BUS                     256
 103 #define IPR_MAX_NUM_LUNS_PER_TARGET                     256
 104 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET        8
 105 #define IPR_VSET_BUS                                    0xff
 106 #define IPR_IOA_BUS                                             0xff
 107 #define IPR_IOA_TARGET                                  0xff
 108 #define IPR_IOA_LUN                                             0xff
 109 #define IPR_MAX_NUM_BUSES                               8
 110 #define IPR_MAX_BUS_TO_SCAN                             IPR_MAX_NUM_BUSES
 111
 112 #define IPR_NUM_RESET_RELOAD_RETRIES            3
 113
 114 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
 115 #define IPR_NUM_INTERNAL_CMD_BLKS       (IPR_NUM_HCAMS + \
 116                                      ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
 117
 118 #define IPR_MAX_COMMANDS                IPR_NUM_BASE_CMD_BLKS
 119 #define IPR_NUM_CMD_BLKS                (IPR_NUM_BASE_CMD_BLKS + \
 120                                                 IPR_NUM_INTERNAL_CMD_BLKS)
 121
 122 #define IPR_MAX_PHYSICAL_DEVS                           192
 123
 124 #define IPR_MAX_SGLIST                                  64
 125 #define IPR_IOA_MAX_SECTORS                             32767
 126 #define IPR_VSET_MAX_SECTORS                            512
 127 #define IPR_MAX_CDB_LEN                                 16
 128
 129 #define IPR_DEFAULT_BUS_WIDTH                           16
 130 #define IPR_80MBs_SCSI_RATE             ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 131 #define IPR_U160_SCSI_RATE      ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 132 #define IPR_U320_SCSI_RATE      ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 133 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
 134
 135 #define IPR_IOA_RES_HANDLE                              0xffffffff
 136 #define IPR_INVALID_RES_HANDLE                  0
 137 #define IPR_IOA_RES_ADDR                                0x00ffffff
 138
 139 /*
 140  * Adapter Commands
 141  */
 142 #define IPR_QUERY_RSRC_STATE                            0xC2
 143 #define IPR_RESET_DEVICE                                0xC3
 144 #define IPR_RESET_TYPE_SELECT                           0x80
 145 #define IPR_LUN_RESET                                   0x40
 146 #define IPR_TARGET_RESET                                        0x20
 147 #define IPR_BUS_RESET                                   0x10
 148 #define IPR_ID_HOST_RR_Q                                0xC4
 149 #define IPR_QUERY_IOA_CONFIG                            0xC5
 150 #define IPR_CANCEL_ALL_REQUESTS                 0xCE
 151 #define IPR_HOST_CONTROLLED_ASYNC                       0xCF
 152 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE      0x01
 153 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA           0x02
 154 #define IPR_SET_SUPPORTED_DEVICES                       0xFB
 155 #define IPR_IOA_SHUTDOWN                                0xF7
 156 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE                    0x05
 157
 158 /*
 159  * Timeouts
 160  */
 161 #define IPR_SHUTDOWN_TIMEOUT                    (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
 162 #define IPR_VSET_RW_TIMEOUT                     (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
 163 #define IPR_ABBREV_SHUTDOWN_TIMEOUT             (10 * HZ)
 164 #define IPR_DEVICE_RESET_TIMEOUT                (ipr_fastfail ? 10 * HZ : 30 * HZ)
 165 #define IPR_CANCEL_ALL_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 166 #define IPR_ABORT_TASK_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 167 #define IPR_INTERNAL_TIMEOUT                    (ipr_fastfail ? 10 * HZ : 30 * HZ)
 168 #define IPR_WRITE_BUFFER_TIMEOUT                (10 * 60 * HZ)
 169 #define IPR_SET_SUP_DEVICE_TIMEOUT              (2 * 60 * HZ)
 170 #define IPR_REQUEST_SENSE_TIMEOUT               (10 * HZ)
 171 #define IPR_OPERATIONAL_TIMEOUT         (5 * 60)
 172 #define IPR_WAIT_FOR_RESET_TIMEOUT              (2 * HZ)
 173 #define IPR_CHECK_FOR_RESET_TIMEOUT             (HZ / 10)
 174 #define IPR_WAIT_FOR_BIST_TIMEOUT               (2 * HZ)
 175 #define IPR_DUMP_TIMEOUT                        (15 * HZ)
 176
 177 /*
 178  * SCSI Literals
 179  */
 180 #define IPR_VENDOR_ID_LEN                       8
 181 #define IPR_PROD_ID_LEN                         16
 182 #define IPR_SERIAL_NUM_LEN                      8
 183
 184 /*
 185  * Hardware literals
 186  */
 187 #define IPR_FMT2_MBX_ADDR_MASK                          0x0fffffff
 188 #define IPR_FMT2_MBX_BAR_SEL_MASK                       0xf0000000
 189 #define IPR_FMT2_MKR_BAR_SEL_SHIFT                      28
 190 #define IPR_GET_FMT2_BAR_SEL(mbx) \
 191 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
 192 #define IPR_SDT_FMT2_BAR0_SEL                           0x0
 193 #define IPR_SDT_FMT2_BAR1_SEL                           0x1
 194 #define IPR_SDT_FMT2_BAR2_SEL                           0x2
 195 #define IPR_SDT_FMT2_BAR3_SEL                           0x3
 196 #define IPR_SDT_FMT2_BAR4_SEL                           0x4
 197 #define IPR_SDT_FMT2_BAR5_SEL                           0x5
 198 #define IPR_SDT_FMT2_EXP_ROM_SEL                        0x8
 199 #define IPR_FMT2_SDT_READY_TO_USE                       0xC4D4E3F2
 200 #define IPR_DOORBELL                                    0x82800000
 201 #define IPR_RUNTIME_RESET                               0x40000000
 202
 203 #define IPR_PCII_IOA_TRANS_TO_OPER                      (0x80000000 >> 0)
 204 #define IPR_PCII_IOARCB_XFER_FAILED                     (0x80000000 >> 3)
 205 #define IPR_PCII_IOA_UNIT_CHECKED                       (0x80000000 >> 4)
 206 #define IPR_PCII_NO_HOST_RRQ                            (0x80000000 >> 5)
 207 #define IPR_PCII_CRITICAL_OPERATION                     (0x80000000 >> 6)
 208 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE           (0x80000000 >> 7)
 209 #define IPR_PCII_IOARRIN_LOST                           (0x80000000 >> 27)
 210 #define IPR_PCII_MMIO_ERROR                             (0x80000000 >> 28)
 211 #define IPR_PCII_PROC_ERR_STATE                 (0x80000000 >> 29)
 212 #define IPR_PCII_HRRQ_UPDATED                           (0x80000000 >> 30)
 213 #define IPR_PCII_CORE_ISSUED_RST_REQ            (0x80000000 >> 31)
 214
 215 #define IPR_PCII_ERROR_INTERRUPTS \
 216 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
 217 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
 218
 219 #define IPR_PCII_OPER_INTERRUPTS \
 220 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
 221
 222 #define IPR_UPROCI_RESET_ALERT                  (0x80000000 >> 7)
 223 #define IPR_UPROCI_IO_DEBUG_ALERT                       (0x80000000 >> 9)
 224
 225 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC            200000  /* 200 ms */
 226 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC           200000  /* 200 ms */
 227
 228 /*
 229  * Dump literals
 230  */
 231 #define IPR_MAX_IOA_DUMP_SIZE                           (4 * 1024 * 1024)
 232 #define IPR_NUM_SDT_ENTRIES                             511
 233 #define IPR_MAX_NUM_DUMP_PAGES  ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
 234
 235 /*
 236  * Misc literals
 237  */
 238 #define IPR_NUM_IOADL_ENTRIES                   IPR_MAX_SGLIST
 239
 240 /*
 241  * Adapter interface types
 242  */
 243
 244 struct ipr_res_addr {
 245         u8 reserved;
 246         u8 bus;
 247         u8 target;
 248         u8 lun;
 249 #define IPR_GET_PHYS_LOC(res_addr) \
 250         (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
 251 }__attribute__((packed, aligned (4)));
 252
 253 struct ipr_std_inq_vpids {
 254         u8 vendor_id[IPR_VENDOR_ID_LEN];
 255         u8 product_id[IPR_PROD_ID_LEN];
 256 }__attribute__((packed));
 257
 258 struct ipr_vpd {
 259         struct ipr_std_inq_vpids vpids;
 260         u8 sn[IPR_SERIAL_NUM_LEN];
 261 }__attribute__((packed));
 262
 263 struct ipr_ext_vpd {
 264         struct ipr_vpd vpd;
 265         __be32 wwid[2];
 266 }__attribute__((packed));
 267
 268 struct ipr_std_inq_data {
 269         u8 peri_qual_dev_type;
 270 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
 271 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
 272
 273         u8 removeable_medium_rsvd;
 274 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
 275
 276 #define IPR_IS_DASD_DEVICE(std_inq) \
 277 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
 278 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
 279
 280 #define IPR_IS_SES_DEVICE(std_inq) \
 281 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
 282
 283         u8 version;
 284         u8 aen_naca_fmt;
 285         u8 additional_len;
 286         u8 sccs_rsvd;
 287         u8 bq_enc_multi;
 288         u8 sync_cmdq_flags;
 289
 290         struct ipr_std_inq_vpids vpids;
 291
 292         u8 ros_rsvd_ram_rsvd[4];
 293
 294         u8 serial_num[IPR_SERIAL_NUM_LEN];
 295 }__attribute__ ((packed));
 296
 297 struct ipr_config_table_entry {
 298         u8 service_level;
 299         u8 array_id;
 300         u8 flags;
 301 #define IPR_IS_IOA_RESOURCE     0x80
 302 #define IPR_IS_ARRAY_MEMBER 0x20
 303 #define IPR_IS_HOT_SPARE        0x10
 304
 305         u8 rsvd_subtype;
 306 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
 307 #define IPR_SUBTYPE_AF_DASD                     0
 308 #define IPR_SUBTYPE_GENERIC_SCSI        1
 309 #define IPR_SUBTYPE_VOLUME_SET          2
 310
 311 #define IPR_QUEUEING_MODEL(res) ((((res)->cfgte.flags) & 0x70) >> 4)
 312 #define IPR_QUEUE_FROZEN_MODEL  0
 313 #define IPR_QUEUE_NACA_MODEL            1
 314
 315         struct ipr_res_addr res_addr;
 316         __be32 res_handle;
 317         __be32 reserved4[2];
 318         struct ipr_std_inq_data std_inq_data;
 319 }__attribute__ ((packed, aligned (4)));
 320
 321 struct ipr_config_table_hdr {
 322         u8 num_entries;
 323         u8 flags;
 324 #define IPR_UCODE_DOWNLOAD_REQ  0x10
 325         __be16 reserved;
 326 }__attribute__((packed, aligned (4)));
 327
 328 struct ipr_config_table {
 329         struct ipr_config_table_hdr hdr;
 330         struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
 331 }__attribute__((packed, aligned (4)));
 332
 333 struct ipr_hostrcb_cfg_ch_not {
 334         struct ipr_config_table_entry cfgte;
 335         u8 reserved[936];
 336 }__attribute__((packed, aligned (4)));
 337
 338 struct ipr_supported_device {
 339         __be16 data_length;
 340         u8 reserved;
 341         u8 num_records;
 342         struct ipr_std_inq_vpids vpids;
 343         u8 reserved2[16];
 344 }__attribute__((packed, aligned (4)));
 345
 346 /* Command packet structure */
 347 struct ipr_cmd_pkt {
 348         __be16 reserved;                /* Reserved by IOA */
 349         u8 request_type;
 350 #define IPR_RQTYPE_SCSICDB              0x00
 351 #define IPR_RQTYPE_IOACMD               0x01
 352 #define IPR_RQTYPE_HCAM                 0x02
 353
 354         u8 luntar_luntrn;
 355
 356         u8 flags_hi;
 357 #define IPR_FLAGS_HI_WRITE_NOT_READ             0x80
 358 #define IPR_FLAGS_HI_NO_ULEN_CHK                0x20
 359 #define IPR_FLAGS_HI_SYNC_OVERRIDE              0x10
 360 #define IPR_FLAGS_HI_SYNC_COMPLETE              0x08
 361 #define IPR_FLAGS_HI_NO_LINK_DESC               0x04
 362
 363         u8 flags_lo;
 364 #define IPR_FLAGS_LO_ALIGNED_BFR                0x20
 365 #define IPR_FLAGS_LO_DELAY_AFTER_RST    0x10
 366 #define IPR_FLAGS_LO_UNTAGGED_TASK              0x00
 367 #define IPR_FLAGS_LO_SIMPLE_TASK                0x02
 368 #define IPR_FLAGS_LO_ORDERED_TASK               0x04
 369 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK             0x06
 370 #define IPR_FLAGS_LO_ACA_TASK                   0x08
 371
 372         u8 cdb[16];
 373         __be16 timeout;
 374 }__attribute__ ((packed, aligned(4)));
 375
 376 /* IOA Request Control Block    128 bytes  */
 377 struct ipr_ioarcb {
 378         __be32 ioarcb_host_pci_addr;
 379         __be32 reserved;
 380         __be32 res_handle;
 381         __be32 host_response_handle;
 382         __be32 reserved1;
 383         __be32 reserved2;
 384         __be32 reserved3;
 385
 386         __be32 write_data_transfer_length;
 387         __be32 read_data_transfer_length;
 388         __be32 write_ioadl_addr;
 389         __be32 write_ioadl_len;
 390         __be32 read_ioadl_addr;
 391         __be32 read_ioadl_len;
 392
 393         __be32 ioasa_host_pci_addr;
 394         __be16 ioasa_len;
 395         __be16 reserved4;
 396
 397         struct ipr_cmd_pkt cmd_pkt;
 398
 399         __be32 add_cmd_parms_len;
 400         __be32 add_cmd_parms[10];
 401 }__attribute__((packed, aligned (4)));
 402
 403 struct ipr_ioadl_desc {
 404         __be32 flags_and_data_len;
 405 #define IPR_IOADL_FLAGS_MASK            0xff000000
 406 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
 407 #define IPR_IOADL_DATA_LEN_MASK         0x00ffffff
 408 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
 409 #define IPR_IOADL_FLAGS_READ            0x48000000
 410 #define IPR_IOADL_FLAGS_READ_LAST       0x49000000
 411 #define IPR_IOADL_FLAGS_WRITE           0x68000000
 412 #define IPR_IOADL_FLAGS_WRITE_LAST      0x69000000
 413 #define IPR_IOADL_FLAGS_LAST            0x01000000
 414
 415         __be32 address;
 416 }__attribute__((packed, aligned (8)));
 417
 418 struct ipr_ioasa_vset {
 419         __be32 failing_lba_hi;
 420         __be32 failing_lba_lo;
 421         __be32 reserved;
 422 }__attribute__((packed, aligned (4)));
 423
 424 struct ipr_ioasa_af_dasd {
 425         __be32 failing_lba;
 426         __be32 reserved[2];
 427 }__attribute__((packed, aligned (4)));
 428
 429 struct ipr_ioasa_gpdd {
 430         u8 end_state;
 431         u8 bus_phase;
 432         __be16 reserved;
 433         __be32 ioa_data[2];
 434 }__attribute__((packed, aligned (4)));
 435
 436 struct ipr_auto_sense {
 437         __be16 auto_sense_len;
 438         __be16 ioa_data_len;
 439         __be32 data[SCSI_SENSE_BUFFERSIZE/sizeof(__be32)];
 440 };
 441
 442 struct ipr_ioasa {
 443         __be32 ioasc;
 444 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
 445 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
 446 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
 447 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
 448
 449         __be16 ret_stat_len;    /* Length of the returned IOASA */
 450
 451         __be16 avail_stat_len;  /* Total Length of status available. */
 452
 453         __be32 residual_data_len;       /* number of bytes in the host data */
 454         /* buffers that were not used by the IOARCB command. */
 455
 456         __be32 ilid;
 457 #define IPR_NO_ILID                     0
 458 #define IPR_DRIVER_ILID         0xffffffff
 459
 460         __be32 fd_ioasc;
 461
 462         __be32 fd_phys_locator;
 463
 464         __be32 fd_res_handle;
 465
 466         __be32 ioasc_specific;  /* status code specific field */
 467 #define IPR_ADDITIONAL_STATUS_FMT               0x80000000
 468 #define IPR_AUTOSENSE_VALID                     0x40000000
 469 #define IPR_IOASC_SPECIFIC_MASK         0x00ffffff
 470 #define IPR_FIELD_POINTER_VALID         (0x80000000 >> 8)
 471 #define IPR_FIELD_POINTER_MASK          0x0000ffff
 472
 473         union {
 474                 struct ipr_ioasa_vset vset;
 475                 struct ipr_ioasa_af_dasd dasd;
 476                 struct ipr_ioasa_gpdd gpdd;
 477         } u;
 478
 479         struct ipr_auto_sense auto_sense;
 480 }__attribute__((packed, aligned (4)));
 481
 482 struct ipr_mode_parm_hdr {
 483         u8 length;
 484         u8 medium_type;
 485         u8 device_spec_parms;
 486         u8 block_desc_len;
 487 }__attribute__((packed));
 488
 489 struct ipr_mode_pages {
 490         struct ipr_mode_parm_hdr hdr;
 491         u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
 492 }__attribute__((packed));
 493
 494 struct ipr_mode_page_hdr {
 495         u8 ps_page_code;
 496 #define IPR_MODE_PAGE_PS        0x80
 497 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
 498         u8 page_length;
 499 }__attribute__ ((packed));
 500
 501 struct ipr_dev_bus_entry {
 502         struct ipr_res_addr res_addr;
 503         u8 flags;
 504 #define IPR_SCSI_ATTR_ENABLE_QAS                        0x80
 505 #define IPR_SCSI_ATTR_DISABLE_QAS                       0x40
 506 #define IPR_SCSI_ATTR_QAS_MASK                          0xC0
 507 #define IPR_SCSI_ATTR_ENABLE_TM                         0x20
 508 #define IPR_SCSI_ATTR_NO_TERM_PWR                       0x10
 509 #define IPR_SCSI_ATTR_TM_SUPPORTED                      0x08
 510 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED     0x04
 511
 512         u8 scsi_id;
 513         u8 bus_width;
 514         u8 extended_reset_delay;
 515 #define IPR_EXTENDED_RESET_DELAY        7
 516
 517         __be32 max_xfer_rate;
 518
 519         u8 spinup_delay;
 520         u8 reserved3;
 521         __be16 reserved4;
 522 }__attribute__((packed, aligned (4)));
 523
 524 struct ipr_mode_page28 {
 525         struct ipr_mode_page_hdr hdr;
 526         u8 num_entries;
 527         u8 entry_length;
 528         struct ipr_dev_bus_entry bus[0];
 529 }__attribute__((packed));
 530
 531 struct ipr_ioa_vpd {
 532         struct ipr_std_inq_data std_inq_data;
 533         u8 ascii_part_num[12];
 534         u8 reserved[40];
 535         u8 ascii_plant_code[4];
 536 }__attribute__((packed));
 537
 538 struct ipr_inquiry_page3 {
 539         u8 peri_qual_dev_type;
 540         u8 page_code;
 541         u8 reserved1;
 542         u8 page_length;
 543         u8 ascii_len;
 544         u8 reserved2[3];
 545         u8 load_id[4];
 546         u8 major_release;
 547         u8 card_type;
 548         u8 minor_release[2];
 549         u8 ptf_number[4];
 550         u8 patch_number[4];
 551 }__attribute__((packed));
 552
 553 #define IPR_INQUIRY_PAGE0_ENTRIES 20
 554 struct ipr_inquiry_page0 {
 555         u8 peri_qual_dev_type;
 556         u8 page_code;
 557         u8 reserved1;
 558         u8 len;
 559         u8 page[IPR_INQUIRY_PAGE0_ENTRIES];
 560 }__attribute__((packed));
 561
 562 struct ipr_hostrcb_device_data_entry {
 563         struct ipr_vpd vpd;
 564         struct ipr_res_addr dev_res_addr;
 565         struct ipr_vpd new_vpd;
 566         struct ipr_vpd ioa_last_with_dev_vpd;
 567         struct ipr_vpd cfc_last_with_dev_vpd;
 568         __be32 ioa_data[5];
 569 }__attribute__((packed, aligned (4)));
 570
 571 struct ipr_hostrcb_device_data_entry_enhanced {
 572         struct ipr_ext_vpd vpd;
 573         u8 ccin[4];
 574         struct ipr_res_addr dev_res_addr;
 575         struct ipr_ext_vpd new_vpd;
 576         u8 new_ccin[4];
 577         struct ipr_ext_vpd ioa_last_with_dev_vpd;
 578         struct ipr_ext_vpd cfc_last_with_dev_vpd;
 579 }__attribute__((packed, aligned (4)));
 580
 581 struct ipr_hostrcb_array_data_entry {
 582         struct ipr_vpd vpd;
 583         struct ipr_res_addr expected_dev_res_addr;
 584         struct ipr_res_addr dev_res_addr;
 585 }__attribute__((packed, aligned (4)));
 586
 587 struct ipr_hostrcb_array_data_entry_enhanced {
 588         struct ipr_ext_vpd vpd;
 589         u8 ccin[4];
 590         struct ipr_res_addr expected_dev_res_addr;
 591         struct ipr_res_addr dev_res_addr;
 592 }__attribute__((packed, aligned (4)));
 593
 594 struct ipr_hostrcb_type_ff_error {
 595         __be32 ioa_data[502];
 596 }__attribute__((packed, aligned (4)));
 597
 598 struct ipr_hostrcb_type_01_error {
 599         __be32 seek_counter;
 600         __be32 read_counter;
 601         u8 sense_data[32];
 602         __be32 ioa_data[236];
 603 }__attribute__((packed, aligned (4)));
 604
 605 struct ipr_hostrcb_type_02_error {
 606         struct ipr_vpd ioa_vpd;
 607         struct ipr_vpd cfc_vpd;
 608         struct ipr_vpd ioa_last_attached_to_cfc_vpd;
 609         struct ipr_vpd cfc_last_attached_to_ioa_vpd;
 610         __be32 ioa_data[3];
 611 }__attribute__((packed, aligned (4)));
 612
 613 struct ipr_hostrcb_type_12_error {
 614         struct ipr_ext_vpd ioa_vpd;
 615         struct ipr_ext_vpd cfc_vpd;
 616         struct ipr_ext_vpd ioa_last_attached_to_cfc_vpd;
 617         struct ipr_ext_vpd cfc_last_attached_to_ioa_vpd;
 618         __be32 ioa_data[3];
 619 }__attribute__((packed, aligned (4)));
 620
 621 struct ipr_hostrcb_type_03_error {
 622         struct ipr_vpd ioa_vpd;
 623         struct ipr_vpd cfc_vpd;
 624         __be32 errors_detected;
 625         __be32 errors_logged;
 626         u8 ioa_data[12];
 627         struct ipr_hostrcb_device_data_entry dev[3];
 628 }__attribute__((packed, aligned (4)));
 629
 630 struct ipr_hostrcb_type_13_error {
 631         struct ipr_ext_vpd ioa_vpd;
 632         struct ipr_ext_vpd cfc_vpd;
 633         __be32 errors_detected;
 634         __be32 errors_logged;
 635         struct ipr_hostrcb_device_data_entry_enhanced dev[3];
 636 }__attribute__((packed, aligned (4)));
 637
 638 struct ipr_hostrcb_type_04_error {
 639         struct ipr_vpd ioa_vpd;
 640         struct ipr_vpd cfc_vpd;
 641         u8 ioa_data[12];
 642         struct ipr_hostrcb_array_data_entry array_member[10];
 643         __be32 exposed_mode_adn;
 644         __be32 array_id;
 645         struct ipr_vpd incomp_dev_vpd;
 646         __be32 ioa_data2;
 647         struct ipr_hostrcb_array_data_entry array_member2[8];
 648         struct ipr_res_addr last_func_vset_res_addr;
 649         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 650         u8 protection_level[8];
 651 }__attribute__((packed, aligned (4)));
 652
 653 struct ipr_hostrcb_type_14_error {
 654         struct ipr_ext_vpd ioa_vpd;
 655         struct ipr_ext_vpd cfc_vpd;
 656         __be32 exposed_mode_adn;
 657         __be32 array_id;
 658         struct ipr_res_addr last_func_vset_res_addr;
 659         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 660         u8 protection_level[8];
 661         __be32 num_entries;
 662         struct ipr_hostrcb_array_data_entry_enhanced array_member[18];
 663 }__attribute__((packed, aligned (4)));
 664
 665 struct ipr_hostrcb_type_07_error {
 666         u8 failure_reason[64];
 667         struct ipr_vpd vpd;
 668         u32 data[222];
 669 }__attribute__((packed, aligned (4)));
 670
 671 struct ipr_hostrcb_type_17_error {
 672         u8 failure_reason[64];
 673         struct ipr_ext_vpd vpd;
 674         u32 data[476];
 675 }__attribute__((packed, aligned (4)));
 676
 677 struct ipr_hostrcb_error {
 678         __be32 failing_dev_ioasc;
 679         struct ipr_res_addr failing_dev_res_addr;
 680         __be32 failing_dev_res_handle;
 681         __be32 prc;
 682         union {
 683                 struct ipr_hostrcb_type_ff_error type_ff_error;
 684                 struct ipr_hostrcb_type_01_error type_01_error;
 685                 struct ipr_hostrcb_type_02_error type_02_error;
 686                 struct ipr_hostrcb_type_03_error type_03_error;
 687                 struct ipr_hostrcb_type_04_error type_04_error;
 688                 struct ipr_hostrcb_type_07_error type_07_error;
 689                 struct ipr_hostrcb_type_12_error type_12_error;
 690                 struct ipr_hostrcb_type_13_error type_13_error;
 691                 struct ipr_hostrcb_type_14_error type_14_error;
 692                 struct ipr_hostrcb_type_17_error type_17_error;
 693         } u;
 694 }__attribute__((packed, aligned (4)));
 695
 696 struct ipr_hostrcb_raw {
 697         __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
 698 }__attribute__((packed, aligned (4)));
 699
 700 struct ipr_hcam {
 701         u8 op_code;
 702 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE                      0xE1
 703 #define IPR_HOST_RCB_OP_CODE_LOG_DATA                           0xE2
 704
 705         u8 notify_type;
 706 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED        0x00
 707 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY                       0x01
 708 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY                       0x02
 709 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY         0x10
 710 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY       0x11
 711
 712         u8 notifications_lost;
 713 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST                      0
 714 #define IPR_HOST_RCB_NOTIFICATIONS_LOST                         0x80
 715
 716         u8 flags;
 717 #define IPR_HOSTRCB_INTERNAL_OPER       0x80
 718 #define IPR_HOSTRCB_ERR_RESP_SENT       0x40
 719
 720         u8 overlay_id;
 721 #define IPR_HOST_RCB_OVERLAY_ID_1                               0x01
 722 #define IPR_HOST_RCB_OVERLAY_ID_2                               0x02
 723 #define IPR_HOST_RCB_OVERLAY_ID_3                               0x03
 724 #define IPR_HOST_RCB_OVERLAY_ID_4                               0x04
 725 #define IPR_HOST_RCB_OVERLAY_ID_6                               0x06
 726 #define IPR_HOST_RCB_OVERLAY_ID_7                               0x07
 727 #define IPR_HOST_RCB_OVERLAY_ID_12                              0x12
 728 #define IPR_HOST_RCB_OVERLAY_ID_13                              0x13
 729 #define IPR_HOST_RCB_OVERLAY_ID_14                              0x14
 730 #define IPR_HOST_RCB_OVERLAY_ID_16                              0x16
 731 #define IPR_HOST_RCB_OVERLAY_ID_17                              0x17
 732 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT                 0xFF
 733
 734         u8 reserved1[3];
 735         __be32 ilid;
 736         __be32 time_since_last_ioa_reset;
 737         __be32 reserved2;
 738         __be32 length;
 739
 740         union {
 741                 struct ipr_hostrcb_error error;
 742                 struct ipr_hostrcb_cfg_ch_not ccn;
 743                 struct ipr_hostrcb_raw raw;
 744         } u;
 745 }__attribute__((packed, aligned (4)));
 746
 747 struct ipr_hostrcb {
 748         struct ipr_hcam hcam;
 749         dma_addr_t hostrcb_dma;
 750         struct list_head queue;
 751 };
 752
 753 /* IPR smart dump table structures */
 754 struct ipr_sdt_entry {
 755         __be32 bar_str_offset;
 756         __be32 end_offset;
 757         u8 entry_byte;
 758         u8 reserved[3];
 759
 760         u8 flags;
 761 #define IPR_SDT_ENDIAN          0x80
 762 #define IPR_SDT_VALID_ENTRY     0x20
 763
 764         u8 resv;
 765         __be16 priority;
 766 }__attribute__((packed, aligned (4)));
 767
 768 struct ipr_sdt_header {
 769         __be32 state;
 770         __be32 num_entries;
 771         __be32 num_entries_used;
 772         __be32 dump_size;
 773 }__attribute__((packed, aligned (4)));
 774
 775 struct ipr_sdt {
 776         struct ipr_sdt_header hdr;
 777         struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
 778 }__attribute__((packed, aligned (4)));
 779
 780 struct ipr_uc_sdt {
 781         struct ipr_sdt_header hdr;
 782         struct ipr_sdt_entry entry[1];
 783 }__attribute__((packed, aligned (4)));
 784
 785 /*
 786  * Driver types
 787  */
 788 struct ipr_bus_attributes {
 789         u8 bus;
 790         u8 qas_enabled;
 791         u8 bus_width;
 792         u8 reserved;
 793         u32 max_xfer_rate;
 794 };
 795
 796 struct ipr_resource_entry {
 797         struct ipr_config_table_entry cfgte;
 798         u8 needs_sync_complete:1;
 799         u8 in_erp:1;
 800         u8 add_to_ml:1;
 801         u8 del_from_ml:1;
 802         u8 resetting_device:1;
 803
 804         struct scsi_device *sdev;
 805         struct list_head queue;
 806 };
 807
 808 struct ipr_resource_hdr {
 809         u16 num_entries;
 810         u16 reserved;
 811 };
 812
 813 struct ipr_resource_table {
 814         struct ipr_resource_hdr hdr;
 815         struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
 816 };
 817
 818 struct ipr_misc_cbs {
 819         struct ipr_ioa_vpd ioa_vpd;
 820         struct ipr_inquiry_page0 page0_data;
 821         struct ipr_inquiry_page3 page3_data;
 822         struct ipr_mode_pages mode_pages;
 823         struct ipr_supported_device supp_dev;
 824 };
 825
 826 struct ipr_interrupt_offsets {
 827         unsigned long set_interrupt_mask_reg;
 828         unsigned long clr_interrupt_mask_reg;
 829         unsigned long sense_interrupt_mask_reg;
 830         unsigned long clr_interrupt_reg;
 831
 832         unsigned long sense_interrupt_reg;
 833         unsigned long ioarrin_reg;
 834         unsigned long sense_uproc_interrupt_reg;
 835         unsigned long set_uproc_interrupt_reg;
 836         unsigned long clr_uproc_interrupt_reg;
 837 };
 838
 839 struct ipr_interrupts {
 840         void __iomem *set_interrupt_mask_reg;
 841         void __iomem *clr_interrupt_mask_reg;
 842         void __iomem *sense_interrupt_mask_reg;
 843         void __iomem *clr_interrupt_reg;
 844
 845         void __iomem *sense_interrupt_reg;
 846         void __iomem *ioarrin_reg;
 847         void __iomem *sense_uproc_interrupt_reg;
 848         void __iomem *set_uproc_interrupt_reg;
 849         void __iomem *clr_uproc_interrupt_reg;
 850 };
 851
 852 struct ipr_chip_cfg_t {
 853         u32 mailbox;
 854         u8 cache_line_size;
 855         struct ipr_interrupt_offsets regs;
 856 };
 857
 858 struct ipr_chip_t {
 859         u16 vendor;
 860         u16 device;
 861         const struct ipr_chip_cfg_t *cfg;
 862 };
 863
 864 enum ipr_shutdown_type {
 865         IPR_SHUTDOWN_NORMAL = 0x00,
 866         IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
 867         IPR_SHUTDOWN_ABBREV = 0x80,
 868         IPR_SHUTDOWN_NONE = 0x100
 869 };
 870
 871 struct ipr_trace_entry {
 872         u32 time;
 873
 874         u8 op_code;
 875         u8 type;
 876 #define IPR_TRACE_START                 0x00
 877 #define IPR_TRACE_FINISH                0xff
 878         u16 cmd_index;
 879
 880         __be32 res_handle;
 881         union {
 882                 u32 ioasc;
 883                 u32 add_data;
 884                 u32 res_addr;
 885         } u;
 886 };
 887
 888 struct ipr_sglist {
 889         u32 order;
 890         u32 num_sg;
 891         u32 num_dma_sg;
 892         u32 buffer_len;
 893         struct scatterlist scatterlist[1];
 894 };
 895
 896 enum ipr_sdt_state {
 897         INACTIVE,
 898         WAIT_FOR_DUMP,
 899         GET_DUMP,
 900         ABORT_DUMP,
 901         DUMP_OBTAINED
 902 };
 903
 904 enum ipr_cache_state {
 905         CACHE_NONE,
 906         CACHE_DISABLED,
 907         CACHE_ENABLED,
 908         CACHE_INVALID
 909 };
 910
 911 /* Per-controller data */
 912 struct ipr_ioa_cfg {
 913         char eye_catcher[8];
 914 #define IPR_EYECATCHER                  "iprcfg"
 915
 916         struct list_head queue;
 917
 918         u8 allow_interrupts:1;
 919         u8 in_reset_reload:1;
 920         u8 in_ioa_bringdown:1;
 921         u8 ioa_unit_checked:1;
 922         u8 ioa_is_dead:1;
 923         u8 dump_taken:1;
 924         u8 allow_cmds:1;
 925         u8 allow_ml_add_del:1;
 926         u8 needs_hard_reset:1;
 927
 928         enum ipr_cache_state cache_state;
 929         u16 type; /* CCIN of the card */
 930
 931         u8 log_level;
 932 #define IPR_MAX_LOG_LEVEL                       4
 933 #define IPR_DEFAULT_LOG_LEVEL           2
 934
 935 #define IPR_NUM_TRACE_INDEX_BITS        8
 936 #define IPR_NUM_TRACE_ENTRIES           (1 << IPR_NUM_TRACE_INDEX_BITS)
 937 #define IPR_TRACE_SIZE  (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
 938         char trace_start[8];
 939 #define IPR_TRACE_START_LABEL                   "trace"
 940         struct ipr_trace_entry *trace;
 941         u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
 942
 943         /*
 944          * Queue for free command blocks
 945          */
 946         char ipr_free_label[8];
 947 #define IPR_FREEQ_LABEL                 "free-q"
 948         struct list_head free_q;
 949
 950         /*
 951          * Queue for command blocks outstanding to the adapter
 952          */
 953         char ipr_pending_label[8];
 954 #define IPR_PENDQ_LABEL                 "pend-q"
 955         struct list_head pending_q;
 956
 957         char cfg_table_start[8];
 958 #define IPR_CFG_TBL_START               "cfg"
 959         struct ipr_config_table *cfg_table;
 960         dma_addr_t cfg_table_dma;
 961
 962         char resource_table_label[8];
 963 #define IPR_RES_TABLE_LABEL             "res_tbl"
 964         struct ipr_resource_entry *res_entries;
 965         struct list_head free_res_q;
 966         struct list_head used_res_q;
 967
 968         char ipr_hcam_label[8];
 969 #define IPR_HCAM_LABEL                  "hcams"
 970         struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
 971         dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
 972         struct list_head hostrcb_free_q;
 973         struct list_head hostrcb_pending_q;
 974
 975         __be32 *host_rrq;
 976         dma_addr_t host_rrq_dma;
 977 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK   0xfffffffc
 978 #define IPR_HRRQ_RESP_BIT_SET                   0x00000002
 979 #define IPR_HRRQ_TOGGLE_BIT                             0x00000001
 980 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT  2
 981         volatile __be32 *hrrq_start;
 982         volatile __be32 *hrrq_end;
 983         volatile __be32 *hrrq_curr;
 984         volatile u32 toggle_bit;
 985
 986         struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
 987
 988         const struct ipr_chip_cfg_t *chip_cfg;
 989
 990         void __iomem *hdw_dma_regs;     /* iomapped PCI memory space */
 991         unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
 992         void __iomem *ioa_mailbox;
 993         struct ipr_interrupts regs;
 994
 995         u16 saved_pcix_cmd_reg;
 996         u16 reset_retries;
 997
 998         u32 errors_logged;
 999         u32 doorbell;
1000
1001         struct Scsi_Host *host;
1002         struct pci_dev *pdev;
1003         struct ipr_sglist *ucode_sglist;
1004         u8 saved_mode_page_len;
1005
1006         struct work_struct work_q;
1007
1008         wait_queue_head_t reset_wait_q;
1009
1010         struct ipr_dump *dump;
1011         enum ipr_sdt_state sdt_state;
1012
1013         struct ipr_misc_cbs *vpd_cbs;
1014         dma_addr_t vpd_cbs_dma;
1015
1016         struct pci_pool *ipr_cmd_pool;
1017
1018         struct ipr_cmnd *reset_cmd;
1019
1020         char ipr_cmd_label[8];
1021 #define IPR_CMD_LABEL           "ipr_cmnd"
1022         struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
1023         u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
1024 };
1025
1026 struct ipr_cmnd {
1027         struct ipr_ioarcb ioarcb;
1028         struct ipr_ioasa ioasa;
1029         struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
1030         struct list_head queue;
1031         struct scsi_cmnd *scsi_cmd;
1032         struct completion completion;
1033         struct timer_list timer;
1034         void (*done) (struct ipr_cmnd *);
1035         int (*job_step) (struct ipr_cmnd *);
1036         int (*job_step_failed) (struct ipr_cmnd *);
1037         u16 cmd_index;
1038         u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
1039         dma_addr_t sense_buffer_dma;
1040         unsigned short dma_use_sg;
1041         dma_addr_t dma_handle;
1042         struct ipr_cmnd *sibling;
1043         union {
1044                 enum ipr_shutdown_type shutdown_type;
1045                 struct ipr_hostrcb *hostrcb;
1046                 unsigned long time_left;
1047                 unsigned long scratch;
1048                 struct ipr_resource_entry *res;
1049                 struct scsi_device *sdev;
1050         } u;
1051
1052         struct ipr_ioa_cfg *ioa_cfg;
1053 };
1054
1055 struct ipr_ses_table_entry {
1056         char product_id[17];
1057         char compare_product_id_byte[17];
1058         u32 max_bus_speed_limit;        /* MB/sec limit for this backplane */
1059 };
1060
1061 struct ipr_dump_header {
1062         u32 eye_catcher;
1063 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1064         u32 len;
1065         u32 num_entries;
1066         u32 first_entry_offset;
1067         u32 status;
1068 #define IPR_DUMP_STATUS_SUCCESS                 0
1069 #define IPR_DUMP_STATUS_QUAL_SUCCESS            2
1070 #define IPR_DUMP_STATUS_FAILED                  0xffffffff
1071         u32 os;
1072 #define IPR_DUMP_OS_LINUX       0x4C4E5558
1073         u32 driver_name;
1074 #define IPR_DUMP_DRIVER_NAME    0x49505232
1075 }__attribute__((packed, aligned (4)));
1076
1077 struct ipr_dump_entry_header {
1078         u32 eye_catcher;
1079 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1080         u32 len;
1081         u32 num_elems;
1082         u32 offset;
1083         u32 data_type;
1084 #define IPR_DUMP_DATA_TYPE_ASCII        0x41534349
1085 #define IPR_DUMP_DATA_TYPE_BINARY       0x42494E41
1086         u32 id;
1087 #define IPR_DUMP_IOA_DUMP_ID            0x494F4131
1088 #define IPR_DUMP_LOCATION_ID            0x4C4F4341
1089 #define IPR_DUMP_TRACE_ID               0x54524143
1090 #define IPR_DUMP_DRIVER_VERSION_ID      0x44525652
1091 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
1092 #define IPR_DUMP_IOA_CTRL_BLK           0x494F4342
1093 #define IPR_DUMP_PEND_OPS               0x414F5053
1094         u32 status;
1095 }__attribute__((packed, aligned (4)));
1096
1097 struct ipr_dump_location_entry {
1098         struct ipr_dump_entry_header hdr;
1099         u8 location[BUS_ID_SIZE];
1100 }__attribute__((packed));
1101
1102 struct ipr_dump_trace_entry {
1103         struct ipr_dump_entry_header hdr;
1104         u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1105 }__attribute__((packed, aligned (4)));
1106
1107 struct ipr_dump_version_entry {
1108         struct ipr_dump_entry_header hdr;
1109         u8 version[sizeof(IPR_DRIVER_VERSION)];
1110 };
1111
1112 struct ipr_dump_ioa_type_entry {
1113         struct ipr_dump_entry_header hdr;
1114         u32 type;
1115         u32 fw_version;
1116 };
1117
1118 struct ipr_driver_dump {
1119         struct ipr_dump_header hdr;
1120         struct ipr_dump_version_entry version_entry;
1121         struct ipr_dump_location_entry location_entry;
1122         struct ipr_dump_ioa_type_entry ioa_type_entry;
1123         struct ipr_dump_trace_entry trace_entry;
1124 }__attribute__((packed));
1125
1126 struct ipr_ioa_dump {
1127         struct ipr_dump_entry_header hdr;
1128         struct ipr_sdt sdt;
1129         __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1130         u32 reserved;
1131         u32 next_page_index;
1132         u32 page_offset;
1133         u32 format;
1134 #define IPR_SDT_FMT2            2
1135 #define IPR_SDT_UNKNOWN         3
1136 }__attribute__((packed, aligned (4)));
1137
1138 struct ipr_dump {
1139         struct kref kref;
1140         struct ipr_ioa_cfg *ioa_cfg;
1141         struct ipr_driver_dump driver_dump;
1142         struct ipr_ioa_dump ioa_dump;
1143 };
1144
1145 struct ipr_error_table_t {
1146         u32 ioasc;
1147         int log_ioasa;
1148         int log_hcam;
1149         char *error;
1150 };
1151
1152 struct ipr_software_inq_lid_info {
1153         __be32 load_id;
1154         __be32 timestamp[3];
1155 }__attribute__((packed, aligned (4)));
1156
1157 struct ipr_ucode_image_header {
1158         __be32 header_length;
1159         __be32 lid_table_offset;
1160         u8 major_release;
1161         u8 card_type;
1162         u8 minor_release[2];
1163         u8 reserved[20];
1164         char eyecatcher[16];
1165         __be32 num_lids;
1166         struct ipr_software_inq_lid_info lid[1];
1167 }__attribute__((packed, aligned (4)));
1168
1169 /*
1170  * Macros
1171  */
1172 #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; }
1173
1174 #ifdef CONFIG_SCSI_IPR_TRACE
1175 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1176 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1177 #else
1178 #define ipr_create_trace_file(kobj, attr) 0
1179 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1180 #endif
1181
1182 #ifdef CONFIG_SCSI_IPR_DUMP
1183 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1184 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1185 #else
1186 #define ipr_create_dump_file(kobj, attr) 0
1187 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1188 #endif
1189
1190 /*
1191  * Error logging macros
1192  */
1193 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1194 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1195 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1196
1197 #define ipr_ra_printk(level, ioa_cfg, ra, fmt, ...) \
1198         printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, (ioa_cfg)->host->host_no, \
1199                 (ra).bus, (ra).target, (ra).lun, ##__VA_ARGS__)
1200
1201 #define ipr_ra_err(ioa_cfg, ra, fmt, ...) \
1202         ipr_ra_printk(KERN_ERR, ioa_cfg, ra, fmt, ##__VA_ARGS__)
1203
1204 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1205         ipr_ra_err(ioa_cfg, (res)->cfgte.res_addr, fmt, ##__VA_ARGS__)
1206
1207 #define ipr_phys_res_err(ioa_cfg, res, fmt, ...)                        \
1208 {                                                                       \
1209         if ((res).bus >= IPR_MAX_NUM_BUSES) {                           \
1210                 ipr_err(fmt": unknown\n", ##__VA_ARGS__);               \
1211         } else {                                                        \
1212                 ipr_err(fmt": %d:%d:%d:%d\n",                           \
1213                         ##__VA_ARGS__, (ioa_cfg)->host->host_no,        \
1214                         (res).bus, (res).target, (res).lun);            \
1215         }                                                               \
1216 }
1217
1218 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1219         __FILE__, __FUNCTION__, __LINE__)
1220
1221 #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__))
1222 #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__))
1223
1224 #define ipr_err_separator \
1225 ipr_err("----------------------------------------------------------\n")
1226
1227
1228 /*
1229  * Inlines
1230  */
1231
1232 /**
1233  * ipr_is_ioa_resource - Determine if a resource is the IOA
1234  * @res:        resource entry struct
1235  *
1236  * Return value:
1237  *      1 if IOA / 0 if not IOA
1238  **/
1239 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1240 {
1241         return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1242 }
1243
1244 /**
1245  * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1246  * @res:        resource entry struct
1247  *
1248  * Return value:
1249  *      1 if AF DASD / 0 if not AF DASD
1250  **/
1251 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1252 {
1253         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1254             !ipr_is_ioa_resource(res) &&
1255             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1256                 return 1;
1257         else
1258                 return 0;
1259 }
1260
1261 /**
1262  * ipr_is_vset_device - Determine if a resource is a VSET
1263  * @res:        resource entry struct
1264  *
1265  * Return value:
1266  *      1 if VSET / 0 if not VSET
1267  **/
1268 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1269 {
1270         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1271             !ipr_is_ioa_resource(res) &&
1272             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1273                 return 1;
1274         else
1275                 return 0;
1276 }
1277
1278 /**
1279  * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1280  * @res:        resource entry struct
1281  *
1282  * Return value:
1283  *      1 if GSCSI / 0 if not GSCSI
1284  **/
1285 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1286 {
1287         if (!ipr_is_ioa_resource(res) &&
1288             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1289                 return 1;
1290         else
1291                 return 0;
1292 }
1293
1294 /**
1295  * ipr_is_scsi_disk - Determine if a resource is a SCSI disk
1296  * @res:        resource entry struct
1297  *
1298  * Return value:
1299  *      1 if SCSI disk / 0 if not SCSI disk
1300  **/
1301 static inline int ipr_is_scsi_disk(struct ipr_resource_entry *res)
1302 {
1303         if (ipr_is_af_dasd_device(res) ||
1304             (ipr_is_gscsi(res) && IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data)))
1305                 return 1;
1306         else
1307                 return 0;
1308 }
1309
1310 /**
1311  * ipr_is_naca_model - Determine if a resource is using NACA queueing model
1312  * @res:        resource entry struct
1313  *
1314  * Return value:
1315  *      1 if NACA queueing model / 0 if not NACA queueing model
1316  **/
1317 static inline int ipr_is_naca_model(struct ipr_resource_entry *res)
1318 {
1319         if (ipr_is_gscsi(res) && IPR_QUEUEING_MODEL(res) == IPR_QUEUE_NACA_MODEL)
1320                 return 1;
1321         return 0;
1322 }
1323
1324 /**
1325  * ipr_is_device - Determine if resource address is that of a device
1326  * @res_addr:   resource address struct
1327  *
1328  * Return value:
1329  *      1 if AF / 0 if not AF
1330  **/
1331 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1332 {
1333         if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1334             (res_addr->target < (IPR_MAX_NUM_TARGETS_PER_BUS - 1)))
1335                 return 1;
1336
1337         return 0;
1338 }
1339
1340 /**
1341  * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1342  * @sdt_word:   SDT address
1343  *
1344  * Return value:
1345  *      1 if format 2 / 0 if not
1346  **/
1347 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1348 {
1349         u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1350
1351         switch (bar_sel) {
1352         case IPR_SDT_FMT2_BAR0_SEL:
1353         case IPR_SDT_FMT2_BAR1_SEL:
1354         case IPR_SDT_FMT2_BAR2_SEL:
1355         case IPR_SDT_FMT2_BAR3_SEL:
1356         case IPR_SDT_FMT2_BAR4_SEL:
1357         case IPR_SDT_FMT2_BAR5_SEL:
1358         case IPR_SDT_FMT2_EXP_ROM_SEL:
1359                 return 1;
1360         };
1361
1362         return 0;
1363 }
1364
1365 #endif