[IPV4]: Correct rp_filter help text.
[linux-2.6/verdex.git] / arch / arm / mach-footbridge / dc21285-timer.c
blob3a63941d43beceea7a022c5c928ad3caa459afde
1 /*
2 * linux/arch/arm/mach-footbridge/dc21285-timer.c
4 * Copyright (C) 1998 Russell King.
5 * Copyright (C) 1998 Phil Blundell
6 */
7 #include <linux/init.h>
8 #include <linux/interrupt.h>
9 #include <linux/irq.h>
11 #include <asm/irq.h>
13 #include <asm/hardware/dec21285.h>
14 #include <asm/mach/time.h>
16 #include "common.h"
19 * Footbridge timer 1 support.
21 static unsigned long timer1_latch;
23 static unsigned long timer1_gettimeoffset (void)
25 unsigned long value = timer1_latch - *CSR_TIMER1_VALUE;
27 return ((tick_nsec / 1000) * value) / timer1_latch;
30 static irqreturn_t
31 timer1_interrupt(int irq, void *dev_id)
33 write_seqlock(&xtime_lock);
35 *CSR_TIMER1_CLR = 0;
37 timer_tick();
39 write_sequnlock(&xtime_lock);
41 return IRQ_HANDLED;
44 static struct irqaction footbridge_timer_irq = {
45 .name = "Timer1 timer tick",
46 .handler = timer1_interrupt,
47 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
51 * Set up timer interrupt.
53 static void __init footbridge_timer_init(void)
55 timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
57 *CSR_TIMER1_CLR = 0;
58 *CSR_TIMER1_LOAD = timer1_latch;
59 *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
61 setup_irq(IRQ_TIMER1, &footbridge_timer_irq);
63 isa_rtc_init();
66 struct sys_timer footbridge_timer = {
67 .init = footbridge_timer_init,
68 .offset = timer1_gettimeoffset,