arch/arm/mach-s3c2410/mach-qt2410.c

   1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
   2  *
   3  * Copyright (C) 2006 by OpenMoko, Inc.
   4  * Author: Harald Welte <laforge@openmoko.org>
   5  * All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/types.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/list.h>
  28 #include <linux/timer.h>
  29 #include <linux/init.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/serial_core.h>
  32 #include <linux/spi/spi.h>
  33 #include <linux/spi/spi_bitbang.h>
  34
  35 #include <linux/mtd/mtd.h>
  36 #include <linux/mtd/nand.h>
  37 #include <linux/mtd/nand_ecc.h>
  38 #include <linux/mtd/partitions.h>
  39
  40 #include <asm/mach/arch.h>
  41 #include <asm/mach/map.h>
  42 #include <asm/mach/irq.h>
  43
  44 #include <asm/hardware.h>
  45 #include <asm/io.h>
  46 #include <asm/irq.h>
  47 #include <asm/mach-types.h>
  48
  49 #include <asm/arch/regs-gpio.h>
  50 #include <asm/arch/leds-gpio.h>
  51 #include <asm/arch/regs-serial.h>
  52 #include <asm/arch/fb.h>
  53 #include <asm/arch/nand.h>
  54 #include <asm/arch/udc.h>
  55 #include <asm/arch/spi.h>
  56 #include <asm/arch/spi-gpio.h>
  57
  58 #include <asm/plat-s3c24xx/common-smdk.h>
  59 #include <asm/plat-s3c24xx/devs.h>
  60 #include <asm/plat-s3c24xx/cpu.h>
  61 #include <asm/plat-s3c24xx/pm.h>
  62
  63 static struct map_desc qt2410_iodesc[] __initdata = {
  64         { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
  65 };
  66
  67 #define UCON S3C2410_UCON_DEFAULT
  68 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  69 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  70
  71 static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
  72         [0] = {
  73                 .hwport      = 0,
  74                 .flags       = 0,
  75                 .ucon        = UCON,
  76                 .ulcon       = ULCON,
  77                 .ufcon       = UFCON,
  78         },
  79         [1] = {
  80                 .hwport      = 1,
  81                 .flags       = 0,
  82                 .ucon        = UCON,
  83                 .ulcon       = ULCON,
  84                 .ufcon       = UFCON,
  85         },
  86         [2] = {
  87                 .hwport      = 2,
  88                 .flags       = 0,
  89                 .ucon        = UCON,
  90                 .ulcon       = ULCON,
  91                 .ufcon       = UFCON,
  92         }
  93 };
  94
  95 /* LCD driver info */
  96
  97 /* Configuration for 640x480 SHARP LQ080V3DG01 */
  98 static struct s3c2410fb_mach_info qt2410_biglcd_cfg __initdata = {
  99         .regs   = {
 100
 101                 .lcdcon1        = S3C2410_LCDCON1_TFT16BPP |
 102                                   S3C2410_LCDCON1_TFT |
 103                                   S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
 104
 105                 .lcdcon2        = S3C2410_LCDCON2_VBPD(18) |    /* 19 */
 106                                   S3C2410_LCDCON2_LINEVAL(479) |
 107                                   S3C2410_LCDCON2_VFPD(10) |    /* 11 */
 108                                   S3C2410_LCDCON2_VSPW(14),     /* 15 */
 109
 110                 .lcdcon3        = S3C2410_LCDCON3_HBPD(43) |    /* 44 */
 111                                   S3C2410_LCDCON3_HOZVAL(639) | /* 640 */
 112                                   S3C2410_LCDCON3_HFPD(115),    /* 116 */
 113
 114                 .lcdcon4        = S3C2410_LCDCON4_MVAL(0) |
 115                                   S3C2410_LCDCON4_HSPW(95),     /* 96 */
 116
 117                 .lcdcon5        = S3C2410_LCDCON5_FRM565 |
 118                                   S3C2410_LCDCON5_INVVLINE |
 119                                   S3C2410_LCDCON5_INVVFRAME |
 120                                   S3C2410_LCDCON5_PWREN |
 121                                   S3C2410_LCDCON5_HWSWP,
 122         },
 123
 124         .lpcsel         = ((0xCE6) & ~7) | 1<<4,
 125
 126         .width          = 640,
 127         .height         = 480,
 128
 129         .xres           = {
 130                 .min    = 640,
 131                 .max    = 640,
 132                 .defval = 640,
 133         },
 134
 135         .yres           = {
 136                 .min    = 480,
 137                 .max    = 480,
 138                 .defval = 480,
 139         },
 140
 141         .bpp            = {
 142                 .min    = 16,
 143                 .max    = 16,
 144                 .defval = 16,
 145         },
 146 };
 147
 148 /* Configuration for 480x640 toppoly TD028TTEC1 */
 149 static struct s3c2410fb_mach_info qt2410_prodlcd_cfg __initdata = {
 150         .regs   = {
 151
 152                 .lcdcon1        = S3C2410_LCDCON1_TFT16BPP |
 153                                   S3C2410_LCDCON1_TFT |
 154                                   S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
 155
 156                 .lcdcon2        = S3C2410_LCDCON2_VBPD(1) |     /* 2 */
 157                                   S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
 158                                   S3C2410_LCDCON2_VFPD(3) |     /* 4 */
 159                                   S3C2410_LCDCON2_VSPW(1),      /* 2 */
 160
 161                 .lcdcon3        = S3C2410_LCDCON3_HBPD(7) |     /* 8 */
 162                                   S3C2410_LCDCON3_HOZVAL(479) | /* 479 */
 163                                   S3C2410_LCDCON3_HFPD(23),     /* 24 */
 164
 165                 .lcdcon4        = S3C2410_LCDCON4_MVAL(0) |
 166                                   S3C2410_LCDCON4_HSPW(7),      /* 8 */
 167
 168                 .lcdcon5        = S3C2410_LCDCON5_FRM565 |
 169                                   S3C2410_LCDCON5_INVVLINE |
 170                                   S3C2410_LCDCON5_INVVFRAME |
 171                                   S3C2410_LCDCON5_PWREN |
 172                                   S3C2410_LCDCON5_HWSWP,
 173         },
 174
 175         .lpcsel         = ((0xCE6) & ~7) | 1<<4,
 176
 177         .width          = 480,
 178         .height         = 640,
 179
 180         .xres           = {
 181                 .min    = 480,
 182                 .max    = 480,
 183                 .defval = 480,
 184         },
 185
 186         .yres           = {
 187                 .min    = 640,
 188                 .max    = 640,
 189                 .defval = 640,
 190         },
 191
 192         .bpp            = {
 193                 .min    = 16,
 194                 .max    = 16,
 195                 .defval = 16,
 196         },
 197 };
 198
 199 /* Config for 240x320 LCD */
 200 static struct s3c2410fb_mach_info qt2410_lcd_cfg __initdata = {
 201         .regs   = {
 202
 203                 .lcdcon1        = S3C2410_LCDCON1_TFT16BPP |
 204                                   S3C2410_LCDCON1_TFT |
 205                                   S3C2410_LCDCON1_CLKVAL(0x04),
 206
 207                 .lcdcon2        = S3C2410_LCDCON2_VBPD(1) |
 208                                   S3C2410_LCDCON2_LINEVAL(319) |
 209                                   S3C2410_LCDCON2_VFPD(6) |
 210                                   S3C2410_LCDCON2_VSPW(3),
 211
 212                 .lcdcon3        = S3C2410_LCDCON3_HBPD(12) |
 213                                   S3C2410_LCDCON3_HOZVAL(239) |
 214                                   S3C2410_LCDCON3_HFPD(7),
 215
 216                 .lcdcon4        = S3C2410_LCDCON4_MVAL(0) |
 217                                   S3C2410_LCDCON4_HSPW(3),
 218
 219                 .lcdcon5        = S3C2410_LCDCON5_FRM565 |
 220                                   S3C2410_LCDCON5_INVVLINE |
 221                                   S3C2410_LCDCON5_INVVFRAME |
 222                                   S3C2410_LCDCON5_PWREN |
 223                                   S3C2410_LCDCON5_HWSWP,
 224         },
 225
 226         .lpcsel         = ((0xCE6) & ~7) | 1<<4,
 227
 228         .width          = 240,
 229         .height         = 320,
 230
 231         .xres           = {
 232                 .min    = 240,
 233                 .max    = 240,
 234                 .defval = 240,
 235         },
 236
 237         .yres           = {
 238                 .min    = 320,
 239                 .max    = 320,
 240                 .defval = 320,
 241         },
 242
 243         .bpp            = {
 244                 .min    = 16,
 245                 .max    = 16,
 246                 .defval = 16,
 247         },
 248 };
 249
 250 /* CS8900 */
 251
 252 static struct resource qt2410_cs89x0_resources[] = {
 253         [0] = {
 254                 .start  = 0x19000000,
 255                 .end    = 0x19000000 + 16,
 256                 .flags  = IORESOURCE_MEM,
 257         },
 258         [1] = {
 259                 .start  = IRQ_EINT9,
 260                 .end    = IRQ_EINT9,
 261                 .flags  = IORESOURCE_IRQ,
 262         },
 263 };
 264
 265 static struct platform_device qt2410_cs89x0 = {
 266         .name           = "cirrus-cs89x0",
 267         .num_resources  = ARRAY_SIZE(qt2410_cs89x0_resources),
 268         .resource       = qt2410_cs89x0_resources,
 269 };
 270
 271 /* LED */
 272
 273 static struct s3c24xx_led_platdata qt2410_pdata_led = {
 274         .gpio           = S3C2410_GPB0,
 275         .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
 276         .name           = "led",
 277         .def_trigger    = "timer",
 278 };
 279
 280 static struct platform_device qt2410_led = {
 281         .name           = "s3c24xx_led",
 282         .id             = 0,
 283         .dev            = {
 284                 .platform_data = &qt2410_pdata_led,
 285         },
 286 };
 287
 288 /* SPI */
 289
 290 static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
 291 {
 292         switch (cs) {
 293         case BITBANG_CS_ACTIVE:
 294                 s3c2410_gpio_setpin(S3C2410_GPB5, 0);
 295                 break;
 296         case BITBANG_CS_INACTIVE:
 297                 s3c2410_gpio_setpin(S3C2410_GPB5, 1);
 298                 break;
 299         }
 300 }
 301
 302 static struct s3c2410_spigpio_info spi_gpio_cfg = {
 303         .pin_clk        = S3C2410_GPG7,
 304         .pin_mosi       = S3C2410_GPG6,
 305         .pin_miso       = S3C2410_GPG5,
 306         .chip_select    = &spi_gpio_cs,
 307 };
 308
 309
 310 static struct platform_device qt2410_spi = {
 311         .name             = "s3c24xx-spi-gpio",
 312         .id               = 1,
 313         .dev = {
 314                 .platform_data = &spi_gpio_cfg,
 315         },
 316 };
 317
 318 /* Board devices */
 319
 320 static struct platform_device *qt2410_devices[] __initdata = {
 321         &s3c_device_usb,
 322         &s3c_device_lcd,
 323         &s3c_device_wdt,
 324         &s3c_device_i2c,
 325         &s3c_device_iis,
 326         &s3c_device_sdi,
 327         &s3c_device_usbgadget,
 328         &qt2410_spi,
 329         &qt2410_cs89x0,
 330         &qt2410_led,
 331 };
 332
 333 static struct mtd_partition qt2410_nand_part[] = {
 334         [0] = {
 335                 .name   = "U-Boot",
 336                 .size   = 0x30000,
 337                 .offset = 0,
 338         },
 339         [1] = {
 340                 .name   = "U-Boot environment",
 341                 .offset = 0x30000,
 342                 .size   = 0x4000,
 343         },
 344         [2] = {
 345                 .name   = "kernel",
 346                 .offset = 0x34000,
 347                 .size   = SZ_2M,
 348         },
 349         [3] = {
 350                 .name   = "initrd",
 351                 .offset = 0x234000,
 352                 .size   = SZ_4M,
 353         },
 354         [4] = {
 355                 .name   = "jffs2",
 356                 .offset = 0x634000,
 357                 .size   = 0x39cc000,
 358         },
 359 };
 360
 361 static struct s3c2410_nand_set qt2410_nand_sets[] = {
 362         [0] = {
 363                 .name           = "NAND",
 364                 .nr_chips       = 1,
 365                 .nr_partitions  = ARRAY_SIZE(qt2410_nand_part),
 366                 .partitions     = qt2410_nand_part,
 367         },
 368 };
 369
 370 /* choose a set of timings which should suit most 512Mbit
 371  * chips and beyond.
 372  */
 373
 374 static struct s3c2410_platform_nand qt2410_nand_info = {
 375         .tacls          = 20,
 376         .twrph0         = 60,
 377         .twrph1         = 20,
 378         .nr_sets        = ARRAY_SIZE(qt2410_nand_sets),
 379         .sets           = qt2410_nand_sets,
 380 };
 381
 382 /* UDC */
 383
 384 static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
 385 };
 386
 387 static char tft_type = 's';
 388
 389 static int __init qt2410_tft_setup(char *str)
 390 {
 391         tft_type = str[0];
 392         return 1;
 393 }
 394
 395 __setup("tft=", qt2410_tft_setup);
 396
 397 static void __init qt2410_map_io(void)
 398 {
 399         s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
 400         s3c24xx_init_clocks(12*1000*1000);
 401         s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
 402 }
 403
 404 static void __init qt2410_machine_init(void)
 405 {
 406         s3c_device_nand.dev.platform_data = &qt2410_nand_info;
 407
 408         switch (tft_type) {
 409         case 'p': /* production */
 410                 s3c24xx_fb_set_platdata(&qt2410_prodlcd_cfg);
 411                 break;
 412         case 'b': /* big */
 413                 s3c24xx_fb_set_platdata(&qt2410_biglcd_cfg);
 414                 break;
 415         case 's': /* small */
 416         default:
 417                 s3c24xx_fb_set_platdata(&qt2410_lcd_cfg);
 418                 break;
 419         }
 420
 421         s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPIO_OUTPUT);
 422         s3c2410_gpio_setpin(S3C2410_GPB0, 1);
 423
 424         s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
 425
 426         s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT);
 427
 428         platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
 429         s3c2410_pm_init();
 430 }
 431
 432 MACHINE_START(QT2410, "QT2410")
 433         .phys_io        = S3C2410_PA_UART,
 434         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
 435         .boot_params    = S3C2410_SDRAM_PA + 0x100,
 436         .map_io         = qt2410_map_io,
 437         .init_irq       = s3c24xx_init_irq,
 438         .init_machine   = qt2410_machine_init,
 439         .timer          = &s3c24xx_timer,
 440 MACHINE_END
 441
 442