mips: rename offsets.c to asm-offsets.c
[linux-2.6/verdex.git] / arch / ppc / platforms / 4xx / ebony.h
blobd08faa46a0aef5b9e5e49a1761145ddaec9e175a
1 /*
2 * arch/ppc/platforms/ebony.h
4 * Ebony board definitions
6 * Matt Porter <mporter@mvista.com>
8 * Copyright 2002 MontaVista Software Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #ifdef __KERNEL__
17 #ifndef __ASM_EBONY_H__
18 #define __ASM_EBONY_H__
20 #include <linux/config.h>
21 #include <platforms/4xx/ibm440gp.h>
23 /* F/W TLB mapping used in bootloader glue to reset EMAC */
24 #define PPC44x_EMAC0_MR0 0xE0000800
26 /* Where to find the MAC info */
27 #define EBONY_OPENBIOS_MAC_BASE 0xfffffe0c
28 #define EBONY_OPENBIOS_MAC_OFFSET 0x0c
30 /* Default clock rates for Rev. B and Rev. C silicon */
31 #define EBONY_440GP_RB_SYSCLK 33000000
32 #define EBONY_440GP_RC_SYSCLK 400000000
34 /* RTC/NVRAM location */
35 #define EBONY_RTC_ADDR 0x0000000148000000ULL
36 #define EBONY_RTC_SIZE 0x2000
38 /* Flash */
39 #define EBONY_FPGA_ADDR 0x0000000148300000ULL
40 #define EBONY_BOOT_SMALL_FLASH(x) (x & 0x20)
41 #define EBONY_ONBRD_FLASH_EN(x) (x & 0x02)
42 #define EBONY_FLASH_SEL(x) (x & 0x01)
43 #define EBONY_SMALL_FLASH_LOW1 0x00000001ff800000ULL
44 #define EBONY_SMALL_FLASH_LOW2 0x00000001ff880000ULL
45 #define EBONY_SMALL_FLASH_HIGH1 0x00000001fff00000ULL
46 #define EBONY_SMALL_FLASH_HIGH2 0x00000001fff80000ULL
47 #define EBONY_SMALL_FLASH_SIZE 0x80000
48 #define EBONY_LARGE_FLASH_LOW 0x00000001ff800000ULL
49 #define EBONY_LARGE_FLASH_HIGH 0x00000001ffc00000ULL
50 #define EBONY_LARGE_FLASH_SIZE 0x400000
52 #define EBONY_SMALL_FLASH_BASE 0x00000001fff80000ULL
53 #define EBONY_LARGE_FLASH_BASE 0x00000001ff800000ULL
56 * Serial port defines
59 #if defined(__BOOTER__)
60 /* OpenBIOS defined UART mappings, used by bootloader shim */
61 #define UART0_IO_BASE 0xE0000200
62 #define UART1_IO_BASE 0xE0000300
63 #else
64 /* head_44x.S created UART mapping, used before early_serial_setup.
65 * We cannot use default OpenBIOS UART mappings because they
66 * don't work for configurations with more than 512M RAM. --ebs
68 #define UART0_IO_BASE 0xF0000200
69 #define UART1_IO_BASE 0xF0000300
70 #endif
72 /* external Epson SG-615P */
73 #define BASE_BAUD 691200
75 #define STD_UART_OP(num) \
76 { 0, BASE_BAUD, 0, UART##num##_INT, \
77 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
78 iomem_base: (void*)UART##num##_IO_BASE, \
79 io_type: SERIAL_IO_MEM},
81 #define SERIAL_PORT_DFNS \
82 STD_UART_OP(0) \
83 STD_UART_OP(1)
85 /* PCI support */
86 #define EBONY_PCI_LOWER_IO 0x00000000
87 #define EBONY_PCI_UPPER_IO 0x0000ffff
88 #define EBONY_PCI_LOWER_MEM 0x80002000
89 #define EBONY_PCI_UPPER_MEM 0xffffefff
91 #define EBONY_PCI_CFGREGS_BASE 0x000000020ec00000
92 #define EBONY_PCI_CFGA_PLB32 0x0ec00000
93 #define EBONY_PCI_CFGD_PLB32 0x0ec00004
95 #define EBONY_PCI_IO_BASE 0x0000000208000000ULL
96 #define EBONY_PCI_IO_SIZE 0x00010000
97 #define EBONY_PCI_MEM_OFFSET 0x00000000
99 #endif /* __ASM_EBONY_H__ */
100 #endif /* __KERNEL__ */