mips: rename offsets.c to asm-offsets.c
[linux-2.6/verdex.git] / arch / ppc / platforms / 4xx / ibm440ep.c
blob4712de8ff80fd3b750a7f54b9db95578be418c53
1 /*
2 * arch/ppc/platforms/4xx/ibm440ep.c
4 * PPC440EP I/O descriptions
6 * Wade Farnsworth <wfarnsworth@mvista.com>
7 * Copyright 2004 MontaVista Software Inc.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <platforms/4xx/ibm440ep.h>
18 #include <asm/ocp.h>
19 #include <asm/ppc4xx_pic.h>
21 static struct ocp_func_emac_data ibm440ep_emac0_def = {
22 .rgmii_idx = -1, /* No RGMII */
23 .rgmii_mux = -1, /* No RGMII */
24 .zmii_idx = 0, /* ZMII device index */
25 .zmii_mux = 0, /* ZMII input of this EMAC */
26 .mal_idx = 0, /* MAL device index */
27 .mal_rx_chan = 0, /* MAL rx channel number */
28 .mal_tx_chan = 0, /* MAL tx channel number */
29 .wol_irq = 61, /* WOL interrupt number */
30 .mdio_idx = -1, /* No shared MDIO */
31 .tah_idx = -1, /* No TAH */
34 static struct ocp_func_emac_data ibm440ep_emac1_def = {
35 .rgmii_idx = -1, /* No RGMII */
36 .rgmii_mux = -1, /* No RGMII */
37 .zmii_idx = 0, /* ZMII device index */
38 .zmii_mux = 1, /* ZMII input of this EMAC */
39 .mal_idx = 0, /* MAL device index */
40 .mal_rx_chan = 1, /* MAL rx channel number */
41 .mal_tx_chan = 2, /* MAL tx channel number */
42 .wol_irq = 63, /* WOL interrupt number */
43 .mdio_idx = -1, /* No shared MDIO */
44 .tah_idx = -1, /* No TAH */
46 OCP_SYSFS_EMAC_DATA()
48 static struct ocp_func_mal_data ibm440ep_mal0_def = {
49 .num_tx_chans = 4, /* Number of TX channels */
50 .num_rx_chans = 2, /* Number of RX channels */
51 .txeob_irq = 10, /* TX End Of Buffer IRQ */
52 .rxeob_irq = 11, /* RX End Of Buffer IRQ */
53 .txde_irq = 33, /* TX Descriptor Error IRQ */
54 .rxde_irq = 34, /* RX Descriptor Error IRQ */
55 .serr_irq = 32, /* MAL System Error IRQ */
56 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
58 OCP_SYSFS_MAL_DATA()
60 static struct ocp_func_iic_data ibm440ep_iic0_def = {
61 .fast_mode = 0, /* Use standad mode (100Khz) */
64 static struct ocp_func_iic_data ibm440ep_iic1_def = {
65 .fast_mode = 0, /* Use standad mode (100Khz) */
67 OCP_SYSFS_IIC_DATA()
69 struct ocp_def core_ocp[] = {
70 { .vendor = OCP_VENDOR_IBM,
71 .function = OCP_FUNC_OPB,
72 .index = 0,
73 .paddr = 0x0EF600000ULL,
74 .irq = OCP_IRQ_NA,
75 .pm = OCP_CPM_NA,
77 { .vendor = OCP_VENDOR_IBM,
78 .function = OCP_FUNC_16550,
79 .index = 0,
80 .paddr = PPC440EP_UART0_ADDR,
81 .irq = UART0_INT,
82 .pm = IBM_CPM_UART0,
84 { .vendor = OCP_VENDOR_IBM,
85 .function = OCP_FUNC_16550,
86 .index = 1,
87 .paddr = PPC440EP_UART1_ADDR,
88 .irq = UART1_INT,
89 .pm = IBM_CPM_UART1,
91 { .vendor = OCP_VENDOR_IBM,
92 .function = OCP_FUNC_16550,
93 .index = 2,
94 .paddr = PPC440EP_UART2_ADDR,
95 .irq = UART2_INT,
96 .pm = IBM_CPM_UART2,
98 { .vendor = OCP_VENDOR_IBM,
99 .function = OCP_FUNC_16550,
100 .index = 3,
101 .paddr = PPC440EP_UART3_ADDR,
102 .irq = UART3_INT,
103 .pm = IBM_CPM_UART3,
105 { .vendor = OCP_VENDOR_IBM,
106 .function = OCP_FUNC_IIC,
107 .index = 0,
108 .paddr = 0x0EF600700ULL,
109 .irq = 2,
110 .pm = IBM_CPM_IIC0,
111 .additions = &ibm440ep_iic0_def,
112 .show = &ocp_show_iic_data
114 { .vendor = OCP_VENDOR_IBM,
115 .function = OCP_FUNC_IIC,
116 .index = 1,
117 .paddr = 0x0EF600800ULL,
118 .irq = 7,
119 .pm = IBM_CPM_IIC1,
120 .additions = &ibm440ep_iic1_def,
121 .show = &ocp_show_iic_data
123 { .vendor = OCP_VENDOR_IBM,
124 .function = OCP_FUNC_GPIO,
125 .index = 0,
126 .paddr = 0x0EF600B00ULL,
127 .irq = OCP_IRQ_NA,
128 .pm = IBM_CPM_GPIO0,
130 { .vendor = OCP_VENDOR_IBM,
131 .function = OCP_FUNC_GPIO,
132 .index = 1,
133 .paddr = 0x0EF600C00ULL,
134 .irq = OCP_IRQ_NA,
135 .pm = OCP_CPM_NA,
137 { .vendor = OCP_VENDOR_IBM,
138 .function = OCP_FUNC_MAL,
139 .paddr = OCP_PADDR_NA,
140 .irq = OCP_IRQ_NA,
141 .pm = OCP_CPM_NA,
142 .additions = &ibm440ep_mal0_def,
143 .show = &ocp_show_mal_data,
145 { .vendor = OCP_VENDOR_IBM,
146 .function = OCP_FUNC_EMAC,
147 .index = 0,
148 .paddr = 0x0EF600E00ULL,
149 .irq = 60,
150 .pm = OCP_CPM_NA,
151 .additions = &ibm440ep_emac0_def,
152 .show = &ocp_show_emac_data,
154 { .vendor = OCP_VENDOR_IBM,
155 .function = OCP_FUNC_EMAC,
156 .index = 1,
157 .paddr = 0x0EF600F00ULL,
158 .irq = 62,
159 .pm = OCP_CPM_NA,
160 .additions = &ibm440ep_emac1_def,
161 .show = &ocp_show_emac_data,
163 { .vendor = OCP_VENDOR_IBM,
164 .function = OCP_FUNC_ZMII,
165 .paddr = 0x0EF600D00ULL,
166 .irq = OCP_IRQ_NA,
167 .pm = OCP_CPM_NA,
169 { .vendor = OCP_VENDOR_INVALID
173 /* Polarity and triggering settings for internal interrupt sources */
174 struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
175 { .polarity = 0xffbffe03,
176 .triggering = 0xfffffe00,
177 .ext_irq_mask = 0x000001fc, /* IRQ0 - IRQ6 */
179 { .polarity = 0xffffc6ef,
180 .triggering = 0xffffc7ff,
181 .ext_irq_mask = 0x00003800, /* IRQ7 - IRQ9 */
185 static struct resource usb_gadget_resources[] = {
186 [0] = {
187 .start = 0x050000100ULL,
188 .end = 0x05000017FULL,
189 .flags = IORESOURCE_MEM,
191 [1] = {
192 .start = 55,
193 .end = 55,
194 .flags = IORESOURCE_IRQ,
198 static u64 dma_mask = 0xffffffffULL;
200 static struct platform_device usb_gadget_device = {
201 .name = "musbhsfc",
202 .id = 0,
203 .num_resources = ARRAY_SIZE(usb_gadget_resources),
204 .resource = usb_gadget_resources,
205 .dev = {
206 .dma_mask = &dma_mask,
207 .coherent_dma_mask = 0xffffffffULL,
211 static struct platform_device *ibm440ep_devs[] __initdata = {
212 &usb_gadget_device,
215 static int __init
216 ibm440ep_platform_add_devices(void)
218 return platform_add_devices(ibm440ep_devs, ARRAY_SIZE(ibm440ep_devs));
220 arch_initcall(ibm440ep_platform_add_devices);