arch/ppc/platforms/85xx/mpc85xx_ads_common.c

   1 /*
   2  * arch/ppc/platforms/85xx/mpc85xx_ads_common.c
   3  *
   4  * MPC85xx ADS board common routines
   5  *
   6  * Maintainer: Kumar Gala <kumar.gala@freescale.com>
   7  *
   8  * Copyright 2004 Freescale Semiconductor Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/stddef.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/errno.h>
  21 #include <linux/reboot.h>
  22 #include <linux/pci.h>
  23 #include <linux/kdev_t.h>
  24 #include <linux/major.h>
  25 #include <linux/console.h>
  26 #include <linux/delay.h>
  27 #include <linux/irq.h>
  28 #include <linux/seq_file.h>
  29 #include <linux/serial.h>
  30 #include <linux/module.h>
  31
  32 #include <asm/system.h>
  33 #include <asm/pgtable.h>
  34 #include <asm/page.h>
  35 #include <asm/atomic.h>
  36 #include <asm/time.h>
  37 #include <asm/io.h>
  38 #include <asm/machdep.h>
  39 #include <asm/open_pic.h>
  40 #include <asm/bootinfo.h>
  41 #include <asm/pci-bridge.h>
  42 #include <asm/mpc85xx.h>
  43 #include <asm/irq.h>
  44 #include <asm/immap_85xx.h>
  45 #include <asm/ppc_sys.h>
  46
  47 #include <mm/mmu_decl.h>
  48
  49 #include <platforms/85xx/mpc85xx_ads_common.h>
  50
  51 #ifndef CONFIG_PCI
  52 unsigned long isa_io_base = 0;
  53 unsigned long isa_mem_base = 0;
  54 #endif
  55
  56 extern unsigned long total_memory;      /* in mm/init */
  57
  58 unsigned char __res[sizeof (bd_t)];
  59
  60 /* Internal interrupts are all Level Sensitive, and Positive Polarity */
  61 static u_char mpc85xx_ads_openpic_initsenses[] __initdata = {
  62         MPC85XX_INTERNAL_IRQ_SENSES,
  63         0x0,                                            /* External  0: */
  64 #if defined(CONFIG_PCI)
  65         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* External 1: PCI slot 0 */
  66         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* External 2: PCI slot 1 */
  67         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* External 3: PCI slot 2 */
  68         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* External 4: PCI slot 3 */
  69 #else
  70         0x0,                            /* External  1: */
  71         0x0,                            /* External  2: */
  72         0x0,                            /* External  3: */
  73         0x0,                            /* External  4: */
  74 #endif
  75         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* External 5: PHY */
  76         0x0,                            /* External  6: */
  77         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* External 7: PHY */
  78         0x0,                            /* External  8: */
  79         0x0,                            /* External  9: */
  80         0x0,                            /* External 10: */
  81         0x0,                            /* External 11: */
  82 };
  83
  84 /* ************************************************************************ */
  85 int
  86 mpc85xx_ads_show_cpuinfo(struct seq_file *m)
  87 {
  88         uint pvid, svid, phid1;
  89         uint memsize = total_memory;
  90         bd_t *binfo = (bd_t *) __res;
  91         unsigned int freq;
  92
  93         /* get the core frequency */
  94         freq = binfo->bi_intfreq;
  95
  96         pvid = mfspr(SPRN_PVR);
  97         svid = mfspr(SPRN_SVR);
  98
  99         seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
 100         seq_printf(m, "Machine\t\t: mpc%sads\n", cur_ppc_sys_spec->ppc_sys_name);
 101         seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
 102         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 103         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 104
 105         /* Display cpu Pll setting */
 106         phid1 = mfspr(SPRN_HID1);
 107         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 108
 109         /* Display the amount of memory */
 110         seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
 111
 112         return 0;
 113 }
 114
 115 void __init
 116 mpc85xx_ads_init_IRQ(void)
 117 {
 118         bd_t *binfo = (bd_t *) __res;
 119         /* Determine the Physical Address of the OpenPIC regs */
 120         phys_addr_t OpenPIC_PAddr =
 121             binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
 122         OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
 123         OpenPIC_InitSenses = mpc85xx_ads_openpic_initsenses;
 124         OpenPIC_NumInitSenses = sizeof (mpc85xx_ads_openpic_initsenses);
 125
 126         /* Skip reserved space and internal sources */
 127         openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
 128         /* Map PIC IRQs 0-11 */
 129         openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
 130
 131         /* we let openpic interrupts starting from an offset, to
 132          * leave space for cascading interrupts underneath.
 133          */
 134         openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
 135
 136         return;
 137 }
 138
 139 #ifdef CONFIG_PCI
 140 /*
 141  * interrupt routing
 142  */
 143
 144 int
 145 mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
 146 {
 147         static char pci_irq_table[][4] =
 148             /*
 149              * This is little evil, but works around the fact
 150              * that revA boards have IDSEL starting at 18
 151              * and others boards (older) start at 12
 152              *
 153              *      PCI IDSEL/INTPIN->INTLINE
 154              *       A      B      C      D
 155              */
 156         {
 157                 {PIRQA, PIRQB, PIRQC, PIRQD},   /* IDSEL 2 */
 158                 {PIRQD, PIRQA, PIRQB, PIRQC},
 159                 {PIRQC, PIRQD, PIRQA, PIRQB},
 160                 {PIRQB, PIRQC, PIRQD, PIRQA},   /* IDSEL 5 */
 161                 {0, 0, 0, 0},   /* -- */
 162                 {0, 0, 0, 0},   /* -- */
 163                 {0, 0, 0, 0},   /* -- */
 164                 {0, 0, 0, 0},   /* -- */
 165                 {0, 0, 0, 0},   /* -- */
 166                 {0, 0, 0, 0},   /* -- */
 167                 {PIRQA, PIRQB, PIRQC, PIRQD},   /* IDSEL 12 */
 168                 {PIRQD, PIRQA, PIRQB, PIRQC},
 169                 {PIRQC, PIRQD, PIRQA, PIRQB},
 170                 {PIRQB, PIRQC, PIRQD, PIRQA},   /* IDSEL 15 */
 171                 {0, 0, 0, 0},   /* -- */
 172                 {0, 0, 0, 0},   /* -- */
 173                 {PIRQA, PIRQB, PIRQC, PIRQD},   /* IDSEL 18 */
 174                 {PIRQD, PIRQA, PIRQB, PIRQC},
 175                 {PIRQC, PIRQD, PIRQA, PIRQB},
 176                 {PIRQB, PIRQC, PIRQD, PIRQA},   /* IDSEL 21 */
 177         };
 178
 179         const long min_idsel = 2, max_idsel = 21, irqs_per_slot = 4;
 180         return PCI_IRQ_TABLE_LOOKUP;
 181 }
 182
 183 int
 184 mpc85xx_exclude_device(u_char bus, u_char devfn)
 185 {
 186         if (bus == 0 && PCI_SLOT(devfn) == 0)
 187                 return PCIBIOS_DEVICE_NOT_FOUND;
 188         else
 189                 return PCIBIOS_SUCCESSFUL;
 190 }
 191
 192 #endif /* CONFIG_PCI */