1 /*****************************************************************************
3 * ESS Maestro/Maestro-2/Maestro-2E driver for Linux 2.[23].x
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * (c) Copyright 1999 Alan Cox <alan.cox@linux.org>
21 * Based heavily on SonicVibes.c:
22 * Copyright (C) 1998-1999 Thomas Sailer (sailer@ife.ee.ethz.ch)
24 * Heavily modified by Zach Brown <zab@zabbo.net> based on lunch
25 * with ESS engineers. Many thanks to Howard Kim for providing
26 * contacts and hardware. Honorable mention goes to Eric
27 * Brombaugh for all sorts of things. Best regards to the
28 * proprietors of Hack Central for fine lodging.
31 * /dev/dsp0-3 standard /dev/dsp device, (mostly) OSS compatible
32 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
34 * Hardware Description
36 * A working Maestro setup contains the Maestro chip wired to a
37 * codec or 2. In the Maestro we have the APUs, the ASSP, and the
38 * Wavecache. The APUs can be though of as virtual audio routing
39 * channels. They can take data from a number of sources and perform
40 * basic encodings of the data. The wavecache is a storehouse for
41 * PCM data. Typically it deals with PCI and interracts with the
42 * APUs. The ASSP is a wacky DSP like device that ESS is loth
43 * to release docs on. Thankfully it isn't required on the Maestro
44 * until you start doing insane things like FM emulation and surround
45 * encoding. The codecs are almost always AC-97 compliant codecs,
46 * but it appears that early Maestros may have had PT101 (an ESS
47 * part?) wired to them. The only real difference in the Maestro
48 * families is external goop like docking capability, memory for
49 * the ASSP, and initialization differences.
53 * We only drive the APU/Wavecache as typical DACs and drive the
54 * mixers in the codecs. There are 64 APUs. We assign 6 to each
55 * /dev/dsp? device. 2 channels for output, and 4 channels for
58 * Each APU can do a number of things, but we only really use
59 * 3 basic functions. For playback we use them to convert PCM
60 * data fetched over PCI by the wavecahche into analog data that
61 * is handed to the codec. One APU for mono, and a pair for stereo.
62 * When in stereo, the combination of smarts in the APU and Wavecache
63 * decide which wavecache gets the left or right channel.
65 * For record we still use the old overly mono system. For each in
66 * coming channel the data comes in from the codec, through a 'input'
67 * APU, through another rate converter APU, and then into memory via
68 * the wavecache and PCI. If its stereo, we mash it back into LRLR in
69 * software. The pass between the 2 APUs is supposedly what requires us
70 * to have a 512 byte buffer sitting around in wavecache/memory.
72 * The wavecache makes our life even more fun. First off, it can
73 * only address the first 28 bits of PCI address space, making it
74 * useless on quite a few architectures. Secondly, its insane.
75 * It claims to fetch from 4 regions of PCI space, each 4 meg in length.
76 * But that doesn't really work. You can only use 1 region. So all our
77 * allocations have to be in 4meg of each other. Booo. Hiss.
78 * So we have a module parameter, dsps_order, that is the order of
79 * the number of dsps to provide. All their buffer space is allocated
80 * on open time. The sonicvibes OSS routines we inherited really want
81 * power of 2 buffers, so we have all those next to each other, then
82 * 512 byte regions for the recording wavecaches. This ends up
83 * wasting quite a bit of memory. The only fixes I can see would be
84 * getting a kernel allocator that could work in zones, or figuring out
85 * just how to coerce the WP into doing what we want.
87 * The indirection of the various registers means we have to spinlock
88 * nearly all register accesses. We have the main register indirection
89 * like the wave cache, maestro registers, etc. Then we have beasts
90 * like the APU interface that is indirect registers gotten at through
91 * the main maestro indirection. Ouch. We spinlock around the actual
92 * ports on a per card basis. This means spinlock activity at each IO
93 * operation, but the only IO operation clusters are in non critical
94 * paths and it makes the code far easier to follow. Interrupts are
95 * blocked while holding the locks because the int handler has to
96 * get at some of them :(. The mixer interface doesn't, however.
97 * We also have an OSS state lock that is thrown around in a few
100 * This driver has brute force APM suspend support. We catch suspend
101 * notifications and stop all work being done on the chip. Any people
102 * that try between this shutdown and the real suspend operation will
103 * be put to sleep. When we resume we restore our software state on
104 * the chip and wake up the people that were using it. The code thats
105 * being used now is quite dirty and assumes we're on a uni-processor
106 * machine. Much of it will need to be cleaned up for SMP ACPI or
109 * We also pay attention to PCI power management now. The driver
110 * will power down units of the chip that it knows aren't needed.
111 * The WaveProcessor and company are only powered on when people
112 * have /dev/dsp*s open. On removal the driver will
113 * power down the maestro entirely. There could still be
114 * trouble with BIOSen that magically change power states
115 * themselves, but we'll see.
118 * v0.15 - May 21 2001 - Marcus Meissner <mm@caldera.de>
119 * Ported to Linux 2.4 PCI API. Some clean ups, global devs list
120 * removed (now using pci device driver data).
121 * PM needs to be polished still. Bumped version.
122 * (still kind of v0.14) May 13 2001 - Ben Pfaff <pfaffben@msu.edu>
123 * Add support for 978 docking and basic hardware volume control
124 * (still kind of v0.14) Nov 23 - Alan Cox <alan@redhat.com>
125 * Add clocking= for people with seriously warped hardware
126 * (still v0.14) Nov 10 2000 - Bartlomiej Zolnierkiewicz <bkz@linux-ide.org>
127 * add __init to maestro_ac97_init() and maestro_install()
128 * (still based on v0.14) Mar 29 2000 - Zach Brown <zab@redhat.com>
129 * move to 2.3 power management interface, which
130 * required hacking some suspend/resume/check paths
131 * make static compilation work
132 * v0.14 - Jan 28 2000 - Zach Brown <zab@redhat.com>
133 * add PCI power management through ACPI regs.
134 * we now shut down on machine reboot/halt
135 * leave scary PCI config items alone (isa stuff, mostly)
136 * enable 1921s, it seems only mine was broke.
137 * fix swapped left/right pcm dac. har har.
138 * up bob freq, increase buffers, fix pointers at underflow
139 * silly compilation problems
140 * v0.13 - Nov 18 1999 - Zach Brown <zab@redhat.com>
141 * fix nec Versas? man would that be cool.
142 * v0.12 - Nov 12 1999 - Zach Brown <zab@redhat.com>
143 * brown bag volume max fix..
144 * v0.11 - Nov 11 1999 - Zach Brown <zab@redhat.com>
145 * use proper stereo apu decoding, mmap/write should work.
146 * make volume sliders more useful, tweak rate calculation.
147 * fix lame 8bit format reporting bug. duh. apm apu saving buglet also
148 * fix maestro 1 clock freq "bug", remove pt101 support
149 * v0.10 - Oct 28 1999 - Zach Brown <zab@redhat.com>
150 * aha, so, sometimes the WP writes a status word to offset 0
151 * from one of the PCMBARs. rearrange allocation accordingly..
152 * cheers again to Eric for being a good hacker in investigating this.
153 * Jeroen Hoogervorst submits 7500 fix out of nowhere. yay. :)
154 * v0.09 - Oct 23 1999 - Zach Brown <zab@redhat.com>
156 * re-order something such that some 2Es now work. Magic!
157 * new codec reset routine. made some codecs come to life.
158 * fix clear_advance, sync some control with ESS.
159 * now write to all base regs to be paranoid.
160 * v0.08 - Oct 20 1999 - Zach Brown <zab@redhat.com>
161 * Fix initial buflen bug. I am so smart. also smp compiling..
162 * I owe Eric yet another beer: fixed recmask, igain,
163 * muting, and adc sync consistency. Go Team.
164 * v0.07 - Oct 4 1999 - Zach Brown <zab@redhat.com>
165 * tweak adc/dac, formating, and stuff to allow full duplex
166 * allocate dsps memory at open() so we can fit in the wavecache window
167 * fix wavecache braindamage. again. no more scribbling?
168 * fix ess 1921 codec bug on some laptops.
169 * fix dumb pci scanning bug
170 * started 2.3 cleanup, redid spinlocks, little cleanups
171 * v0.06 - Sep 20 1999 - Zach Brown <zab@redhat.com>
172 * fix wavecache thinkos. limit to 1 /dev/dsp.
173 * eric is wearing his thinking toque this week.
174 * spotted apu mode bugs and gain ramping problem
175 * don't touch weird mixer regs, make recmask optional
176 * fixed igain inversion, defaults for mixers, clean up rec_start
177 * make mono recording work.
178 * report subsystem stuff, please send reports.
179 * littles: parallel out, amp now
180 * v0.05 - Sep 17 1999 - Zach Brown <zab@redhat.com>
181 * merged and fixed up Eric's initial recording code
182 * munged format handling to catch misuse, needs rewrite.
183 * revert ring bus init, fixup shared int, add pci busmaster setting
184 * fix mixer oss interface, fix mic mute and recmask
185 * mask off unsupported mixers, reset with all 1s, modularize defaults
186 * make sure bob is running while we need it
187 * got rid of device limit, initial minimal apm hooks
188 * pull out dead code/includes, only allow multimedia/audio maestros
189 * v0.04 - Sep 01 1999 - Zach Brown <zab@redhat.com>
190 * copied memory leak fix from sonicvibes driver
191 * different ac97 reset, play with 2.0 ac97, simplify ring bus setup
192 * bob freq code, region sanity, jitter sync fix; all from Eric
197 * do smart things with ac97 2.0 bits.
201 * it also would be fun to have a mode that would not use pci dma at all
202 * but would copy into the wavecache on board memory and use that
203 * on architectures that don't like the maestro's pci dma ickiness.
206 /*****************************************************************************/
208 #include <linux/module.h>
209 #include <linux/sched.h>
210 #include <linux/smp_lock.h>
211 #include <linux/string.h>
212 #include <linux/ctype.h>
213 #include <linux/ioport.h>
214 #include <linux/delay.h>
215 #include <linux/sound.h>
216 #include <linux/slab.h>
217 #include <linux/soundcard.h>
218 #include <linux/pci.h>
219 #include <linux/spinlock.h>
220 #include <linux/init.h>
221 #include <linux/interrupt.h>
222 #include <linux/poll.h>
223 #include <linux/reboot.h>
224 #include <linux/bitops.h>
225 #include <linux/wait.h>
227 #include <asm/current.h>
230 #include <asm/page.h>
231 #include <asm/uaccess.h>
233 #include <linux/pm.h>
234 #include <linux/pm_legacy.h>
235 static int maestro_pm_callback(struct pm_dev
*dev
, pm_request_t rqst
, void *d
);
239 static struct pci_driver maestro_pci_driver
;
241 /* --------------------------------------------------------------------- */
247 #define M_printk(args...) {if (debug) printk(args);}
252 /* we try to setup 2^(dsps_order) /dev/dsp devices */
253 static int dsps_order
;
254 /* whether or not we mess around with power management */
255 static int use_pm
=2; /* set to 1 for force */
256 /* clocking for broken hardware - a few laptops seem to use a 50Khz clock
257 ie insmod with clocking=50000 or so */
259 static int clocking
=48000;
261 MODULE_AUTHOR("Zach Brown <zab@zabbo.net>, Alan Cox <alan@redhat.com>");
262 MODULE_DESCRIPTION("ESS Maestro Driver");
263 MODULE_LICENSE("GPL");
266 module_param(debug
, bool, 0644);
268 module_param(dsps_order
, int, 0);
269 module_param(use_pm
, int, 0);
270 module_param(clocking
, int, 0);
272 /* --------------------------------------------------------------------- */
273 #define DRIVER_VERSION "0.15"
275 #ifndef PCI_VENDOR_ESS
276 #define PCI_VENDOR_ESS 0x125D
277 #define PCI_DEVICE_ID_ESS_ESS1968 0x1968 /* Maestro 2 */
278 #define PCI_DEVICE_ID_ESS_ESS1978 0x1978 /* Maestro 2E */
280 #define PCI_VENDOR_ESS_OLD 0x1285 /* Platform Tech,
281 the people the maestro
283 #define PCI_DEVICE_ID_ESS_ESS0100 0x0100 /* maestro 1 */
284 #endif /* PCI_VENDOR_ESS */
286 #define ESS_CHAN_HARD 0x100
289 #define NEC_VERSA_SUBID1 0x80581033
290 #define NEC_VERSA_SUBID2 0x803c1033
293 /* changed so that I could actually find all the
294 references and fix them up. it's a little more readable now. */
295 #define ESS_FMT_STEREO 0x01
296 #define ESS_FMT_16BIT 0x02
297 #define ESS_FMT_MASK 0x03
298 #define ESS_DAC_SHIFT 0
299 #define ESS_ADC_SHIFT 4
301 #define ESS_STATE_MAGIC 0x125D1968
302 #define ESS_CARD_MAGIC 0x19283746
304 #define DAC_RUNNING 1
305 #define ADC_RUNNING 2
307 #define MAX_DSP_ORDER 2
308 #define MAX_DSPS (1<<MAX_DSP_ORDER)
309 #define NR_DSPS (1<<dsps_order)
313 #define NR_APU_REGS 16
323 /* bits in the acpi masks */
324 #define ACPI_12MHZ ( 1 << 15)
325 #define ACPI_24MHZ ( 1 << 14)
326 #define ACPI_978 ( 1 << 13)
327 #define ACPI_SPDIF ( 1 << 12)
328 #define ACPI_GLUE ( 1 << 11)
329 #define ACPI__10 ( 1 << 10) /* reserved */
330 #define ACPI_PCIINT ( 1 << 9)
331 #define ACPI_HV ( 1 << 8) /* hardware volume */
332 #define ACPI_GPIO ( 1 << 7)
333 #define ACPI_ASSP ( 1 << 6)
334 #define ACPI_SB ( 1 << 5) /* sb emul */
335 #define ACPI_FM ( 1 << 4) /* fm emul */
336 #define ACPI_RB ( 1 << 3) /* ringbus / aclink */
337 #define ACPI_MIDI ( 1 << 2)
338 #define ACPI_GP ( 1 << 1) /* game port */
339 #define ACPI_WP ( 1 << 0) /* wave processor */
341 #define ACPI_ALL (0xffff)
342 #define ACPI_SLEEP (~(ACPI_SPDIF|ACPI_ASSP|ACPI_SB|ACPI_FM| \
343 ACPI_MIDI|ACPI_GP|ACPI_WP))
344 #define ACPI_NONE (ACPI__10)
346 /* these masks indicate which units we care about at
348 static u16 acpi_state_mask
[] = {
349 [ACPI_D0
] = ACPI_ALL
,
350 [ACPI_D1
] = ACPI_SLEEP
,
351 [ACPI_D2
] = ACPI_SLEEP
,
352 [ACPI_D3
] = ACPI_NONE
355 static char version
[] __devinitdata
=
356 KERN_INFO
"maestro: version " DRIVER_VERSION
" time " __TIME__
" " __DATE__
"\n";
360 static const unsigned sample_size
[] = { 1, 2, 2, 4 };
361 static const unsigned sample_shift
[] = { 0, 1, 1, 2 };
369 static const char *card_names
[]={
370 [TYPE_MAESTRO
] = "ESS Maestro",
371 [TYPE_MAESTRO2
] = "ESS Maestro 2",
372 [TYPE_MAESTRO2E
] = "ESS Maestro 2E"
375 static int clock_freq
[]={
376 [TYPE_MAESTRO
] = (49152000L / 1024L),
377 [TYPE_MAESTRO2
] = (50000000L / 1024L),
378 [TYPE_MAESTRO2E
] = (50000000L / 1024L)
381 static int maestro_notifier(struct notifier_block
*nb
, unsigned long event
, void *buf
);
383 static struct notifier_block maestro_nb
= {maestro_notifier
, NULL
, 0};
385 /* --------------------------------------------------------------------- */
389 /* FIXME: we probably want submixers in here, but only one record pair */
390 u8 apu
[6]; /* l/r output, l/r intput converters, l/r input apus */
391 u8 apu_mode
[6]; /* Running mode for this APU */
392 u8 apu_pan
[6]; /* Panning setup for this APU */
393 u32 apu_base
[6]; /* base address for this apu */
394 struct ess_card
*card
; /* Card info */
396 unsigned int rateadc
, ratedac
;
397 unsigned char fmt
, enable
;
401 /* this locks around the oss state in the driver */
403 /* only let 1 be opening at a time */
404 struct semaphore open_sem
;
405 wait_queue_head_t open_wait
;
408 /* soundcore stuff */
416 /* XXX zab - swptr only in here so that it can be referenced by
417 clear_advance, as far as I can tell :( */
418 unsigned hwptr
, swptr
;
419 unsigned total_bytes
;
421 unsigned error
; /* over/underrun */
422 wait_queue_head_t wait
;
423 /* redundant, but makes calculations easier */
426 unsigned fragsamples
;
429 unsigned ready
:1; /* our oss buffers are ready to go */
430 unsigned endcleared
:1;
431 unsigned ossfragshift
;
433 unsigned subdivision
;
434 u16 base
; /* Offset for ptr */
437 /* pointer to each dsp?s piece of the apu->src buffer page */
445 /* We keep maestro cards in a linked list */
446 struct ess_card
*next
;
452 /* as most of this is static,
453 perhaps it should be a pointer to a global struct */
456 int supported_mixers
;
459 /* the caller must guarantee arg sanity before calling these */
460 /* int (*read_mixer)(struct ess_card *card, int index);*/
461 void (*write_mixer
)(struct ess_card
*card
,int mixer
, unsigned int left
,unsigned int right
);
462 int (*recmask_io
)(struct ess_card
*card
,int rw
,int mask
);
463 unsigned int mixer_state
[SOUND_MIXER_NRDEVICES
];
469 wait_queue_head_t suspend_queue
;
471 struct ess_state channels
[MAX_DSPS
];
472 u16 maestro_map
[NR_IDRS
]; /* Register map */
473 /* we have to store this junk so that we can come back from a
475 u16 apu_map
[NR_APUS
][NR_APU_REGS
]; /* contents of apu regs */
477 /* this locks around the physical registers on the card */
480 /* memory for this card.. wavecache limited :(*/
484 /* hardware resources */
485 struct pci_dev
*pcidev
;
495 static void set_mixer(struct ess_card
*card
,unsigned int mixer
, unsigned int val
);
524 /* --------------------------------------------------------------------- */
526 static void check_suspend(struct ess_card
*card
);
528 /* --------------------------------------------------------------------- */
532 * ESS Maestro AC97 codec programming interface.
535 static void maestro_ac97_set(struct ess_card
*card
, u8 cmd
, u16 val
)
537 int io
= card
->iobase
;
540 * Wait for the codec bus to be free
547 if(!(inb(io
+ESS_AC97_INDEX
)&1))
553 outw(val
, io
+ESS_AC97_DATA
);
555 outb(cmd
, io
+ESS_AC97_INDEX
);
559 static u16
maestro_ac97_get(struct ess_card
*card
, u8 cmd
)
561 int io
= card
->iobase
;
568 * Wait for the codec bus to be free
573 if(!(inb(io
+ESS_AC97_INDEX
)&1))
577 outb(cmd
|0x80, io
+ESS_AC97_INDEX
);
580 while(inb(io
+ESS_AC97_INDEX
)&1)
585 printk(KERN_ERR
"maestro: ac97 codec timeout reading 0x%x.\n",cmd
);
589 data
=inw(io
+ESS_AC97_DATA
);
594 /* OSS interface to the ac97s.. */
596 #define AC97_STEREO_MASK (SOUND_MASK_VOLUME|\
597 SOUND_MASK_PCM|SOUND_MASK_LINE|SOUND_MASK_CD|\
598 SOUND_MASK_VIDEO|SOUND_MASK_LINE1|SOUND_MASK_IGAIN)
600 #define AC97_SUPPORTED_MASK (AC97_STEREO_MASK | \
601 SOUND_MASK_BASS|SOUND_MASK_TREBLE|SOUND_MASK_MIC|\
604 #define AC97_RECORD_MASK (SOUND_MASK_MIC|\
605 SOUND_MASK_CD| SOUND_MASK_VIDEO| SOUND_MASK_LINE1| SOUND_MASK_LINE|\
608 #define supported_mixer(CARD,FOO) ( CARD->mix.supported_mixers & (1<<FOO) )
610 /* this table has default mixer values for all OSS mixers.
611 be sure to fill it in if you add oss mixers
612 to anyone's supported mixer defines */
614 static unsigned int mixer_defaults
[SOUND_MIXER_NRDEVICES
] = {
615 [SOUND_MIXER_VOLUME
] = 0x3232,
616 [SOUND_MIXER_BASS
] = 0x3232,
617 [SOUND_MIXER_TREBLE
] = 0x3232,
618 [SOUND_MIXER_SPEAKER
] = 0x3232,
619 [SOUND_MIXER_MIC
] = 0x8000, /* annoying */
620 [SOUND_MIXER_LINE
] = 0x3232,
621 [SOUND_MIXER_CD
] = 0x3232,
622 [SOUND_MIXER_VIDEO
] = 0x3232,
623 [SOUND_MIXER_LINE1
] = 0x3232,
624 [SOUND_MIXER_PCM
] = 0x3232,
625 [SOUND_MIXER_IGAIN
] = 0x3232
628 static struct ac97_mixer_hw
{
629 unsigned char offset
;
631 } ac97_hw
[SOUND_MIXER_NRDEVICES
]= {
632 [SOUND_MIXER_VOLUME
] = {0x02,63},
633 [SOUND_MIXER_BASS
] = {0x08,15},
634 [SOUND_MIXER_TREBLE
] = {0x08,15},
635 [SOUND_MIXER_SPEAKER
] = {0x0a,15},
636 [SOUND_MIXER_MIC
] = {0x0e,31},
637 [SOUND_MIXER_LINE
] = {0x10,31},
638 [SOUND_MIXER_CD
] = {0x12,31},
639 [SOUND_MIXER_VIDEO
] = {0x14,31},
640 [SOUND_MIXER_LINE1
] = {0x16,31},
641 [SOUND_MIXER_PCM
] = {0x18,31},
642 [SOUND_MIXER_IGAIN
] = {0x1c,15}
645 #if 0 /* *shrug* removed simply because we never used it.
646 feel free to implement again if needed */
648 /* reads the given OSS mixer from the ac97
649 the caller must have insured that the ac97 knows
650 about that given mixer, and should be holding a
651 spinlock for the card */
652 static int ac97_read_mixer(struct ess_card
*card
, int mixer
)
656 struct ac97_mixer_hw
*mh
= &ac97_hw
[mixer
];
658 val
= maestro_ac97_get(card
, mh
->offset
);
660 if(AC97_STEREO_MASK
& (1<<mixer
)) {
661 /* nice stereo mixers .. */
664 left
= (val
>> 8) & 0x7f;
667 if (mixer
== SOUND_MIXER_IGAIN
) {
668 right
= (right
* 100) / mh
->scale
;
669 left
= (left
* 100) / mh
->scale
;
671 right
= 100 - ((right
* 100) / mh
->scale
);
672 left
= 100 - ((left
* 100) / mh
->scale
);
675 ret
= left
| (right
<< 8);
676 } else if (mixer
== SOUND_MIXER_SPEAKER
) {
677 ret
= 100 - ((((val
& 0x1e)>>1) * 100) / mh
->scale
);
678 } else if (mixer
== SOUND_MIXER_MIC
) {
679 ret
= 100 - (((val
& 0x1f) * 100) / mh
->scale
);
680 /* the low bit is optional in the tone sliders and masking
681 it lets is avoid the 0xf 'bypass'.. */
682 } else if (mixer
== SOUND_MIXER_BASS
) {
683 ret
= 100 - ((((val
>> 8) & 0xe) * 100) / mh
->scale
);
684 } else if (mixer
== SOUND_MIXER_TREBLE
) {
685 ret
= 100 - (((val
& 0xe) * 100) / mh
->scale
);
688 M_printk("read mixer %d (0x%x) %x -> %x\n",mixer
,mh
->offset
,val
,ret
);
694 /* write the OSS encoded volume to the given OSS encoded mixer,
695 again caller's job to make sure all is well in arg land,
696 call with spinlock held */
698 /* linear scale -> log */
699 static unsigned char lin2log
[101] =
701 0, 0 , 15 , 23 , 30 , 34 , 38 , 42 , 45 , 47 ,
702 50 , 52 , 53 , 55 , 57 , 58 , 60 , 61 , 62 ,
703 63 , 65 , 66 , 67 , 68 , 69 , 69 , 70 , 71 ,
704 72 , 73 , 73 , 74 , 75 , 75 , 76 , 77 , 77 ,
705 78 , 78 , 79 , 80 , 80 , 81 , 81 , 82 , 82 ,
706 83 , 83 , 84 , 84 , 84 , 85 , 85 , 86 , 86 ,
707 87 , 87 , 87 , 88 , 88 , 88 , 89 , 89 , 89 ,
708 90 , 90 , 90 , 91 , 91 , 91 , 92 , 92 , 92 ,
709 93 , 93 , 93 , 94 , 94 , 94 , 94 , 95 , 95 ,
710 95 , 95 , 96 , 96 , 96 , 96 , 97 , 97 , 97 ,
711 97 , 98 , 98 , 98 , 98 , 99 , 99 , 99 , 99 , 99
714 static void ac97_write_mixer(struct ess_card
*card
,int mixer
, unsigned int left
, unsigned int right
)
717 struct ac97_mixer_hw
*mh
= &ac97_hw
[mixer
];
719 M_printk("wrote mixer %d (0x%x) %d,%d",mixer
,mh
->offset
,left
,right
);
721 if(AC97_STEREO_MASK
& (1<<mixer
)) {
722 /* stereo mixers, mute them if we can */
724 if (mixer
== SOUND_MIXER_IGAIN
) {
725 /* igain's slider is reversed.. */
726 right
= (right
* mh
->scale
) / 100;
727 left
= (left
* mh
->scale
) / 100;
728 if ((left
== 0) && (right
== 0))
730 } else if (mixer
== SOUND_MIXER_PCM
|| mixer
== SOUND_MIXER_CD
) {
731 /* log conversion seems bad for them */
732 if ((left
== 0) && (right
== 0))
734 right
= ((100 - right
) * mh
->scale
) / 100;
735 left
= ((100 - left
) * mh
->scale
) / 100;
737 /* log conversion for the stereo controls */
738 if((left
== 0) && (right
== 0))
740 right
= ((100 - lin2log
[right
]) * mh
->scale
) / 100;
741 left
= ((100 - lin2log
[left
]) * mh
->scale
) / 100;
744 val
|= (left
<< 8) | right
;
746 } else if (mixer
== SOUND_MIXER_SPEAKER
) {
747 val
= (((100 - left
) * mh
->scale
) / 100) << 1;
748 } else if (mixer
== SOUND_MIXER_MIC
) {
749 val
= maestro_ac97_get(card
, mh
->offset
) & ~0x801f;
750 val
|= (((100 - left
) * mh
->scale
) / 100);
751 /* the low bit is optional in the tone sliders and masking
752 it lets is avoid the 0xf 'bypass'.. */
753 } else if (mixer
== SOUND_MIXER_BASS
) {
754 val
= maestro_ac97_get(card
, mh
->offset
) & ~0x0f00;
755 val
|= ((((100 - left
) * mh
->scale
) / 100) << 8) & 0x0e00;
756 } else if (mixer
== SOUND_MIXER_TREBLE
) {
757 val
= maestro_ac97_get(card
, mh
->offset
) & ~0x000f;
758 val
|= (((100 - left
) * mh
->scale
) / 100) & 0x000e;
761 maestro_ac97_set(card
, mh
->offset
, val
);
763 M_printk(" -> %x\n",val
);
766 /* the following tables allow us to go from
767 OSS <-> ac97 quickly. */
769 enum ac97_recsettings
{
775 AC97_REC_STEREO
, /* combination of all enabled outputs.. */
776 AC97_REC_MONO
, /*.. or the mono equivalent */
780 static unsigned int ac97_oss_mask
[] = {
781 [AC97_REC_MIC
] = SOUND_MASK_MIC
,
782 [AC97_REC_CD
] = SOUND_MASK_CD
,
783 [AC97_REC_VIDEO
] = SOUND_MASK_VIDEO
,
784 [AC97_REC_AUX
] = SOUND_MASK_LINE1
,
785 [AC97_REC_LINE
] = SOUND_MASK_LINE
,
786 [AC97_REC_PHONE
] = SOUND_MASK_PHONEIN
789 /* indexed by bit position */
790 static unsigned int ac97_oss_rm
[] = {
791 [SOUND_MIXER_MIC
] = AC97_REC_MIC
,
792 [SOUND_MIXER_CD
] = AC97_REC_CD
,
793 [SOUND_MIXER_VIDEO
] = AC97_REC_VIDEO
,
794 [SOUND_MIXER_LINE1
] = AC97_REC_AUX
,
795 [SOUND_MIXER_LINE
] = AC97_REC_LINE
,
796 [SOUND_MIXER_PHONEIN
] = AC97_REC_PHONE
799 /* read or write the recmask
800 the ac97 can really have left and right recording
801 inputs independently set, but OSS doesn't seem to
802 want us to express that to the user.
803 the caller guarantees that we have a supported bit set,
804 and they must be holding the card's spinlock */
806 ac97_recmask_io(struct ess_card
*card
, int read
, int mask
)
808 unsigned int val
= ac97_oss_mask
[ maestro_ac97_get(card
, 0x1a) & 0x7 ];
810 if (read
) return val
;
812 /* oss can have many inputs, maestro can't. try
813 to pick the 'new' one */
815 if (mask
!= val
) mask
&= ~val
;
818 val
= ac97_oss_rm
[val
];
819 val
|= val
<< 8; /* set both channels */
821 M_printk("maestro: setting ac97 recmask to 0x%x\n",val
);
823 maestro_ac97_set(card
,0x1a,val
);
829 * The Maestro can be wired to a standard AC97 compliant codec
830 * (see www.intel.com for the pdf's on this), or to a PT101 codec
831 * which appears to be the ES1918 (data sheet on the esstech.com.tw site)
833 * The PT101 setup is untested.
836 static u16 __init
maestro_ac97_init(struct ess_card
*card
)
838 u16 vend1
, vend2
, caps
;
840 card
->mix
.supported_mixers
= AC97_SUPPORTED_MASK
;
841 card
->mix
.stereo_mixers
= AC97_STEREO_MASK
;
842 card
->mix
.record_sources
= AC97_RECORD_MASK
;
843 /* card->mix.read_mixer = ac97_read_mixer;*/
844 card
->mix
.write_mixer
= ac97_write_mixer
;
845 card
->mix
.recmask_io
= ac97_recmask_io
;
847 vend1
= maestro_ac97_get(card
, 0x7c);
848 vend2
= maestro_ac97_get(card
, 0x7e);
850 caps
= maestro_ac97_get(card
, 0x00);
852 printk(KERN_INFO
"maestro: AC97 Codec detected: v: 0x%2x%2x caps: 0x%x pwr: 0x%x\n",
853 vend1
,vend2
,caps
,maestro_ac97_get(card
,0x26) & 0xf);
855 if (! (caps
& 0x4) ) {
856 /* no bass/treble nobs */
857 card
->mix
.supported_mixers
&= ~(SOUND_MASK_BASS
|SOUND_MASK_TREBLE
);
860 /* XXX endianness, dork head. */
861 /* vendor specifc bits.. */
862 switch ((long)(vend1
<< 16) | vend2
) {
863 case 0x545200ff: /* TriTech */
864 /* no idea what this does */
865 maestro_ac97_set(card
,0x2a,0x0001);
866 maestro_ac97_set(card
,0x2c,0x0000);
867 maestro_ac97_set(card
,0x2c,0xffff);
869 #if 0 /* i thought the problems I was seeing were with
870 the 1921, but apparently they were with the pci board
871 it was on, so this code is commented out.
872 lets see if this holds true. */
873 case 0x83847609: /* ESS 1921 */
874 /* writing to 0xe (mic) or 0x1a (recmask) seems
875 to hang this codec */
876 card
->mix
.supported_mixers
&= ~(SOUND_MASK_MIC
);
877 card
->mix
.record_sources
= 0;
878 card
->mix
.recmask_io
= NULL
;
879 #if 0 /* don't ask. I have yet to see what these actually do. */
880 maestro_ac97_set(card
,0x76,0xABBA); /* o/~ Take a chance on me o/~ */
882 maestro_ac97_set(card
,0x78,0x3002);
884 maestro_ac97_set(card
,0x78,0x3802);
892 maestro_ac97_set(card
, 0x1E, 0x0404);
893 /* null misc stuff */
894 maestro_ac97_set(card
, 0x20, 0x0000);
899 #if 0 /* there has been 1 person on the planet with a pt101 that we
900 know of. If they care, they can put this back in :) */
901 static u16
maestro_pt101_init(struct ess_card
*card
,int iobase
)
903 printk(KERN_INFO
"maestro: PT101 Codec detected, initializing but _not_ installing mixer device.\n");
905 maestro_ac97_set(iobase
, 0x2A, 0x0001);
906 maestro_ac97_set(iobase
, 0x2C, 0x0000);
907 maestro_ac97_set(iobase
, 0x2C, 0xFFFF);
908 maestro_ac97_set(iobase
, 0x10, 0x9F1F);
909 maestro_ac97_set(iobase
, 0x12, 0x0808);
910 maestro_ac97_set(iobase
, 0x14, 0x9F1F);
911 maestro_ac97_set(iobase
, 0x16, 0x9F1F);
912 maestro_ac97_set(iobase
, 0x18, 0x0404);
913 maestro_ac97_set(iobase
, 0x1A, 0x0000);
914 maestro_ac97_set(iobase
, 0x1C, 0x0000);
915 maestro_ac97_set(iobase
, 0x02, 0x0404);
916 maestro_ac97_set(iobase
, 0x04, 0x0808);
917 maestro_ac97_set(iobase
, 0x0C, 0x801F);
918 maestro_ac97_set(iobase
, 0x0E, 0x801F);
923 /* this is very magic, and very slow.. */
925 maestro_ac97_reset(int ioaddr
, struct pci_dev
*pcidev
)
931 outw( inw(ioaddr
+ 0x38) & 0xfffc, ioaddr
+ 0x38);
932 outw( inw(ioaddr
+ 0x3a) & 0xfffc, ioaddr
+ 0x3a);
933 outw( inw(ioaddr
+ 0x3c) & 0xfffc, ioaddr
+ 0x3c);
935 /* reset the first codec */
936 outw(0x0000, ioaddr
+0x36);
937 save_68
= inw(ioaddr
+0x68);
938 pci_read_config_word(pcidev
, 0x58, &w
); /* something magical with gpio and bus arb. */
939 pci_read_config_dword(pcidev
, PCI_SUBSYSTEM_VENDOR_ID
, &vend
);
942 outw(0xfffe, ioaddr
+ 0x64); /* tickly gpio 0.. */
943 outw(0x0001, ioaddr
+ 0x68);
944 outw(0x0000, ioaddr
+ 0x60);
946 outw(0x0001, ioaddr
+ 0x60);
949 outw(save_68
| 0x1, ioaddr
+ 0x68); /* now restore .. */
950 outw( (inw(ioaddr
+ 0x38) & 0xfffc)|0x1, ioaddr
+ 0x38);
951 outw( (inw(ioaddr
+ 0x3a) & 0xfffc)|0x1, ioaddr
+ 0x3a);
952 outw( (inw(ioaddr
+ 0x3c) & 0xfffc)|0x1, ioaddr
+ 0x3c);
954 /* now the second codec */
955 outw(0x0000, ioaddr
+0x36);
956 outw(0xfff7, ioaddr
+ 0x64);
957 save_68
= inw(ioaddr
+0x68);
958 outw(0x0009, ioaddr
+ 0x68);
959 outw(0x0001, ioaddr
+ 0x60);
961 outw(0x0009, ioaddr
+ 0x60);
962 mdelay(500); /* .. ouch.. */
963 outw( inw(ioaddr
+ 0x38) & 0xfffc, ioaddr
+ 0x38);
964 outw( inw(ioaddr
+ 0x3a) & 0xfffc, ioaddr
+ 0x3a);
965 outw( inw(ioaddr
+ 0x3c) & 0xfffc, ioaddr
+ 0x3c);
967 #if 0 /* the loop here needs to be much better if we want it.. */
968 M_printk("trying software reset\n");
969 /* try and do a software reset */
970 outb(0x80|0x7c, ioaddr
+ 0x30);
972 if ((inw(ioaddr
+ 0x30) & 1) == 0) {
973 if(inb(ioaddr
+ 0x32) !=0) break;
975 outb(0x80|0x7d, ioaddr
+ 0x30);
976 if (((inw(ioaddr
+ 0x30) & 1) == 0) && (inb(ioaddr
+ 0x32) !=0)) break;
977 outb(0x80|0x7f, ioaddr
+ 0x30);
978 if (((inw(ioaddr
+ 0x30) & 1) == 0) && (inb(ioaddr
+ 0x32) !=0)) break;
982 outb( inb(ioaddr
+ 0x37) | 0x08, ioaddr
+ 0x37); /* do a software reset */
983 mdelay(500); /* oh my.. */
984 outb( inb(ioaddr
+ 0x37) & ~0x08, ioaddr
+ 0x37);
986 outw( 0x80, ioaddr
+0x30);
987 for(w
= 0 ; w
< 10000; w
++) {
988 if((inw(ioaddr
+ 0x30) & 1) ==0) break;
993 if ( vend
== NEC_VERSA_SUBID1
|| vend
== NEC_VERSA_SUBID2
) {
994 /* turn on external amp? */
995 outw(0xf9ff, ioaddr
+ 0x64);
996 outw(inw(ioaddr
+0x68) | 0x600, ioaddr
+ 0x68);
997 outw(0x0209, ioaddr
+ 0x60);
1000 /* Turn on the 978 docking chip.
1001 First frob the "master output enable" bit,
1002 then set most of the playback volume control registers to max. */
1003 outb(inb(ioaddr
+0xc0)|(1<<5), ioaddr
+0xc0);
1004 outb(0xff, ioaddr
+0xc3);
1005 outb(0xff, ioaddr
+0xc4);
1006 outb(0xff, ioaddr
+0xc6);
1007 outb(0xff, ioaddr
+0xc8);
1008 outb(0x3f, ioaddr
+0xcf);
1009 outb(0x3f, ioaddr
+0xd0);
1012 * Indirect register access. Not all registers are readable so we
1013 * need to keep register state ourselves
1016 #define WRITEABLE_MAP 0xEFFFFF
1017 #define READABLE_MAP 0x64003F
1020 * The Maestro engineers were a little indirection happy. These indirected
1021 * registers themselves include indirect registers at another layer
1024 static void __maestro_write(struct ess_card
*card
, u16 reg
, u16 data
)
1026 long ioaddr
= card
->iobase
;
1028 outw(reg
, ioaddr
+0x02);
1029 outw(data
, ioaddr
+0x00);
1030 if( reg
>= NR_IDRS
) printk("maestro: IDR %d out of bounds!\n",reg
);
1031 else card
->maestro_map
[reg
]=data
;
1035 static void maestro_write(struct ess_state
*s
, u16 reg
, u16 data
)
1037 unsigned long flags
;
1039 check_suspend(s
->card
);
1040 spin_lock_irqsave(&s
->card
->lock
,flags
);
1042 __maestro_write(s
->card
,reg
,data
);
1044 spin_unlock_irqrestore(&s
->card
->lock
,flags
);
1047 static u16
__maestro_read(struct ess_card
*card
, u16 reg
)
1049 long ioaddr
= card
->iobase
;
1051 outw(reg
, ioaddr
+0x02);
1052 return card
->maestro_map
[reg
]=inw(ioaddr
+0x00);
1055 static u16
maestro_read(struct ess_state
*s
, u16 reg
)
1057 if(READABLE_MAP
& (1<<reg
))
1059 unsigned long flags
;
1060 check_suspend(s
->card
);
1061 spin_lock_irqsave(&s
->card
->lock
,flags
);
1063 __maestro_read(s
->card
,reg
);
1065 spin_unlock_irqrestore(&s
->card
->lock
,flags
);
1067 return s
->card
->maestro_map
[reg
];
1071 * These routines handle accessing the second level indirections to the
1076 * The register names are the ones ESS uses (see 104T31.ZIP)
1079 #define IDR0_DATA_PORT 0x00
1080 #define IDR1_CRAM_POINTER 0x01
1081 #define IDR2_CRAM_DATA 0x02
1082 #define IDR3_WAVE_DATA 0x03
1083 #define IDR4_WAVE_PTR_LOW 0x04
1084 #define IDR5_WAVE_PTR_HI 0x05
1085 #define IDR6_TIMER_CTRL 0x06
1086 #define IDR7_WAVE_ROMRAM 0x07
1088 static void apu_index_set(struct ess_card
*card
, u16 index
)
1091 __maestro_write(card
, IDR1_CRAM_POINTER
, index
);
1093 if(__maestro_read(card
, IDR1_CRAM_POINTER
)==index
)
1095 printk(KERN_WARNING
"maestro: APU register select failed.\n");
1098 static void apu_data_set(struct ess_card
*card
, u16 data
)
1103 if(__maestro_read(card
, IDR0_DATA_PORT
)==data
)
1105 __maestro_write(card
, IDR0_DATA_PORT
, data
);
1110 * This is the public interface for APU manipulation. It handles the
1111 * interlock to avoid two APU writes in parallel etc. Don't diddle
1112 * directly with the stuff above.
1115 static void apu_set_register(struct ess_state
*s
, u16 channel
, u8 reg
, u16 data
)
1117 unsigned long flags
;
1119 check_suspend(s
->card
);
1121 if(channel
&ESS_CHAN_HARD
)
1122 channel
&=~ESS_CHAN_HARD
;
1126 printk("BAD CHANNEL %d.\n",channel
);
1128 channel
= s
->apu
[channel
];
1129 /* store based on real hardware apu/reg */
1130 s
->card
->apu_map
[channel
][reg
]=data
;
1134 /* hooray for double indirection!! */
1135 spin_lock_irqsave(&s
->card
->lock
,flags
);
1137 apu_index_set(s
->card
, reg
);
1138 apu_data_set(s
->card
, data
);
1140 spin_unlock_irqrestore(&s
->card
->lock
,flags
);
1143 static u16
apu_get_register(struct ess_state
*s
, u16 channel
, u8 reg
)
1145 unsigned long flags
;
1148 check_suspend(s
->card
);
1150 if(channel
&ESS_CHAN_HARD
)
1151 channel
&=~ESS_CHAN_HARD
;
1153 channel
= s
->apu
[channel
];
1157 spin_lock_irqsave(&s
->card
->lock
,flags
);
1159 apu_index_set(s
->card
, reg
);
1160 v
=__maestro_read(s
->card
, IDR0_DATA_PORT
);
1162 spin_unlock_irqrestore(&s
->card
->lock
,flags
);
1168 * The wavecache buffers between the APUs and
1172 static void wave_set_register(struct ess_state
*s
, u16 reg
, u16 value
)
1174 long ioaddr
= s
->card
->iobase
;
1175 unsigned long flags
;
1176 check_suspend(s
->card
);
1178 spin_lock_irqsave(&s
->card
->lock
,flags
);
1180 outw(reg
, ioaddr
+0x10);
1181 outw(value
, ioaddr
+0x12);
1183 spin_unlock_irqrestore(&s
->card
->lock
,flags
);
1186 static u16
wave_get_register(struct ess_state
*s
, u16 reg
)
1188 long ioaddr
= s
->card
->iobase
;
1189 unsigned long flags
;
1191 check_suspend(s
->card
);
1193 spin_lock_irqsave(&s
->card
->lock
,flags
);
1194 outw(reg
, ioaddr
+0x10);
1195 value
=inw(ioaddr
+0x12);
1196 spin_unlock_irqrestore(&s
->card
->lock
,flags
);
1201 static void sound_reset(int ioaddr
)
1203 outw(0x2000, 0x18+ioaddr
);
1205 outw(0x0000, 0x18+ioaddr
);
1209 /* sets the play formats of these apus, should be passed the already shifted format */
1210 static void set_apu_fmt(struct ess_state
*s
, int apu
, int mode
)
1214 if(!(mode
&ESS_FMT_16BIT
)) apu_fmt
+=0x20;
1215 if((mode
&ESS_FMT_STEREO
)) apu_fmt
+=0x10;
1216 s
->apu_mode
[apu
] = apu_fmt
;
1217 s
->apu_mode
[apu
+1] = apu_fmt
;
1220 /* this only fixes the output apu mode to be later set by start_dac and
1221 company. output apu modes are set in ess_rec_setup */
1222 static void set_fmt(struct ess_state
*s
, unsigned char mask
, unsigned char data
)
1224 s
->fmt
= (s
->fmt
& mask
) | data
;
1225 set_apu_fmt(s
, 0, (s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_MASK
);
1228 /* this is off by a little bit.. */
1229 static u32
compute_rate(struct ess_state
*s
, u32 freq
)
1231 u32 clock
= clock_freq
[s
->card
->card_type
];
1233 freq
= (freq
* clocking
)/48000;
1238 return ((freq
/ clock
) <<16 )+
1239 (((freq
% clock
) << 16) / clock
);
1242 static void set_dac_rate(struct ess_state
*s
, unsigned int rate
)
1245 int fmt
= (s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_MASK
;
1254 if(! (fmt
& ESS_FMT_16BIT
) && !(fmt
& ESS_FMT_STEREO
))
1257 /* M_printk("computing dac rate %d with mode %d\n",rate,s->fmt);*/
1259 freq
= compute_rate(s
, rate
);
1261 /* Load the frequency, turn on 6dB */
1262 apu_set_register(s
, 0, 2,(apu_get_register(s
, 0, 2)&0x00FF)|
1263 ( ((freq
&0xFF)<<8)|0x10 ));
1264 apu_set_register(s
, 0, 3, freq
>>8);
1265 apu_set_register(s
, 1, 2,(apu_get_register(s
, 1, 2)&0x00FF)|
1266 ( ((freq
&0xFF)<<8)|0x10 ));
1267 apu_set_register(s
, 1, 3, freq
>>8);
1270 static void set_adc_rate(struct ess_state
*s
, unsigned rate
)
1274 /* Sample Rate conversion APUs don't like 0x10000 for their rate */
1282 freq
= compute_rate(s
, rate
);
1284 /* Load the frequency, turn on 6dB */
1285 apu_set_register(s
, 2, 2,(apu_get_register(s
, 2, 2)&0x00FF)|
1286 ( ((freq
&0xFF)<<8)|0x10 ));
1287 apu_set_register(s
, 2, 3, freq
>>8);
1288 apu_set_register(s
, 3, 2,(apu_get_register(s
, 3, 2)&0x00FF)|
1289 ( ((freq
&0xFF)<<8)|0x10 ));
1290 apu_set_register(s
, 3, 3, freq
>>8);
1292 /* fix mixer rate at 48khz. and its _must_ be 0x10000. */
1295 apu_set_register(s
, 4, 2,(apu_get_register(s
, 4, 2)&0x00FF)|
1296 ( ((freq
&0xFF)<<8)|0x10 ));
1297 apu_set_register(s
, 4, 3, freq
>>8);
1298 apu_set_register(s
, 5, 2,(apu_get_register(s
, 5, 2)&0x00FF)|
1299 ( ((freq
&0xFF)<<8)|0x10 ));
1300 apu_set_register(s
, 5, 3, freq
>>8);
1303 /* Stop our host of recording apus */
1304 static inline void stop_adc(struct ess_state
*s
)
1306 /* XXX lets hope we don't have to lock around this */
1307 if (! (s
->enable
& ADC_RUNNING
)) return;
1309 s
->enable
&= ~ADC_RUNNING
;
1310 apu_set_register(s
, 2, 0, apu_get_register(s
, 2, 0)&0xFF0F);
1311 apu_set_register(s
, 3, 0, apu_get_register(s
, 3, 0)&0xFF0F);
1312 apu_set_register(s
, 4, 0, apu_get_register(s
, 2, 0)&0xFF0F);
1313 apu_set_register(s
, 5, 0, apu_get_register(s
, 3, 0)&0xFF0F);
1316 /* stop output apus */
1317 static void stop_dac(struct ess_state
*s
)
1319 /* XXX have to lock around this? */
1320 if (! (s
->enable
& DAC_RUNNING
)) return;
1322 s
->enable
&= ~DAC_RUNNING
;
1323 apu_set_register(s
, 0, 0, apu_get_register(s
, 0, 0)&0xFF0F);
1324 apu_set_register(s
, 1, 0, apu_get_register(s
, 1, 0)&0xFF0F);
1327 static void start_dac(struct ess_state
*s
)
1330 if ( (s
->dma_dac
.mapped
|| s
->dma_dac
.count
> 0) &&
1332 (! (s
->enable
& DAC_RUNNING
)) ) {
1334 s
->enable
|= DAC_RUNNING
;
1336 apu_set_register(s
, 0, 0,
1337 (apu_get_register(s
, 0, 0)&0xFF0F)|s
->apu_mode
[0]);
1339 if((s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_STEREO
)
1340 apu_set_register(s
, 1, 0,
1341 (apu_get_register(s
, 1, 0)&0xFF0F)|s
->apu_mode
[1]);
1345 static void start_adc(struct ess_state
*s
)
1348 if ((s
->dma_adc
.mapped
|| s
->dma_adc
.count
< (signed)(s
->dma_adc
.dmasize
- 2*s
->dma_adc
.fragsize
))
1349 && s
->dma_adc
.ready
&& (! (s
->enable
& ADC_RUNNING
)) ) {
1351 s
->enable
|= ADC_RUNNING
;
1352 apu_set_register(s
, 2, 0,
1353 (apu_get_register(s
, 2, 0)&0xFF0F)|s
->apu_mode
[2]);
1354 apu_set_register(s
, 4, 0,
1355 (apu_get_register(s
, 4, 0)&0xFF0F)|s
->apu_mode
[4]);
1357 if( s
->fmt
& (ESS_FMT_STEREO
<< ESS_ADC_SHIFT
)) {
1358 apu_set_register(s
, 3, 0,
1359 (apu_get_register(s
, 3, 0)&0xFF0F)|s
->apu_mode
[3]);
1360 apu_set_register(s
, 5, 0,
1361 (apu_get_register(s
, 5, 0)&0xFF0F)|s
->apu_mode
[5]);
1369 * Native play back driver
1372 /* the mode passed should be already shifted and masked */
1374 ess_play_setup(struct ess_state
*ess
, int mode
, u32 rate
, void *buffer
, int size
)
1381 M_printk("mode=%d rate=%d buf=%p len=%d.\n",
1382 mode
, rate
, buffer
, size
);
1384 /* all maestro sizes are in 16bit words */
1387 if(mode
&ESS_FMT_STEREO
) {
1389 /* only 16/stereo gets size divided */
1390 if(mode
&ESS_FMT_16BIT
)
1394 for(channel
=0; channel
<= high_apu
; channel
++)
1396 pa
= virt_to_bus(buffer
);
1398 /* set the wavecache control reg */
1399 tmpval
= (pa
- 0x10) & 0xFFF8;
1400 if(!(mode
& ESS_FMT_16BIT
)) tmpval
|= 4;
1401 if(mode
& ESS_FMT_STEREO
) tmpval
|= 2;
1402 ess
->apu_base
[channel
]=tmpval
;
1403 wave_set_register(ess
, ess
->apu
[channel
]<<3, tmpval
);
1405 pa
-= virt_to_bus(ess
->card
->dmapages
);
1408 /* base offset of dma calcs when reading the pointer
1410 if(!channel
) ess
->dma_dac
.base
= pa
&0xFFFF;
1412 pa
|=0x00400000; /* System RAM */
1414 /* XXX the 16bit here might not be needed.. */
1415 if((mode
& ESS_FMT_STEREO
) && (mode
& ESS_FMT_16BIT
)) {
1417 pa
|=0x00800000; /* Stereo */
1421 /* XXX think about endianess when writing these registers */
1422 M_printk("maestro: ess_play_setup: APU[%d] pa = 0x%x\n", ess
->apu
[channel
], pa
);
1423 /* start of sample */
1424 apu_set_register(ess
, channel
, 4, ((pa
>>16)&0xFF)<<8);
1425 apu_set_register(ess
, channel
, 5, pa
&0xFFFF);
1427 apu_set_register(ess
, channel
, 6, (pa
+size
)&0xFFFF);
1428 /* setting loop len == sample len */
1429 apu_set_register(ess
, channel
, 7, size
);
1431 /* clear effects/env.. */
1432 apu_set_register(ess
, channel
, 8, 0x0000);
1433 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1434 apu_set_register(ess
, channel
, 9, 0xD000);
1436 /* clear routing stuff */
1437 apu_set_register(ess
, channel
, 11, 0x0000);
1438 /* dma on, no envelopes, filter to all 1s) */
1439 apu_set_register(ess
, channel
, 0, 0x400F);
1441 if(mode
&ESS_FMT_16BIT
)
1442 ess
->apu_mode
[channel
]=0x10;
1444 ess
->apu_mode
[channel
]=0x30;
1446 if(mode
&ESS_FMT_STEREO
) {
1447 /* set panning: left or right */
1448 apu_set_register(ess
, channel
, 10, 0x8F00 | (channel
? 0 : 0x10));
1449 ess
->apu_mode
[channel
] += 0x10;
1451 apu_set_register(ess
, channel
, 10, 0x8F08);
1454 /* clear WP interrupts */
1455 outw(1, ess
->card
->iobase
+0x04);
1456 /* enable WP ints */
1457 outw(inw(ess
->card
->iobase
+0x18)|4, ess
->card
->iobase
+0x18);
1460 set_dac_rate(ess
,rate
);
1465 * Native record driver
1468 /* again, passed mode is alrady shifted/masked */
1470 ess_rec_setup(struct ess_state
*ess
, int mode
, u32 rate
, void *buffer
, int size
)
1475 M_printk("maestro: ess_rec_setup: mode=%d rate=%d buf=0x%p len=%d.\n",
1476 mode
, rate
, buffer
, size
);
1478 /* all maestro sizes are in 16bit words */
1481 /* we're given the full size of the buffer, but
1482 in stereo each channel will only use its half */
1483 if(mode
&ESS_FMT_STEREO
) {
1488 /* APU assignments: 2 = mono/left SRC
1490 4 = mono/left Input Mixer
1491 5 = right Input Mixer */
1492 for(channel
=2;channel
<6;channel
+=apu_step
)
1499 /* data seems to flow from the codec, through an apu into
1500 the 'mixbuf' bit of page, then through the SRC apu
1501 and out to the real 'buffer'. ok. sure. */
1503 if(channel
& 0x04) {
1504 /* ok, we're an input mixer going from adc
1505 through the mixbuf to the other apus */
1507 if(!(channel
& 0x01)) {
1508 pa
= virt_to_bus(ess
->mixbuf
);
1510 pa
= virt_to_bus(ess
->mixbuf
+ (PAGE_SIZE
>> 4));
1513 /* we source from a 'magic' apu */
1514 bsize
= PAGE_SIZE
>> 5; /* half of this channels alloc, in words */
1515 route
= 0x14 + (channel
- 4); /* parallel in crap, see maestro reg 0xC [8-11] */
1516 ess
->apu_mode
[channel
] = 0x90; /* Input Mixer */
1519 /* we're a rate converter taking
1520 input from the input apus and outputing it to
1522 if(!(channel
& 0x01)) {
1523 pa
= virt_to_bus(buffer
);
1525 /* right channel records its split half.
1526 *2 accommodates for rampant shifting earlier */
1527 pa
= virt_to_bus(buffer
+ size
*2);
1530 ess
->apu_mode
[channel
] = 0xB0; /* Sample Rate Converter */
1533 /* get input from inputing apu */
1534 route
= channel
+ 2;
1537 M_printk("maestro: ess_rec_setup: getting pa 0x%x from %d\n",pa
,channel
);
1539 /* set the wavecache control reg */
1540 tmpval
= (pa
- 0x10) & 0xFFF8;
1541 ess
->apu_base
[channel
]=tmpval
;
1542 wave_set_register(ess
, ess
->apu
[channel
]<<3, tmpval
);
1544 pa
-= virt_to_bus(ess
->card
->dmapages
);
1547 /* base offset of dma calcs when reading the pointer
1549 if(channel
==2) ess
->dma_adc
.base
= pa
&0xFFFF;
1551 pa
|=0x00400000; /* bit 22 -> System RAM */
1553 M_printk("maestro: ess_rec_setup: APU[%d] pa = 0x%x size = 0x%x route = 0x%x\n",
1554 ess
->apu
[channel
], pa
, bsize
, route
);
1556 /* Begin loading the APU */
1557 for(i
=0;i
<15;i
++) /* clear all PBRs */
1558 apu_set_register(ess
, channel
, i
, 0x0000);
1560 apu_set_register(ess
, channel
, 0, 0x400F);
1562 /* need to enable subgroups.. and we should probably
1563 have different groups for different /dev/dsps.. */
1564 apu_set_register(ess
, channel
, 2, 0x8);
1566 /* Load the buffer into the wave engine */
1567 apu_set_register(ess
, channel
, 4, ((pa
>>16)&0xFF)<<8);
1568 /* XXX reg is little endian.. */
1569 apu_set_register(ess
, channel
, 5, pa
&0xFFFF);
1570 apu_set_register(ess
, channel
, 6, (pa
+bsize
)&0xFFFF);
1571 apu_set_register(ess
, channel
, 7, bsize
);
1573 /* clear effects/env.. */
1574 apu_set_register(ess
, channel
, 8, 0x00F0);
1576 /* amplitude now? sure. why not. */
1577 apu_set_register(ess
, channel
, 9, 0x0000);
1579 /* set filter tune, radius, polar pan */
1580 apu_set_register(ess
, channel
, 10, 0x8F08);
1583 apu_set_register(ess
, channel
, 11, route
);
1586 /* clear WP interrupts */
1587 outw(1, ess
->card
->iobase
+0x04);
1588 /* enable WP ints */
1589 outw(inw(ess
->card
->iobase
+0x18)|4, ess
->card
->iobase
+0x18);
1592 set_adc_rate(ess
,rate
);
1595 /* --------------------------------------------------------------------- */
1597 static void set_dmaa(struct ess_state
*s
, unsigned int addr
, unsigned int count
)
1599 M_printk("set_dmaa??\n");
1602 static void set_dmac(struct ess_state
*s
, unsigned int addr
, unsigned int count
)
1604 M_printk("set_dmac??\n");
1607 /* Playback pointer */
1608 static inline unsigned get_dmaa(struct ess_state
*s
)
1612 offset
= apu_get_register(s
,0,5);
1614 /* M_printk("dmaa: offset: %d, base: %d\n",offset,s->dma_dac.base); */
1616 offset
-=s
->dma_dac
.base
;
1618 return (offset
&0xFFFE)<<1; /* hardware is in words */
1621 /* Record pointer */
1622 static inline unsigned get_dmac(struct ess_state
*s
)
1626 offset
= apu_get_register(s
,2,5);
1628 /* M_printk("dmac: offset: %d, base: %d\n",offset,s->dma_adc.base); */
1630 /* The offset is an address not a position relative to base */
1631 offset
-=s
->dma_adc
.base
;
1633 return (offset
&0xFFFE)<<1; /* hardware is in words */
1637 * Meet Bob, the timer...
1640 static irqreturn_t
ess_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
);
1642 static void stop_bob(struct ess_state
*s
)
1644 /* Mask IDR 11,17 */
1645 maestro_write(s
, 0x11, maestro_read(s
, 0x11)&~1);
1646 maestro_write(s
, 0x17, maestro_read(s
, 0x17)&~1);
1649 /* eventually we could be clever and limit bob ints
1650 to the frequency at which our smallest duration
1651 chunks may expire */
1652 #define ESS_SYSCLK 50000000
1653 static void start_bob(struct ess_state
*s
)
1658 /* XXX make freq selector much smarter, see calc_bob_rate */
1661 /* compute ideal interrupt frequency for buffer size & play rate */
1662 /* first, find best prescaler value to match freq */
1663 for(prescale
=5;prescale
<12;prescale
++)
1664 if(freq
> (ESS_SYSCLK
>>(prescale
+9)))
1667 /* next, back off prescaler whilst getting divider into optimum range */
1669 while((prescale
> 5) && (divide
<32))
1676 /* now fine-tune the divider for best match */
1677 for(;divide
<31;divide
++)
1678 if(freq
>= ((ESS_SYSCLK
>>(prescale
+9))/(divide
+1)))
1681 /* divide = 0 is illegal, but don't let prescale = 4! */
1689 maestro_write(s
, 6, 0x9000 | (prescale
<<5) | divide
); /* set reg */
1691 /* Now set IDR 11/17 */
1692 maestro_write(s
, 0x11, maestro_read(s
, 0x11)|1);
1693 maestro_write(s
, 0x17, maestro_read(s
, 0x17)|1);
1695 /* --------------------------------------------------------------------- */
1697 /* this quickly calculates the frequency needed for bob
1698 and sets it if its different than what bob is
1699 currently running at. its called often so
1700 needs to be fairly quick. */
1703 static void calc_bob_rate(struct ess_state
*s
) {
1704 #if 0 /* this thing tries to set the frequency of bob such that
1705 there are 2 interrupts / buffer walked by the dac/adc. That
1706 is probably very wrong for people who actually care about
1707 mid buffer positioning. it should be calculated as bytes/interrupt
1708 and that needs to be decided :) so for now just use the static 150
1711 unsigned int dac_rate
=2,adc_rate
=1,newrate
;
1712 static int israte
=-1;
1714 if (s
->dma_dac
.fragsize
== 0) dac_rate
= BOB_MIN
;
1716 dac_rate
= (2 * s
->ratedac
* sample_size
[(s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_MASK
]) /
1717 (s
->dma_dac
.fragsize
) ;
1720 if (s
->dma_adc
.fragsize
== 0) adc_rate
= BOB_MIN
;
1722 adc_rate
= (2 * s
->rateadc
* sample_size
[(s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_MASK
]) /
1723 (s
->dma_adc
.fragsize
) ;
1726 if(dac_rate
> adc_rate
) newrate
= adc_rate
;
1727 else newrate
=dac_rate
;
1729 if(newrate
> BOB_MAX
) newrate
= BOB_MAX
;
1731 if(newrate
< BOB_MIN
)
1735 if( israte
!= newrate
) {
1736 printk("dac: %d adc: %d rate: %d\n",dac_rate
,adc_rate
,israte
);
1744 prog_dmabuf(struct ess_state
*s
, unsigned rec
)
1746 struct dmabuf
*db
= rec
? &s
->dma_adc
: &s
->dma_dac
;
1747 unsigned rate
= rec
? s
->rateadc
: s
->ratedac
;
1748 unsigned bytepersec
;
1751 unsigned long flags
;
1753 spin_lock_irqsave(&s
->lock
, flags
);
1757 fmt
>>= ESS_ADC_SHIFT
;
1760 fmt
>>= ESS_DAC_SHIFT
;
1762 spin_unlock_irqrestore(&s
->lock
, flags
);
1763 fmt
&= ESS_FMT_MASK
;
1765 db
->hwptr
= db
->swptr
= db
->total_bytes
= db
->count
= db
->error
= db
->endcleared
= 0;
1767 /* this algorithm is a little nuts.. where did /1000 come from? */
1768 bytepersec
= rate
<< sample_shift
[fmt
];
1769 bufs
= PAGE_SIZE
<< db
->buforder
;
1770 if (db
->ossfragshift
) {
1771 if ((1000 << db
->ossfragshift
) < bytepersec
)
1772 db
->fragshift
= ld2(bytepersec
/1000);
1774 db
->fragshift
= db
->ossfragshift
;
1776 db
->fragshift
= ld2(bytepersec
/100/(db
->subdivision
? db
->subdivision
: 1));
1777 if (db
->fragshift
< 3)
1780 db
->numfrag
= bufs
>> db
->fragshift
;
1781 while (db
->numfrag
< 4 && db
->fragshift
> 3) {
1783 db
->numfrag
= bufs
>> db
->fragshift
;
1785 db
->fragsize
= 1 << db
->fragshift
;
1786 if (db
->ossmaxfrags
>= 4 && db
->ossmaxfrags
< db
->numfrag
)
1787 db
->numfrag
= db
->ossmaxfrags
;
1788 db
->fragsamples
= db
->fragsize
>> sample_shift
[fmt
];
1789 db
->dmasize
= db
->numfrag
<< db
->fragshift
;
1791 M_printk("maestro: setup oss: numfrag: %d fragsize: %d dmasize: %d\n",db
->numfrag
,db
->fragsize
,db
->dmasize
);
1793 memset(db
->rawbuf
, (fmt
& ESS_FMT_16BIT
) ? 0 : 0x80, db
->dmasize
);
1795 spin_lock_irqsave(&s
->lock
, flags
);
1797 ess_rec_setup(s
, fmt
, s
->rateadc
, db
->rawbuf
, db
->dmasize
);
1799 ess_play_setup(s
, fmt
, s
->ratedac
, db
->rawbuf
, db
->dmasize
);
1801 spin_unlock_irqrestore(&s
->lock
, flags
);
1807 static __inline__
void
1808 clear_advance(struct ess_state
*s
)
1810 unsigned char c
= ((s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_16BIT
) ? 0 : 0x80;
1812 unsigned char *buf
= s
->dma_dac
.rawbuf
;
1813 unsigned bsize
= s
->dma_dac
.dmasize
;
1814 unsigned bptr
= s
->dma_dac
.swptr
;
1815 unsigned len
= s
->dma_dac
.fragsize
;
1817 if (bptr
+ len
> bsize
) {
1818 unsigned x
= bsize
- bptr
;
1819 memset(buf
+ bptr
, c
, x
);
1820 /* account for wrapping? */
1824 memset(buf
+ bptr
, c
, len
);
1827 /* call with spinlock held! */
1829 ess_update_ptr(struct ess_state
*s
)
1834 /* update ADC pointer */
1835 if (s
->dma_adc
.ready
) {
1836 /* oh boy should this all be re-written. everything in the current code paths think
1837 that the various counters/pointers are expressed in bytes to the user but we have
1838 two apus doing stereo stuff so we fix it up here.. it propagates to all the various
1839 counters from here. */
1840 if ( s
->fmt
& (ESS_FMT_STEREO
<< ESS_ADC_SHIFT
)) {
1841 hwptr
= (get_dmac(s
)*2) % s
->dma_adc
.dmasize
;
1843 hwptr
= get_dmac(s
) % s
->dma_adc
.dmasize
;
1845 diff
= (s
->dma_adc
.dmasize
+ hwptr
- s
->dma_adc
.hwptr
) % s
->dma_adc
.dmasize
;
1846 s
->dma_adc
.hwptr
= hwptr
;
1847 s
->dma_adc
.total_bytes
+= diff
;
1848 s
->dma_adc
.count
+= diff
;
1849 if (s
->dma_adc
.count
>= (signed)s
->dma_adc
.fragsize
)
1850 wake_up(&s
->dma_adc
.wait
);
1851 if (!s
->dma_adc
.mapped
) {
1852 if (s
->dma_adc
.count
> (signed)(s
->dma_adc
.dmasize
- ((3 * s
->dma_adc
.fragsize
) >> 1))) {
1854 wrindir(s, SV_CIENABLE, s->enable); */
1856 /* brute force everyone back in sync, sigh */
1857 s
->dma_adc
.count
= 0;
1858 s
->dma_adc
.swptr
= 0;
1859 s
->dma_adc
.hwptr
= 0;
1864 /* update DAC pointer */
1865 if (s
->dma_dac
.ready
) {
1866 hwptr
= get_dmaa(s
) % s
->dma_dac
.dmasize
;
1867 /* the apu only reports the length it has seen, not the
1868 length of the memory that has been used (the WP
1870 if ( ((s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_MASK
) == (ESS_FMT_STEREO
|ESS_FMT_16BIT
))
1873 diff
= (s
->dma_dac
.dmasize
+ hwptr
- s
->dma_dac
.hwptr
) % s
->dma_dac
.dmasize
;
1874 /* M_printk("updating dac: hwptr: %d diff: %d\n",hwptr,diff);*/
1875 s
->dma_dac
.hwptr
= hwptr
;
1876 s
->dma_dac
.total_bytes
+= diff
;
1877 if (s
->dma_dac
.mapped
) {
1878 s
->dma_dac
.count
+= diff
;
1879 if (s
->dma_dac
.count
>= (signed)s
->dma_dac
.fragsize
) {
1880 wake_up(&s
->dma_dac
.wait
);
1883 s
->dma_dac
.count
-= diff
;
1884 /* M_printk("maestro: ess_update_ptr: diff: %d, count: %d\n", diff, s->dma_dac.count); */
1885 if (s
->dma_dac
.count
<= 0) {
1886 M_printk("underflow! diff: %d count: %d hw: %d sw: %d\n", diff
, s
->dma_dac
.count
,
1887 hwptr
, s
->dma_dac
.swptr
);
1889 wrindir(s, SV_CIENABLE, s->enable); */
1890 /* XXX how on earth can calling this with the lock held work.. */
1892 /* brute force everyone back in sync, sigh */
1893 s
->dma_dac
.count
= 0;
1894 s
->dma_dac
.swptr
= hwptr
;
1896 } else if (s
->dma_dac
.count
<= (signed)s
->dma_dac
.fragsize
&& !s
->dma_dac
.endcleared
) {
1898 s
->dma_dac
.endcleared
= 1;
1900 if (s
->dma_dac
.count
+ (signed)s
->dma_dac
.fragsize
<= (signed)s
->dma_dac
.dmasize
) {
1901 wake_up(&s
->dma_dac
.wait
);
1902 /* printk("waking up DAC count: %d sw: %d hw: %d\n",s->dma_dac.count, s->dma_dac.swptr,
1910 ess_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
1912 struct ess_state
*s
;
1913 struct ess_card
*c
= (struct ess_card
*)dev_id
;
1917 if ( ! (event
= inb(c
->iobase
+0x1A)) )
1920 outw(inw(c
->iobase
+4)&1, c
->iobase
+4);
1922 /* M_printk("maestro int: %x\n",event);*/
1926 enum {UP_EVT
, DOWN_EVT
, MUTE_EVT
} vol_evt
;
1929 /* Figure out which volume control button was pushed,
1930 based on differences from the default register
1932 x
= inb(c
->iobase
+0x1c);
1933 if (x
&1) vol_evt
= MUTE_EVT
;
1934 else if (((x
>>1)&7) > 4) vol_evt
= UP_EVT
;
1935 else vol_evt
= DOWN_EVT
;
1937 /* Reset the volume control registers. */
1938 outb(0x88, c
->iobase
+0x1c);
1939 outb(0x88, c
->iobase
+0x1d);
1940 outb(0x88, c
->iobase
+0x1e);
1941 outb(0x88, c
->iobase
+0x1f);
1943 /* Deal with the button press in a hammer-handed
1944 manner by adjusting the master mixer volume. */
1945 volume
= c
->mix
.mixer_state
[0] & 0xff;
1946 if (vol_evt
== UP_EVT
) {
1951 else if (vol_evt
== DOWN_EVT
) {
1956 /* vol_evt == MUTE_EVT */
1958 volume
= c
->dock_mute_vol
;
1960 c
->dock_mute_vol
= volume
;
1964 set_mixer (c
, 0, (volume
<< 8) | volume
);
1967 /* Ack all the interrupts. */
1968 outb(0xFF, c
->iobase
+0x1A);
1971 * Update the pointers for all APU's we are running.
1973 for(i
=0;i
<NR_DSPS
;i
++)
1976 if(s
->dev_audio
== -1)
1978 spin_lock(&s
->lock
);
1980 spin_unlock(&s
->lock
);
1986 /* --------------------------------------------------------------------- */
1988 static const char invalid_magic
[] = KERN_CRIT
"maestro: invalid magic value in %s\n";
1990 #define VALIDATE_MAGIC(FOO,MAG) \
1992 if (!(FOO) || (FOO)->magic != MAG) { \
1993 printk(invalid_magic,__FUNCTION__); \
1998 #define VALIDATE_STATE(a) VALIDATE_MAGIC(a,ESS_STATE_MAGIC)
1999 #define VALIDATE_CARD(a) VALIDATE_MAGIC(a,ESS_CARD_MAGIC)
2001 static void set_mixer(struct ess_card
*card
,unsigned int mixer
, unsigned int val
)
2003 unsigned int left
,right
;
2004 /* cleanse input a little */
2005 right
= ((val
>> 8) & 0xff) ;
2006 left
= (val
& 0xff) ;
2008 if(right
> 100) right
= 100;
2009 if(left
> 100) left
= 100;
2011 card
->mix
.mixer_state
[mixer
]=(right
<< 8) | left
;
2012 card
->mix
.write_mixer(card
,mixer
,left
,right
);
2016 mixer_push_state(struct ess_card
*card
)
2019 for(i
= 0 ; i
< SOUND_MIXER_NRDEVICES
; i
++) {
2020 if( ! supported_mixer(card
,i
)) continue;
2022 set_mixer(card
,i
,card
->mix
.mixer_state
[i
]);
2026 static int mixer_ioctl(struct ess_card
*card
, unsigned int cmd
, unsigned long arg
)
2029 unsigned long flags
;
2030 void __user
*argp
= (void __user
*)arg
;
2031 int __user
*p
= argp
;
2033 VALIDATE_CARD(card
);
2034 if (cmd
== SOUND_MIXER_INFO
) {
2036 memset(&info
, 0, sizeof(info
));
2037 strlcpy(info
.id
, card_names
[card
->card_type
], sizeof(info
.id
));
2038 strlcpy(info
.name
, card_names
[card
->card_type
], sizeof(info
.name
));
2039 info
.modify_counter
= card
->mix
.modcnt
;
2040 if (copy_to_user(argp
, &info
, sizeof(info
)))
2044 if (cmd
== SOUND_OLD_MIXER_INFO
) {
2045 _old_mixer_info info
;
2046 memset(&info
, 0, sizeof(info
));
2047 strlcpy(info
.id
, card_names
[card
->card_type
], sizeof(info
.id
));
2048 strlcpy(info
.name
, card_names
[card
->card_type
], sizeof(info
.name
));
2049 if (copy_to_user(argp
, &info
, sizeof(info
)))
2053 if (cmd
== OSS_GETVERSION
)
2054 return put_user(SOUND_VERSION
, p
);
2056 if (_IOC_TYPE(cmd
) != 'M' || _IOC_SIZE(cmd
) != sizeof(int))
2059 if (_IOC_DIR(cmd
) == _IOC_READ
) {
2060 switch (_IOC_NR(cmd
)) {
2061 case SOUND_MIXER_RECSRC
: /* give them the current record source */
2063 if(!card
->mix
.recmask_io
) {
2066 spin_lock_irqsave(&card
->lock
, flags
);
2067 val
= card
->mix
.recmask_io(card
,1,0);
2068 spin_unlock_irqrestore(&card
->lock
, flags
);
2072 case SOUND_MIXER_DEVMASK
: /* give them the supported mixers */
2073 val
= card
->mix
.supported_mixers
;
2076 case SOUND_MIXER_RECMASK
: /* Arg contains a bit for each supported recording source */
2077 val
= card
->mix
.record_sources
;
2080 case SOUND_MIXER_STEREODEVS
: /* Mixer channels supporting stereo */
2081 val
= card
->mix
.stereo_mixers
;
2084 case SOUND_MIXER_CAPS
:
2085 val
= SOUND_CAP_EXCL_INPUT
;
2088 default: /* read a specific mixer */
2091 if ( ! supported_mixer(card
,i
))
2094 /* do we ever want to touch the hardware? */
2095 /* spin_lock_irqsave(&card->lock, flags);
2096 val = card->mix.read_mixer(card,i);
2097 spin_unlock_irqrestore(&card->lock, flags);*/
2099 val
= card
->mix
.mixer_state
[i
];
2100 /* M_printk("returned 0x%x for mixer %d\n",val,i);*/
2104 return put_user(val
, p
);
2107 if (_IOC_DIR(cmd
) != (_IOC_WRITE
|_IOC_READ
))
2112 if (get_user(val
, p
))
2115 switch (_IOC_NR(cmd
)) {
2116 case SOUND_MIXER_RECSRC
: /* Arg contains a bit for each recording source */
2118 if (!card
->mix
.recmask_io
) return -EINVAL
;
2120 if(! (val
&= card
->mix
.record_sources
)) return -EINVAL
;
2122 spin_lock_irqsave(&card
->lock
, flags
);
2123 card
->mix
.recmask_io(card
,0,val
);
2124 spin_unlock_irqrestore(&card
->lock
, flags
);
2130 if ( ! supported_mixer(card
,i
))
2133 spin_lock_irqsave(&card
->lock
, flags
);
2134 set_mixer(card
,i
,val
);
2135 spin_unlock_irqrestore(&card
->lock
, flags
);
2141 /* --------------------------------------------------------------------- */
2142 static int ess_open_mixdev(struct inode
*inode
, struct file
*file
)
2144 unsigned int minor
= iminor(inode
);
2145 struct ess_card
*card
= NULL
;
2146 struct pci_dev
*pdev
= NULL
;
2147 struct pci_driver
*drvr
;
2149 while ((pdev
= pci_find_device(PCI_ANY_ID
, PCI_ANY_ID
, pdev
)) != NULL
) {
2150 drvr
= pci_dev_driver (pdev
);
2151 if (drvr
== &maestro_pci_driver
) {
2152 card
= (struct ess_card
*)pci_get_drvdata (pdev
);
2155 if (card
->dev_mixer
== minor
)
2161 file
->private_data
= card
;
2162 return nonseekable_open(inode
, file
);
2165 static int ess_release_mixdev(struct inode
*inode
, struct file
*file
)
2167 struct ess_card
*card
= (struct ess_card
*)file
->private_data
;
2169 VALIDATE_CARD(card
);
2174 static int ess_ioctl_mixdev(struct inode
*inode
, struct file
*file
, unsigned int cmd
, unsigned long arg
)
2176 struct ess_card
*card
= (struct ess_card
*)file
->private_data
;
2178 VALIDATE_CARD(card
);
2180 return mixer_ioctl(card
, cmd
, arg
);
2183 static /*const*/ struct file_operations ess_mixer_fops
= {
2184 .owner
= THIS_MODULE
,
2185 .llseek
= no_llseek
,
2186 .ioctl
= ess_ioctl_mixdev
,
2187 .open
= ess_open_mixdev
,
2188 .release
= ess_release_mixdev
,
2191 /* --------------------------------------------------------------------- */
2193 static int drain_dac(struct ess_state
*s
, int nonblock
)
2195 DECLARE_WAITQUEUE(wait
,current
);
2196 unsigned long flags
;
2200 if (s
->dma_dac
.mapped
|| !s
->dma_dac
.ready
)
2202 current
->state
= TASK_INTERRUPTIBLE
;
2203 add_wait_queue(&s
->dma_dac
.wait
, &wait
);
2205 /* XXX uhm.. questionable locking*/
2206 spin_lock_irqsave(&s
->lock
, flags
);
2207 count
= s
->dma_dac
.count
;
2208 spin_unlock_irqrestore(&s
->lock
, flags
);
2211 if (signal_pending(current
))
2214 remove_wait_queue(&s
->dma_dac
.wait
, &wait
);
2215 current
->state
= TASK_RUNNING
;
2218 tmo
= (count
* HZ
) / s
->ratedac
;
2219 tmo
>>= sample_shift
[(s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_MASK
];
2220 /* XXX this is just broken. someone is waking us up alot, or schedule_timeout is broken.
2221 or something. who cares. - zach */
2222 if (!schedule_timeout(tmo
? tmo
: 1) && tmo
)
2223 M_printk(KERN_DEBUG
"maestro: dma timed out?? %ld\n",jiffies
);
2225 remove_wait_queue(&s
->dma_dac
.wait
, &wait
);
2226 current
->state
= TASK_RUNNING
;
2227 if (signal_pending(current
))
2228 return -ERESTARTSYS
;
2232 /* --------------------------------------------------------------------- */
2233 /* Zach sez: "god this is gross.." */
2235 comb_stereo(unsigned char *real_buffer
,unsigned char *tmp_buffer
, int offset
,
2236 int count
, int bufsize
)
2238 /* No such thing as stereo recording, so we
2239 use dual input mixers. which means we have to
2240 combine mono to stereo buffer. yuck.
2242 but we don't have to be able to work a byte at a time..*/
2244 unsigned char *so
,*left
,*right
;
2248 left
= real_buffer
+ offset
;
2249 right
= real_buffer
+ bufsize
/2 + offset
;
2251 /* M_printk("comb_stereo writing %d to %p from %p and %p, offset: %d size: %d\n",count/2, tmp_buffer,left,right,offset,bufsize);*/
2253 for(i
=count
/4; i
; i
--) {
2254 (*(so
+2)) = *(right
++);
2255 (*(so
+3)) = *(right
++);
2257 (*(so
+1)) = *(left
++);
2264 /* in this loop, dma_adc.count signifies the amount of data thats waiting
2265 to be copied to the user's buffer. it is filled by the interrupt
2266 handler and drained by this loop. */
2268 ess_read(struct file
*file
, char __user
*buffer
, size_t count
, loff_t
*ppos
)
2270 struct ess_state
*s
= (struct ess_state
*)file
->private_data
;
2272 unsigned long flags
;
2275 unsigned char *combbuf
= NULL
;
2278 if (s
->dma_adc
.mapped
)
2280 if (!s
->dma_adc
.ready
&& (ret
= prog_dmabuf(s
, 1)))
2282 if (!access_ok(VERIFY_WRITE
, buffer
, count
))
2284 if(!(combbuf
= kmalloc(count
,GFP_KERNEL
)))
2291 spin_lock_irqsave(&s
->lock
, flags
);
2292 /* remember, all these things are expressed in bytes to be
2293 sent to the user.. hence the evil / 2 down below */
2294 swptr
= s
->dma_adc
.swptr
;
2295 cnt
= s
->dma_adc
.dmasize
-swptr
;
2296 if (s
->dma_adc
.count
< cnt
)
2297 cnt
= s
->dma_adc
.count
;
2298 spin_unlock_irqrestore(&s
->lock
, flags
);
2303 if ( cnt
> 0 ) cnt
&= ~3;
2307 if (file
->f_flags
& O_NONBLOCK
)
2309 ret
= ret
? ret
: -EAGAIN
;
2310 goto rec_return_free
;
2312 if (!interruptible_sleep_on_timeout(&s
->dma_adc
.wait
, HZ
)) {
2313 if(! s
->card
->in_suspend
) printk(KERN_DEBUG
"maestro: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
2314 s
->dma_adc
.dmasize
, s
->dma_adc
.fragsize
, s
->dma_adc
.count
,
2315 s
->dma_adc
.hwptr
, s
->dma_adc
.swptr
);
2317 spin_lock_irqsave(&s
->lock
, flags
);
2318 set_dmac(s
, virt_to_bus(s
->dma_adc
.rawbuf
), s
->dma_adc
.numfrag
<< s
->dma_adc
.fragshift
);
2319 /* program enhanced mode registers */
2321 /* wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
2322 wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1); */
2323 s
->dma_adc
.count
= s
->dma_adc
.hwptr
= s
->dma_adc
.swptr
= 0;
2324 spin_unlock_irqrestore(&s
->lock
, flags
);
2326 if (signal_pending(current
))
2328 ret
= ret
? ret
: -ERESTARTSYS
;
2329 goto rec_return_free
;
2334 if(s
->fmt
& (ESS_FMT_STEREO
<< ESS_ADC_SHIFT
)) {
2335 /* swptr/2 so that we know the real offset in each apu's buffer */
2336 comb_stereo(s
->dma_adc
.rawbuf
,combbuf
,swptr
/2,cnt
,s
->dma_adc
.dmasize
);
2337 if (copy_to_user(buffer
, combbuf
, cnt
)) {
2338 ret
= ret
? ret
: -EFAULT
;
2339 goto rec_return_free
;
2342 if (copy_to_user(buffer
, s
->dma_adc
.rawbuf
+ swptr
, cnt
)) {
2343 ret
= ret
? ret
: -EFAULT
;
2344 goto rec_return_free
;
2348 swptr
= (swptr
+ cnt
) % s
->dma_adc
.dmasize
;
2349 spin_lock_irqsave(&s
->lock
, flags
);
2350 s
->dma_adc
.swptr
= swptr
;
2351 s
->dma_adc
.count
-= cnt
;
2352 spin_unlock_irqrestore(&s
->lock
, flags
);
2365 ess_write(struct file
*file
, const char __user
*buffer
, size_t count
, loff_t
*ppos
)
2367 struct ess_state
*s
= (struct ess_state
*)file
->private_data
;
2369 unsigned long flags
;
2374 if (s
->dma_dac
.mapped
)
2376 if (!s
->dma_dac
.ready
&& (ret
= prog_dmabuf(s
, 0)))
2378 if (!access_ok(VERIFY_READ
, buffer
, count
))
2385 spin_lock_irqsave(&s
->lock
, flags
);
2387 if (s
->dma_dac
.count
< 0) {
2388 s
->dma_dac
.count
= 0;
2389 s
->dma_dac
.swptr
= s
->dma_dac
.hwptr
;
2391 swptr
= s
->dma_dac
.swptr
;
2393 cnt
= s
->dma_dac
.dmasize
-swptr
;
2395 if (s
->dma_dac
.count
+ cnt
> s
->dma_dac
.dmasize
)
2396 cnt
= s
->dma_dac
.dmasize
- s
->dma_dac
.count
;
2398 spin_unlock_irqrestore(&s
->lock
, flags
);
2405 if (file
->f_flags
& O_NONBLOCK
) {
2406 if(!ret
) ret
= -EAGAIN
;
2409 if (!interruptible_sleep_on_timeout(&s
->dma_dac
.wait
, HZ
)) {
2410 if(! s
->card
->in_suspend
) printk(KERN_DEBUG
"maestro: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
2411 s
->dma_dac
.dmasize
, s
->dma_dac
.fragsize
, s
->dma_dac
.count
,
2412 s
->dma_dac
.hwptr
, s
->dma_dac
.swptr
);
2414 spin_lock_irqsave(&s
->lock
, flags
);
2415 set_dmaa(s
, virt_to_bus(s
->dma_dac
.rawbuf
), s
->dma_dac
.numfrag
<< s
->dma_dac
.fragshift
);
2416 /* program enhanced mode registers */
2417 /* wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
2418 wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1); */
2420 s
->dma_dac
.count
= s
->dma_dac
.hwptr
= s
->dma_dac
.swptr
= 0;
2421 spin_unlock_irqrestore(&s
->lock
, flags
);
2423 if (signal_pending(current
)) {
2424 if (!ret
) ret
= -ERESTARTSYS
;
2429 if (copy_from_user(s
->dma_dac
.rawbuf
+ swptr
, buffer
, cnt
)) {
2430 if (!ret
) ret
= -EFAULT
;
2433 /* printk("wrote %d bytes at sw: %d cnt: %d while hw: %d\n",cnt, swptr, s->dma_dac.count, s->dma_dac.hwptr);*/
2435 swptr
= (swptr
+ cnt
) % s
->dma_dac
.dmasize
;
2437 spin_lock_irqsave(&s
->lock
, flags
);
2438 s
->dma_dac
.swptr
= swptr
;
2439 s
->dma_dac
.count
+= cnt
;
2440 s
->dma_dac
.endcleared
= 0;
2441 spin_unlock_irqrestore(&s
->lock
, flags
);
2451 /* No kernel lock - we have our own spinlock */
2452 static unsigned int ess_poll(struct file
*file
, struct poll_table_struct
*wait
)
2454 struct ess_state
*s
= (struct ess_state
*)file
->private_data
;
2455 unsigned long flags
;
2456 unsigned int mask
= 0;
2460 /* In 0.14 prog_dmabuf always returns success anyway ... */
2461 if (file
->f_mode
& FMODE_WRITE
) {
2462 if (!s
->dma_dac
.ready
&& prog_dmabuf(s
, 0))
2465 if (file
->f_mode
& FMODE_READ
) {
2466 if (!s
->dma_adc
.ready
&& prog_dmabuf(s
, 1))
2470 if (file
->f_mode
& FMODE_WRITE
)
2471 poll_wait(file
, &s
->dma_dac
.wait
, wait
);
2472 if (file
->f_mode
& FMODE_READ
)
2473 poll_wait(file
, &s
->dma_adc
.wait
, wait
);
2474 spin_lock_irqsave(&s
->lock
, flags
);
2476 if (file
->f_mode
& FMODE_READ
) {
2477 if (s
->dma_adc
.count
>= (signed)s
->dma_adc
.fragsize
)
2478 mask
|= POLLIN
| POLLRDNORM
;
2480 if (file
->f_mode
& FMODE_WRITE
) {
2481 if (s
->dma_dac
.mapped
) {
2482 if (s
->dma_dac
.count
>= (signed)s
->dma_dac
.fragsize
)
2483 mask
|= POLLOUT
| POLLWRNORM
;
2485 if ((signed)s
->dma_dac
.dmasize
>= s
->dma_dac
.count
+ (signed)s
->dma_dac
.fragsize
)
2486 mask
|= POLLOUT
| POLLWRNORM
;
2489 spin_unlock_irqrestore(&s
->lock
, flags
);
2493 static int ess_mmap(struct file
*file
, struct vm_area_struct
*vma
)
2495 struct ess_state
*s
= (struct ess_state
*)file
->private_data
;
2502 if (vma
->vm_flags
& VM_WRITE
) {
2503 if ((ret
= prog_dmabuf(s
, 1)) != 0)
2508 /* if we can have the wp/wc do the combining
2509 we can turn this back on. */
2510 if (vma
->vm_flags
& VM_READ
) {
2511 if ((ret
= prog_dmabuf(s
, 0)) != 0)
2518 if (vma
->vm_pgoff
!= 0)
2520 size
= vma
->vm_end
- vma
->vm_start
;
2521 if (size
> (PAGE_SIZE
<< db
->buforder
))
2524 if (remap_pfn_range(vma
, vma
->vm_start
,
2525 virt_to_phys(db
->rawbuf
) >> PAGE_SHIFT
,
2526 size
, vma
->vm_page_prot
))
2535 static int ess_ioctl(struct inode
*inode
, struct file
*file
, unsigned int cmd
, unsigned long arg
)
2537 struct ess_state
*s
= (struct ess_state
*)file
->private_data
;
2538 unsigned long flags
;
2539 audio_buf_info abinfo
;
2541 int val
, mapped
, ret
;
2542 unsigned char fmtm
, fmtd
;
2543 void __user
*argp
= (void __user
*)arg
;
2544 int __user
*p
= argp
;
2546 /* printk("maestro: ess_ioctl: cmd %d\n", cmd);*/
2549 mapped
= ((file
->f_mode
& FMODE_WRITE
) && s
->dma_dac
.mapped
) ||
2550 ((file
->f_mode
& FMODE_READ
) && s
->dma_adc
.mapped
);
2552 case OSS_GETVERSION
:
2553 return put_user(SOUND_VERSION
, p
);
2555 case SNDCTL_DSP_SYNC
:
2556 if (file
->f_mode
& FMODE_WRITE
)
2557 return drain_dac(s
, file
->f_flags
& O_NONBLOCK
);
2560 case SNDCTL_DSP_SETDUPLEX
:
2564 case SNDCTL_DSP_GETCAPS
:
2565 return put_user(DSP_CAP_DUPLEX
| DSP_CAP_REALTIME
| DSP_CAP_TRIGGER
| DSP_CAP_MMAP
, p
);
2567 case SNDCTL_DSP_RESET
:
2568 if (file
->f_mode
& FMODE_WRITE
) {
2570 synchronize_irq(s
->card
->pcidev
->irq
);
2571 s
->dma_dac
.swptr
= s
->dma_dac
.hwptr
= s
->dma_dac
.count
= s
->dma_dac
.total_bytes
= 0;
2573 if (file
->f_mode
& FMODE_READ
) {
2575 synchronize_irq(s
->card
->pcidev
->irq
);
2576 s
->dma_adc
.swptr
= s
->dma_adc
.hwptr
= s
->dma_adc
.count
= s
->dma_adc
.total_bytes
= 0;
2580 case SNDCTL_DSP_SPEED
:
2581 if (get_user(val
, p
))
2584 if (file
->f_mode
& FMODE_READ
) {
2586 s
->dma_adc
.ready
= 0;
2587 set_adc_rate(s
, val
);
2589 if (file
->f_mode
& FMODE_WRITE
) {
2591 s
->dma_dac
.ready
= 0;
2592 set_dac_rate(s
, val
);
2595 return put_user((file
->f_mode
& FMODE_READ
) ? s
->rateadc
: s
->ratedac
, p
);
2597 case SNDCTL_DSP_STEREO
:
2598 if (get_user(val
, p
))
2602 if (file
->f_mode
& FMODE_READ
) {
2604 s
->dma_adc
.ready
= 0;
2606 fmtd
|= ESS_FMT_STEREO
<< ESS_ADC_SHIFT
;
2608 fmtm
&= ~(ESS_FMT_STEREO
<< ESS_ADC_SHIFT
);
2610 if (file
->f_mode
& FMODE_WRITE
) {
2612 s
->dma_dac
.ready
= 0;
2614 fmtd
|= ESS_FMT_STEREO
<< ESS_DAC_SHIFT
;
2616 fmtm
&= ~(ESS_FMT_STEREO
<< ESS_DAC_SHIFT
);
2618 set_fmt(s
, fmtm
, fmtd
);
2621 case SNDCTL_DSP_CHANNELS
:
2622 if (get_user(val
, p
))
2627 if (file
->f_mode
& FMODE_READ
) {
2629 s
->dma_adc
.ready
= 0;
2631 fmtd
|= ESS_FMT_STEREO
<< ESS_ADC_SHIFT
;
2633 fmtm
&= ~(ESS_FMT_STEREO
<< ESS_ADC_SHIFT
);
2635 if (file
->f_mode
& FMODE_WRITE
) {
2637 s
->dma_dac
.ready
= 0;
2639 fmtd
|= ESS_FMT_STEREO
<< ESS_DAC_SHIFT
;
2641 fmtm
&= ~(ESS_FMT_STEREO
<< ESS_DAC_SHIFT
);
2643 set_fmt(s
, fmtm
, fmtd
);
2645 return put_user((s
->fmt
& ((file
->f_mode
& FMODE_READ
) ? (ESS_FMT_STEREO
<< ESS_ADC_SHIFT
)
2646 : (ESS_FMT_STEREO
<< ESS_DAC_SHIFT
))) ? 2 : 1, p
);
2648 case SNDCTL_DSP_GETFMTS
: /* Returns a mask */
2649 return put_user(AFMT_U8
|AFMT_S16_LE
, p
);
2651 case SNDCTL_DSP_SETFMT
: /* Selects ONE fmt*/
2652 if (get_user(val
, p
))
2654 if (val
!= AFMT_QUERY
) {
2657 if (file
->f_mode
& FMODE_READ
) {
2659 s
->dma_adc
.ready
= 0;
2660 /* fixed at 16bit for now */
2661 fmtd
|= ESS_FMT_16BIT
<< ESS_ADC_SHIFT
;
2663 if (val
== AFMT_S16_LE
)
2664 fmtd
|= ESS_FMT_16BIT
<< ESS_ADC_SHIFT
;
2666 fmtm
&= ~(ESS_FMT_16BIT
<< ESS_ADC_SHIFT
);
2669 if (file
->f_mode
& FMODE_WRITE
) {
2671 s
->dma_dac
.ready
= 0;
2672 if (val
== AFMT_S16_LE
)
2673 fmtd
|= ESS_FMT_16BIT
<< ESS_DAC_SHIFT
;
2675 fmtm
&= ~(ESS_FMT_16BIT
<< ESS_DAC_SHIFT
);
2677 set_fmt(s
, fmtm
, fmtd
);
2679 return put_user((s
->fmt
& ((file
->f_mode
& FMODE_READ
) ?
2680 (ESS_FMT_16BIT
<< ESS_ADC_SHIFT
)
2681 : (ESS_FMT_16BIT
<< ESS_DAC_SHIFT
))) ?
2686 case SNDCTL_DSP_POST
:
2689 case SNDCTL_DSP_GETTRIGGER
:
2691 if ((file
->f_mode
& FMODE_READ
) && (s
->enable
& ADC_RUNNING
))
2692 val
|= PCM_ENABLE_INPUT
;
2693 if ((file
->f_mode
& FMODE_WRITE
) && (s
->enable
& DAC_RUNNING
))
2694 val
|= PCM_ENABLE_OUTPUT
;
2695 return put_user(val
, p
);
2697 case SNDCTL_DSP_SETTRIGGER
:
2698 if (get_user(val
, p
))
2700 if (file
->f_mode
& FMODE_READ
) {
2701 if (val
& PCM_ENABLE_INPUT
) {
2702 if (!s
->dma_adc
.ready
&& (ret
= prog_dmabuf(s
, 1)))
2708 if (file
->f_mode
& FMODE_WRITE
) {
2709 if (val
& PCM_ENABLE_OUTPUT
) {
2710 if (!s
->dma_dac
.ready
&& (ret
= prog_dmabuf(s
, 0)))
2718 case SNDCTL_DSP_GETOSPACE
:
2719 if (!(file
->f_mode
& FMODE_WRITE
))
2721 if (!s
->dma_dac
.ready
&& (ret
= prog_dmabuf(s
, 0)))
2723 spin_lock_irqsave(&s
->lock
, flags
);
2725 abinfo
.fragsize
= s
->dma_dac
.fragsize
;
2726 abinfo
.bytes
= s
->dma_dac
.dmasize
- s
->dma_dac
.count
;
2727 abinfo
.fragstotal
= s
->dma_dac
.numfrag
;
2728 abinfo
.fragments
= abinfo
.bytes
>> s
->dma_dac
.fragshift
;
2729 spin_unlock_irqrestore(&s
->lock
, flags
);
2730 return copy_to_user(argp
, &abinfo
, sizeof(abinfo
)) ? -EFAULT
: 0;
2732 case SNDCTL_DSP_GETISPACE
:
2733 if (!(file
->f_mode
& FMODE_READ
))
2735 if (!s
->dma_adc
.ready
&& (ret
= prog_dmabuf(s
, 1)))
2737 spin_lock_irqsave(&s
->lock
, flags
);
2739 abinfo
.fragsize
= s
->dma_adc
.fragsize
;
2740 abinfo
.bytes
= s
->dma_adc
.count
;
2741 abinfo
.fragstotal
= s
->dma_adc
.numfrag
;
2742 abinfo
.fragments
= abinfo
.bytes
>> s
->dma_adc
.fragshift
;
2743 spin_unlock_irqrestore(&s
->lock
, flags
);
2744 return copy_to_user(argp
, &abinfo
, sizeof(abinfo
)) ? -EFAULT
: 0;
2746 case SNDCTL_DSP_NONBLOCK
:
2747 file
->f_flags
|= O_NONBLOCK
;
2750 case SNDCTL_DSP_GETODELAY
:
2751 if (!(file
->f_mode
& FMODE_WRITE
))
2753 if (!s
->dma_dac
.ready
&& (ret
= prog_dmabuf(s
, 0)))
2755 spin_lock_irqsave(&s
->lock
, flags
);
2757 val
= s
->dma_dac
.count
;
2758 spin_unlock_irqrestore(&s
->lock
, flags
);
2759 return put_user(val
, p
);
2761 case SNDCTL_DSP_GETIPTR
:
2762 if (!(file
->f_mode
& FMODE_READ
))
2764 if (!s
->dma_adc
.ready
&& (ret
= prog_dmabuf(s
, 1)))
2766 spin_lock_irqsave(&s
->lock
, flags
);
2768 cinfo
.bytes
= s
->dma_adc
.total_bytes
;
2769 cinfo
.blocks
= s
->dma_adc
.count
>> s
->dma_adc
.fragshift
;
2770 cinfo
.ptr
= s
->dma_adc
.hwptr
;
2771 if (s
->dma_adc
.mapped
)
2772 s
->dma_adc
.count
&= s
->dma_adc
.fragsize
-1;
2773 spin_unlock_irqrestore(&s
->lock
, flags
);
2774 if (copy_to_user(argp
, &cinfo
, sizeof(cinfo
)))
2778 case SNDCTL_DSP_GETOPTR
:
2779 if (!(file
->f_mode
& FMODE_WRITE
))
2781 if (!s
->dma_dac
.ready
&& (ret
= prog_dmabuf(s
, 0)))
2783 spin_lock_irqsave(&s
->lock
, flags
);
2785 cinfo
.bytes
= s
->dma_dac
.total_bytes
;
2786 cinfo
.blocks
= s
->dma_dac
.count
>> s
->dma_dac
.fragshift
;
2787 cinfo
.ptr
= s
->dma_dac
.hwptr
;
2788 if (s
->dma_dac
.mapped
)
2789 s
->dma_dac
.count
&= s
->dma_dac
.fragsize
-1;
2790 spin_unlock_irqrestore(&s
->lock
, flags
);
2791 if (copy_to_user(argp
, &cinfo
, sizeof(cinfo
)))
2795 case SNDCTL_DSP_GETBLKSIZE
:
2796 if (file
->f_mode
& FMODE_WRITE
) {
2797 if ((val
= prog_dmabuf(s
, 0)))
2799 return put_user(s
->dma_dac
.fragsize
, p
);
2801 if ((val
= prog_dmabuf(s
, 1)))
2803 return put_user(s
->dma_adc
.fragsize
, p
);
2805 case SNDCTL_DSP_SETFRAGMENT
:
2806 if (get_user(val
, p
))
2808 M_printk("maestro: SETFRAGMENT: %0x\n",val
);
2809 if (file
->f_mode
& FMODE_READ
) {
2810 s
->dma_adc
.ossfragshift
= val
& 0xffff;
2811 s
->dma_adc
.ossmaxfrags
= (val
>> 16) & 0xffff;
2812 if (s
->dma_adc
.ossfragshift
< 4)
2813 s
->dma_adc
.ossfragshift
= 4;
2814 if (s
->dma_adc
.ossfragshift
> 15)
2815 s
->dma_adc
.ossfragshift
= 15;
2816 if (s
->dma_adc
.ossmaxfrags
< 4)
2817 s
->dma_adc
.ossmaxfrags
= 4;
2819 if (file
->f_mode
& FMODE_WRITE
) {
2820 s
->dma_dac
.ossfragshift
= val
& 0xffff;
2821 s
->dma_dac
.ossmaxfrags
= (val
>> 16) & 0xffff;
2822 if (s
->dma_dac
.ossfragshift
< 4)
2823 s
->dma_dac
.ossfragshift
= 4;
2824 if (s
->dma_dac
.ossfragshift
> 15)
2825 s
->dma_dac
.ossfragshift
= 15;
2826 if (s
->dma_dac
.ossmaxfrags
< 4)
2827 s
->dma_dac
.ossmaxfrags
= 4;
2831 case SNDCTL_DSP_SUBDIVIDE
:
2832 if ((file
->f_mode
& FMODE_READ
&& s
->dma_adc
.subdivision
) ||
2833 (file
->f_mode
& FMODE_WRITE
&& s
->dma_dac
.subdivision
))
2835 if (get_user(val
, p
))
2837 if (val
!= 1 && val
!= 2 && val
!= 4)
2839 if (file
->f_mode
& FMODE_READ
)
2840 s
->dma_adc
.subdivision
= val
;
2841 if (file
->f_mode
& FMODE_WRITE
)
2842 s
->dma_dac
.subdivision
= val
;
2845 case SOUND_PCM_READ_RATE
:
2846 return put_user((file
->f_mode
& FMODE_READ
) ? s
->rateadc
: s
->ratedac
, p
);
2848 case SOUND_PCM_READ_CHANNELS
:
2849 return put_user((s
->fmt
& ((file
->f_mode
& FMODE_READ
) ? (ESS_FMT_STEREO
<< ESS_ADC_SHIFT
)
2850 : (ESS_FMT_STEREO
<< ESS_DAC_SHIFT
))) ? 2 : 1, p
);
2852 case SOUND_PCM_READ_BITS
:
2853 return put_user((s
->fmt
& ((file
->f_mode
& FMODE_READ
) ? (ESS_FMT_16BIT
<< ESS_ADC_SHIFT
)
2854 : (ESS_FMT_16BIT
<< ESS_DAC_SHIFT
))) ? 16 : 8, p
);
2856 case SOUND_PCM_WRITE_FILTER
:
2857 case SNDCTL_DSP_SETSYNCRO
:
2858 case SOUND_PCM_READ_FILTER
:
2866 set_base_registers(struct ess_state
*s
,void *vaddr
)
2868 unsigned long packed_phys
= virt_to_bus(vaddr
)>>12;
2869 wave_set_register(s
, 0x01FC , packed_phys
);
2870 wave_set_register(s
, 0x01FD , packed_phys
);
2871 wave_set_register(s
, 0x01FE , packed_phys
);
2872 wave_set_register(s
, 0x01FF , packed_phys
);
2876 * this guy makes sure we're in the right power
2877 * state for what we want to be doing
2879 static void maestro_power(struct ess_card
*card
, int tostate
)
2881 u16 active_mask
= acpi_state_mask
[tostate
];
2886 pci_read_config_byte(card
->pcidev
, card
->power_regs
+0x4, &state
);
2889 /* make sure we're in the right state */
2890 if(state
!= tostate
) {
2891 M_printk(KERN_WARNING
"maestro: dev %02x:%02x.%x switching from D%d to D%d\n",
2892 card
->pcidev
->bus
->number
,
2893 PCI_SLOT(card
->pcidev
->devfn
),
2894 PCI_FUNC(card
->pcidev
->devfn
),
2896 pci_write_config_byte(card
->pcidev
, card
->power_regs
+0x4, tostate
);
2899 /* and make sure the units we care about are on
2900 XXX we might want to do this before state flipping? */
2901 pci_write_config_word(card
->pcidev
, 0x54, ~ active_mask
);
2902 pci_write_config_word(card
->pcidev
, 0x56, ~ active_mask
);
2905 /* we allocate a large power of two for all our memory.
2906 this is cut up into (not to scale :):
2907 |silly fifo word | 512byte mixbuf per adc | dac/adc * channels |
2910 allocate_buffers(struct ess_state
*s
)
2914 struct page
*page
, *pend
;
2916 /* alloc as big a chunk as we can */
2917 for (order
= (dsps_order
+ (16-PAGE_SHIFT
) + 1); order
>= (dsps_order
+ 2 + 1); order
--)
2918 if((rawbuf
= (void *)__get_free_pages(GFP_KERNEL
|GFP_DMA
, order
)))
2924 M_printk("maestro: allocated %ld (%d) bytes at %p\n",PAGE_SIZE
<<order
,order
, rawbuf
);
2926 if ((virt_to_bus(rawbuf
) + (PAGE_SIZE
<< order
) - 1) & ~((1<<28)-1)) {
2927 printk(KERN_ERR
"maestro: DMA buffer beyond 256MB! busaddr 0x%lx size %ld\n",
2928 virt_to_bus(rawbuf
), PAGE_SIZE
<< order
);
2933 s
->card
->dmapages
= rawbuf
;
2934 s
->card
->dmaorder
= order
;
2936 for(i
=0;i
<NR_DSPS
;i
++) {
2937 struct ess_state
*ess
= &s
->card
->channels
[i
];
2939 if(ess
->dev_audio
== -1)
2942 ess
->dma_dac
.ready
= s
->dma_dac
.mapped
= 0;
2943 ess
->dma_adc
.ready
= s
->dma_adc
.mapped
= 0;
2944 ess
->dma_adc
.buforder
= ess
->dma_dac
.buforder
= order
- 1 - dsps_order
- 1;
2946 /* offset dac and adc buffers starting half way through and then at each [da][ad]c's
2947 order's intervals.. */
2948 ess
->dma_dac
.rawbuf
= rawbuf
+ (PAGE_SIZE
<<(order
-1)) + (i
* ( PAGE_SIZE
<< (ess
->dma_dac
.buforder
+ 1 )));
2949 ess
->dma_adc
.rawbuf
= ess
->dma_dac
.rawbuf
+ ( PAGE_SIZE
<< ess
->dma_dac
.buforder
);
2950 /* offset mixbuf by a mixbuf so that the lame status fifo can
2951 happily scribble away.. */
2952 ess
->mixbuf
= rawbuf
+ (512 * (i
+1));
2954 M_printk("maestro: setup apu %d: dac: %p adc: %p mix: %p\n",i
,ess
->dma_dac
.rawbuf
,
2955 ess
->dma_adc
.rawbuf
, ess
->mixbuf
);
2959 /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
2960 pend
= virt_to_page(rawbuf
+ (PAGE_SIZE
<< order
) - 1);
2961 for (page
= virt_to_page(rawbuf
); page
<= pend
; page
++)
2962 SetPageReserved(page
);
2967 free_buffers(struct ess_state
*s
)
2969 struct page
*page
, *pend
;
2971 s
->dma_dac
.rawbuf
= s
->dma_adc
.rawbuf
= NULL
;
2972 s
->dma_dac
.mapped
= s
->dma_adc
.mapped
= 0;
2973 s
->dma_dac
.ready
= s
->dma_adc
.ready
= 0;
2975 M_printk("maestro: freeing %p\n",s
->card
->dmapages
);
2976 /* undo marking the pages as reserved */
2978 pend
= virt_to_page(s
->card
->dmapages
+ (PAGE_SIZE
<< s
->card
->dmaorder
) - 1);
2979 for (page
= virt_to_page(s
->card
->dmapages
); page
<= pend
; page
++)
2980 ClearPageReserved(page
);
2982 free_pages((unsigned long)s
->card
->dmapages
,s
->card
->dmaorder
);
2983 s
->card
->dmapages
= NULL
;
2987 ess_open(struct inode
*inode
, struct file
*file
)
2989 unsigned int minor
= iminor(inode
);
2990 struct ess_state
*s
= NULL
;
2991 unsigned char fmtm
= ~0, fmts
= 0;
2992 struct pci_dev
*pdev
= NULL
;
2994 * Scan the cards and find the channel. We only
2995 * do this at open time so it is ok
2998 while ((pdev
= pci_find_device(PCI_ANY_ID
, PCI_ANY_ID
, pdev
)) != NULL
) {
3000 struct pci_driver
*drvr
;
3002 drvr
= pci_dev_driver (pdev
);
3003 if (drvr
== &maestro_pci_driver
) {
3005 struct ess_state
*sp
;
3007 c
= (struct ess_card
*)pci_get_drvdata (pdev
);
3010 for(i
=0;i
<NR_DSPS
;i
++)
3013 if(sp
->dev_audio
< 0)
3015 if((sp
->dev_audio
^ minor
) & ~0xf)
3025 file
->private_data
= s
;
3026 /* wait for device to become free */
3028 while (s
->open_mode
& file
->f_mode
) {
3029 if (file
->f_flags
& O_NONBLOCK
) {
3031 return -EWOULDBLOCK
;
3034 interruptible_sleep_on(&s
->open_wait
);
3035 if (signal_pending(current
))
3036 return -ERESTARTSYS
;
3040 /* under semaphore.. */
3041 if ((s
->card
->dmapages
==NULL
) && allocate_buffers(s
)) {
3046 /* we're covered by the open_sem */
3047 if( ! s
->card
->dsps_open
) {
3048 maestro_power(s
->card
,ACPI_D0
);
3051 s
->card
->dsps_open
++;
3052 M_printk("maestro: open, %d bobs now\n",s
->card
->dsps_open
);
3054 /* ok, lets write WC base regs now that we've
3055 powered up the chip */
3056 M_printk("maestro: writing 0x%lx (bus 0x%lx) to the wp\n",virt_to_bus(s
->card
->dmapages
),
3057 ((virt_to_bus(s
->card
->dmapages
))&0xFFE00000)>>12);
3058 set_base_registers(s
,s
->card
->dmapages
);
3060 if (file
->f_mode
& FMODE_READ
) {
3062 fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_ADC_SHIFT);
3063 if ((minor & 0xf) == SND_DEV_DSP16)
3064 fmts |= ESS_FMT_16BIT << ESS_ADC_SHIFT; */
3066 fmtm
&= ~((ESS_FMT_STEREO
|ESS_FMT_16BIT
) << ESS_ADC_SHIFT
);
3067 fmts
= (ESS_FMT_STEREO
|ESS_FMT_16BIT
) << ESS_ADC_SHIFT
;
3069 s
->dma_adc
.ossfragshift
= s
->dma_adc
.ossmaxfrags
= s
->dma_adc
.subdivision
= 0;
3070 set_adc_rate(s
, 8000);
3072 if (file
->f_mode
& FMODE_WRITE
) {
3073 fmtm
&= ~((ESS_FMT_STEREO
| ESS_FMT_16BIT
) << ESS_DAC_SHIFT
);
3074 if ((minor
& 0xf) == SND_DEV_DSP16
)
3075 fmts
|= ESS_FMT_16BIT
<< ESS_DAC_SHIFT
;
3077 s
->dma_dac
.ossfragshift
= s
->dma_dac
.ossmaxfrags
= s
->dma_dac
.subdivision
= 0;
3078 set_dac_rate(s
, 8000);
3080 set_fmt(s
, fmtm
, fmts
);
3081 s
->open_mode
|= file
->f_mode
& (FMODE_READ
| FMODE_WRITE
);
3084 return nonseekable_open(inode
, file
);
3088 ess_release(struct inode
*inode
, struct file
*file
)
3090 struct ess_state
*s
= (struct ess_state
*)file
->private_data
;
3094 if (file
->f_mode
& FMODE_WRITE
)
3095 drain_dac(s
, file
->f_flags
& O_NONBLOCK
);
3097 if (file
->f_mode
& FMODE_WRITE
) {
3100 if (file
->f_mode
& FMODE_READ
) {
3104 s
->open_mode
&= (~file
->f_mode
) & (FMODE_READ
|FMODE_WRITE
);
3105 /* we're covered by the open_sem */
3106 M_printk("maestro: %d dsps now alive\n",s
->card
->dsps_open
-1);
3107 if( --s
->card
->dsps_open
<= 0) {
3108 s
->card
->dsps_open
= 0;
3111 maestro_power(s
->card
,ACPI_D2
);
3114 wake_up(&s
->open_wait
);
3119 static struct file_operations ess_audio_fops
= {
3120 .owner
= THIS_MODULE
,
3121 .llseek
= no_llseek
,
3128 .release
= ess_release
,
3132 maestro_config(struct ess_card
*card
)
3134 struct pci_dev
*pcidev
= card
->pcidev
;
3135 struct ess_state
*ess
= &card
->channels
[0];
3136 int apu
,iobase
= card
->iobase
;
3140 /* We used to muck around with pci config space that
3141 * we had no business messing with. We don't know enough
3142 * about the machine to know which DMA mode is appropriate,
3143 * etc. We were guessing wrong on some machines and making
3144 * them unhappy. We now trust in the BIOS to do things right,
3145 * which almost certainly means a new host of problems will
3146 * arise with broken BIOS implementations. screw 'em.
3147 * We're already intolerant of machines that don't assign
3151 /* do config work at full power */
3152 maestro_power(card
,ACPI_D0
);
3154 pci_read_config_word(pcidev
, 0x50, &w
);
3156 w
&=~(1<<5); /* Don't swap left/right (undoc)*/
3158 pci_write_config_word(pcidev
, 0x50, w
);
3160 pci_read_config_word(pcidev
, 0x52, &w
);
3161 w
&=~(1<<15); /* Turn off internal clock multiplier */
3162 /* XXX how do we know which to use? */
3163 w
&=~(1<<14); /* External clock */
3165 w
|= (1<<7); /* Hardware volume control on */
3166 w
|= (1<<6); /* Debounce off: easier to push the HWV buttons. */
3167 w
&=~(1<<5); /* GPIO 4:5 */
3168 w
|= (1<<4); /* Disconnect from the CHI. Enabling this made a dell 7500 work. */
3169 w
&=~(1<<2); /* MIDI fix off (undoc) */
3170 w
&=~(1<<1); /* reserved, always write 0 */
3171 pci_write_config_word(pcidev
, 0x52, w
);
3177 pci_read_config_word(pcidev
, 0x40, &w
);
3178 w
|=(1<<15); /* legacy decode off */
3179 w
&=~(1<<14); /* Disable SIRQ */
3180 w
&=~(0x1f); /* disable mpu irq/io, game port, fm, SB */
3182 pci_write_config_word(pcidev
, 0x40, w
);
3184 /* Set up 978 docking control chip. */
3185 pci_read_config_word(pcidev
, 0x58, &w
);
3186 w
|=1<<2; /* Enable 978. */
3187 w
|=1<<3; /* Turn on 978 hardware volume control. */
3188 w
&=~(1<<11); /* Turn on 978 mixer volume control. */
3189 pci_write_config_word(pcidev
, 0x58, w
);
3191 sound_reset(iobase
);
3197 /* setup usual 0x34 stuff.. 0x36 may be chip specific */
3198 outw(0xC090, iobase
+0x34); /* direct sound, stereo */
3200 outw(0x3000, iobase
+0x36); /* direct sound, stereo */
3208 maestro_ac97_reset(iobase
,pcidev
);
3216 n
|=12<<12; /* Direct Sound, Stereo */
3217 outl(n
, iobase
+0x34);
3220 n
&=~0x0F00; /* Modem off */
3221 outl(n
, iobase
+0x34);
3225 n
|=9<<4; /* DAC, Stereo */
3226 outl(n
, iobase
+0x34);
3229 n
&=~0x000F; /* ASSP off */
3230 outl(n
, iobase
+0x34);
3233 n
|=(1<<29); /* Enable ring bus */
3234 outl(n
, iobase
+0x34);
3237 n
|=(1<<28); /* Enable serial bus */
3238 outl(n
, iobase
+0x34);
3241 n
&=~0x00F00000; /* MIC off */
3242 outl(n
, iobase
+0x34);
3245 n
&=~0x000F0000; /* I2S off */
3246 outl(n
, iobase
+0x34);
3250 w
&=~(1<<7); /* ClkRun off */
3251 outw(w
, iobase
+0x18);
3254 w
&=~(1<<6); /* Hardware volume control interrupt off... for now. */
3255 outw(w
, iobase
+0x18);
3258 w
&=~(1<<4); /* ASSP irq off */
3259 outw(w
, iobase
+0x18);
3262 w
&=~(1<<3); /* ISDN irq off */
3263 outw(w
, iobase
+0x18);
3266 w
|=(1<<2); /* Direct Sound IRQ on */
3267 outw(w
, iobase
+0x18);
3270 w
&=~(1<<1); /* MPU401 IRQ off */
3271 outw(w
, iobase
+0x18);
3274 w
|=(1<<0); /* SB IRQ on */
3275 outw(w
, iobase
+0x18);
3277 /* Set hardware volume control registers to midpoints.
3278 We can tell which button was pushed based on how they change. */
3279 outb(0x88, iobase
+0x1c);
3280 outb(0x88, iobase
+0x1d);
3281 outb(0x88, iobase
+0x1e);
3282 outb(0x88, iobase
+0x1f);
3284 /* it appears some maestros (dell 7500) only work if these are set,
3285 regardless of whether we use the assp or not. */
3287 outb(0, iobase
+0xA4);
3288 outb(3, iobase
+0xA2);
3289 outb(0, iobase
+0xA6);
3291 for(apu
=0;apu
<16;apu
++)
3293 /* Write 0 into the buffer area 0x1E0->1EF */
3294 outw(0x01E0+apu
, 0x10+iobase
);
3295 outw(0x0000, 0x12+iobase
);
3298 * The 1.10 test program seem to write 0 into the buffer area
3301 outw(0x01D0+apu
, 0x10+iobase
);
3302 outw(0x0000, 0x12+iobase
);
3306 wave_set_register(ess
, IDR7_WAVE_ROMRAM
,
3307 (wave_get_register(ess
, IDR7_WAVE_ROMRAM
)&0xFF00));
3308 wave_set_register(ess
, IDR7_WAVE_ROMRAM
,
3309 wave_get_register(ess
, IDR7_WAVE_ROMRAM
)|0x100);
3310 wave_set_register(ess
, IDR7_WAVE_ROMRAM
,
3311 wave_get_register(ess
, IDR7_WAVE_ROMRAM
)&~0x200);
3312 wave_set_register(ess
, IDR7_WAVE_ROMRAM
,
3313 wave_get_register(ess
, IDR7_WAVE_ROMRAM
)|~0x400);
3315 maestro_write(ess
, IDR7_WAVE_ROMRAM
,
3316 (maestro_read(ess
, IDR7_WAVE_ROMRAM
)&0xFF00));
3317 maestro_write(ess
, IDR7_WAVE_ROMRAM
,
3318 maestro_read(ess
, IDR7_WAVE_ROMRAM
)|0x100);
3319 maestro_write(ess
, IDR7_WAVE_ROMRAM
,
3320 maestro_read(ess
, IDR7_WAVE_ROMRAM
)&~0x200);
3321 maestro_write(ess
, IDR7_WAVE_ROMRAM
,
3322 maestro_read(ess
, IDR7_WAVE_ROMRAM
)|0x400);
3325 maestro_write(ess
, IDR2_CRAM_DATA
, 0x0000);
3326 maestro_write(ess
, 0x08, 0xB004);
3327 /* Now back to the DirectSound stuff */
3328 maestro_write(ess
, 0x09, 0x001B);
3329 maestro_write(ess
, 0x0A, 0x8000);
3330 maestro_write(ess
, 0x0B, 0x3F37);
3331 maestro_write(ess
, 0x0C, 0x0098);
3333 /* parallel out ?? */
3334 maestro_write(ess
, 0x0C,
3335 (maestro_read(ess
, 0x0C)&~0xF000)|0x8000);
3336 /* parallel in, has something to do with recording :) */
3337 maestro_write(ess
, 0x0C,
3338 (maestro_read(ess
, 0x0C)&~0x0F00)|0x0500);
3340 maestro_write(ess
, 0x0D, 0x7632);
3342 /* Wave cache control on - test off, sg off,
3343 enable, enable extra chans 1Mb */
3345 outw(inw(0x14+iobase
)|(1<<8),0x14+iobase
);
3346 outw(inw(0x14+iobase
)&0xFE03,0x14+iobase
);
3347 outw((inw(0x14+iobase
)&0xFFFC), 0x14+iobase
);
3348 outw(inw(0x14+iobase
)|(1<<7),0x14+iobase
);
3350 outw(0xA1A0, 0x14+iobase
); /* 0300 ? */
3352 /* Now clear the APU control ram */
3353 for(apu
=0;apu
<NR_APUS
;apu
++)
3355 for(w
=0;w
<NR_APU_REGS
;w
++)
3356 apu_set_register(ess
, apu
|ESS_CHAN_HARD
, w
, 0);
3364 /* this guy tries to find the pci power management
3365 * register bank. this should really be in core
3366 * code somewhere. 1 on success. */
3368 parse_power(struct ess_card
*card
, struct pci_dev
*pcidev
)
3373 int max
= 64; /* an a 8bit guy pointing to 32bit guys
3374 can only express so much. */
3376 card
->power_regs
= 0;
3378 /* check to see if we have a capabilities list in
3379 the config register */
3380 pci_read_config_word(pcidev
, PCI_STATUS
, &w
);
3381 if(!(w
& PCI_STATUS_CAP_LIST
)) return 0;
3383 /* walk the list, starting at the head. */
3384 pci_read_config_byte(pcidev
,PCI_CAPABILITY_LIST
,&next
);
3386 while(next
&& max
--) {
3387 pci_read_config_dword(pcidev
, next
& ~3, &n
);
3388 if((n
& 0xff) == PCI_CAP_ID_PM
) {
3389 card
->power_regs
= next
;
3392 next
= ((n
>>8) & 0xff);
3395 return card
->power_regs
? 1 : 0;
3399 maestro_probe(struct pci_dev
*pcidev
,const struct pci_device_id
*pdid
)
3401 int card_type
= pdid
->driver_data
;
3405 struct ess_card
*card
;
3406 struct ess_state
*ess
;
3407 struct pm_dev
*pmdev
;
3410 /* when built into the kernel, we only print version if device is found */
3412 static int printed_version
;
3413 if (!printed_version
++)
3417 /* don't pick up weird modem maestros */
3418 if(((pcidev
->class >> 8) & 0xffff) != PCI_CLASS_MULTIMEDIA_AUDIO
)
3422 if ((ret
=pci_enable_device(pcidev
)))
3425 iobase
= pci_resource_start(pcidev
,0);
3426 if (!iobase
|| !(pci_resource_flags(pcidev
, 0 ) & IORESOURCE_IO
))
3429 if(pcidev
->irq
== 0)
3432 /* stake our claim on the iospace */
3433 if( request_region(iobase
, 256, card_names
[card_type
]) == NULL
)
3435 printk(KERN_WARNING
"maestro: can't allocate 256 bytes I/O at 0x%4.4x\n", iobase
);
3439 /* just to be sure */
3440 pci_set_master(pcidev
);
3442 card
= kmalloc(sizeof(struct ess_card
), GFP_KERNEL
);
3445 printk(KERN_WARNING
"maestro: out of memory\n");
3446 release_region(iobase
, 256);
3450 memset(card
, 0, sizeof(*card
));
3451 card
->pcidev
= pcidev
;
3453 pmdev
= pm_register(PM_PCI_DEV
, PM_PCI_ID(pcidev
),
3454 maestro_pm_callback
);
3458 card
->iobase
= iobase
;
3459 card
->card_type
= card_type
;
3460 card
->irq
= pcidev
->irq
;
3461 card
->magic
= ESS_CARD_MAGIC
;
3462 spin_lock_init(&card
->lock
);
3463 init_waitqueue_head(&card
->suspend_queue
);
3465 card
->dock_mute_vol
= 50;
3467 /* init our groups of 6 apus */
3468 for(i
=0;i
<NR_DSPS
;i
++)
3470 struct ess_state
*s
=&card
->channels
[i
];
3475 init_waitqueue_head(&s
->dma_adc
.wait
);
3476 init_waitqueue_head(&s
->dma_dac
.wait
);
3477 init_waitqueue_head(&s
->open_wait
);
3478 spin_lock_init(&s
->lock
);
3479 init_MUTEX(&s
->open_sem
);
3480 s
->magic
= ESS_STATE_MAGIC
;
3483 s
->apu
[1] = (6*i
)+1;
3484 s
->apu
[2] = (6*i
)+2;
3485 s
->apu
[3] = (6*i
)+3;
3486 s
->apu
[4] = (6*i
)+4;
3487 s
->apu
[5] = (6*i
)+5;
3489 if(s
->dma_adc
.ready
|| s
->dma_dac
.ready
|| s
->dma_adc
.rawbuf
)
3490 printk("maestro: BOTCH!\n");
3491 /* register devices */
3492 if ((s
->dev_audio
= register_sound_dsp(&ess_audio_fops
, -1)) < 0)
3498 /* clear the rest if we ran out of slots to register */
3501 struct ess_state
*s
=&card
->channels
[i
];
3505 ess
= &card
->channels
[0];
3508 * Ok card ready. Begin setup proper
3511 printk(KERN_INFO
"maestro: Configuring %s found at IO 0x%04X IRQ %d\n",
3512 card_names
[card_type
],iobase
,card
->irq
);
3513 pci_read_config_dword(pcidev
, PCI_SUBSYSTEM_VENDOR_ID
, &n
);
3514 printk(KERN_INFO
"maestro: subvendor id: 0x%08x\n",n
);
3516 /* turn off power management unless:
3517 * - the user explicitly asks for it
3519 * - we're not a 2e, lesser chipps seem to have problems.
3520 * - we're not on our _very_ small whitelist. some implemenetations
3521 * really don't like the pm code, others require it.
3522 * feel free to expand this as required.
3524 #define SUBSYSTEM_VENDOR(x) (x&0xffff)
3525 if( (use_pm
!= 1) &&
3526 ((card_type
!= TYPE_MAESTRO2E
) || (SUBSYSTEM_VENDOR(n
) != 0x1028)))
3530 printk(KERN_INFO
"maestro: not attempting power management.\n");
3532 if(!parse_power(card
,pcidev
))
3533 printk(KERN_INFO
"maestro: no PCI power management interface found.\n");
3535 pci_read_config_dword(pcidev
, card
->power_regs
, &n
);
3536 printk(KERN_INFO
"maestro: PCI power management capability: 0x%x\n",n
>>16);
3540 maestro_config(card
);
3542 if(maestro_ac97_get(card
, 0x00)==0x0080) {
3543 printk(KERN_ERR
"maestro: my goodness! you seem to have a pt101 codec, which is quite rare.\n"
3544 "\tyou should tell someone about this.\n");
3546 maestro_ac97_init(card
);
3549 if ((card
->dev_mixer
= register_sound_mixer(&ess_mixer_fops
, -1)) < 0) {
3550 printk("maestro: couldn't register mixer!\n");
3552 memcpy(card
->mix
.mixer_state
,mixer_defaults
,sizeof(card
->mix
.mixer_state
));
3553 mixer_push_state(card
);
3556 if((ret
=request_irq(card
->irq
, ess_interrupt
, SA_SHIRQ
, card_names
[card_type
], card
)))
3558 printk(KERN_ERR
"maestro: unable to allocate irq %d,\n", card
->irq
);
3559 unregister_sound_mixer(card
->dev_mixer
);
3560 for(i
=0;i
<NR_DSPS
;i
++)
3562 struct ess_state
*s
= &card
->channels
[i
];
3563 if(s
->dev_audio
!= -1)
3564 unregister_sound_dsp(s
->dev_audio
);
3566 release_region(card
->iobase
, 256);
3567 unregister_reboot_notifier(&maestro_nb
);
3572 /* Turn on hardware volume control interrupt.
3573 This has to come after we grab the IRQ above,
3574 or a crash will result on installation if a button has been pressed,
3575 because in that case we'll get an immediate interrupt. */
3576 n
= inw(iobase
+0x18);
3578 outw(n
, iobase
+0x18);
3580 pci_set_drvdata(pcidev
,card
);
3581 /* now go to sleep 'till something interesting happens */
3582 maestro_power(card
,ACPI_D2
);
3584 printk(KERN_INFO
"maestro: %d channels configured.\n", num
);
3588 static void maestro_remove(struct pci_dev
*pcidev
) {
3589 struct ess_card
*card
= pci_get_drvdata(pcidev
);
3593 /* XXX maybe should force stop bob, but should be all
3594 stopped by _release by now */
3596 /* Turn off hardware volume control interrupt.
3597 This has to come before we leave the IRQ below,
3598 or a crash results if a button is pressed ! */
3599 n
= inw(card
->iobase
+0x18);
3601 outw(n
, card
->iobase
+0x18);
3603 free_irq(card
->irq
, card
);
3604 unregister_sound_mixer(card
->dev_mixer
);
3605 for(i
=0;i
<NR_DSPS
;i
++)
3607 struct ess_state
*ess
= &card
->channels
[i
];
3608 if(ess
->dev_audio
!= -1)
3609 unregister_sound_dsp(ess
->dev_audio
);
3611 /* Goodbye, Mr. Bond. */
3612 maestro_power(card
,ACPI_D3
);
3613 release_region(card
->iobase
, 256);
3615 pci_set_drvdata(pcidev
,NULL
);
3618 static struct pci_device_id maestro_pci_tbl
[] = {
3619 {PCI_VENDOR_ESS
, PCI_DEVICE_ID_ESS_ESS1968
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, TYPE_MAESTRO2
},
3620 {PCI_VENDOR_ESS
, PCI_DEVICE_ID_ESS_ESS1978
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, TYPE_MAESTRO2E
},
3621 {PCI_VENDOR_ESS_OLD
, PCI_DEVICE_ID_ESS_ESS0100
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, TYPE_MAESTRO
},
3624 MODULE_DEVICE_TABLE(pci
, maestro_pci_tbl
);
3626 static struct pci_driver maestro_pci_driver
= {
3628 .id_table
= maestro_pci_tbl
,
3629 .probe
= maestro_probe
,
3630 .remove
= maestro_remove
,
3633 static int __init
init_maestro(void)
3637 rc
= pci_module_init(&maestro_pci_driver
);
3641 if (register_reboot_notifier(&maestro_nb
))
3642 printk(KERN_WARNING
"maestro: reboot notifier registration failed; may not reboot properly.\n");
3646 if (dsps_order
< 0) {
3648 printk(KERN_WARNING
"maestro: clipping dsps_order to %d\n",dsps_order
);
3650 else if (dsps_order
> MAX_DSP_ORDER
) {
3651 dsps_order
= MAX_DSP_ORDER
;
3652 printk(KERN_WARNING
"maestro: clipping dsps_order to %d\n",dsps_order
);
3657 static int maestro_notifier(struct notifier_block
*nb
, unsigned long event
, void *buf
)
3659 /* this notifier is called when the kernel is really shut down. */
3660 M_printk("maestro: shutting down\n");
3661 /* this will remove all card instances too */
3662 pci_unregister_driver(&maestro_pci_driver
);
3663 /* XXX dunno about power management */
3667 /* --------------------------------------------------------------------- */
3670 static void cleanup_maestro(void) {
3671 M_printk("maestro: unloading\n");
3672 pci_unregister_driver(&maestro_pci_driver
);
3673 pm_unregister_all(maestro_pm_callback
);
3674 unregister_reboot_notifier(&maestro_nb
);
3677 /* --------------------------------------------------------------------- */
3680 check_suspend(struct ess_card
*card
)
3682 DECLARE_WAITQUEUE(wait
, current
);
3684 if(!card
->in_suspend
) return;
3687 add_wait_queue(&(card
->suspend_queue
), &wait
);
3688 current
->state
= TASK_UNINTERRUPTIBLE
;
3690 remove_wait_queue(&(card
->suspend_queue
), &wait
);
3691 current
->state
= TASK_RUNNING
;
3695 maestro_suspend(struct ess_card
*card
)
3697 unsigned long flags
;
3700 spin_lock_irqsave(&card
->lock
,flags
); /* over-kill */
3702 M_printk("maestro: apm in dev %p\n",card
);
3704 /* we have to read from the apu regs, need
3706 maestro_power(card
,ACPI_D0
);
3708 for(i
=0;i
<NR_DSPS
;i
++) {
3709 struct ess_state
*s
= &card
->channels
[i
];
3711 if(s
->dev_audio
== -1)
3714 M_printk("maestro: stopping apus for device %d\n",i
);
3718 card
->apu_map
[s
->apu
[j
]][5]=apu_get_register(s
,j
,5);
3722 /* get rid of interrupts? */
3723 if( card
->dsps_open
> 0)
3724 stop_bob(&card
->channels
[0]);
3728 spin_unlock_irqrestore(&card
->lock
,flags
);
3730 /* we trust in the bios to power down the chip on suspend.
3731 * XXX I'm also not sure that in_suspend will protect
3732 * against all reg accesses from here on out.
3737 maestro_resume(struct ess_card
*card
)
3739 unsigned long flags
;
3742 spin_lock_irqsave(&card
->lock
,flags
); /* over-kill */
3744 card
->in_suspend
= 0;
3746 M_printk("maestro: resuming card at %p\n",card
);
3748 /* restore all our config */
3749 maestro_config(card
);
3750 /* need to restore the base pointers.. */
3752 set_base_registers(&card
->channels
[0],card
->dmapages
);
3754 mixer_push_state(card
);
3756 /* set each channels' apu control registers before
3759 for(i
=0;i
<NR_DSPS
;i
++) {
3760 struct ess_state
*s
= &card
->channels
[i
];
3763 if(s
->dev_audio
== -1)
3766 for(chan
= 0 ; chan
< 6 ; chan
++) {
3767 wave_set_register(s
,s
->apu
[chan
]<<3,s
->apu_base
[chan
]);
3768 for(reg
= 1 ; reg
< NR_APU_REGS
; reg
++)
3769 apu_set_register(s
,chan
,reg
,s
->card
->apu_map
[s
->apu
[chan
]][reg
]);
3771 for(chan
= 0 ; chan
< 6 ; chan
++)
3772 apu_set_register(s
,chan
,0,s
->card
->apu_map
[s
->apu
[chan
]][0] & 0xFF0F);
3775 /* now we flip on the music */
3777 if( card
->dsps_open
<= 0) {
3778 /* this card's idle */
3779 maestro_power(card
,ACPI_D2
);
3781 /* ok, we're actually playing things on
3783 maestro_power(card
,ACPI_D0
);
3784 start_bob(&card
->channels
[0]);
3785 for(i
=0;i
<NR_DSPS
;i
++) {
3786 struct ess_state
*s
= &card
->channels
[i
];
3788 /* these use the apu_mode, and can handle
3795 spin_unlock_irqrestore(&card
->lock
,flags
);
3797 /* all right, we think things are ready,
3798 wake up people who were using the device
3799 when we suspended */
3800 wake_up(&(card
->suspend_queue
));
3806 maestro_pm_callback(struct pm_dev
*dev
, pm_request_t rqst
, void *data
)
3808 struct ess_card
*card
= (struct ess_card
*) dev
->data
;
3810 if ( ! card
) goto out
;
3812 M_printk("maestro: pm event 0x%x received for card %p\n", rqst
, card
);
3816 maestro_suspend(card
);
3819 maestro_resume(card
);
3822 * we'd also like to find out about
3823 * power level changes because some biosen
3824 * do mean things to the maestro when they
3825 * change their power state.
3832 module_init(init_maestro
);
3833 module_exit(cleanup_maestro
);