2 * Copyright 1995, Russell King.
3 * Various bits and pieces copyrights include:
4 * Linus Torvalds (test_bit).
5 * Big endian support: Copyright 2001, Nicolas Pitre
8 * bit 0 is the LSB of an "unsigned long" quantity.
10 * Please note that the code in this file should never be included
11 * from user space. Many of these are not implemented in assembler
12 * since they would be too costly. Also, they require privileged
13 * instructions (which are not available from user mode) to ensure
14 * that they are atomic.
17 #ifndef __ASM_ARM_BITOPS_H
18 #define __ASM_ARM_BITOPS_H
22 #include <asm/system.h>
24 #define smp_mb__before_clear_bit() mb()
25 #define smp_mb__after_clear_bit() mb()
28 * These functions are the basis of our bit ops.
30 * First, the atomic bitops. These use native endian.
32 static inline void ____atomic_set_bit(unsigned int bit
, volatile unsigned long *p
)
35 unsigned long mask
= 1UL << (bit
& 31);
39 local_irq_save(flags
);
41 local_irq_restore(flags
);
44 static inline void ____atomic_clear_bit(unsigned int bit
, volatile unsigned long *p
)
47 unsigned long mask
= 1UL << (bit
& 31);
51 local_irq_save(flags
);
53 local_irq_restore(flags
);
56 static inline void ____atomic_change_bit(unsigned int bit
, volatile unsigned long *p
)
59 unsigned long mask
= 1UL << (bit
& 31);
63 local_irq_save(flags
);
65 local_irq_restore(flags
);
69 ____atomic_test_and_set_bit(unsigned int bit
, volatile unsigned long *p
)
73 unsigned long mask
= 1UL << (bit
& 31);
77 local_irq_save(flags
);
80 local_irq_restore(flags
);
86 ____atomic_test_and_clear_bit(unsigned int bit
, volatile unsigned long *p
)
90 unsigned long mask
= 1UL << (bit
& 31);
94 local_irq_save(flags
);
97 local_irq_restore(flags
);
103 ____atomic_test_and_change_bit(unsigned int bit
, volatile unsigned long *p
)
107 unsigned long mask
= 1UL << (bit
& 31);
111 local_irq_save(flags
);
114 local_irq_restore(flags
);
120 * Now the non-atomic variants. We let the compiler handle all
121 * optimisations for these. These are all _native_ endian.
123 static inline void __set_bit(int nr
, volatile unsigned long *p
)
125 p
[nr
>> 5] |= (1UL << (nr
& 31));
128 static inline void __clear_bit(int nr
, volatile unsigned long *p
)
130 p
[nr
>> 5] &= ~(1UL << (nr
& 31));
133 static inline void __change_bit(int nr
, volatile unsigned long *p
)
135 p
[nr
>> 5] ^= (1UL << (nr
& 31));
138 static inline int __test_and_set_bit(int nr
, volatile unsigned long *p
)
140 unsigned long oldval
, mask
= 1UL << (nr
& 31);
146 return oldval
& mask
;
149 static inline int __test_and_clear_bit(int nr
, volatile unsigned long *p
)
151 unsigned long oldval
, mask
= 1UL << (nr
& 31);
157 return oldval
& mask
;
160 static inline int __test_and_change_bit(int nr
, volatile unsigned long *p
)
162 unsigned long oldval
, mask
= 1UL << (nr
& 31);
168 return oldval
& mask
;
172 * This routine doesn't need to be atomic.
174 static inline int __test_bit(int nr
, const volatile unsigned long * p
)
176 return (p
[nr
>> 5] >> (nr
& 31)) & 1UL;
180 * A note about Endian-ness.
181 * -------------------------
183 * When the ARM is put into big endian mode via CR15, the processor
184 * merely swaps the order of bytes within words, thus:
186 * ------------ physical data bus bits -----------
187 * D31 ... D24 D23 ... D16 D15 ... D8 D7 ... D0
188 * little byte 3 byte 2 byte 1 byte 0
189 * big byte 0 byte 1 byte 2 byte 3
191 * This means that reading a 32-bit word at address 0 returns the same
192 * value irrespective of the endian mode bit.
194 * Peripheral devices should be connected with the data bus reversed in
195 * "Big Endian" mode. ARM Application Note 61 is applicable, and is
196 * available from http://www.arm.com/.
198 * The following assumes that the data bus connectivity for big endian
199 * mode has been followed.
201 * Note that bit 0 is defined to be 32-bit word bit 0, not byte 0 bit 0.
205 * Little endian assembly bitops. nr = 0 -> byte 0 bit 0.
207 extern void _set_bit_le(int nr
, volatile unsigned long * p
);
208 extern void _clear_bit_le(int nr
, volatile unsigned long * p
);
209 extern void _change_bit_le(int nr
, volatile unsigned long * p
);
210 extern int _test_and_set_bit_le(int nr
, volatile unsigned long * p
);
211 extern int _test_and_clear_bit_le(int nr
, volatile unsigned long * p
);
212 extern int _test_and_change_bit_le(int nr
, volatile unsigned long * p
);
213 extern int _find_first_zero_bit_le(const void * p
, unsigned size
);
214 extern int _find_next_zero_bit_le(const void * p
, int size
, int offset
);
215 extern int _find_first_bit_le(const unsigned long *p
, unsigned size
);
216 extern int _find_next_bit_le(const unsigned long *p
, int size
, int offset
);
219 * Big endian assembly bitops. nr = 0 -> byte 3 bit 0.
221 extern void _set_bit_be(int nr
, volatile unsigned long * p
);
222 extern void _clear_bit_be(int nr
, volatile unsigned long * p
);
223 extern void _change_bit_be(int nr
, volatile unsigned long * p
);
224 extern int _test_and_set_bit_be(int nr
, volatile unsigned long * p
);
225 extern int _test_and_clear_bit_be(int nr
, volatile unsigned long * p
);
226 extern int _test_and_change_bit_be(int nr
, volatile unsigned long * p
);
227 extern int _find_first_zero_bit_be(const void * p
, unsigned size
);
228 extern int _find_next_zero_bit_be(const void * p
, int size
, int offset
);
229 extern int _find_first_bit_be(const unsigned long *p
, unsigned size
);
230 extern int _find_next_bit_be(const unsigned long *p
, int size
, int offset
);
234 * The __* form of bitops are non-atomic and may be reordered.
236 #define ATOMIC_BITOP_LE(name,nr,p) \
237 (__builtin_constant_p(nr) ? \
238 ____atomic_##name(nr, p) : \
241 #define ATOMIC_BITOP_BE(name,nr,p) \
242 (__builtin_constant_p(nr) ? \
243 ____atomic_##name(nr, p) : \
246 #define ATOMIC_BITOP_LE(name,nr,p) _##name##_le(nr,p)
247 #define ATOMIC_BITOP_BE(name,nr,p) _##name##_be(nr,p)
250 #define NONATOMIC_BITOP(name,nr,p) \
251 (____nonatomic_##name(nr, p))
255 * These are the little endian, atomic definitions.
257 #define set_bit(nr,p) ATOMIC_BITOP_LE(set_bit,nr,p)
258 #define clear_bit(nr,p) ATOMIC_BITOP_LE(clear_bit,nr,p)
259 #define change_bit(nr,p) ATOMIC_BITOP_LE(change_bit,nr,p)
260 #define test_and_set_bit(nr,p) ATOMIC_BITOP_LE(test_and_set_bit,nr,p)
261 #define test_and_clear_bit(nr,p) ATOMIC_BITOP_LE(test_and_clear_bit,nr,p)
262 #define test_and_change_bit(nr,p) ATOMIC_BITOP_LE(test_and_change_bit,nr,p)
263 #define test_bit(nr,p) __test_bit(nr,p)
264 #define find_first_zero_bit(p,sz) _find_first_zero_bit_le(p,sz)
265 #define find_next_zero_bit(p,sz,off) _find_next_zero_bit_le(p,sz,off)
266 #define find_first_bit(p,sz) _find_first_bit_le(p,sz)
267 #define find_next_bit(p,sz,off) _find_next_bit_le(p,sz,off)
269 #define WORD_BITOFF_TO_LE(x) ((x))
274 * These are the big endian, atomic definitions.
276 #define set_bit(nr,p) ATOMIC_BITOP_BE(set_bit,nr,p)
277 #define clear_bit(nr,p) ATOMIC_BITOP_BE(clear_bit,nr,p)
278 #define change_bit(nr,p) ATOMIC_BITOP_BE(change_bit,nr,p)
279 #define test_and_set_bit(nr,p) ATOMIC_BITOP_BE(test_and_set_bit,nr,p)
280 #define test_and_clear_bit(nr,p) ATOMIC_BITOP_BE(test_and_clear_bit,nr,p)
281 #define test_and_change_bit(nr,p) ATOMIC_BITOP_BE(test_and_change_bit,nr,p)
282 #define test_bit(nr,p) __test_bit(nr,p)
283 #define find_first_zero_bit(p,sz) _find_first_zero_bit_be(p,sz)
284 #define find_next_zero_bit(p,sz,off) _find_next_zero_bit_be(p,sz,off)
285 #define find_first_bit(p,sz) _find_first_bit_be(p,sz)
286 #define find_next_bit(p,sz,off) _find_next_bit_be(p,sz,off)
288 #define WORD_BITOFF_TO_LE(x) ((x) ^ 0x18)
292 #if __LINUX_ARM_ARCH__ < 5
295 * ffz = Find First Zero in word. Undefined if no zero exists,
296 * so code should check against ~0UL first..
298 static inline unsigned long ffz(unsigned long word
)
304 if (word
& 0x0000ffff) { k
-= 16; word
<<= 16; }
305 if (word
& 0x00ff0000) { k
-= 8; word
<<= 8; }
306 if (word
& 0x0f000000) { k
-= 4; word
<<= 4; }
307 if (word
& 0x30000000) { k
-= 2; word
<<= 2; }
308 if (word
& 0x40000000) { k
-= 1; }
313 * ffz = Find First Zero in word. Undefined if no zero exists,
314 * so code should check against ~0UL first..
316 static inline unsigned long __ffs(unsigned long word
)
321 if (word
& 0x0000ffff) { k
-= 16; word
<<= 16; }
322 if (word
& 0x00ff0000) { k
-= 8; word
<<= 8; }
323 if (word
& 0x0f000000) { k
-= 4; word
<<= 4; }
324 if (word
& 0x30000000) { k
-= 2; word
<<= 2; }
325 if (word
& 0x40000000) { k
-= 1; }
330 * fls: find last bit set.
333 #define fls(x) generic_fls(x)
336 * ffs: find first bit set. This is defined the same way as
337 * the libc and compiler builtin ffs routines, therefore
338 * differs in spirit from the above ffz (man ffs).
341 #define ffs(x) generic_ffs(x)
346 * On ARMv5 and above those functions can be implemented around
347 * the clz instruction for much better code efficiency.
350 static __inline__
int generic_fls(int x
);
352 ( __builtin_constant_p(x) ? generic_fls(x) : \
353 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
354 #define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
355 #define __ffs(x) (ffs(x) - 1)
356 #define ffz(x) __ffs( ~(x) )
361 * Find first bit set in a 168-bit bitmap, where the first
362 * 128 bits are unlikely to be set.
364 static inline int sched_find_first_bit(const unsigned long *b
)
369 for (off
= 0; v
= b
[off
], off
< 4; off
++) {
373 return __ffs(v
) + off
* 32;
377 * hweightN: returns the hamming weight (i.e. the number
378 * of bits set) of a N-bit word
381 #define hweight32(x) generic_hweight32(x)
382 #define hweight16(x) generic_hweight16(x)
383 #define hweight8(x) generic_hweight8(x)
386 * Ext2 is defined to use little-endian byte ordering.
387 * These do not need to be atomic.
389 #define ext2_set_bit(nr,p) \
390 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
391 #define ext2_set_bit_atomic(lock,nr,p) \
392 test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
393 #define ext2_clear_bit(nr,p) \
394 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
395 #define ext2_clear_bit_atomic(lock,nr,p) \
396 test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
397 #define ext2_test_bit(nr,p) \
398 __test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
399 #define ext2_find_first_zero_bit(p,sz) \
400 _find_first_zero_bit_le(p,sz)
401 #define ext2_find_next_zero_bit(p,sz,off) \
402 _find_next_zero_bit_le(p,sz,off)
405 * Minix is defined to use little-endian byte ordering.
406 * These do not need to be atomic.
408 #define minix_set_bit(nr,p) \
409 __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
410 #define minix_test_bit(nr,p) \
411 __test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
412 #define minix_test_and_set_bit(nr,p) \
413 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
414 #define minix_test_and_clear_bit(nr,p) \
415 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
416 #define minix_find_first_zero_bit(p,sz) \
417 _find_first_zero_bit_le(p,sz)
419 #endif /* __KERNEL__ */
421 #endif /* _ARM_BITOPS_H */