[ARM] pxa: Gumstix Verdex PCMCIA support
[linux-2.6/verdex.git] / drivers / block / umem.c
blobad1ba393801ae4fe222d0117a1bd7d6a6fedc187
1 /*
2 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
4 * (C) 2001 San Mehat <nettwerk@valinux.com>
5 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
6 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
8 * This driver for the Micro Memory PCI Memory Module with Battery Backup
9 * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
11 * This driver is released to the public under the terms of the
12 * GNU GENERAL PUBLIC LICENSE version 2
13 * See the file COPYING for details.
15 * This driver provides a standard block device interface for Micro Memory(tm)
16 * PCI based RAM boards.
17 * 10/05/01: Phap Nguyen - Rebuilt the driver
18 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
19 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
20 * - use stand disk partitioning (so fdisk works).
21 * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
22 * - incorporate into main kernel
23 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
24 * - use spin_lock_bh instead of _irq
25 * - Never block on make_request. queue
26 * bh's instead.
27 * - unregister umem from devfs at mod unload
28 * - Change version to 2.3
29 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
30 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
31 * 15May2002:NeilBrown - convert to bio for 2.5
32 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
33 * - a sequence of writes that cover the card, and
34 * - set initialised bit then.
37 #undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
38 #include <linux/fs.h>
39 #include <linux/bio.h>
40 #include <linux/kernel.h>
41 #include <linux/mm.h>
42 #include <linux/mman.h>
43 #include <linux/ioctl.h>
44 #include <linux/module.h>
45 #include <linux/init.h>
46 #include <linux/interrupt.h>
47 #include <linux/timer.h>
48 #include <linux/pci.h>
49 #include <linux/slab.h>
50 #include <linux/dma-mapping.h>
52 #include <linux/fcntl.h> /* O_ACCMODE */
53 #include <linux/hdreg.h> /* HDIO_GETGEO */
55 #include "umem.h"
57 #include <asm/uaccess.h>
58 #include <asm/io.h>
60 #define MM_MAXCARDS 4
61 #define MM_RAHEAD 2 /* two sectors */
62 #define MM_BLKSIZE 1024 /* 1k blocks */
63 #define MM_HARDSECT 512 /* 512-byte hardware sectors */
64 #define MM_SHIFT 6 /* max 64 partitions on 4 cards */
67 * Version Information
70 #define DRIVER_NAME "umem"
71 #define DRIVER_VERSION "v2.3"
72 #define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
73 #define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
75 static int debug;
76 /* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
77 #define HW_TRACE(x)
79 #define DEBUG_LED_ON_TRANSFER 0x01
80 #define DEBUG_BATTERY_POLLING 0x02
82 module_param(debug, int, 0644);
83 MODULE_PARM_DESC(debug, "Debug bitmask");
85 static int pci_read_cmd = 0x0C; /* Read Multiple */
86 module_param(pci_read_cmd, int, 0);
87 MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
89 static int pci_write_cmd = 0x0F; /* Write and Invalidate */
90 module_param(pci_write_cmd, int, 0);
91 MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
93 static int pci_cmds;
95 static int major_nr;
97 #include <linux/blkdev.h>
98 #include <linux/blkpg.h>
100 struct cardinfo {
101 struct pci_dev *dev;
103 unsigned char __iomem *csr_remap;
104 unsigned int mm_size; /* size in kbytes */
106 unsigned int init_size; /* initial segment, in sectors,
107 * that we know to
108 * have been written
110 struct bio *bio, *currentbio, **biotail;
111 int current_idx;
112 sector_t current_sector;
114 struct request_queue *queue;
116 struct mm_page {
117 dma_addr_t page_dma;
118 struct mm_dma_desc *desc;
119 int cnt, headcnt;
120 struct bio *bio, **biotail;
121 int idx;
122 } mm_pages[2];
123 #define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
125 int Active, Ready;
127 struct tasklet_struct tasklet;
128 unsigned int dma_status;
130 struct {
131 int good;
132 int warned;
133 unsigned long last_change;
134 } battery[2];
136 spinlock_t lock;
137 int check_batteries;
139 int flags;
142 static struct cardinfo cards[MM_MAXCARDS];
143 static struct timer_list battery_timer;
145 static int num_cards;
147 static struct gendisk *mm_gendisk[MM_MAXCARDS];
149 static void check_batteries(struct cardinfo *card);
151 static int get_userbit(struct cardinfo *card, int bit)
153 unsigned char led;
155 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
156 return led & bit;
159 static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
161 unsigned char led;
163 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
164 if (state)
165 led |= bit;
166 else
167 led &= ~bit;
168 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
170 return 0;
174 * NOTE: For the power LED, use the LED_POWER_* macros since they differ
176 static void set_led(struct cardinfo *card, int shift, unsigned char state)
178 unsigned char led;
180 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
181 if (state == LED_FLIP)
182 led ^= (1<<shift);
183 else {
184 led &= ~(0x03 << shift);
185 led |= (state << shift);
187 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
191 #ifdef MM_DIAG
192 static void dump_regs(struct cardinfo *card)
194 unsigned char *p;
195 int i, i1;
197 p = card->csr_remap;
198 for (i = 0; i < 8; i++) {
199 printk(KERN_DEBUG "%p ", p);
201 for (i1 = 0; i1 < 16; i1++)
202 printk("%02x ", *p++);
204 printk("\n");
207 #endif
209 static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
211 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
212 if (dmastat & DMASCR_ANY_ERR)
213 printk(KERN_CONT "ANY_ERR ");
214 if (dmastat & DMASCR_MBE_ERR)
215 printk(KERN_CONT "MBE_ERR ");
216 if (dmastat & DMASCR_PARITY_ERR_REP)
217 printk(KERN_CONT "PARITY_ERR_REP ");
218 if (dmastat & DMASCR_PARITY_ERR_DET)
219 printk(KERN_CONT "PARITY_ERR_DET ");
220 if (dmastat & DMASCR_SYSTEM_ERR_SIG)
221 printk(KERN_CONT "SYSTEM_ERR_SIG ");
222 if (dmastat & DMASCR_TARGET_ABT)
223 printk(KERN_CONT "TARGET_ABT ");
224 if (dmastat & DMASCR_MASTER_ABT)
225 printk(KERN_CONT "MASTER_ABT ");
226 if (dmastat & DMASCR_CHAIN_COMPLETE)
227 printk(KERN_CONT "CHAIN_COMPLETE ");
228 if (dmastat & DMASCR_DMA_COMPLETE)
229 printk(KERN_CONT "DMA_COMPLETE ");
230 printk("\n");
234 * Theory of request handling
236 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
237 * We have two pages of mm_dma_desc, holding about 64 descriptors
238 * each. These are allocated at init time.
239 * One page is "Ready" and is either full, or can have request added.
240 * The other page might be "Active", which DMA is happening on it.
242 * Whenever IO on the active page completes, the Ready page is activated
243 * and the ex-Active page is clean out and made Ready.
244 * Otherwise the Ready page is only activated when it becomes full, or
245 * when mm_unplug_device is called via the unplug_io_fn.
247 * If a request arrives while both pages a full, it is queued, and b_rdev is
248 * overloaded to record whether it was a read or a write.
250 * The interrupt handler only polls the device to clear the interrupt.
251 * The processing of the result is done in a tasklet.
254 static void mm_start_io(struct cardinfo *card)
256 /* we have the lock, we know there is
257 * no IO active, and we know that card->Active
258 * is set
260 struct mm_dma_desc *desc;
261 struct mm_page *page;
262 int offset;
264 /* make the last descriptor end the chain */
265 page = &card->mm_pages[card->Active];
266 pr_debug("start_io: %d %d->%d\n",
267 card->Active, page->headcnt, page->cnt - 1);
268 desc = &page->desc[page->cnt-1];
270 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
271 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
272 desc->sem_control_bits = desc->control_bits;
275 if (debug & DEBUG_LED_ON_TRANSFER)
276 set_led(card, LED_REMOVE, LED_ON);
278 desc = &page->desc[page->headcnt];
279 writel(0, card->csr_remap + DMA_PCI_ADDR);
280 writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
282 writel(0, card->csr_remap + DMA_LOCAL_ADDR);
283 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
285 writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
286 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
288 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
289 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
291 offset = ((char *)desc) - ((char *)page->desc);
292 writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
293 card->csr_remap + DMA_DESCRIPTOR_ADDR);
294 /* Force the value to u64 before shifting otherwise >> 32 is undefined C
295 * and on some ports will do nothing ! */
296 writel(cpu_to_le32(((u64)page->page_dma)>>32),
297 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
299 /* Go, go, go */
300 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
301 card->csr_remap + DMA_STATUS_CTRL);
304 static int add_bio(struct cardinfo *card);
306 static void activate(struct cardinfo *card)
308 /* if No page is Active, and Ready is
309 * not empty, then switch Ready page
310 * to active and start IO.
311 * Then add any bh's that are available to Ready
314 do {
315 while (add_bio(card))
318 if (card->Active == -1 &&
319 card->mm_pages[card->Ready].cnt > 0) {
320 card->Active = card->Ready;
321 card->Ready = 1-card->Ready;
322 mm_start_io(card);
325 } while (card->Active == -1 && add_bio(card));
328 static inline void reset_page(struct mm_page *page)
330 page->cnt = 0;
331 page->headcnt = 0;
332 page->bio = NULL;
333 page->biotail = &page->bio;
336 static void mm_unplug_device(struct request_queue *q)
338 struct cardinfo *card = q->queuedata;
339 unsigned long flags;
341 spin_lock_irqsave(&card->lock, flags);
342 if (blk_remove_plug(q))
343 activate(card);
344 spin_unlock_irqrestore(&card->lock, flags);
348 * If there is room on Ready page, take
349 * one bh off list and add it.
350 * return 1 if there was room, else 0.
352 static int add_bio(struct cardinfo *card)
354 struct mm_page *p;
355 struct mm_dma_desc *desc;
356 dma_addr_t dma_handle;
357 int offset;
358 struct bio *bio;
359 struct bio_vec *vec;
360 int idx;
361 int rw;
362 int len;
364 bio = card->currentbio;
365 if (!bio && card->bio) {
366 card->currentbio = card->bio;
367 card->current_idx = card->bio->bi_idx;
368 card->current_sector = card->bio->bi_sector;
369 card->bio = card->bio->bi_next;
370 if (card->bio == NULL)
371 card->biotail = &card->bio;
372 card->currentbio->bi_next = NULL;
373 return 1;
375 if (!bio)
376 return 0;
377 idx = card->current_idx;
379 rw = bio_rw(bio);
380 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
381 return 0;
383 vec = bio_iovec_idx(bio, idx);
384 len = vec->bv_len;
385 dma_handle = pci_map_page(card->dev,
386 vec->bv_page,
387 vec->bv_offset,
388 len,
389 (rw == READ) ?
390 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
392 p = &card->mm_pages[card->Ready];
393 desc = &p->desc[p->cnt];
394 p->cnt++;
395 if (p->bio == NULL)
396 p->idx = idx;
397 if ((p->biotail) != &bio->bi_next) {
398 *(p->biotail) = bio;
399 p->biotail = &(bio->bi_next);
400 bio->bi_next = NULL;
403 desc->data_dma_handle = dma_handle;
405 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
406 desc->local_addr = cpu_to_le64(card->current_sector << 9);
407 desc->transfer_size = cpu_to_le32(len);
408 offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
409 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
410 desc->zero1 = desc->zero2 = 0;
411 offset = (((char *)(desc+1)) - ((char *)p->desc));
412 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
413 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
414 DMASCR_PARITY_INT_EN|
415 DMASCR_CHAIN_EN |
416 DMASCR_SEM_EN |
417 pci_cmds);
418 if (rw == WRITE)
419 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
420 desc->sem_control_bits = desc->control_bits;
422 card->current_sector += (len >> 9);
423 idx++;
424 card->current_idx = idx;
425 if (idx >= bio->bi_vcnt)
426 card->currentbio = NULL;
428 return 1;
431 static void process_page(unsigned long data)
433 /* check if any of the requests in the page are DMA_COMPLETE,
434 * and deal with them appropriately.
435 * If we find a descriptor without DMA_COMPLETE in the semaphore, then
436 * dma must have hit an error on that descriptor, so use dma_status
437 * instead and assume that all following descriptors must be re-tried.
439 struct mm_page *page;
440 struct bio *return_bio = NULL;
441 struct cardinfo *card = (struct cardinfo *)data;
442 unsigned int dma_status = card->dma_status;
444 spin_lock_bh(&card->lock);
445 if (card->Active < 0)
446 goto out_unlock;
447 page = &card->mm_pages[card->Active];
449 while (page->headcnt < page->cnt) {
450 struct bio *bio = page->bio;
451 struct mm_dma_desc *desc = &page->desc[page->headcnt];
452 int control = le32_to_cpu(desc->sem_control_bits);
453 int last = 0;
454 int idx;
456 if (!(control & DMASCR_DMA_COMPLETE)) {
457 control = dma_status;
458 last = 1;
460 page->headcnt++;
461 idx = page->idx;
462 page->idx++;
463 if (page->idx >= bio->bi_vcnt) {
464 page->bio = bio->bi_next;
465 if (page->bio)
466 page->idx = page->bio->bi_idx;
469 pci_unmap_page(card->dev, desc->data_dma_handle,
470 bio_iovec_idx(bio, idx)->bv_len,
471 (control & DMASCR_TRANSFER_READ) ?
472 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
473 if (control & DMASCR_HARD_ERROR) {
474 /* error */
475 clear_bit(BIO_UPTODATE, &bio->bi_flags);
476 dev_printk(KERN_WARNING, &card->dev->dev,
477 "I/O error on sector %d/%d\n",
478 le32_to_cpu(desc->local_addr)>>9,
479 le32_to_cpu(desc->transfer_size));
480 dump_dmastat(card, control);
481 } else if (test_bit(BIO_RW, &bio->bi_rw) &&
482 le32_to_cpu(desc->local_addr) >> 9 ==
483 card->init_size) {
484 card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
485 if (card->init_size >> 1 >= card->mm_size) {
486 dev_printk(KERN_INFO, &card->dev->dev,
487 "memory now initialised\n");
488 set_userbit(card, MEMORY_INITIALIZED, 1);
491 if (bio != page->bio) {
492 bio->bi_next = return_bio;
493 return_bio = bio;
496 if (last)
497 break;
500 if (debug & DEBUG_LED_ON_TRANSFER)
501 set_led(card, LED_REMOVE, LED_OFF);
503 if (card->check_batteries) {
504 card->check_batteries = 0;
505 check_batteries(card);
507 if (page->headcnt >= page->cnt) {
508 reset_page(page);
509 card->Active = -1;
510 activate(card);
511 } else {
512 /* haven't finished with this one yet */
513 pr_debug("do some more\n");
514 mm_start_io(card);
516 out_unlock:
517 spin_unlock_bh(&card->lock);
519 while (return_bio) {
520 struct bio *bio = return_bio;
522 return_bio = bio->bi_next;
523 bio->bi_next = NULL;
524 bio_endio(bio, 0);
528 static int mm_make_request(struct request_queue *q, struct bio *bio)
530 struct cardinfo *card = q->queuedata;
531 pr_debug("mm_make_request %llu %u\n",
532 (unsigned long long)bio->bi_sector, bio->bi_size);
534 spin_lock_irq(&card->lock);
535 *card->biotail = bio;
536 bio->bi_next = NULL;
537 card->biotail = &bio->bi_next;
538 blk_plug_device(q);
539 spin_unlock_irq(&card->lock);
541 return 0;
544 static irqreturn_t mm_interrupt(int irq, void *__card)
546 struct cardinfo *card = (struct cardinfo *) __card;
547 unsigned int dma_status;
548 unsigned short cfg_status;
550 HW_TRACE(0x30);
552 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
554 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
555 /* interrupt wasn't for me ... */
556 return IRQ_NONE;
559 /* clear COMPLETION interrupts */
560 if (card->flags & UM_FLAG_NO_BYTE_STATUS)
561 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
562 card->csr_remap + DMA_STATUS_CTRL);
563 else
564 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
565 card->csr_remap + DMA_STATUS_CTRL + 2);
567 /* log errors and clear interrupt status */
568 if (dma_status & DMASCR_ANY_ERR) {
569 unsigned int data_log1, data_log2;
570 unsigned int addr_log1, addr_log2;
571 unsigned char stat, count, syndrome, check;
573 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
575 data_log1 = le32_to_cpu(readl(card->csr_remap +
576 ERROR_DATA_LOG));
577 data_log2 = le32_to_cpu(readl(card->csr_remap +
578 ERROR_DATA_LOG + 4));
579 addr_log1 = le32_to_cpu(readl(card->csr_remap +
580 ERROR_ADDR_LOG));
581 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
583 count = readb(card->csr_remap + ERROR_COUNT);
584 syndrome = readb(card->csr_remap + ERROR_SYNDROME);
585 check = readb(card->csr_remap + ERROR_CHECK);
587 dump_dmastat(card, dma_status);
589 if (stat & 0x01)
590 dev_printk(KERN_ERR, &card->dev->dev,
591 "Memory access error detected (err count %d)\n",
592 count);
593 if (stat & 0x02)
594 dev_printk(KERN_ERR, &card->dev->dev,
595 "Multi-bit EDC error\n");
597 dev_printk(KERN_ERR, &card->dev->dev,
598 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
599 addr_log2, addr_log1, data_log2, data_log1);
600 dev_printk(KERN_ERR, &card->dev->dev,
601 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
602 check, syndrome);
604 writeb(0, card->csr_remap + ERROR_COUNT);
607 if (dma_status & DMASCR_PARITY_ERR_REP) {
608 dev_printk(KERN_ERR, &card->dev->dev,
609 "PARITY ERROR REPORTED\n");
610 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
611 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
614 if (dma_status & DMASCR_PARITY_ERR_DET) {
615 dev_printk(KERN_ERR, &card->dev->dev,
616 "PARITY ERROR DETECTED\n");
617 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
618 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
621 if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
622 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
623 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
624 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
627 if (dma_status & DMASCR_TARGET_ABT) {
628 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
629 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
630 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
633 if (dma_status & DMASCR_MASTER_ABT) {
634 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
635 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
636 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
639 /* and process the DMA descriptors */
640 card->dma_status = dma_status;
641 tasklet_schedule(&card->tasklet);
643 HW_TRACE(0x36);
645 return IRQ_HANDLED;
649 * If both batteries are good, no LED
650 * If either battery has been warned, solid LED
651 * If both batteries are bad, flash the LED quickly
652 * If either battery is bad, flash the LED semi quickly
654 static void set_fault_to_battery_status(struct cardinfo *card)
656 if (card->battery[0].good && card->battery[1].good)
657 set_led(card, LED_FAULT, LED_OFF);
658 else if (card->battery[0].warned || card->battery[1].warned)
659 set_led(card, LED_FAULT, LED_ON);
660 else if (!card->battery[0].good && !card->battery[1].good)
661 set_led(card, LED_FAULT, LED_FLASH_7_0);
662 else
663 set_led(card, LED_FAULT, LED_FLASH_3_5);
666 static void init_battery_timer(void);
668 static int check_battery(struct cardinfo *card, int battery, int status)
670 if (status != card->battery[battery].good) {
671 card->battery[battery].good = !card->battery[battery].good;
672 card->battery[battery].last_change = jiffies;
674 if (card->battery[battery].good) {
675 dev_printk(KERN_ERR, &card->dev->dev,
676 "Battery %d now good\n", battery + 1);
677 card->battery[battery].warned = 0;
678 } else
679 dev_printk(KERN_ERR, &card->dev->dev,
680 "Battery %d now FAILED\n", battery + 1);
682 return 1;
683 } else if (!card->battery[battery].good &&
684 !card->battery[battery].warned &&
685 time_after_eq(jiffies, card->battery[battery].last_change +
686 (HZ * 60 * 60 * 5))) {
687 dev_printk(KERN_ERR, &card->dev->dev,
688 "Battery %d still FAILED after 5 hours\n", battery + 1);
689 card->battery[battery].warned = 1;
691 return 1;
694 return 0;
697 static void check_batteries(struct cardinfo *card)
699 /* NOTE: this must *never* be called while the card
700 * is doing (bus-to-card) DMA, or you will need the
701 * reset switch
703 unsigned char status;
704 int ret1, ret2;
706 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
707 if (debug & DEBUG_BATTERY_POLLING)
708 dev_printk(KERN_DEBUG, &card->dev->dev,
709 "checking battery status, 1 = %s, 2 = %s\n",
710 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
711 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
713 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
714 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
716 if (ret1 || ret2)
717 set_fault_to_battery_status(card);
720 static void check_all_batteries(unsigned long ptr)
722 int i;
724 for (i = 0; i < num_cards; i++)
725 if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
726 struct cardinfo *card = &cards[i];
727 spin_lock_bh(&card->lock);
728 if (card->Active >= 0)
729 card->check_batteries = 1;
730 else
731 check_batteries(card);
732 spin_unlock_bh(&card->lock);
735 init_battery_timer();
738 static void init_battery_timer(void)
740 init_timer(&battery_timer);
741 battery_timer.function = check_all_batteries;
742 battery_timer.expires = jiffies + (HZ * 60);
743 add_timer(&battery_timer);
746 static void del_battery_timer(void)
748 del_timer(&battery_timer);
752 * Note no locks taken out here. In a worst case scenario, we could drop
753 * a chunk of system memory. But that should never happen, since validation
754 * happens at open or mount time, when locks are held.
756 * That's crap, since doing that while some partitions are opened
757 * or mounted will give you really nasty results.
759 static int mm_revalidate(struct gendisk *disk)
761 struct cardinfo *card = disk->private_data;
762 set_capacity(disk, card->mm_size << 1);
763 return 0;
766 static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
768 struct cardinfo *card = bdev->bd_disk->private_data;
769 int size = card->mm_size * (1024 / MM_HARDSECT);
772 * get geometry: we have to fake one... trim the size to a
773 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
774 * whatever cylinders.
776 geo->heads = 64;
777 geo->sectors = 32;
778 geo->cylinders = size / (geo->heads * geo->sectors);
779 return 0;
783 * Future support for removable devices
785 static int mm_check_change(struct gendisk *disk)
787 /* struct cardinfo *dev = disk->private_data; */
788 return 0;
791 static const struct block_device_operations mm_fops = {
792 .owner = THIS_MODULE,
793 .getgeo = mm_getgeo,
794 .revalidate_disk = mm_revalidate,
795 .media_changed = mm_check_change,
798 static int __devinit mm_pci_probe(struct pci_dev *dev,
799 const struct pci_device_id *id)
801 int ret = -ENODEV;
802 struct cardinfo *card = &cards[num_cards];
803 unsigned char mem_present;
804 unsigned char batt_status;
805 unsigned int saved_bar, data;
806 unsigned long csr_base;
807 unsigned long csr_len;
808 int magic_number;
809 static int printed_version;
811 if (!printed_version++)
812 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
814 ret = pci_enable_device(dev);
815 if (ret)
816 return ret;
818 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
819 pci_set_master(dev);
821 card->dev = dev;
823 csr_base = pci_resource_start(dev, 0);
824 csr_len = pci_resource_len(dev, 0);
825 if (!csr_base || !csr_len)
826 return -ENODEV;
828 dev_printk(KERN_INFO, &dev->dev,
829 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
831 if (pci_set_dma_mask(dev, DMA_BIT_MASK(64)) &&
832 pci_set_dma_mask(dev, DMA_BIT_MASK(32))) {
833 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
834 return -ENOMEM;
837 ret = pci_request_regions(dev, DRIVER_NAME);
838 if (ret) {
839 dev_printk(KERN_ERR, &card->dev->dev,
840 "Unable to request memory region\n");
841 goto failed_req_csr;
844 card->csr_remap = ioremap_nocache(csr_base, csr_len);
845 if (!card->csr_remap) {
846 dev_printk(KERN_ERR, &card->dev->dev,
847 "Unable to remap memory region\n");
848 ret = -ENOMEM;
850 goto failed_remap_csr;
853 dev_printk(KERN_INFO, &card->dev->dev,
854 "CSR 0x%08lx -> 0x%p (0x%lx)\n",
855 csr_base, card->csr_remap, csr_len);
857 switch (card->dev->device) {
858 case 0x5415:
859 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
860 magic_number = 0x59;
861 break;
863 case 0x5425:
864 card->flags |= UM_FLAG_NO_BYTE_STATUS;
865 magic_number = 0x5C;
866 break;
868 case 0x6155:
869 card->flags |= UM_FLAG_NO_BYTE_STATUS |
870 UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
871 magic_number = 0x99;
872 break;
874 default:
875 magic_number = 0x100;
876 break;
879 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
880 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
881 ret = -ENOMEM;
882 goto failed_magic;
885 card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
886 PAGE_SIZE * 2,
887 &card->mm_pages[0].page_dma);
888 card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
889 PAGE_SIZE * 2,
890 &card->mm_pages[1].page_dma);
891 if (card->mm_pages[0].desc == NULL ||
892 card->mm_pages[1].desc == NULL) {
893 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
894 goto failed_alloc;
896 reset_page(&card->mm_pages[0]);
897 reset_page(&card->mm_pages[1]);
898 card->Ready = 0; /* page 0 is ready */
899 card->Active = -1; /* no page is active */
900 card->bio = NULL;
901 card->biotail = &card->bio;
903 card->queue = blk_alloc_queue(GFP_KERNEL);
904 if (!card->queue)
905 goto failed_alloc;
907 blk_queue_make_request(card->queue, mm_make_request);
908 card->queue->queue_lock = &card->lock;
909 card->queue->queuedata = card;
910 card->queue->unplug_fn = mm_unplug_device;
912 tasklet_init(&card->tasklet, process_page, (unsigned long)card);
914 card->check_batteries = 0;
916 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
917 switch (mem_present) {
918 case MEM_128_MB:
919 card->mm_size = 1024 * 128;
920 break;
921 case MEM_256_MB:
922 card->mm_size = 1024 * 256;
923 break;
924 case MEM_512_MB:
925 card->mm_size = 1024 * 512;
926 break;
927 case MEM_1_GB:
928 card->mm_size = 1024 * 1024;
929 break;
930 case MEM_2_GB:
931 card->mm_size = 1024 * 2048;
932 break;
933 default:
934 card->mm_size = 0;
935 break;
938 /* Clear the LED's we control */
939 set_led(card, LED_REMOVE, LED_OFF);
940 set_led(card, LED_FAULT, LED_OFF);
942 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
944 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
945 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
946 card->battery[0].last_change = card->battery[1].last_change = jiffies;
948 if (card->flags & UM_FLAG_NO_BATT)
949 dev_printk(KERN_INFO, &card->dev->dev,
950 "Size %d KB\n", card->mm_size);
951 else {
952 dev_printk(KERN_INFO, &card->dev->dev,
953 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
954 card->mm_size,
955 batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
956 card->battery[0].good ? "OK" : "FAILURE",
957 batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
958 card->battery[1].good ? "OK" : "FAILURE");
960 set_fault_to_battery_status(card);
963 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
964 data = 0xffffffff;
965 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
966 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
967 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
968 data &= 0xfffffff0;
969 data = ~data;
970 data += 1;
972 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
973 card)) {
974 dev_printk(KERN_ERR, &card->dev->dev,
975 "Unable to allocate IRQ\n");
976 ret = -ENODEV;
977 goto failed_req_irq;
980 dev_printk(KERN_INFO, &card->dev->dev,
981 "Window size %d bytes, IRQ %d\n", data, dev->irq);
983 spin_lock_init(&card->lock);
985 pci_set_drvdata(dev, card);
987 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
988 pci_write_cmd = 0x07; /* then Memory Write command */
990 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
991 unsigned short cfg_command;
992 pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
993 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
994 pci_write_config_word(dev, PCI_COMMAND, cfg_command);
996 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
998 num_cards++;
1000 if (!get_userbit(card, MEMORY_INITIALIZED)) {
1001 dev_printk(KERN_INFO, &card->dev->dev,
1002 "memory NOT initialized. Consider over-writing whole device.\n");
1003 card->init_size = 0;
1004 } else {
1005 dev_printk(KERN_INFO, &card->dev->dev,
1006 "memory already initialized\n");
1007 card->init_size = card->mm_size;
1010 /* Enable ECC */
1011 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
1013 return 0;
1015 failed_req_irq:
1016 failed_alloc:
1017 if (card->mm_pages[0].desc)
1018 pci_free_consistent(card->dev, PAGE_SIZE*2,
1019 card->mm_pages[0].desc,
1020 card->mm_pages[0].page_dma);
1021 if (card->mm_pages[1].desc)
1022 pci_free_consistent(card->dev, PAGE_SIZE*2,
1023 card->mm_pages[1].desc,
1024 card->mm_pages[1].page_dma);
1025 failed_magic:
1026 iounmap(card->csr_remap);
1027 failed_remap_csr:
1028 pci_release_regions(dev);
1029 failed_req_csr:
1031 return ret;
1034 static void mm_pci_remove(struct pci_dev *dev)
1036 struct cardinfo *card = pci_get_drvdata(dev);
1038 tasklet_kill(&card->tasklet);
1039 free_irq(dev->irq, card);
1040 iounmap(card->csr_remap);
1042 if (card->mm_pages[0].desc)
1043 pci_free_consistent(card->dev, PAGE_SIZE*2,
1044 card->mm_pages[0].desc,
1045 card->mm_pages[0].page_dma);
1046 if (card->mm_pages[1].desc)
1047 pci_free_consistent(card->dev, PAGE_SIZE*2,
1048 card->mm_pages[1].desc,
1049 card->mm_pages[1].page_dma);
1050 blk_cleanup_queue(card->queue);
1052 pci_release_regions(dev);
1053 pci_disable_device(dev);
1056 static const struct pci_device_id mm_pci_ids[] = {
1057 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
1058 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
1059 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
1061 .vendor = 0x8086,
1062 .device = 0xB555,
1063 .subvendor = 0x1332,
1064 .subdevice = 0x5460,
1065 .class = 0x050000,
1066 .class_mask = 0,
1067 }, { /* end: all zeroes */ }
1070 MODULE_DEVICE_TABLE(pci, mm_pci_ids);
1072 static struct pci_driver mm_pci_driver = {
1073 .name = DRIVER_NAME,
1074 .id_table = mm_pci_ids,
1075 .probe = mm_pci_probe,
1076 .remove = mm_pci_remove,
1079 static int __init mm_init(void)
1081 int retval, i;
1082 int err;
1084 retval = pci_register_driver(&mm_pci_driver);
1085 if (retval)
1086 return -ENOMEM;
1088 err = major_nr = register_blkdev(0, DRIVER_NAME);
1089 if (err < 0) {
1090 pci_unregister_driver(&mm_pci_driver);
1091 return -EIO;
1094 for (i = 0; i < num_cards; i++) {
1095 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
1096 if (!mm_gendisk[i])
1097 goto out;
1100 for (i = 0; i < num_cards; i++) {
1101 struct gendisk *disk = mm_gendisk[i];
1102 sprintf(disk->disk_name, "umem%c", 'a'+i);
1103 spin_lock_init(&cards[i].lock);
1104 disk->major = major_nr;
1105 disk->first_minor = i << MM_SHIFT;
1106 disk->fops = &mm_fops;
1107 disk->private_data = &cards[i];
1108 disk->queue = cards[i].queue;
1109 set_capacity(disk, cards[i].mm_size << 1);
1110 add_disk(disk);
1113 init_battery_timer();
1114 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
1115 /* printk("mm_init: Done. 10-19-01 9:00\n"); */
1116 return 0;
1118 out:
1119 pci_unregister_driver(&mm_pci_driver);
1120 unregister_blkdev(major_nr, DRIVER_NAME);
1121 while (i--)
1122 put_disk(mm_gendisk[i]);
1123 return -ENOMEM;
1126 static void __exit mm_cleanup(void)
1128 int i;
1130 del_battery_timer();
1132 for (i = 0; i < num_cards ; i++) {
1133 del_gendisk(mm_gendisk[i]);
1134 put_disk(mm_gendisk[i]);
1137 pci_unregister_driver(&mm_pci_driver);
1139 unregister_blkdev(major_nr, DRIVER_NAME);
1142 module_init(mm_init);
1143 module_exit(mm_cleanup);
1145 MODULE_AUTHOR(DRIVER_AUTHOR);
1146 MODULE_DESCRIPTION(DRIVER_DESC);
1147 MODULE_LICENSE("GPL");