?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[ARM] pxa: Gumstix Verdex PCMCIA support
[linux-2.6/verdex.git] / drivers / gpu / drm / i810 / i810_dma.c
blob7d1d88cdf2dc393a808cb3f1ee574bf99d29b6c5
1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
33 #include "drmP.h"
34 #include "drm.h"
35 #include "i810_drm.h"
36 #include "i810_drv.h"
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/pagemap.h>
40
41 #define I810_BUF_FREE 2
42 #define I810_BUF_CLIENT 1
43 #define I810_BUF_HARDWARE 0
44
45 #define I810_BUF_UNMAPPED 0
46 #define I810_BUF_MAPPED 1
47
48 static struct drm_buf *i810_freelist_get(struct drm_device * dev)
49 {
50 struct drm_device_dma *dma = dev->dma;
51 int i;
52 int used;
53
54 /* Linear search might not be the best solution */
55
56 for (i = 0; i < dma->buf_count; i++) {
57 struct drm_buf *buf = dma->buflist[i];
58 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
59 /* In use is already a pointer */
60 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
61 I810_BUF_CLIENT);
62 if (used == I810_BUF_FREE) {
63 return buf;
64 }
65 }
66 return NULL;
67 }
68
69 /* This should only be called if the buffer is not sent to the hardware
70 * yet, the hardware updates in use for us once its on the ring buffer.
71 */
72
73 static int i810_freelist_put(struct drm_device * dev, struct drm_buf * buf)
74 {
75 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
76 int used;
77
78 /* In use is already a pointer */
79 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
80 if (used != I810_BUF_CLIENT) {
81 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
82 return -EINVAL;
83 }
84
85 return 0;
86 }
87
88 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
89 {
90 struct drm_file *priv = filp->private_data;
91 struct drm_device *dev;
92 drm_i810_private_t *dev_priv;
93 struct drm_buf *buf;
94 drm_i810_buf_priv_t *buf_priv;
95
96 lock_kernel();
97 dev = priv->minor->dev;
98 dev_priv = dev->dev_private;
99 buf = dev_priv->mmap_buffer;
100 buf_priv = buf->dev_private;
101
102 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
103 vma->vm_file = filp;
104
105 buf_priv->currently_mapped = I810_BUF_MAPPED;
106 unlock_kernel();
107
108 if (io_remap_pfn_range(vma, vma->vm_start,
109 vma->vm_pgoff,
110 vma->vm_end - vma->vm_start, vma->vm_page_prot))
111 return -EAGAIN;
112 return 0;
113 }
114
115 static const struct file_operations i810_buffer_fops = {
116 .open = drm_open,
117 .release = drm_release,
118 .ioctl = drm_ioctl,
119 .mmap = i810_mmap_buffers,
120 .fasync = drm_fasync,
121 };
122
123 static int i810_map_buffer(struct drm_buf * buf, struct drm_file *file_priv)
124 {
125 struct drm_device *dev = file_priv->minor->dev;
126 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
127 drm_i810_private_t *dev_priv = dev->dev_private;
128 const struct file_operations *old_fops;
129 int retcode = 0;
130
131 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
132 return -EINVAL;
133
134 down_write(&current->mm->mmap_sem);
135 old_fops = file_priv->filp->f_op;
136 file_priv->filp->f_op = &i810_buffer_fops;
137 dev_priv->mmap_buffer = buf;
138 buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total,
139 PROT_READ | PROT_WRITE,
140 MAP_SHARED, buf->bus_address);
141 dev_priv->mmap_buffer = NULL;
142 file_priv->filp->f_op = old_fops;
143 if (IS_ERR(buf_priv->virtual)) {
144 /* Real error */
145 DRM_ERROR("mmap error\n");
146 retcode = PTR_ERR(buf_priv->virtual);
147 buf_priv->virtual = NULL;
148 }
149 up_write(&current->mm->mmap_sem);
150
151 return retcode;
152 }
153
154 static int i810_unmap_buffer(struct drm_buf * buf)
155 {
156 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
157 int retcode = 0;
158
159 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
160 return -EINVAL;
161
162 down_write(&current->mm->mmap_sem);
163 retcode = do_munmap(current->mm,
164 (unsigned long)buf_priv->virtual,
165 (size_t) buf->total);
166 up_write(&current->mm->mmap_sem);
167
168 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
169 buf_priv->virtual = NULL;
170
171 return retcode;
172 }
173
174 static int i810_dma_get_buffer(struct drm_device * dev, drm_i810_dma_t * d,
175 struct drm_file *file_priv)
176 {
177 struct drm_buf *buf;
178 drm_i810_buf_priv_t *buf_priv;
179 int retcode = 0;
180
181 buf = i810_freelist_get(dev);
182 if (!buf) {
183 retcode = -ENOMEM;
184 DRM_DEBUG("retcode=%d\n", retcode);
185 return retcode;
186 }
187
188 retcode = i810_map_buffer(buf, file_priv);
189 if (retcode) {
190 i810_freelist_put(dev, buf);
191 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
192 return retcode;
193 }
194 buf->file_priv = file_priv;
195 buf_priv = buf->dev_private;
196 d->granted = 1;
197 d->request_idx = buf->idx;
198 d->request_size = buf->total;
199 d->virtual = buf_priv->virtual;
200
201 return retcode;
202 }
203
204 static int i810_dma_cleanup(struct drm_device * dev)
205 {
206 struct drm_device_dma *dma = dev->dma;
207
208 /* Make sure interrupts are disabled here because the uninstall ioctl
209 * may not have been called from userspace and after dev_private
210 * is freed, it's too late.
211 */
212 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
213 drm_irq_uninstall(dev);
214
215 if (dev->dev_private) {
216 int i;
217 drm_i810_private_t *dev_priv =
218 (drm_i810_private_t *) dev->dev_private;
219
220 if (dev_priv->ring.virtual_start) {
221 drm_core_ioremapfree(&dev_priv->ring.map, dev);
222 }
223 if (dev_priv->hw_status_page) {
224 pci_free_consistent(dev->pdev, PAGE_SIZE,
225 dev_priv->hw_status_page,
226 dev_priv->dma_status_page);
227 /* Need to rewrite hardware status page */
228 I810_WRITE(0x02080, 0x1ffff000);
229 }
230 kfree(dev->dev_private);
231 dev->dev_private = NULL;
232
233 for (i = 0; i < dma->buf_count; i++) {
234 struct drm_buf *buf = dma->buflist[i];
235 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
236
237 if (buf_priv->kernel_virtual && buf->total)
238 drm_core_ioremapfree(&buf_priv->map, dev);
239 }
240 }
241 return 0;
242 }
243
244 static int i810_wait_ring(struct drm_device * dev, int n)
245 {
246 drm_i810_private_t *dev_priv = dev->dev_private;
247 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
248 int iters = 0;
249 unsigned long end;
250 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
251
252 end = jiffies + (HZ * 3);
253 while (ring->space < n) {
254 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
255 ring->space = ring->head - (ring->tail + 8);
256 if (ring->space < 0)
257 ring->space += ring->Size;
258
259 if (ring->head != last_head) {
260 end = jiffies + (HZ * 3);
261 last_head = ring->head;
262 }
263
264 iters++;
265 if (time_before(end, jiffies)) {
266 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
267 DRM_ERROR("lockup\n");
268 goto out_wait_ring;
269 }
270 udelay(1);
271 }
272
273 out_wait_ring:
274 return iters;
275 }
276
277 static void i810_kernel_lost_context(struct drm_device * dev)
278 {
279 drm_i810_private_t *dev_priv = dev->dev_private;
280 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
281
282 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
283 ring->tail = I810_READ(LP_RING + RING_TAIL);
284 ring->space = ring->head - (ring->tail + 8);
285 if (ring->space < 0)
286 ring->space += ring->Size;
287 }
288
289 static int i810_freelist_init(struct drm_device * dev, drm_i810_private_t * dev_priv)
290 {
291 struct drm_device_dma *dma = dev->dma;
292 int my_idx = 24;
293 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
294 int i;
295
296 if (dma->buf_count > 1019) {
297 /* Not enough space in the status page for the freelist */
298 return -EINVAL;
299 }
300
301 for (i = 0; i < dma->buf_count; i++) {
302 struct drm_buf *buf = dma->buflist[i];
303 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
304
305 buf_priv->in_use = hw_status++;
306 buf_priv->my_use_idx = my_idx;
307 my_idx += 4;
308
309 *buf_priv->in_use = I810_BUF_FREE;
310
311 buf_priv->map.offset = buf->bus_address;
312 buf_priv->map.size = buf->total;
313 buf_priv->map.type = _DRM_AGP;
314 buf_priv->map.flags = 0;
315 buf_priv->map.mtrr = 0;
316
317 drm_core_ioremap(&buf_priv->map, dev);
318 buf_priv->kernel_virtual = buf_priv->map.handle;
319
320 }
321 return 0;
322 }
323
324 static int i810_dma_initialize(struct drm_device * dev,
325 drm_i810_private_t * dev_priv,
326 drm_i810_init_t * init)
327 {
328 struct drm_map_list *r_list;
329 memset(dev_priv, 0, sizeof(drm_i810_private_t));
330
331 list_for_each_entry(r_list, &dev->maplist, head) {
332 if (r_list->map &&
333 r_list->map->type == _DRM_SHM &&
334 r_list->map->flags & _DRM_CONTAINS_LOCK) {
335 dev_priv->sarea_map = r_list->map;
336 break;
337 }
338 }
339 if (!dev_priv->sarea_map) {
340 dev->dev_private = (void *)dev_priv;
341 i810_dma_cleanup(dev);
342 DRM_ERROR("can not find sarea!\n");
343 return -EINVAL;
344 }
345 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
346 if (!dev_priv->mmio_map) {
347 dev->dev_private = (void *)dev_priv;
348 i810_dma_cleanup(dev);
349 DRM_ERROR("can not find mmio map!\n");
350 return -EINVAL;
351 }
352 dev->agp_buffer_token = init->buffers_offset;
353 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
354 if (!dev->agp_buffer_map) {
355 dev->dev_private = (void *)dev_priv;
356 i810_dma_cleanup(dev);
357 DRM_ERROR("can not find dma buffer map!\n");
358 return -EINVAL;
359 }
360
361 dev_priv->sarea_priv = (drm_i810_sarea_t *)
362 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
363
364 dev_priv->ring.Start = init->ring_start;
365 dev_priv->ring.End = init->ring_end;
366 dev_priv->ring.Size = init->ring_size;
367
368 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
369 dev_priv->ring.map.size = init->ring_size;
370 dev_priv->ring.map.type = _DRM_AGP;
371 dev_priv->ring.map.flags = 0;
372 dev_priv->ring.map.mtrr = 0;
373
374 drm_core_ioremap(&dev_priv->ring.map, dev);
375
376 if (dev_priv->ring.map.handle == NULL) {
377 dev->dev_private = (void *)dev_priv;
378 i810_dma_cleanup(dev);
379 DRM_ERROR("can not ioremap virtual address for"
380 " ring buffer\n");
381 return -ENOMEM;
382 }
383
384 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
385
386 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
387
388 dev_priv->w = init->w;
389 dev_priv->h = init->h;
390 dev_priv->pitch = init->pitch;
391 dev_priv->back_offset = init->back_offset;
392 dev_priv->depth_offset = init->depth_offset;
393 dev_priv->front_offset = init->front_offset;
394
395 dev_priv->overlay_offset = init->overlay_offset;
396 dev_priv->overlay_physical = init->overlay_physical;
397
398 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
399 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
400 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
401
402 /* Program Hardware Status Page */
403 dev_priv->hw_status_page =
404 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
405 &dev_priv->dma_status_page);
406 if (!dev_priv->hw_status_page) {
407 dev->dev_private = (void *)dev_priv;
408 i810_dma_cleanup(dev);
409 DRM_ERROR("Can not allocate hardware status page\n");
410 return -ENOMEM;
411 }
412 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
413 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
414
415 I810_WRITE(0x02080, dev_priv->dma_status_page);
416 DRM_DEBUG("Enabled hardware status page\n");
417
418 /* Now we need to init our freelist */
419 if (i810_freelist_init(dev, dev_priv) != 0) {
420 dev->dev_private = (void *)dev_priv;
421 i810_dma_cleanup(dev);
422 DRM_ERROR("Not enough space in the status page for"
423 " the freelist\n");
424 return -ENOMEM;
425 }
426 dev->dev_private = (void *)dev_priv;
427
428 return 0;
429 }
430
431 static int i810_dma_init(struct drm_device *dev, void *data,
432 struct drm_file *file_priv)
433 {
434 drm_i810_private_t *dev_priv;
435 drm_i810_init_t *init = data;
436 int retcode = 0;
437
438 switch (init->func) {
439 case I810_INIT_DMA_1_4:
440 DRM_INFO("Using v1.4 init.\n");
441 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
442 if (dev_priv == NULL)
443 return -ENOMEM;
444 retcode = i810_dma_initialize(dev, dev_priv, init);
445 break;
446
447 case I810_CLEANUP_DMA:
448 DRM_INFO("DMA Cleanup\n");
449 retcode = i810_dma_cleanup(dev);
450 break;
451 default:
452 return -EINVAL;
453 }
454
455 return retcode;
456 }
457
458 /* Most efficient way to verify state for the i810 is as it is
459 * emitted. Non-conformant state is silently dropped.
460 *
461 * Use 'volatile' & local var tmp to force the emitted values to be
462 * identical to the verified ones.
463 */
464 static void i810EmitContextVerified(struct drm_device * dev,
465 volatile unsigned int *code)
466 {
467 drm_i810_private_t *dev_priv = dev->dev_private;
468 int i, j = 0;
469 unsigned int tmp;
470 RING_LOCALS;
471
472 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
473
474 OUT_RING(GFX_OP_COLOR_FACTOR);
475 OUT_RING(code[I810_CTXREG_CF1]);
476
477 OUT_RING(GFX_OP_STIPPLE);
478 OUT_RING(code[I810_CTXREG_ST1]);
479
480 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
481 tmp = code[i];
482
483 if ((tmp & (7 << 29)) == (3 << 29) &&
484 (tmp & (0x1f << 24)) < (0x1d << 24)) {
485 OUT_RING(tmp);
486 j++;
487 } else
488 printk("constext state dropped!!!\n");
489 }
490
491 if (j & 1)
492 OUT_RING(0);
493
494 ADVANCE_LP_RING();
495 }
496
497 static void i810EmitTexVerified(struct drm_device * dev, volatile unsigned int *code)
498 {
499 drm_i810_private_t *dev_priv = dev->dev_private;
500 int i, j = 0;
501 unsigned int tmp;
502 RING_LOCALS;
503
504 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
505
506 OUT_RING(GFX_OP_MAP_INFO);
507 OUT_RING(code[I810_TEXREG_MI1]);
508 OUT_RING(code[I810_TEXREG_MI2]);
509 OUT_RING(code[I810_TEXREG_MI3]);
510
511 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
512 tmp = code[i];
513
514 if ((tmp & (7 << 29)) == (3 << 29) &&
515 (tmp & (0x1f << 24)) < (0x1d << 24)) {
516 OUT_RING(tmp);
517 j++;
518 } else
519 printk("texture state dropped!!!\n");
520 }
521
522 if (j & 1)
523 OUT_RING(0);
524
525 ADVANCE_LP_RING();
526 }
527
528 /* Need to do some additional checking when setting the dest buffer.
529 */
530 static void i810EmitDestVerified(struct drm_device * dev,
531 volatile unsigned int *code)
532 {
533 drm_i810_private_t *dev_priv = dev->dev_private;
534 unsigned int tmp;
535 RING_LOCALS;
536
537 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
538
539 tmp = code[I810_DESTREG_DI1];
540 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
541 OUT_RING(CMD_OP_DESTBUFFER_INFO);
542 OUT_RING(tmp);
543 } else
544 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
545 tmp, dev_priv->front_di1, dev_priv->back_di1);
546
547 /* invarient:
548 */
549 OUT_RING(CMD_OP_Z_BUFFER_INFO);
550 OUT_RING(dev_priv->zi1);
551
552 OUT_RING(GFX_OP_DESTBUFFER_VARS);
553 OUT_RING(code[I810_DESTREG_DV1]);
554
555 OUT_RING(GFX_OP_DRAWRECT_INFO);
556 OUT_RING(code[I810_DESTREG_DR1]);
557 OUT_RING(code[I810_DESTREG_DR2]);
558 OUT_RING(code[I810_DESTREG_DR3]);
559 OUT_RING(code[I810_DESTREG_DR4]);
560 OUT_RING(0);
561
562 ADVANCE_LP_RING();
563 }
564
565 static void i810EmitState(struct drm_device * dev)
566 {
567 drm_i810_private_t *dev_priv = dev->dev_private;
568 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
569 unsigned int dirty = sarea_priv->dirty;
570
571 DRM_DEBUG("%x\n", dirty);
572
573 if (dirty & I810_UPLOAD_BUFFERS) {
574 i810EmitDestVerified(dev, sarea_priv->BufferState);
575 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
576 }
577
578 if (dirty & I810_UPLOAD_CTX) {
579 i810EmitContextVerified(dev, sarea_priv->ContextState);
580 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
581 }
582
583 if (dirty & I810_UPLOAD_TEX0) {
584 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
585 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
586 }
587
588 if (dirty & I810_UPLOAD_TEX1) {
589 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
590 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
591 }
592 }
593
594 /* need to verify
595 */
596 static void i810_dma_dispatch_clear(struct drm_device * dev, int flags,
597 unsigned int clear_color,
598 unsigned int clear_zval)
599 {
600 drm_i810_private_t *dev_priv = dev->dev_private;
601 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
602 int nbox = sarea_priv->nbox;
603 struct drm_clip_rect *pbox = sarea_priv->boxes;
604 int pitch = dev_priv->pitch;
605 int cpp = 2;
606 int i;
607 RING_LOCALS;
608
609 if (dev_priv->current_page == 1) {
610 unsigned int tmp = flags;
611
612 flags &= ~(I810_FRONT | I810_BACK);
613 if (tmp & I810_FRONT)
614 flags |= I810_BACK;
615 if (tmp & I810_BACK)
616 flags |= I810_FRONT;
617 }
618
619 i810_kernel_lost_context(dev);
620
621 if (nbox > I810_NR_SAREA_CLIPRECTS)
622 nbox = I810_NR_SAREA_CLIPRECTS;
623
624 for (i = 0; i < nbox; i++, pbox++) {
625 unsigned int x = pbox->x1;
626 unsigned int y = pbox->y1;
627 unsigned int width = (pbox->x2 - x) * cpp;
628 unsigned int height = pbox->y2 - y;
629 unsigned int start = y * pitch + x * cpp;
630
631 if (pbox->x1 > pbox->x2 ||
632 pbox->y1 > pbox->y2 ||
633 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
634 continue;
635
636 if (flags & I810_FRONT) {
637 BEGIN_LP_RING(6);
638 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
639 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
640 OUT_RING((height << 16) | width);
641 OUT_RING(start);
642 OUT_RING(clear_color);
643 OUT_RING(0);
644 ADVANCE_LP_RING();
645 }
646
647 if (flags & I810_BACK) {
648 BEGIN_LP_RING(6);
649 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
650 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
651 OUT_RING((height << 16) | width);
652 OUT_RING(dev_priv->back_offset + start);
653 OUT_RING(clear_color);
654 OUT_RING(0);
655 ADVANCE_LP_RING();
656 }
657
658 if (flags & I810_DEPTH) {
659 BEGIN_LP_RING(6);
660 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
661 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
662 OUT_RING((height << 16) | width);
663 OUT_RING(dev_priv->depth_offset + start);
664 OUT_RING(clear_zval);
665 OUT_RING(0);
666 ADVANCE_LP_RING();
667 }
668 }
669 }
670
671 static void i810_dma_dispatch_swap(struct drm_device * dev)
672 {
673 drm_i810_private_t *dev_priv = dev->dev_private;
674 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
675 int nbox = sarea_priv->nbox;
676 struct drm_clip_rect *pbox = sarea_priv->boxes;
677 int pitch = dev_priv->pitch;
678 int cpp = 2;
679 int i;
680 RING_LOCALS;
681
682 DRM_DEBUG("swapbuffers\n");
683
684 i810_kernel_lost_context(dev);
685
686 if (nbox > I810_NR_SAREA_CLIPRECTS)
687 nbox = I810_NR_SAREA_CLIPRECTS;
688
689 for (i = 0; i < nbox; i++, pbox++) {
690 unsigned int w = pbox->x2 - pbox->x1;
691 unsigned int h = pbox->y2 - pbox->y1;
692 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
693 unsigned int start = dst;
694
695 if (pbox->x1 > pbox->x2 ||
696 pbox->y1 > pbox->y2 ||
697 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
698 continue;
699
700 BEGIN_LP_RING(6);
701 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
702 OUT_RING(pitch | (0xCC << 16));
703 OUT_RING((h << 16) | (w * cpp));
704 if (dev_priv->current_page == 0)
705 OUT_RING(dev_priv->front_offset + start);
706 else
707 OUT_RING(dev_priv->back_offset + start);
708 OUT_RING(pitch);
709 if (dev_priv->current_page == 0)
710 OUT_RING(dev_priv->back_offset + start);
711 else
712 OUT_RING(dev_priv->front_offset + start);
713 ADVANCE_LP_RING();
714 }
715 }
716
717 static void i810_dma_dispatch_vertex(struct drm_device * dev,
718 struct drm_buf * buf, int discard, int used)
719 {
720 drm_i810_private_t *dev_priv = dev->dev_private;
721 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
722 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
723 struct drm_clip_rect *box = sarea_priv->boxes;
724 int nbox = sarea_priv->nbox;
725 unsigned long address = (unsigned long)buf->bus_address;
726 unsigned long start = address - dev->agp->base;
727 int i = 0;
728 RING_LOCALS;
729
730 i810_kernel_lost_context(dev);
731
732 if (nbox > I810_NR_SAREA_CLIPRECTS)
733 nbox = I810_NR_SAREA_CLIPRECTS;
734
735 if (used > 4 * 1024)
736 used = 0;
737
738 if (sarea_priv->dirty)
739 i810EmitState(dev);
740
741 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
742 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
743
744 *(u32 *) buf_priv->kernel_virtual =
745 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
746
747 if (used & 4) {
748 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
749 used += 4;
750 }
751
752 i810_unmap_buffer(buf);
753 }
754
755 if (used) {
756 do {
757 if (i < nbox) {
758 BEGIN_LP_RING(4);
759 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
760 SC_ENABLE);
761 OUT_RING(GFX_OP_SCISSOR_INFO);
762 OUT_RING(box[i].x1 | (box[i].y1 << 16));
763 OUT_RING((box[i].x2 -
764 1) | ((box[i].y2 - 1) << 16));
765 ADVANCE_LP_RING();
766 }
767
768 BEGIN_LP_RING(4);
769 OUT_RING(CMD_OP_BATCH_BUFFER);
770 OUT_RING(start | BB1_PROTECTED);
771 OUT_RING(start + used - 4);
772 OUT_RING(0);
773 ADVANCE_LP_RING();
774
775 } while (++i < nbox);
776 }
777
778 if (discard) {
779 dev_priv->counter++;
780
781 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
782 I810_BUF_HARDWARE);
783
784 BEGIN_LP_RING(8);
785 OUT_RING(CMD_STORE_DWORD_IDX);
786 OUT_RING(20);
787 OUT_RING(dev_priv->counter);
788 OUT_RING(CMD_STORE_DWORD_IDX);
789 OUT_RING(buf_priv->my_use_idx);
790 OUT_RING(I810_BUF_FREE);
791 OUT_RING(CMD_REPORT_HEAD);
792 OUT_RING(0);
793 ADVANCE_LP_RING();
794 }
795 }
796
797 static void i810_dma_dispatch_flip(struct drm_device * dev)
798 {
799 drm_i810_private_t *dev_priv = dev->dev_private;
800 int pitch = dev_priv->pitch;
801 RING_LOCALS;
802
803 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
804 dev_priv->current_page,
805 dev_priv->sarea_priv->pf_current_page);
806
807 i810_kernel_lost_context(dev);
808
809 BEGIN_LP_RING(2);
810 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
811 OUT_RING(0);
812 ADVANCE_LP_RING();
813
814 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
815 /* On i815 at least ASYNC is buggy */
816 /* pitch<<5 is from 11.2.8 p158,
817 its the pitch / 8 then left shifted 8,
818 so (pitch >> 3) << 8 */
819 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
820 if (dev_priv->current_page == 0) {
821 OUT_RING(dev_priv->back_offset);
822 dev_priv->current_page = 1;
823 } else {
824 OUT_RING(dev_priv->front_offset);
825 dev_priv->current_page = 0;
826 }
827 OUT_RING(0);
828 ADVANCE_LP_RING();
829
830 BEGIN_LP_RING(2);
831 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
832 OUT_RING(0);
833 ADVANCE_LP_RING();
834
835 /* Increment the frame counter. The client-side 3D driver must
836 * throttle the framerate by waiting for this value before
837 * performing the swapbuffer ioctl.
838 */
839 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
840
841 }
842
843 static void i810_dma_quiescent(struct drm_device * dev)
844 {
845 drm_i810_private_t *dev_priv = dev->dev_private;
846 RING_LOCALS;
847
848 i810_kernel_lost_context(dev);
849
850 BEGIN_LP_RING(4);
851 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
852 OUT_RING(CMD_REPORT_HEAD);
853 OUT_RING(0);
854 OUT_RING(0);
855 ADVANCE_LP_RING();
856
857 i810_wait_ring(dev, dev_priv->ring.Size - 8);
858 }
859
860 static int i810_flush_queue(struct drm_device * dev)
861 {
862 drm_i810_private_t *dev_priv = dev->dev_private;
863 struct drm_device_dma *dma = dev->dma;
864 int i, ret = 0;
865 RING_LOCALS;
866
867 i810_kernel_lost_context(dev);
868
869 BEGIN_LP_RING(2);
870 OUT_RING(CMD_REPORT_HEAD);
871 OUT_RING(0);
872 ADVANCE_LP_RING();
873
874 i810_wait_ring(dev, dev_priv->ring.Size - 8);
875
876 for (i = 0; i < dma->buf_count; i++) {
877 struct drm_buf *buf = dma->buflist[i];
878 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
879
880 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
881 I810_BUF_FREE);
882
883 if (used == I810_BUF_HARDWARE)
884 DRM_DEBUG("reclaimed from HARDWARE\n");
885 if (used == I810_BUF_CLIENT)
886 DRM_DEBUG("still on client\n");
887 }
888
889 return ret;
890 }
891
892 /* Must be called with the lock held */
893 static void i810_reclaim_buffers(struct drm_device * dev,
894 struct drm_file *file_priv)
895 {
896 struct drm_device_dma *dma = dev->dma;
897 int i;
898
899 if (!dma)
900 return;
901 if (!dev->dev_private)
902 return;
903 if (!dma->buflist)
904 return;
905
906 i810_flush_queue(dev);
907
908 for (i = 0; i < dma->buf_count; i++) {
909 struct drm_buf *buf = dma->buflist[i];
910 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
911
912 if (buf->file_priv == file_priv && buf_priv) {
913 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
914 I810_BUF_FREE);
915
916 if (used == I810_BUF_CLIENT)
917 DRM_DEBUG("reclaimed from client\n");
918 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
919 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
920 }
921 }
922 }
923
924 static int i810_flush_ioctl(struct drm_device *dev, void *data,
925 struct drm_file *file_priv)
926 {
927 LOCK_TEST_WITH_RETURN(dev, file_priv);
928
929 i810_flush_queue(dev);
930 return 0;
931 }
932
933 static int i810_dma_vertex(struct drm_device *dev, void *data,
934 struct drm_file *file_priv)
935 {
936 struct drm_device_dma *dma = dev->dma;
937 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
938 u32 *hw_status = dev_priv->hw_status_page;
939 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
940 dev_priv->sarea_priv;
941 drm_i810_vertex_t *vertex = data;
942
943 LOCK_TEST_WITH_RETURN(dev, file_priv);
944
945 DRM_DEBUG("idx %d used %d discard %d\n",
946 vertex->idx, vertex->used, vertex->discard);
947
948 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
949 return -EINVAL;
950
951 i810_dma_dispatch_vertex(dev,
952 dma->buflist[vertex->idx],
953 vertex->discard, vertex->used);
954
955 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
956 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
957 sarea_priv->last_enqueue = dev_priv->counter - 1;
958 sarea_priv->last_dispatch = (int)hw_status[5];
959
960 return 0;
961 }
962
963 static int i810_clear_bufs(struct drm_device *dev, void *data,
964 struct drm_file *file_priv)
965 {
966 drm_i810_clear_t *clear = data;
967
968 LOCK_TEST_WITH_RETURN(dev, file_priv);
969
970 /* GH: Someone's doing nasty things... */
971 if (!dev->dev_private) {
972 return -EINVAL;
973 }
974
975 i810_dma_dispatch_clear(dev, clear->flags,
976 clear->clear_color, clear->clear_depth);
977 return 0;
978 }
979
980 static int i810_swap_bufs(struct drm_device *dev, void *data,
981 struct drm_file *file_priv)
982 {
983 DRM_DEBUG("\n");
984
985 LOCK_TEST_WITH_RETURN(dev, file_priv);
986
987 i810_dma_dispatch_swap(dev);
988 return 0;
989 }
990
991 static int i810_getage(struct drm_device *dev, void *data,
992 struct drm_file *file_priv)
993 {
994 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
995 u32 *hw_status = dev_priv->hw_status_page;
996 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
997 dev_priv->sarea_priv;
998
999 sarea_priv->last_dispatch = (int)hw_status[5];
1000 return 0;
1001 }
1002
1003 static int i810_getbuf(struct drm_device *dev, void *data,
1004 struct drm_file *file_priv)
1005 {
1006 int retcode = 0;
1007 drm_i810_dma_t *d = data;
1008 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1009 u32 *hw_status = dev_priv->hw_status_page;
1010 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1011 dev_priv->sarea_priv;
1012
1013 LOCK_TEST_WITH_RETURN(dev, file_priv);
1014
1015 d->granted = 0;
1016
1017 retcode = i810_dma_get_buffer(dev, d, file_priv);
1018
1019 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1020 task_pid_nr(current), retcode, d->granted);
1021
1022 sarea_priv->last_dispatch = (int)hw_status[5];
1023
1024 return retcode;
1025 }
1026
1027 static int i810_copybuf(struct drm_device *dev, void *data,
1028 struct drm_file *file_priv)
1029 {
1030 /* Never copy - 2.4.x doesn't need it */
1031 return 0;
1032 }
1033
1034 static int i810_docopy(struct drm_device *dev, void *data,
1035 struct drm_file *file_priv)
1036 {
1037 /* Never copy - 2.4.x doesn't need it */
1038 return 0;
1039 }
1040
1041 static void i810_dma_dispatch_mc(struct drm_device * dev, struct drm_buf * buf, int used,
1042 unsigned int last_render)
1043 {
1044 drm_i810_private_t *dev_priv = dev->dev_private;
1045 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1046 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1047 unsigned long address = (unsigned long)buf->bus_address;
1048 unsigned long start = address - dev->agp->base;
1049 int u;
1050 RING_LOCALS;
1051
1052 i810_kernel_lost_context(dev);
1053
1054 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1055 if (u != I810_BUF_CLIENT) {
1056 DRM_DEBUG("MC found buffer that isn't mine!\n");
1057 }
1058
1059 if (used > 4 * 1024)
1060 used = 0;
1061
1062 sarea_priv->dirty = 0x7f;
1063
1064 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1065
1066 dev_priv->counter++;
1067 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1068 DRM_DEBUG("start : %lx\n", start);
1069 DRM_DEBUG("used : %d\n", used);
1070 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1071
1072 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1073 if (used & 4) {
1074 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1075 used += 4;
1076 }
1077
1078 i810_unmap_buffer(buf);
1079 }
1080 BEGIN_LP_RING(4);
1081 OUT_RING(CMD_OP_BATCH_BUFFER);
1082 OUT_RING(start | BB1_PROTECTED);
1083 OUT_RING(start + used - 4);
1084 OUT_RING(0);
1085 ADVANCE_LP_RING();
1086
1087 BEGIN_LP_RING(8);
1088 OUT_RING(CMD_STORE_DWORD_IDX);
1089 OUT_RING(buf_priv->my_use_idx);
1090 OUT_RING(I810_BUF_FREE);
1091 OUT_RING(0);
1092
1093 OUT_RING(CMD_STORE_DWORD_IDX);
1094 OUT_RING(16);
1095 OUT_RING(last_render);
1096 OUT_RING(0);
1097 ADVANCE_LP_RING();
1098 }
1099
1100 static int i810_dma_mc(struct drm_device *dev, void *data,
1101 struct drm_file *file_priv)
1102 {
1103 struct drm_device_dma *dma = dev->dma;
1104 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1105 u32 *hw_status = dev_priv->hw_status_page;
1106 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1107 dev_priv->sarea_priv;
1108 drm_i810_mc_t *mc = data;
1109
1110 LOCK_TEST_WITH_RETURN(dev, file_priv);
1111
1112 if (mc->idx >= dma->buf_count || mc->idx < 0)
1113 return -EINVAL;
1114
1115 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1116 mc->last_render);
1117
1118 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1119 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1120 sarea_priv->last_enqueue = dev_priv->counter - 1;
1121 sarea_priv->last_dispatch = (int)hw_status[5];
1122
1123 return 0;
1124 }
1125
1126 static int i810_rstatus(struct drm_device *dev, void *data,
1127 struct drm_file *file_priv)
1128 {
1129 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1130
1131 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1132 }
1133
1134 static int i810_ov0_info(struct drm_device *dev, void *data,
1135 struct drm_file *file_priv)
1136 {
1137 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1138 drm_i810_overlay_t *ov = data;
1139
1140 ov->offset = dev_priv->overlay_offset;
1141 ov->physical = dev_priv->overlay_physical;
1142
1143 return 0;
1144 }
1145
1146 static int i810_fstatus(struct drm_device *dev, void *data,
1147 struct drm_file *file_priv)
1148 {
1149 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1150
1151 LOCK_TEST_WITH_RETURN(dev, file_priv);
1152 return I810_READ(0x30008);
1153 }
1154
1155 static int i810_ov0_flip(struct drm_device *dev, void *data,
1156 struct drm_file *file_priv)
1157 {
1158 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1159
1160 LOCK_TEST_WITH_RETURN(dev, file_priv);
1161
1162 //Tell the overlay to update
1163 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1164
1165 return 0;
1166 }
1167
1168 /* Not sure why this isn't set all the time:
1169 */
1170 static void i810_do_init_pageflip(struct drm_device * dev)
1171 {
1172 drm_i810_private_t *dev_priv = dev->dev_private;
1173
1174 DRM_DEBUG("\n");
1175 dev_priv->page_flipping = 1;
1176 dev_priv->current_page = 0;
1177 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1178 }
1179
1180 static int i810_do_cleanup_pageflip(struct drm_device * dev)
1181 {
1182 drm_i810_private_t *dev_priv = dev->dev_private;
1183
1184 DRM_DEBUG("\n");
1185 if (dev_priv->current_page != 0)
1186 i810_dma_dispatch_flip(dev);
1187
1188 dev_priv->page_flipping = 0;
1189 return 0;
1190 }
1191
1192 static int i810_flip_bufs(struct drm_device *dev, void *data,
1193 struct drm_file *file_priv)
1194 {
1195 drm_i810_private_t *dev_priv = dev->dev_private;
1196
1197 DRM_DEBUG("\n");
1198
1199 LOCK_TEST_WITH_RETURN(dev, file_priv);
1200
1201 if (!dev_priv->page_flipping)
1202 i810_do_init_pageflip(dev);
1203
1204 i810_dma_dispatch_flip(dev);
1205 return 0;
1206 }
1207
1208 int i810_driver_load(struct drm_device *dev, unsigned long flags)
1209 {
1210 /* i810 has 4 more counters */
1211 dev->counters += 4;
1212 dev->types[6] = _DRM_STAT_IRQ;
1213 dev->types[7] = _DRM_STAT_PRIMARY;
1214 dev->types[8] = _DRM_STAT_SECONDARY;
1215 dev->types[9] = _DRM_STAT_DMA;
1216
1217 return 0;
1218 }
1219
1220 void i810_driver_lastclose(struct drm_device * dev)
1221 {
1222 i810_dma_cleanup(dev);
1223 }
1224
1225 void i810_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1226 {
1227 if (dev->dev_private) {
1228 drm_i810_private_t *dev_priv = dev->dev_private;
1229 if (dev_priv->page_flipping) {
1230 i810_do_cleanup_pageflip(dev);
1231 }
1232 }
1233 }
1234
1235 void i810_driver_reclaim_buffers_locked(struct drm_device * dev,
1236 struct drm_file *file_priv)
1237 {
1238 i810_reclaim_buffers(dev, file_priv);
1239 }
1240
1241 int i810_driver_dma_quiescent(struct drm_device * dev)
1242 {
1243 i810_dma_quiescent(dev);
1244 return 0;
1245 }
1246
1247 struct drm_ioctl_desc i810_ioctls[] = {
1248 DRM_IOCTL_DEF(DRM_I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1249 DRM_IOCTL_DEF(DRM_I810_VERTEX, i810_dma_vertex, DRM_AUTH),
1250 DRM_IOCTL_DEF(DRM_I810_CLEAR, i810_clear_bufs, DRM_AUTH),
1251 DRM_IOCTL_DEF(DRM_I810_FLUSH, i810_flush_ioctl, DRM_AUTH),
1252 DRM_IOCTL_DEF(DRM_I810_GETAGE, i810_getage, DRM_AUTH),
1253 DRM_IOCTL_DEF(DRM_I810_GETBUF, i810_getbuf, DRM_AUTH),
1254 DRM_IOCTL_DEF(DRM_I810_SWAP, i810_swap_bufs, DRM_AUTH),
1255 DRM_IOCTL_DEF(DRM_I810_COPY, i810_copybuf, DRM_AUTH),
1256 DRM_IOCTL_DEF(DRM_I810_DOCOPY, i810_docopy, DRM_AUTH),
1257 DRM_IOCTL_DEF(DRM_I810_OV0INFO, i810_ov0_info, DRM_AUTH),
1258 DRM_IOCTL_DEF(DRM_I810_FSTATUS, i810_fstatus, DRM_AUTH),
1259 DRM_IOCTL_DEF(DRM_I810_OV0FLIP, i810_ov0_flip, DRM_AUTH),
1260 DRM_IOCTL_DEF(DRM_I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1261 DRM_IOCTL_DEF(DRM_I810_RSTATUS, i810_rstatus, DRM_AUTH),
1262 DRM_IOCTL_DEF(DRM_I810_FLIP, i810_flip_bufs, DRM_AUTH)
1263 };
1264
1265 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1266
1267 /**
1268 * Determine if the device really is AGP or not.
1269 *
1270 * All Intel graphics chipsets are treated as AGP, even if they are really
1271 * PCI-e.
1272 *
1273 * \param dev The device to be tested.
1274 *
1275 * \returns
1276 * A value of 1 is always retured to indictate every i810 is AGP.
1277 */
1278 int i810_driver_device_is_agp(struct drm_device * dev)
1279 {
1280 return 1;
1281 }
Verdex Pro support