[ARM] pxa: Gumstix Verdex PCMCIA support
[linux-2.6/verdex.git] / drivers / media / video / au0828 / au0828-reg.h
blobc39f3d2b721e22580b786f6a0a56f96394a1d563
1 /*
2 * Driver for the Auvitek USB bridge
4 * Copyright (c) 2008 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 /* We'll start to rename these registers once we have a better
23 * understanding of their meaning.
25 #define REG_000 0x000
26 #define REG_001 0x001
27 #define REG_002 0x002
28 #define REG_003 0x003
30 #define AU0828_SENSORCTRL_100 0x100
31 #define AU0828_SENSORCTRL_VBI_103 0x103
33 /* I2C registers */
34 #define AU0828_I2C_TRIGGER_200 0x200
35 #define AU0828_I2C_STATUS_201 0x201
36 #define AU0828_I2C_CLK_DIVIDER_202 0x202
37 #define AU0828_I2C_DEST_ADDR_203 0x203
38 #define AU0828_I2C_WRITE_FIFO_205 0x205
39 #define AU0828_I2C_READ_FIFO_209 0x209
40 #define AU0828_I2C_MULTIBYTE_MODE_2FF 0x2ff
42 /* Audio registers */
43 #define AU0828_AUDIOCTRL_50C 0x50C
45 #define REG_600 0x600
47 /*********************************************************************/
48 /* Here are constants for values associated with the above registers */
50 /* I2C Trigger (Reg 0x200) */
51 #define AU0828_I2C_TRIGGER_WRITE 0x01
52 #define AU0828_I2C_TRIGGER_READ 0x20
53 #define AU0828_I2C_TRIGGER_HOLD 0x40
55 /* I2C Status (Reg 0x201) */
56 #define AU0828_I2C_STATUS_READ_DONE 0x01
57 #define AU0828_I2C_STATUS_NO_READ_ACK 0x02
58 #define AU0828_I2C_STATUS_WRITE_DONE 0x04
59 #define AU0828_I2C_STATUS_NO_WRITE_ACK 0x08
60 #define AU0828_I2C_STATUS_BUSY 0x10
62 /* I2C Clock Divider (Reg 0x202) */
63 #define AU0828_I2C_CLK_250KHZ 0x07
64 #define AU0828_I2C_CLK_100KHZ 0x14
65 #define AU0828_I2C_CLK_30KHZ 0x40