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[ARM] pxa: Gumstix Verdex PCMCIA support
[linux-2.6/verdex.git] / drivers / media / video / em28xx / em28xx-core.c
bloba88257a7d94ffeaee476669a8ddd154d4ddcc12b
1 /*
2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
3
4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
5 Markus Rechberger <mrechberger@gmail.com>
6 Mauro Carvalho Chehab <mchehab@infradead.org>
7 Sascha Sommer <saschasommer@freenet.de>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/usb.h>
28 #include <linux/vmalloc.h>
29 #include <media/v4l2-common.h>
30
31 #include "em28xx.h"
32
33 /* #define ENABLE_DEBUG_ISOC_FRAMES */
34
35 static unsigned int core_debug;
36 module_param(core_debug, int, 0644);
37 MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
38
39 #define em28xx_coredbg(fmt, arg...) do {\
40 if (core_debug) \
41 printk(KERN_INFO "%s %s :"fmt, \
42 dev->name, __func__ , ##arg); } while (0)
43
44 static unsigned int reg_debug;
45 module_param(reg_debug, int, 0644);
46 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
47
48 #define em28xx_regdbg(fmt, arg...) do {\
49 if (reg_debug) \
50 printk(KERN_INFO "%s %s :"fmt, \
51 dev->name, __func__ , ##arg); } while (0)
52
53 static int alt = EM28XX_PINOUT;
54 module_param(alt, int, 0644);
55 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
56
57 static unsigned int disable_vbi;
58 module_param(disable_vbi, int, 0644);
59 MODULE_PARM_DESC(disable_vbi, "disable vbi support");
60
61 /* FIXME */
62 #define em28xx_isocdbg(fmt, arg...) do {\
63 if (core_debug) \
64 printk(KERN_INFO "%s %s :"fmt, \
65 dev->name, __func__ , ##arg); } while (0)
66
67 /*
68 * em28xx_read_reg_req()
69 * reads data from the usb device specifying bRequest
70 */
71 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
72 char *buf, int len)
73 {
74 int ret;
75 int pipe = usb_rcvctrlpipe(dev->udev, 0);
76
77 if (dev->state & DEV_DISCONNECTED)
78 return -ENODEV;
79
80 if (len > URB_MAX_CTRL_SIZE)
81 return -EINVAL;
82
83 if (reg_debug) {
84 printk(KERN_DEBUG "(pipe 0x%08x): "
85 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
86 pipe,
87 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
88 req, 0, 0,
89 reg & 0xff, reg >> 8,
90 len & 0xff, len >> 8);
91 }
92
93 mutex_lock(&dev->ctrl_urb_lock);
94 ret = usb_control_msg(dev->udev, pipe, req,
95 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
96 0x0000, reg, dev->urb_buf, len, HZ);
97 if (ret < 0) {
98 if (reg_debug)
99 printk(" failed!\n");
100 mutex_unlock(&dev->ctrl_urb_lock);
101 return ret;
102 }
103
104 if (len)
105 memcpy(buf, dev->urb_buf, len);
106
107 mutex_unlock(&dev->ctrl_urb_lock);
108
109 if (reg_debug) {
110 int byte;
111
112 printk("<<<");
113 for (byte = 0; byte < len; byte++)
114 printk(" %02x", (unsigned char)buf[byte]);
115 printk("\n");
116 }
117
118 return ret;
119 }
120
121 /*
122 * em28xx_read_reg_req()
123 * reads data from the usb device specifying bRequest
124 */
125 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
126 {
127 int ret;
128 u8 val;
129
130 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
131 if (ret < 0)
132 return ret;
133
134 return val;
135 }
136
137 int em28xx_read_reg(struct em28xx *dev, u16 reg)
138 {
139 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
140 }
141
142 /*
143 * em28xx_write_regs_req()
144 * sends data to the usb device, specifying bRequest
145 */
146 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
147 int len)
148 {
149 int ret;
150 int pipe = usb_sndctrlpipe(dev->udev, 0);
151
152 if (dev->state & DEV_DISCONNECTED)
153 return -ENODEV;
154
155 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
156 return -EINVAL;
157
158 if (reg_debug) {
159 int byte;
160
161 printk(KERN_DEBUG "(pipe 0x%08x): "
162 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
163 pipe,
164 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
165 req, 0, 0,
166 reg & 0xff, reg >> 8,
167 len & 0xff, len >> 8);
168
169 for (byte = 0; byte < len; byte++)
170 printk(" %02x", (unsigned char)buf[byte]);
171 printk("\n");
172 }
173
174 mutex_lock(&dev->ctrl_urb_lock);
175 memcpy(dev->urb_buf, buf, len);
176 ret = usb_control_msg(dev->udev, pipe, req,
177 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
178 0x0000, reg, dev->urb_buf, len, HZ);
179 mutex_unlock(&dev->ctrl_urb_lock);
180
181 if (dev->wait_after_write)
182 msleep(dev->wait_after_write);
183
184 return ret;
185 }
186
187 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
188 {
189 int rc;
190
191 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
192
193 /* Stores GPO/GPIO values at the cache, if changed
194 Only write values should be stored, since input on a GPIO
195 register will return the input bits.
196 Not sure what happens on reading GPO register.
197 */
198 if (rc >= 0) {
199 if (reg == dev->reg_gpo_num)
200 dev->reg_gpo = buf[0];
201 else if (reg == dev->reg_gpio_num)
202 dev->reg_gpio = buf[0];
203 }
204
205 return rc;
206 }
207
208 /* Write a single register */
209 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
210 {
211 return em28xx_write_regs(dev, reg, &val, 1);
212 }
213
214 /*
215 * em28xx_write_reg_bits()
216 * sets only some bits (specified by bitmask) of a register, by first reading
217 * the actual value
218 */
219 static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
220 u8 bitmask)
221 {
222 int oldval;
223 u8 newval;
224
225 /* Uses cache for gpo/gpio registers */
226 if (reg == dev->reg_gpo_num)
227 oldval = dev->reg_gpo;
228 else if (reg == dev->reg_gpio_num)
229 oldval = dev->reg_gpio;
230 else
231 oldval = em28xx_read_reg(dev, reg);
232
233 if (oldval < 0)
234 return oldval;
235
236 newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
237
238 return em28xx_write_regs(dev, reg, &newval, 1);
239 }
240
241 /*
242 * em28xx_is_ac97_ready()
243 * Checks if ac97 is ready
244 */
245 static int em28xx_is_ac97_ready(struct em28xx *dev)
246 {
247 int ret, i;
248
249 /* Wait up to 50 ms for AC97 command to complete */
250 for (i = 0; i < 10; i++, msleep(5)) {
251 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
252 if (ret < 0)
253 return ret;
254
255 if (!(ret & 0x01))
256 return 0;
257 }
258
259 em28xx_warn("AC97 command still being executed: not handled properly!\n");
260 return -EBUSY;
261 }
262
263 /*
264 * em28xx_read_ac97()
265 * write a 16 bit value to the specified AC97 address (LSB first!)
266 */
267 int em28xx_read_ac97(struct em28xx *dev, u8 reg)
268 {
269 int ret;
270 u8 addr = (reg & 0x7f) | 0x80;
271 u16 val;
272
273 ret = em28xx_is_ac97_ready(dev);
274 if (ret < 0)
275 return ret;
276
277 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
278 if (ret < 0)
279 return ret;
280
281 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
282 (u8 *)&val, sizeof(val));
283
284 if (ret < 0)
285 return ret;
286 return le16_to_cpu(val);
287 }
288
289 /*
290 * em28xx_write_ac97()
291 * write a 16 bit value to the specified AC97 address (LSB first!)
292 */
293 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
294 {
295 int ret;
296 u8 addr = reg & 0x7f;
297 __le16 value;
298
299 value = cpu_to_le16(val);
300
301 ret = em28xx_is_ac97_ready(dev);
302 if (ret < 0)
303 return ret;
304
305 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
306 if (ret < 0)
307 return ret;
308
309 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
310 if (ret < 0)
311 return ret;
312
313 return 0;
314 }
315
316 struct em28xx_vol_table {
317 enum em28xx_amux mux;
318 u8 reg;
319 };
320
321 static struct em28xx_vol_table inputs[] = {
322 { EM28XX_AMUX_VIDEO, AC97_VIDEO_VOL },
323 { EM28XX_AMUX_LINE_IN, AC97_LINEIN_VOL },
324 { EM28XX_AMUX_PHONE, AC97_PHONE_VOL },
325 { EM28XX_AMUX_MIC, AC97_MIC_VOL },
326 { EM28XX_AMUX_CD, AC97_CD_VOL },
327 { EM28XX_AMUX_AUX, AC97_AUX_VOL },
328 { EM28XX_AMUX_PCM_OUT, AC97_PCM_OUT_VOL },
329 };
330
331 static int set_ac97_input(struct em28xx *dev)
332 {
333 int ret, i;
334 enum em28xx_amux amux = dev->ctl_ainput;
335
336 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
337 em28xx should point to LINE IN, while AC97 should use VIDEO
338 */
339 if (amux == EM28XX_AMUX_VIDEO2)
340 amux = EM28XX_AMUX_VIDEO;
341
342 /* Mute all entres but the one that were selected */
343 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
344 if (amux == inputs[i].mux)
345 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
346 else
347 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
348
349 if (ret < 0)
350 em28xx_warn("couldn't setup AC97 register %d\n",
351 inputs[i].reg);
352 }
353 return 0;
354 }
355
356 static int em28xx_set_audio_source(struct em28xx *dev)
357 {
358 int ret;
359 u8 input;
360
361 if (dev->board.is_em2800) {
362 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
363 input = EM2800_AUDIO_SRC_TUNER;
364 else
365 input = EM2800_AUDIO_SRC_LINE;
366
367 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
368 if (ret < 0)
369 return ret;
370 }
371
372 if (dev->board.has_msp34xx)
373 input = EM28XX_AUDIO_SRC_TUNER;
374 else {
375 switch (dev->ctl_ainput) {
376 case EM28XX_AMUX_VIDEO:
377 input = EM28XX_AUDIO_SRC_TUNER;
378 break;
379 default:
380 input = EM28XX_AUDIO_SRC_LINE;
381 break;
382 }
383 }
384
385 if (dev->board.mute_gpio && dev->mute)
386 em28xx_gpio_set(dev, dev->board.mute_gpio);
387 else
388 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
389
390 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
391 if (ret < 0)
392 return ret;
393 msleep(5);
394
395 switch (dev->audio_mode.ac97) {
396 case EM28XX_NO_AC97:
397 break;
398 default:
399 ret = set_ac97_input(dev);
400 }
401
402 return ret;
403 }
404
405 static const struct em28xx_vol_table outputs[] = {
406 { EM28XX_AOUT_MASTER, AC97_MASTER_VOL },
407 { EM28XX_AOUT_LINE, AC97_LINE_LEVEL_VOL },
408 { EM28XX_AOUT_MONO, AC97_MASTER_MONO_VOL },
409 { EM28XX_AOUT_LFE, AC97_LFE_MASTER_VOL },
410 { EM28XX_AOUT_SURR, AC97_SURR_MASTER_VOL },
411 };
412
413 int em28xx_audio_analog_set(struct em28xx *dev)
414 {
415 int ret, i;
416 u8 xclk;
417
418 if (!dev->audio_mode.has_audio)
419 return 0;
420
421 /* It is assumed that all devices use master volume for output.
422 It would be possible to use also line output.
423 */
424 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
425 /* Mute all outputs */
426 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
427 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
428 if (ret < 0)
429 em28xx_warn("couldn't setup AC97 register %d\n",
430 outputs[i].reg);
431 }
432 }
433
434 xclk = dev->board.xclk & 0x7f;
435 if (!dev->mute)
436 xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
437
438 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
439 if (ret < 0)
440 return ret;
441 msleep(10);
442
443 /* Selects the proper audio input */
444 ret = em28xx_set_audio_source(dev);
445
446 /* Sets volume */
447 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
448 int vol;
449
450 em28xx_write_ac97(dev, AC97_POWER_DOWN_CTRL, 0x4200);
451 em28xx_write_ac97(dev, AC97_EXT_AUD_CTRL, 0x0031);
452 em28xx_write_ac97(dev, AC97_PCM_IN_SRATE, 0xbb80);
453
454 /* LSB: left channel - both channels with the same level */
455 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
456
457 /* Mute device, if needed */
458 if (dev->mute)
459 vol |= 0x8000;
460
461 /* Sets volume */
462 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
463 if (dev->ctl_aoutput & outputs[i].mux)
464 ret = em28xx_write_ac97(dev, outputs[i].reg,
465 vol);
466 if (ret < 0)
467 em28xx_warn("couldn't setup AC97 register %d\n",
468 outputs[i].reg);
469 }
470
471 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
472 int sel = ac97_return_record_select(dev->ctl_aoutput);
473
474 /* Use the same input for both left and right
475 channels */
476 sel |= (sel << 8);
477
478 em28xx_write_ac97(dev, AC97_RECORD_SELECT, sel);
479 }
480 }
481
482 return ret;
483 }
484 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
485
486 int em28xx_audio_setup(struct em28xx *dev)
487 {
488 int vid1, vid2, feat, cfg;
489 u32 vid;
490
491 if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874) {
492 /* Digital only device - don't load any alsa module */
493 dev->audio_mode.has_audio = 0;
494 dev->has_audio_class = 0;
495 dev->has_alsa_audio = 0;
496 return 0;
497 }
498
499 /* If device doesn't support Usb Audio Class, use vendor class */
500 if (!dev->has_audio_class)
501 dev->has_alsa_audio = 1;
502
503 dev->audio_mode.has_audio = 1;
504
505 /* See how this device is configured */
506 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
507 em28xx_info("Config register raw data: 0x%02x\n", cfg);
508 if (cfg < 0) {
509 /* Register read error? */
510 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
511 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
512 /* The device doesn't have vendor audio at all */
513 dev->has_alsa_audio = 0;
514 dev->audio_mode.has_audio = 0;
515 return 0;
516 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
517 EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
518 em28xx_info("I2S Audio (3 sample rates)\n");
519 dev->audio_mode.i2s_3rates = 1;
520 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
521 EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
522 em28xx_info("I2S Audio (5 sample rates)\n");
523 dev->audio_mode.i2s_5rates = 1;
524 }
525
526 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
527 /* Skip the code that does AC97 vendor detection */
528 dev->audio_mode.ac97 = EM28XX_NO_AC97;
529 goto init_audio;
530 }
531
532 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
533
534 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
535 if (vid1 < 0) {
536 /* Device likely doesn't support AC97 */
537 em28xx_warn("AC97 chip type couldn't be determined\n");
538 goto init_audio;
539 }
540
541 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
542 if (vid2 < 0)
543 goto init_audio;
544
545 vid = vid1 << 16 | vid2;
546
547 dev->audio_mode.ac97_vendor_id = vid;
548 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
549
550 feat = em28xx_read_ac97(dev, AC97_RESET);
551 if (feat < 0)
552 goto init_audio;
553
554 dev->audio_mode.ac97_feat = feat;
555 em28xx_warn("AC97 features = 0x%04x\n", feat);
556
557 /* Try to identify what audio processor we have */
558 if ((vid == 0xffffffff) && (feat == 0x6a90))
559 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
560 else if ((vid >> 8) == 0x838476)
561 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
562
563 init_audio:
564 /* Reports detected AC97 processor */
565 switch (dev->audio_mode.ac97) {
566 case EM28XX_NO_AC97:
567 em28xx_info("No AC97 audio processor\n");
568 break;
569 case EM28XX_AC97_EM202:
570 em28xx_info("Empia 202 AC97 audio processor detected\n");
571 break;
572 case EM28XX_AC97_SIGMATEL:
573 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
574 dev->audio_mode.ac97_vendor_id & 0xff);
575 break;
576 case EM28XX_AC97_OTHER:
577 em28xx_warn("Unknown AC97 audio processor detected!\n");
578 break;
579 default:
580 break;
581 }
582
583 return em28xx_audio_analog_set(dev);
584 }
585 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
586
587 int em28xx_colorlevels_set_default(struct em28xx *dev)
588 {
589 em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10); /* contrast */
590 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00); /* brightness */
591 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
592 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
593 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
594 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
595
596 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
597 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
598 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
599 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
600 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
601 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
602 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
603 }
604
605 int em28xx_capture_start(struct em28xx *dev, int start)
606 {
607 int rc;
608
609 if (dev->chip_id == CHIP_ID_EM2874) {
610 /* The Transport Stream Enable Register moved in em2874 */
611 if (!start) {
612 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
613 0x00,
614 EM2874_TS1_CAPTURE_ENABLE);
615 return rc;
616 }
617
618 /* Enable Transport Stream */
619 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
620 EM2874_TS1_CAPTURE_ENABLE,
621 EM2874_TS1_CAPTURE_ENABLE);
622 return rc;
623 }
624
625
626 /* FIXME: which is the best order? */
627 /* video registers are sampled by VREF */
628 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
629 start ? 0x10 : 0x00, 0x10);
630 if (rc < 0)
631 return rc;
632
633 if (!start) {
634 /* disable video capture */
635 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
636 return rc;
637 }
638
639 if (dev->board.is_webcam)
640 rc = em28xx_write_reg(dev, 0x13, 0x0c);
641
642 /* enable video capture */
643 rc = em28xx_write_reg(dev, 0x48, 0x00);
644
645 if (dev->mode == EM28XX_ANALOG_MODE)
646 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
647 else
648 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
649
650 msleep(6);
651
652 return rc;
653 }
654
655 int em28xx_vbi_supported(struct em28xx *dev)
656 {
657 /* Modprobe option to manually disable */
658 if (disable_vbi == 1)
659 return 0;
660
661 if (dev->chip_id == CHIP_ID_EM2860 ||
662 dev->chip_id == CHIP_ID_EM2883)
663 return 1;
664
665 /* Version of em28xx that does not support VBI */
666 return 0;
667 }
668
669 int em28xx_set_outfmt(struct em28xx *dev)
670 {
671 int ret;
672 u8 vinctrl;
673
674 ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
675 dev->format->reg | 0x20, 0xff);
676 if (ret < 0)
677 return ret;
678
679 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode);
680 if (ret < 0)
681 return ret;
682
683 vinctrl = dev->vinctl;
684 if (em28xx_vbi_supported(dev) == 1) {
685 vinctrl |= EM28XX_VINCTRL_VBI_RAW;
686 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
687 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
688 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, 0xb4);
689 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, 0x0c);
690 }
691
692 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
693 }
694
695 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
696 u8 ymin, u8 ymax)
697 {
698 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
699 xmin, ymin, xmax, ymax);
700
701 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
702 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
703 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
704 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
705 }
706
707 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
708 u16 width, u16 height)
709 {
710 u8 cwidth = width;
711 u8 cheight = height;
712 u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
713
714 em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
715 (width | (overflow & 2) << 7),
716 (height | (overflow & 1) << 8));
717
718 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
719 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
720 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
721 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
722 return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
723 }
724
725 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
726 {
727 u8 mode;
728 /* the em2800 scaler only supports scaling down to 50% */
729
730 if (dev->board.is_em2800) {
731 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
732 } else {
733 u8 buf[2];
734
735 buf[0] = h;
736 buf[1] = h >> 8;
737 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
738
739 buf[0] = v;
740 buf[1] = v >> 8;
741 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
742 /* it seems that both H and V scalers must be active
743 to work correctly */
744 mode = (h || v) ? 0x30 : 0x00;
745 }
746 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
747 }
748
749 /* FIXME: this only function read values from dev */
750 int em28xx_resolution_set(struct em28xx *dev)
751 {
752 int width, height;
753 width = norm_maxw(dev);
754 height = norm_maxh(dev);
755
756 if (!dev->progressive)
757 height >>= norm_maxh(dev);
758
759 em28xx_set_outfmt(dev);
760
761
762 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
763
764 /* If we don't set the start position to 4 in VBI mode, we end up
765 with line 21 being YUYV encoded instead of being in 8-bit
766 greyscale */
767 if (em28xx_vbi_supported(dev) == 1)
768 em28xx_capture_area_set(dev, 0, 4, width >> 2, height >> 2);
769 else
770 em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
771
772 return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
773 }
774
775 int em28xx_set_alternate(struct em28xx *dev)
776 {
777 int errCode, prev_alt = dev->alt;
778 int i;
779 unsigned int min_pkt_size = dev->width * 2 + 4;
780
781 /* When image size is bigger than a certain value,
782 the frame size should be increased, otherwise, only
783 green screen will be received.
784 */
785 if (dev->width * 2 * dev->height > 720 * 240 * 2)
786 min_pkt_size *= 2;
787
788 for (i = 0; i < dev->num_alt; i++) {
789 /* stop when the selected alt setting offers enough bandwidth */
790 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
791 dev->alt = i;
792 break;
793 /* otherwise make sure that we end up with the maximum bandwidth
794 because the min_pkt_size equation might be wrong...
795 */
796 } else if (dev->alt_max_pkt_size[i] >
797 dev->alt_max_pkt_size[dev->alt])
798 dev->alt = i;
799 }
800
801 if (dev->alt != prev_alt) {
802 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
803 min_pkt_size, dev->alt);
804 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
805 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
806 dev->alt, dev->max_pkt_size);
807 errCode = usb_set_interface(dev->udev, 0, dev->alt);
808 if (errCode < 0) {
809 em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
810 dev->alt, errCode);
811 return errCode;
812 }
813 }
814 return 0;
815 }
816
817 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
818 {
819 int rc = 0;
820
821 if (!gpio)
822 return rc;
823
824 if (dev->mode != EM28XX_SUSPEND) {
825 em28xx_write_reg(dev, 0x48, 0x00);
826 if (dev->mode == EM28XX_ANALOG_MODE)
827 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
828 else
829 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
830 msleep(6);
831 }
832
833 /* Send GPIO reset sequences specified at board entry */
834 while (gpio->sleep >= 0) {
835 if (gpio->reg >= 0) {
836 rc = em28xx_write_reg_bits(dev,
837 gpio->reg,
838 gpio->val,
839 gpio->mask);
840 if (rc < 0)
841 return rc;
842 }
843 if (gpio->sleep > 0)
844 msleep(gpio->sleep);
845
846 gpio++;
847 }
848 return rc;
849 }
850
851 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
852 {
853 if (dev->mode == set_mode)
854 return 0;
855
856 if (set_mode == EM28XX_SUSPEND) {
857 dev->mode = set_mode;
858
859 /* FIXME: add suspend support for ac97 */
860
861 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
862 }
863
864 dev->mode = set_mode;
865
866 if (dev->mode == EM28XX_DIGITAL_MODE)
867 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
868 else
869 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
870 }
871 EXPORT_SYMBOL_GPL(em28xx_set_mode);
872
873 /* ------------------------------------------------------------------
874 URB control
875 ------------------------------------------------------------------*/
876
877 /*
878 * IRQ callback, called by URB callback
879 */
880 static void em28xx_irq_callback(struct urb *urb)
881 {
882 struct em28xx *dev = urb->context;
883 int rc, i;
884
885 switch (urb->status) {
886 case 0: /* success */
887 case -ETIMEDOUT: /* NAK */
888 break;
889 case -ECONNRESET: /* kill */
890 case -ENOENT:
891 case -ESHUTDOWN:
892 return;
893 default: /* error */
894 em28xx_isocdbg("urb completition error %d.\n", urb->status);
895 break;
896 }
897
898 /* Copy data from URB */
899 spin_lock(&dev->slock);
900 rc = dev->isoc_ctl.isoc_copy(dev, urb);
901 spin_unlock(&dev->slock);
902
903 /* Reset urb buffers */
904 for (i = 0; i < urb->number_of_packets; i++) {
905 urb->iso_frame_desc[i].status = 0;
906 urb->iso_frame_desc[i].actual_length = 0;
907 }
908 urb->status = 0;
909
910 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
911 if (urb->status) {
912 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
913 urb->status);
914 }
915 }
916
917 /*
918 * Stop and Deallocate URBs
919 */
920 void em28xx_uninit_isoc(struct em28xx *dev)
921 {
922 struct urb *urb;
923 int i;
924
925 em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
926
927 dev->isoc_ctl.nfields = -1;
928 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
929 urb = dev->isoc_ctl.urb[i];
930 if (urb) {
931 if (!irqs_disabled())
932 usb_kill_urb(urb);
933 else
934 usb_unlink_urb(urb);
935
936 if (dev->isoc_ctl.transfer_buffer[i]) {
937 usb_buffer_free(dev->udev,
938 urb->transfer_buffer_length,
939 dev->isoc_ctl.transfer_buffer[i],
940 urb->transfer_dma);
941 }
942 usb_free_urb(urb);
943 dev->isoc_ctl.urb[i] = NULL;
944 }
945 dev->isoc_ctl.transfer_buffer[i] = NULL;
946 }
947
948 kfree(dev->isoc_ctl.urb);
949 kfree(dev->isoc_ctl.transfer_buffer);
950
951 dev->isoc_ctl.urb = NULL;
952 dev->isoc_ctl.transfer_buffer = NULL;
953 dev->isoc_ctl.num_bufs = 0;
954
955 em28xx_capture_start(dev, 0);
956 }
957 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
958
959 /*
960 * Allocate URBs and start IRQ
961 */
962 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
963 int num_bufs, int max_pkt_size,
964 int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
965 {
966 struct em28xx_dmaqueue *dma_q = &dev->vidq;
967 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
968 int i;
969 int sb_size, pipe;
970 struct urb *urb;
971 int j, k;
972 int rc;
973
974 em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
975
976 /* De-allocates all pending stuff */
977 em28xx_uninit_isoc(dev);
978
979 dev->isoc_ctl.isoc_copy = isoc_copy;
980 dev->isoc_ctl.num_bufs = num_bufs;
981
982 dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
983 if (!dev->isoc_ctl.urb) {
984 em28xx_errdev("cannot alloc memory for usb buffers\n");
985 return -ENOMEM;
986 }
987
988 dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
989 GFP_KERNEL);
990 if (!dev->isoc_ctl.transfer_buffer) {
991 em28xx_errdev("cannot allocate memory for usb transfer\n");
992 kfree(dev->isoc_ctl.urb);
993 return -ENOMEM;
994 }
995
996 dev->isoc_ctl.max_pkt_size = max_pkt_size;
997 dev->isoc_ctl.vid_buf = NULL;
998 dev->isoc_ctl.vbi_buf = NULL;
999
1000 sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
1001
1002 /* allocate urbs and transfer buffers */
1003 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1004 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
1005 if (!urb) {
1006 em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
1007 em28xx_uninit_isoc(dev);
1008 return -ENOMEM;
1009 }
1010 dev->isoc_ctl.urb[i] = urb;
1011
1012 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
1013 sb_size, GFP_KERNEL, &urb->transfer_dma);
1014 if (!dev->isoc_ctl.transfer_buffer[i]) {
1015 em28xx_err("unable to allocate %i bytes for transfer"
1016 " buffer %i%s\n",
1017 sb_size, i,
1018 in_interrupt() ? " while in int" : "");
1019 em28xx_uninit_isoc(dev);
1020 return -ENOMEM;
1021 }
1022 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
1023
1024 /* FIXME: this is a hack - should be
1025 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
1026 should also be using 'desc.bInterval'
1027 */
1028 pipe = usb_rcvisocpipe(dev->udev,
1029 dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
1030
1031 usb_fill_int_urb(urb, dev->udev, pipe,
1032 dev->isoc_ctl.transfer_buffer[i], sb_size,
1033 em28xx_irq_callback, dev, 1);
1034
1035 urb->number_of_packets = max_packets;
1036 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
1037
1038 k = 0;
1039 for (j = 0; j < max_packets; j++) {
1040 urb->iso_frame_desc[j].offset = k;
1041 urb->iso_frame_desc[j].length =
1042 dev->isoc_ctl.max_pkt_size;
1043 k += dev->isoc_ctl.max_pkt_size;
1044 }
1045 }
1046
1047 init_waitqueue_head(&dma_q->wq);
1048 init_waitqueue_head(&vbi_dma_q->wq);
1049
1050 em28xx_capture_start(dev, 1);
1051
1052 /* submit urbs and enables IRQ */
1053 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1054 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
1055 if (rc) {
1056 em28xx_err("submit of urb %i failed (error=%i)\n", i,
1057 rc);
1058 em28xx_uninit_isoc(dev);
1059 return rc;
1060 }
1061 }
1062
1063 return 0;
1064 }
1065 EXPORT_SYMBOL_GPL(em28xx_init_isoc);
1066
1067 /* Determine the packet size for the DVB stream for the given device
1068 (underlying value programmed into the eeprom) */
1069 int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev)
1070 {
1071 unsigned int chip_cfg2;
1072 unsigned int packet_size = 564;
1073
1074 if (dev->chip_id == CHIP_ID_EM2874) {
1075 /* FIXME - for now assume 564 like it was before, but the
1076 em2874 code should be added to return the proper value... */
1077 packet_size = 564;
1078 } else {
1079 /* TS max packet size stored in bits 1-0 of R01 */
1080 chip_cfg2 = em28xx_read_reg(dev, EM28XX_R01_CHIPCFG2);
1081 switch (chip_cfg2 & EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK) {
1082 case EM28XX_CHIPCFG2_TS_PACKETSIZE_188:
1083 packet_size = 188;
1084 break;
1085 case EM28XX_CHIPCFG2_TS_PACKETSIZE_376:
1086 packet_size = 376;
1087 break;
1088 case EM28XX_CHIPCFG2_TS_PACKETSIZE_564:
1089 packet_size = 564;
1090 break;
1091 case EM28XX_CHIPCFG2_TS_PACKETSIZE_752:
1092 packet_size = 752;
1093 break;
1094 }
1095 }
1096
1097 em28xx_coredbg("dvb max packet size=%d\n", packet_size);
1098 return packet_size;
1099 }
1100 EXPORT_SYMBOL_GPL(em28xx_isoc_dvb_max_packetsize);
1101
1102 /*
1103 * em28xx_wake_i2c()
1104 * configure i2c attached devices
1105 */
1106 void em28xx_wake_i2c(struct em28xx *dev)
1107 {
1108 v4l2_device_call_all(&dev->v4l2_dev, 0, core, reset, 0);
1109 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing,
1110 INPUT(dev->ctl_input)->vmux, 0, 0);
1111 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0);
1112 }
1113
1114 /*
1115 * Device control list
1116 */
1117
1118 static LIST_HEAD(em28xx_devlist);
1119 static DEFINE_MUTEX(em28xx_devlist_mutex);
1120
1121 struct em28xx *em28xx_get_device(int minor,
1122 enum v4l2_buf_type *fh_type,
1123 int *has_radio)
1124 {
1125 struct em28xx *h, *dev = NULL;
1126
1127 *fh_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1128 *has_radio = 0;
1129
1130 mutex_lock(&em28xx_devlist_mutex);
1131 list_for_each_entry(h, &em28xx_devlist, devlist) {
1132 if (h->vdev->minor == minor)
1133 dev = h;
1134 if (h->vbi_dev && h->vbi_dev->minor == minor) {
1135 dev = h;
1136 *fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
1137 }
1138 if (h->radio_dev &&
1139 h->radio_dev->minor == minor) {
1140 dev = h;
1141 *has_radio = 1;
1142 }
1143 }
1144 mutex_unlock(&em28xx_devlist_mutex);
1145
1146 return dev;
1147 }
1148
1149 /*
1150 * em28xx_realease_resources()
1151 * unregisters the v4l2,i2c and usb devices
1152 * called when the device gets disconected or at module unload
1153 */
1154 void em28xx_remove_from_devlist(struct em28xx *dev)
1155 {
1156 mutex_lock(&em28xx_devlist_mutex);
1157 list_del(&dev->devlist);
1158 mutex_unlock(&em28xx_devlist_mutex);
1159 };
1160
1161 void em28xx_add_into_devlist(struct em28xx *dev)
1162 {
1163 mutex_lock(&em28xx_devlist_mutex);
1164 list_add_tail(&dev->devlist, &em28xx_devlist);
1165 mutex_unlock(&em28xx_devlist_mutex);
1166 };
1167
1168 /*
1169 * Extension interface
1170 */
1171
1172 static LIST_HEAD(em28xx_extension_devlist);
1173 static DEFINE_MUTEX(em28xx_extension_devlist_lock);
1174
1175 int em28xx_register_extension(struct em28xx_ops *ops)
1176 {
1177 struct em28xx *dev = NULL;
1178
1179 mutex_lock(&em28xx_devlist_mutex);
1180 mutex_lock(&em28xx_extension_devlist_lock);
1181 list_add_tail(&ops->next, &em28xx_extension_devlist);
1182 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1183 if (dev)
1184 ops->init(dev);
1185 }
1186 printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
1187 mutex_unlock(&em28xx_extension_devlist_lock);
1188 mutex_unlock(&em28xx_devlist_mutex);
1189 return 0;
1190 }
1191 EXPORT_SYMBOL(em28xx_register_extension);
1192
1193 void em28xx_unregister_extension(struct em28xx_ops *ops)
1194 {
1195 struct em28xx *dev = NULL;
1196
1197 mutex_lock(&em28xx_devlist_mutex);
1198 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1199 if (dev)
1200 ops->fini(dev);
1201 }
1202
1203 mutex_lock(&em28xx_extension_devlist_lock);
1204 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1205 list_del(&ops->next);
1206 mutex_unlock(&em28xx_extension_devlist_lock);
1207 mutex_unlock(&em28xx_devlist_mutex);
1208 }
1209 EXPORT_SYMBOL(em28xx_unregister_extension);
1210
1211 void em28xx_init_extension(struct em28xx *dev)
1212 {
1213 struct em28xx_ops *ops = NULL;
1214
1215 mutex_lock(&em28xx_extension_devlist_lock);
1216 if (!list_empty(&em28xx_extension_devlist)) {
1217 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1218 if (ops->init)
1219 ops->init(dev);
1220 }
1221 }
1222 mutex_unlock(&em28xx_extension_devlist_lock);
1223 }
1224
1225 void em28xx_close_extension(struct em28xx *dev)
1226 {
1227 struct em28xx_ops *ops = NULL;
1228
1229 mutex_lock(&em28xx_extension_devlist_lock);
1230 if (!list_empty(&em28xx_extension_devlist)) {
1231 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1232 if (ops->fini)
1233 ops->fini(dev);
1234 }
1235 }
1236 mutex_unlock(&em28xx_extension_devlist_lock);
1237 }
Verdex Pro support