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[ARM] pxa: Gumstix Verdex PCMCIA support
[linux-2.6/verdex.git] / drivers / net / netxen / netxen_nic_init.c
blob91c2bc61c8eb6746a0a26ad854965688a34ad151
1 /*
2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3 * Copyright (C) 2009 - QLogic Corporation.
4 * All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
19 * MA 02111-1307, USA.
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.
23 *
24 */
25
26 #include <linux/netdevice.h>
27 #include <linux/delay.h>
28 #include "netxen_nic.h"
29 #include "netxen_nic_hw.h"
30
31 struct crb_addr_pair {
32 u32 addr;
33 u32 data;
34 };
35
36 #define NETXEN_MAX_CRB_XFORM 60
37 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
38 #define NETXEN_ADDR_ERROR (0xffffffff)
39
40 #define crb_addr_transform(name) \
41 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
42 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
43
44 #define NETXEN_NIC_XDMA_RESET 0x8000ff
45
46 static void
47 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
48 struct nx_host_rds_ring *rds_ring);
49
50 static void crb_addr_transform_setup(void)
51 {
52 crb_addr_transform(XDMA);
53 crb_addr_transform(TIMR);
54 crb_addr_transform(SRE);
55 crb_addr_transform(SQN3);
56 crb_addr_transform(SQN2);
57 crb_addr_transform(SQN1);
58 crb_addr_transform(SQN0);
59 crb_addr_transform(SQS3);
60 crb_addr_transform(SQS2);
61 crb_addr_transform(SQS1);
62 crb_addr_transform(SQS0);
63 crb_addr_transform(RPMX7);
64 crb_addr_transform(RPMX6);
65 crb_addr_transform(RPMX5);
66 crb_addr_transform(RPMX4);
67 crb_addr_transform(RPMX3);
68 crb_addr_transform(RPMX2);
69 crb_addr_transform(RPMX1);
70 crb_addr_transform(RPMX0);
71 crb_addr_transform(ROMUSB);
72 crb_addr_transform(SN);
73 crb_addr_transform(QMN);
74 crb_addr_transform(QMS);
75 crb_addr_transform(PGNI);
76 crb_addr_transform(PGND);
77 crb_addr_transform(PGN3);
78 crb_addr_transform(PGN2);
79 crb_addr_transform(PGN1);
80 crb_addr_transform(PGN0);
81 crb_addr_transform(PGSI);
82 crb_addr_transform(PGSD);
83 crb_addr_transform(PGS3);
84 crb_addr_transform(PGS2);
85 crb_addr_transform(PGS1);
86 crb_addr_transform(PGS0);
87 crb_addr_transform(PS);
88 crb_addr_transform(PH);
89 crb_addr_transform(NIU);
90 crb_addr_transform(I2Q);
91 crb_addr_transform(EG);
92 crb_addr_transform(MN);
93 crb_addr_transform(MS);
94 crb_addr_transform(CAS2);
95 crb_addr_transform(CAS1);
96 crb_addr_transform(CAS0);
97 crb_addr_transform(CAM);
98 crb_addr_transform(C2C1);
99 crb_addr_transform(C2C0);
100 crb_addr_transform(SMB);
101 crb_addr_transform(OCM0);
102 crb_addr_transform(I2C0);
103 }
104
105 void netxen_release_rx_buffers(struct netxen_adapter *adapter)
106 {
107 struct netxen_recv_context *recv_ctx;
108 struct nx_host_rds_ring *rds_ring;
109 struct netxen_rx_buffer *rx_buf;
110 int i, ring;
111
112 recv_ctx = &adapter->recv_ctx;
113 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
114 rds_ring = &recv_ctx->rds_rings[ring];
115 for (i = 0; i < rds_ring->num_desc; ++i) {
116 rx_buf = &(rds_ring->rx_buf_arr[i]);
117 if (rx_buf->state == NETXEN_BUFFER_FREE)
118 continue;
119 pci_unmap_single(adapter->pdev,
120 rx_buf->dma,
121 rds_ring->dma_size,
122 PCI_DMA_FROMDEVICE);
123 if (rx_buf->skb != NULL)
124 dev_kfree_skb_any(rx_buf->skb);
125 }
126 }
127 }
128
129 void netxen_release_tx_buffers(struct netxen_adapter *adapter)
130 {
131 struct netxen_cmd_buffer *cmd_buf;
132 struct netxen_skb_frag *buffrag;
133 int i, j;
134 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
135
136 cmd_buf = tx_ring->cmd_buf_arr;
137 for (i = 0; i < tx_ring->num_desc; i++) {
138 buffrag = cmd_buf->frag_array;
139 if (buffrag->dma) {
140 pci_unmap_single(adapter->pdev, buffrag->dma,
141 buffrag->length, PCI_DMA_TODEVICE);
142 buffrag->dma = 0ULL;
143 }
144 for (j = 0; j < cmd_buf->frag_count; j++) {
145 buffrag++;
146 if (buffrag->dma) {
147 pci_unmap_page(adapter->pdev, buffrag->dma,
148 buffrag->length,
149 PCI_DMA_TODEVICE);
150 buffrag->dma = 0ULL;
151 }
152 }
153 if (cmd_buf->skb) {
154 dev_kfree_skb_any(cmd_buf->skb);
155 cmd_buf->skb = NULL;
156 }
157 cmd_buf++;
158 }
159 }
160
161 void netxen_free_sw_resources(struct netxen_adapter *adapter)
162 {
163 struct netxen_recv_context *recv_ctx;
164 struct nx_host_rds_ring *rds_ring;
165 struct nx_host_tx_ring *tx_ring;
166 int ring;
167
168 recv_ctx = &adapter->recv_ctx;
169
170 if (recv_ctx->rds_rings == NULL)
171 goto skip_rds;
172
173 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
174 rds_ring = &recv_ctx->rds_rings[ring];
175 vfree(rds_ring->rx_buf_arr);
176 rds_ring->rx_buf_arr = NULL;
177 }
178 kfree(recv_ctx->rds_rings);
179
180 skip_rds:
181 if (adapter->tx_ring == NULL)
182 return;
183
184 tx_ring = adapter->tx_ring;
185 vfree(tx_ring->cmd_buf_arr);
186 }
187
188 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
189 {
190 struct netxen_recv_context *recv_ctx;
191 struct nx_host_rds_ring *rds_ring;
192 struct nx_host_sds_ring *sds_ring;
193 struct nx_host_tx_ring *tx_ring;
194 struct netxen_rx_buffer *rx_buf;
195 int ring, i, size;
196
197 struct netxen_cmd_buffer *cmd_buf_arr;
198 struct net_device *netdev = adapter->netdev;
199 struct pci_dev *pdev = adapter->pdev;
200
201 size = sizeof(struct nx_host_tx_ring);
202 tx_ring = kzalloc(size, GFP_KERNEL);
203 if (tx_ring == NULL) {
204 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
205 netdev->name);
206 return -ENOMEM;
207 }
208 adapter->tx_ring = tx_ring;
209
210 tx_ring->num_desc = adapter->num_txd;
211 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
212
213 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
214 if (cmd_buf_arr == NULL) {
215 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
216 netdev->name);
217 return -ENOMEM;
218 }
219 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
220 tx_ring->cmd_buf_arr = cmd_buf_arr;
221
222 recv_ctx = &adapter->recv_ctx;
223
224 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
225 rds_ring = kzalloc(size, GFP_KERNEL);
226 if (rds_ring == NULL) {
227 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
228 netdev->name);
229 return -ENOMEM;
230 }
231 recv_ctx->rds_rings = rds_ring;
232
233 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
234 rds_ring = &recv_ctx->rds_rings[ring];
235 switch (ring) {
236 case RCV_RING_NORMAL:
237 rds_ring->num_desc = adapter->num_rxd;
238 if (adapter->ahw.cut_through) {
239 rds_ring->dma_size =
240 NX_CT_DEFAULT_RX_BUF_LEN;
241 rds_ring->skb_size =
242 NX_CT_DEFAULT_RX_BUF_LEN;
243 } else {
244 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
245 rds_ring->dma_size =
246 NX_P3_RX_BUF_MAX_LEN;
247 else
248 rds_ring->dma_size =
249 NX_P2_RX_BUF_MAX_LEN;
250 rds_ring->skb_size =
251 rds_ring->dma_size + NET_IP_ALIGN;
252 }
253 break;
254
255 case RCV_RING_JUMBO:
256 rds_ring->num_desc = adapter->num_jumbo_rxd;
257 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
258 rds_ring->dma_size =
259 NX_P3_RX_JUMBO_BUF_MAX_LEN;
260 else
261 rds_ring->dma_size =
262 NX_P2_RX_JUMBO_BUF_MAX_LEN;
263
264 if (adapter->capabilities & NX_CAP0_HW_LRO)
265 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA;
266
267 rds_ring->skb_size =
268 rds_ring->dma_size + NET_IP_ALIGN;
269 break;
270
271 case RCV_RING_LRO:
272 rds_ring->num_desc = adapter->num_lro_rxd;
273 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
274 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
275 break;
276
277 }
278 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
279 vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
280 if (rds_ring->rx_buf_arr == NULL) {
281 printk(KERN_ERR "%s: Failed to allocate "
282 "rx buffer ring %d\n",
283 netdev->name, ring);
284 /* free whatever was already allocated */
285 goto err_out;
286 }
287 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
288 INIT_LIST_HEAD(&rds_ring->free_list);
289 /*
290 * Now go through all of them, set reference handles
291 * and put them in the queues.
292 */
293 rx_buf = rds_ring->rx_buf_arr;
294 for (i = 0; i < rds_ring->num_desc; i++) {
295 list_add_tail(&rx_buf->list,
296 &rds_ring->free_list);
297 rx_buf->ref_handle = i;
298 rx_buf->state = NETXEN_BUFFER_FREE;
299 rx_buf++;
300 }
301 spin_lock_init(&rds_ring->lock);
302 }
303
304 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
305 sds_ring = &recv_ctx->sds_rings[ring];
306 sds_ring->irq = adapter->msix_entries[ring].vector;
307 sds_ring->adapter = adapter;
308 sds_ring->num_desc = adapter->num_rxd;
309
310 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
311 INIT_LIST_HEAD(&sds_ring->free_list[i]);
312 }
313
314 return 0;
315
316 err_out:
317 netxen_free_sw_resources(adapter);
318 return -ENOMEM;
319 }
320
321 /*
322 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
323 * address to external PCI CRB address.
324 */
325 static u32 netxen_decode_crb_addr(u32 addr)
326 {
327 int i;
328 u32 base_addr, offset, pci_base;
329
330 crb_addr_transform_setup();
331
332 pci_base = NETXEN_ADDR_ERROR;
333 base_addr = addr & 0xfff00000;
334 offset = addr & 0x000fffff;
335
336 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
337 if (crb_addr_xform[i] == base_addr) {
338 pci_base = i << 20;
339 break;
340 }
341 }
342 if (pci_base == NETXEN_ADDR_ERROR)
343 return pci_base;
344 else
345 return (pci_base + offset);
346 }
347
348 #define NETXEN_MAX_ROM_WAIT_USEC 100
349
350 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
351 {
352 long timeout = 0;
353 long done = 0;
354
355 cond_resched();
356
357 while (done == 0) {
358 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
359 done &= 2;
360 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) {
361 dev_err(&adapter->pdev->dev,
362 "Timeout reached waiting for rom done");
363 return -EIO;
364 }
365 udelay(1);
366 }
367 return 0;
368 }
369
370 static int do_rom_fast_read(struct netxen_adapter *adapter,
371 int addr, int *valp)
372 {
373 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
374 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
375 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
376 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
377 if (netxen_wait_rom_done(adapter)) {
378 printk("Error waiting for rom done\n");
379 return -EIO;
380 }
381 /* reset abyte_cnt and dummy_byte_cnt */
382 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
383 udelay(10);
384 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
385
386 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
387 return 0;
388 }
389
390 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
391 u8 *bytes, size_t size)
392 {
393 int addridx;
394 int ret = 0;
395
396 for (addridx = addr; addridx < (addr + size); addridx += 4) {
397 int v;
398 ret = do_rom_fast_read(adapter, addridx, &v);
399 if (ret != 0)
400 break;
401 *(__le32 *)bytes = cpu_to_le32(v);
402 bytes += 4;
403 }
404
405 return ret;
406 }
407
408 int
409 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
410 u8 *bytes, size_t size)
411 {
412 int ret;
413
414 ret = netxen_rom_lock(adapter);
415 if (ret < 0)
416 return ret;
417
418 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
419
420 netxen_rom_unlock(adapter);
421 return ret;
422 }
423
424 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
425 {
426 int ret;
427
428 if (netxen_rom_lock(adapter) != 0)
429 return -EIO;
430
431 ret = do_rom_fast_read(adapter, addr, valp);
432 netxen_rom_unlock(adapter);
433 return ret;
434 }
435
436 #define NETXEN_BOARDTYPE 0x4008
437 #define NETXEN_BOARDNUM 0x400c
438 #define NETXEN_CHIPNUM 0x4010
439
440 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
441 {
442 int addr, val;
443 int i, n, init_delay = 0;
444 struct crb_addr_pair *buf;
445 unsigned offset;
446 u32 off;
447
448 /* resetall */
449 netxen_rom_lock(adapter);
450 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
451 netxen_rom_unlock(adapter);
452
453 if (verbose) {
454 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
455 printk("P2 ROM board type: 0x%08x\n", val);
456 else
457 printk("Could not read board type\n");
458 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
459 printk("P2 ROM board num: 0x%08x\n", val);
460 else
461 printk("Could not read board number\n");
462 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
463 printk("P2 ROM chip num: 0x%08x\n", val);
464 else
465 printk("Could not read chip number\n");
466 }
467
468 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
469 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
470 (n != 0xcafecafe) ||
471 netxen_rom_fast_read(adapter, 4, &n) != 0) {
472 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
473 "n: %08x\n", netxen_nic_driver_name, n);
474 return -EIO;
475 }
476 offset = n & 0xffffU;
477 n = (n >> 16) & 0xffffU;
478 } else {
479 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
480 !(n & 0x80000000)) {
481 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
482 "n: %08x\n", netxen_nic_driver_name, n);
483 return -EIO;
484 }
485 offset = 1;
486 n &= ~0x80000000;
487 }
488
489 if (n < 1024) {
490 if (verbose)
491 printk(KERN_DEBUG "%s: %d CRB init values found"
492 " in ROM.\n", netxen_nic_driver_name, n);
493 } else {
494 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
495 " initialized.\n", __func__, n);
496 return -EIO;
497 }
498
499 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
500 if (buf == NULL) {
501 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
502 netxen_nic_driver_name);
503 return -ENOMEM;
504 }
505 for (i = 0; i < n; i++) {
506 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
507 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
508 kfree(buf);
509 return -EIO;
510 }
511
512 buf[i].addr = addr;
513 buf[i].data = val;
514
515 if (verbose)
516 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
517 netxen_nic_driver_name,
518 (u32)netxen_decode_crb_addr(addr), val);
519 }
520 for (i = 0; i < n; i++) {
521
522 off = netxen_decode_crb_addr(buf[i].addr);
523 if (off == NETXEN_ADDR_ERROR) {
524 printk(KERN_ERR"CRB init value out of range %x\n",
525 buf[i].addr);
526 continue;
527 }
528 off += NETXEN_PCI_CRBSPACE;
529 /* skipping cold reboot MAGIC */
530 if (off == NETXEN_CAM_RAM(0x1fc))
531 continue;
532
533 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
534 /* do not reset PCI */
535 if (off == (ROMUSB_GLB + 0xbc))
536 continue;
537 if (off == (ROMUSB_GLB + 0xa8))
538 continue;
539 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
540 continue;
541 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
542 continue;
543 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
544 continue;
545 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
546 buf[i].data = 0x1020;
547 /* skip the function enable register */
548 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
549 continue;
550 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
551 continue;
552 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
553 continue;
554 }
555
556 if (off == NETXEN_ADDR_ERROR) {
557 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
558 netxen_nic_driver_name, buf[i].addr);
559 continue;
560 }
561
562 init_delay = 1;
563 /* After writing this register, HW needs time for CRB */
564 /* to quiet down (else crb_window returns 0xffffffff) */
565 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
566 init_delay = 1000;
567 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
568 /* hold xdma in reset also */
569 buf[i].data = NETXEN_NIC_XDMA_RESET;
570 buf[i].data = 0x8000ff;
571 }
572 }
573
574 NXWR32(adapter, off, buf[i].data);
575
576 msleep(init_delay);
577 }
578 kfree(buf);
579
580 /* disable_peg_cache_all */
581
582 /* unreset_net_cache */
583 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
584 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
585 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
586 }
587
588 /* p2dn replyCount */
589 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
590 /* disable_peg_cache 0 */
591 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
592 /* disable_peg_cache 1 */
593 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
594
595 /* peg_clr_all */
596
597 /* peg_clr 0 */
598 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
599 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
600 /* peg_clr 1 */
601 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
602 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
603 /* peg_clr 2 */
604 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
605 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
606 /* peg_clr 3 */
607 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
608 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
609 return 0;
610 }
611
612 int
613 netxen_need_fw_reset(struct netxen_adapter *adapter)
614 {
615 u32 count, old_count;
616 u32 val, version, major, minor, build;
617 int i, timeout;
618 u8 fw_type;
619
620 /* NX2031 firmware doesn't support heartbit */
621 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
622 return 1;
623
624 /* last attempt had failed */
625 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
626 return 1;
627
628 old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
629
630 for (i = 0; i < 10; i++) {
631
632 timeout = msleep_interruptible(200);
633 if (timeout) {
634 NXWR32(adapter, CRB_CMDPEG_STATE,
635 PHAN_INITIALIZE_FAILED);
636 return -EINTR;
637 }
638
639 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
640 if (count != old_count)
641 break;
642 }
643
644 /* firmware is dead */
645 if (count == old_count)
646 return 1;
647
648 /* check if we have got newer or different file firmware */
649 if (adapter->fw) {
650
651 const struct firmware *fw = adapter->fw;
652
653 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
654 version = NETXEN_DECODE_VERSION(val);
655
656 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
657 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
658 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
659
660 if (version > NETXEN_VERSION_CODE(major, minor, build))
661 return 1;
662
663 if (version == NETXEN_VERSION_CODE(major, minor, build)) {
664
665 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
666 fw_type = (val & 0x4) ?
667 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
668
669 if (adapter->fw_type != fw_type)
670 return 1;
671 }
672 }
673
674 return 0;
675 }
676
677 static char *fw_name[] = {
678 "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin", "flash",
679 };
680
681 int
682 netxen_load_firmware(struct netxen_adapter *adapter)
683 {
684 u64 *ptr64;
685 u32 i, flashaddr, size;
686 const struct firmware *fw = adapter->fw;
687 struct pci_dev *pdev = adapter->pdev;
688
689 dev_info(&pdev->dev, "loading firmware from %s\n",
690 fw_name[adapter->fw_type]);
691
692 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
693 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
694
695 if (fw) {
696 __le64 data;
697
698 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
699
700 ptr64 = (u64 *)&fw->data[NETXEN_BOOTLD_START];
701 flashaddr = NETXEN_BOOTLD_START;
702
703 for (i = 0; i < size; i++) {
704 data = cpu_to_le64(ptr64[i]);
705 adapter->pci_mem_write(adapter, flashaddr, &data, 8);
706 flashaddr += 8;
707 }
708
709 size = *(u32 *)&fw->data[NX_FW_SIZE_OFFSET];
710 size = (__force u32)cpu_to_le32(size) / 8;
711
712 ptr64 = (u64 *)&fw->data[NETXEN_IMAGE_START];
713 flashaddr = NETXEN_IMAGE_START;
714
715 for (i = 0; i < size; i++) {
716 data = cpu_to_le64(ptr64[i]);
717
718 if (adapter->pci_mem_write(adapter,
719 flashaddr, &data, 8))
720 return -EIO;
721
722 flashaddr += 8;
723 }
724 } else {
725 u64 data;
726 u32 hi, lo;
727
728 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
729 flashaddr = NETXEN_BOOTLD_START;
730
731 for (i = 0; i < size; i++) {
732 if (netxen_rom_fast_read(adapter,
733 flashaddr, &lo) != 0)
734 return -EIO;
735 if (netxen_rom_fast_read(adapter,
736 flashaddr + 4, &hi) != 0)
737 return -EIO;
738
739 /* hi, lo are already in host endian byteorder */
740 data = (((u64)hi << 32) | lo);
741
742 if (adapter->pci_mem_write(adapter,
743 flashaddr, &data, 8))
744 return -EIO;
745
746 flashaddr += 8;
747 }
748 }
749 msleep(1);
750
751 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
752 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
753 else {
754 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
755 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
756 }
757
758 return 0;
759 }
760
761 static int
762 netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname)
763 {
764 __le32 val;
765 u32 ver, min_ver, bios;
766 struct pci_dev *pdev = adapter->pdev;
767 const struct firmware *fw = adapter->fw;
768
769 if (fw->size < NX_FW_MIN_SIZE)
770 return -EINVAL;
771
772 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
773 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
774 return -EINVAL;
775
776 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
777
778 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
779 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
780 else
781 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
782
783 ver = NETXEN_DECODE_VERSION(val);
784
785 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
786 dev_err(&pdev->dev,
787 "%s: firmware version %d.%d.%d unsupported\n",
788 fwname, _major(ver), _minor(ver), _build(ver));
789 return -EINVAL;
790 }
791
792 val = cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
793 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
794 if ((__force u32)val != bios) {
795 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
796 fwname);
797 return -EINVAL;
798 }
799
800 /* check if flashed firmware is newer */
801 if (netxen_rom_fast_read(adapter,
802 NX_FW_VERSION_OFFSET, (int *)&val))
803 return -EIO;
804 val = NETXEN_DECODE_VERSION(val);
805 if (val > ver) {
806 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
807 fwname);
808 return -EINVAL;
809 }
810
811 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
812 return 0;
813 }
814
815 static int
816 netxen_p3_has_mn(struct netxen_adapter *adapter)
817 {
818 u32 capability, flashed_ver;
819 capability = 0;
820
821 netxen_rom_fast_read(adapter,
822 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
823 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
824
825 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
826
827 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
828 if (capability & NX_PEG_TUNE_MN_PRESENT)
829 return 1;
830 }
831 return 0;
832 }
833
834 void netxen_request_firmware(struct netxen_adapter *adapter)
835 {
836 u8 fw_type;
837 struct pci_dev *pdev = adapter->pdev;
838 int rc = 0;
839
840 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
841 fw_type = NX_P2_MN_ROMIMAGE;
842 goto request_fw;
843 }
844
845 fw_type = netxen_p3_has_mn(adapter) ?
846 NX_P3_MN_ROMIMAGE : NX_P3_CT_ROMIMAGE;
847
848 request_fw:
849 rc = request_firmware(&adapter->fw, fw_name[fw_type], &pdev->dev);
850 if (rc != 0) {
851 if (fw_type == NX_P3_MN_ROMIMAGE) {
852 msleep(1);
853 fw_type = NX_P3_CT_ROMIMAGE;
854 goto request_fw;
855 }
856
857 fw_type = NX_FLASH_ROMIMAGE;
858 adapter->fw = NULL;
859 goto done;
860 }
861
862 rc = netxen_validate_firmware(adapter, fw_name[fw_type]);
863 if (rc != 0) {
864 release_firmware(adapter->fw);
865
866 if (fw_type == NX_P3_MN_ROMIMAGE) {
867 msleep(1);
868 fw_type = NX_P3_CT_ROMIMAGE;
869 goto request_fw;
870 }
871
872 fw_type = NX_FLASH_ROMIMAGE;
873 adapter->fw = NULL;
874 goto done;
875 }
876
877 done:
878 adapter->fw_type = fw_type;
879 }
880
881
882 void
883 netxen_release_firmware(struct netxen_adapter *adapter)
884 {
885 if (adapter->fw)
886 release_firmware(adapter->fw);
887 adapter->fw = NULL;
888 }
889
890 int netxen_init_dummy_dma(struct netxen_adapter *adapter)
891 {
892 u64 addr;
893 u32 hi, lo;
894
895 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
896 return 0;
897
898 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev,
899 NETXEN_HOST_DUMMY_DMA_SIZE,
900 &adapter->dummy_dma.phys_addr);
901 if (adapter->dummy_dma.addr == NULL) {
902 dev_err(&adapter->pdev->dev,
903 "ERROR: Could not allocate dummy DMA memory\n");
904 return -ENOMEM;
905 }
906
907 addr = (uint64_t) adapter->dummy_dma.phys_addr;
908 hi = (addr >> 32) & 0xffffffff;
909 lo = addr & 0xffffffff;
910
911 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
912 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
913
914 return 0;
915 }
916
917 /*
918 * NetXen DMA watchdog control:
919 *
920 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive
921 * Bit 1 : disable_request => 1 req disable dma watchdog
922 * Bit 2 : enable_request => 1 req enable dma watchdog
923 * Bit 3-31 : unused
924 */
925 void netxen_free_dummy_dma(struct netxen_adapter *adapter)
926 {
927 int i = 100;
928 u32 ctrl;
929
930 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
931 return;
932
933 if (!adapter->dummy_dma.addr)
934 return;
935
936 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
937 if ((ctrl & 0x1) != 0) {
938 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
939
940 while ((ctrl & 0x1) != 0) {
941
942 msleep(50);
943
944 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
945
946 if (--i == 0)
947 break;
948 };
949 }
950
951 if (i) {
952 pci_free_consistent(adapter->pdev,
953 NETXEN_HOST_DUMMY_DMA_SIZE,
954 adapter->dummy_dma.addr,
955 adapter->dummy_dma.phys_addr);
956 adapter->dummy_dma.addr = NULL;
957 } else
958 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
959 }
960
961 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
962 {
963 u32 val = 0;
964 int retries = 60;
965
966 if (pegtune_val)
967 return 0;
968
969 do {
970 val = NXRD32(adapter, CRB_CMDPEG_STATE);
971
972 switch (val) {
973 case PHAN_INITIALIZE_COMPLETE:
974 case PHAN_INITIALIZE_ACK:
975 return 0;
976 case PHAN_INITIALIZE_FAILED:
977 goto out_err;
978 default:
979 break;
980 }
981
982 msleep(500);
983
984 } while (--retries);
985
986 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
987
988 out_err:
989 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
990 return -EIO;
991 }
992
993 static int
994 netxen_receive_peg_ready(struct netxen_adapter *adapter)
995 {
996 u32 val = 0;
997 int retries = 2000;
998
999 do {
1000 val = NXRD32(adapter, CRB_RCVPEG_STATE);
1001
1002 if (val == PHAN_PEG_RCV_INITIALIZED)
1003 return 0;
1004
1005 msleep(10);
1006
1007 } while (--retries);
1008
1009 if (!retries) {
1010 printk(KERN_ERR "Receive Peg initialization not "
1011 "complete, state: 0x%x.\n", val);
1012 return -EIO;
1013 }
1014
1015 return 0;
1016 }
1017
1018 int netxen_init_firmware(struct netxen_adapter *adapter)
1019 {
1020 int err;
1021
1022 err = netxen_receive_peg_ready(adapter);
1023 if (err)
1024 return err;
1025
1026 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1027 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1028 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1029 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1030
1031 return err;
1032 }
1033
1034 static void
1035 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1036 {
1037 u32 cable_OUI;
1038 u16 cable_len;
1039 u16 link_speed;
1040 u8 link_status, module, duplex, autoneg;
1041 struct net_device *netdev = adapter->netdev;
1042
1043 adapter->has_link_events = 1;
1044
1045 cable_OUI = msg->body[1] & 0xffffffff;
1046 cable_len = (msg->body[1] >> 32) & 0xffff;
1047 link_speed = (msg->body[1] >> 48) & 0xffff;
1048
1049 link_status = msg->body[2] & 0xff;
1050 duplex = (msg->body[2] >> 16) & 0xff;
1051 autoneg = (msg->body[2] >> 24) & 0xff;
1052
1053 module = (msg->body[2] >> 8) & 0xff;
1054 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1055 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1056 netdev->name, cable_OUI, cable_len);
1057 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1058 printk(KERN_INFO "%s: unsupported cable length %d\n",
1059 netdev->name, cable_len);
1060 }
1061
1062 netxen_advert_link_change(adapter, link_status);
1063
1064 /* update link parameters */
1065 if (duplex == LINKEVENT_FULL_DUPLEX)
1066 adapter->link_duplex = DUPLEX_FULL;
1067 else
1068 adapter->link_duplex = DUPLEX_HALF;
1069 adapter->module_type = module;
1070 adapter->link_autoneg = autoneg;
1071 adapter->link_speed = link_speed;
1072 }
1073
1074 static void
1075 netxen_handle_fw_message(int desc_cnt, int index,
1076 struct nx_host_sds_ring *sds_ring)
1077 {
1078 nx_fw_msg_t msg;
1079 struct status_desc *desc;
1080 int i = 0, opcode;
1081
1082 while (desc_cnt > 0 && i < 8) {
1083 desc = &sds_ring->desc_head[index];
1084 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1085 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1086
1087 index = get_next_index(index, sds_ring->num_desc);
1088 desc_cnt--;
1089 }
1090
1091 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1092 switch (opcode) {
1093 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1094 netxen_handle_linkevent(sds_ring->adapter, &msg);
1095 break;
1096 default:
1097 break;
1098 }
1099 }
1100
1101 static int
1102 netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1103 struct nx_host_rds_ring *rds_ring,
1104 struct netxen_rx_buffer *buffer)
1105 {
1106 struct sk_buff *skb;
1107 dma_addr_t dma;
1108 struct pci_dev *pdev = adapter->pdev;
1109
1110 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1111 if (!buffer->skb)
1112 return 1;
1113
1114 skb = buffer->skb;
1115
1116 if (!adapter->ahw.cut_through)
1117 skb_reserve(skb, 2);
1118
1119 dma = pci_map_single(pdev, skb->data,
1120 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1121
1122 if (pci_dma_mapping_error(pdev, dma)) {
1123 dev_kfree_skb_any(skb);
1124 buffer->skb = NULL;
1125 return 1;
1126 }
1127
1128 buffer->skb = skb;
1129 buffer->dma = dma;
1130 buffer->state = NETXEN_BUFFER_BUSY;
1131
1132 return 0;
1133 }
1134
1135 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1136 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1137 {
1138 struct netxen_rx_buffer *buffer;
1139 struct sk_buff *skb;
1140
1141 buffer = &rds_ring->rx_buf_arr[index];
1142
1143 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1144 PCI_DMA_FROMDEVICE);
1145
1146 skb = buffer->skb;
1147 if (!skb)
1148 goto no_skb;
1149
1150 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1151 adapter->stats.csummed++;
1152 skb->ip_summed = CHECKSUM_UNNECESSARY;
1153 } else
1154 skb->ip_summed = CHECKSUM_NONE;
1155
1156 skb->dev = adapter->netdev;
1157
1158 buffer->skb = NULL;
1159 no_skb:
1160 buffer->state = NETXEN_BUFFER_FREE;
1161 return skb;
1162 }
1163
1164 static struct netxen_rx_buffer *
1165 netxen_process_rcv(struct netxen_adapter *adapter,
1166 struct nx_host_sds_ring *sds_ring,
1167 int ring, u64 sts_data0)
1168 {
1169 struct net_device *netdev = adapter->netdev;
1170 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1171 struct netxen_rx_buffer *buffer;
1172 struct sk_buff *skb;
1173 struct nx_host_rds_ring *rds_ring;
1174 int index, length, cksum, pkt_offset;
1175
1176 if (unlikely(ring >= adapter->max_rds_rings))
1177 return NULL;
1178
1179 rds_ring = &recv_ctx->rds_rings[ring];
1180
1181 index = netxen_get_sts_refhandle(sts_data0);
1182 if (unlikely(index >= rds_ring->num_desc))
1183 return NULL;
1184
1185 buffer = &rds_ring->rx_buf_arr[index];
1186
1187 length = netxen_get_sts_totallength(sts_data0);
1188 cksum = netxen_get_sts_status(sts_data0);
1189 pkt_offset = netxen_get_sts_pkt_offset(sts_data0);
1190
1191 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1192 if (!skb)
1193 return buffer;
1194
1195 if (length > rds_ring->skb_size)
1196 skb_put(skb, rds_ring->skb_size);
1197 else
1198 skb_put(skb, length);
1199
1200
1201 if (pkt_offset)
1202 skb_pull(skb, pkt_offset);
1203
1204 skb->truesize = skb->len + sizeof(struct sk_buff);
1205 skb->protocol = eth_type_trans(skb, netdev);
1206
1207 napi_gro_receive(&sds_ring->napi, skb);
1208
1209 adapter->stats.rx_pkts++;
1210 adapter->stats.rxbytes += length;
1211
1212 return buffer;
1213 }
1214
1215 #define TCP_HDR_SIZE 20
1216 #define TCP_TS_OPTION_SIZE 12
1217 #define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE)
1218
1219 static struct netxen_rx_buffer *
1220 netxen_process_lro(struct netxen_adapter *adapter,
1221 struct nx_host_sds_ring *sds_ring,
1222 int ring, u64 sts_data0, u64 sts_data1)
1223 {
1224 struct net_device *netdev = adapter->netdev;
1225 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1226 struct netxen_rx_buffer *buffer;
1227 struct sk_buff *skb;
1228 struct nx_host_rds_ring *rds_ring;
1229 struct iphdr *iph;
1230 struct tcphdr *th;
1231 bool push, timestamp;
1232 int l2_hdr_offset, l4_hdr_offset;
1233 int index;
1234 u16 lro_length, length, data_offset;
1235 u32 seq_number;
1236
1237 if (unlikely(ring > adapter->max_rds_rings))
1238 return NULL;
1239
1240 rds_ring = &recv_ctx->rds_rings[ring];
1241
1242 index = netxen_get_lro_sts_refhandle(sts_data0);
1243 if (unlikely(index > rds_ring->num_desc))
1244 return NULL;
1245
1246 buffer = &rds_ring->rx_buf_arr[index];
1247
1248 timestamp = netxen_get_lro_sts_timestamp(sts_data0);
1249 lro_length = netxen_get_lro_sts_length(sts_data0);
1250 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0);
1251 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0);
1252 push = netxen_get_lro_sts_push_flag(sts_data0);
1253 seq_number = netxen_get_lro_sts_seq_number(sts_data1);
1254
1255 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1256 if (!skb)
1257 return buffer;
1258
1259 if (timestamp)
1260 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE;
1261 else
1262 data_offset = l4_hdr_offset + TCP_HDR_SIZE;
1263
1264 skb_put(skb, lro_length + data_offset);
1265
1266 skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb);
1267
1268 skb_pull(skb, l2_hdr_offset);
1269 skb->protocol = eth_type_trans(skb, netdev);
1270
1271 iph = (struct iphdr *)skb->data;
1272 th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
1273
1274 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1275 iph->tot_len = htons(length);
1276 iph->check = 0;
1277 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
1278 th->psh = push;
1279 th->seq = htonl(seq_number);
1280
1281 length = skb->len;
1282
1283 netif_receive_skb(skb);
1284
1285 adapter->stats.lro_pkts++;
1286 adapter->stats.rxbytes += length;
1287
1288 return buffer;
1289 }
1290
1291 #define netxen_merge_rx_buffers(list, head) \
1292 do { list_splice_tail_init(list, head); } while (0);
1293
1294 int
1295 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
1296 {
1297 struct netxen_adapter *adapter = sds_ring->adapter;
1298
1299 struct list_head *cur;
1300
1301 struct status_desc *desc;
1302 struct netxen_rx_buffer *rxbuf;
1303
1304 u32 consumer = sds_ring->consumer;
1305
1306 int count = 0;
1307 u64 sts_data0, sts_data1;
1308 int opcode, ring = 0, desc_cnt;
1309
1310 while (count < max) {
1311 desc = &sds_ring->desc_head[consumer];
1312 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
1313
1314 if (!(sts_data0 & STATUS_OWNER_HOST))
1315 break;
1316
1317 desc_cnt = netxen_get_sts_desc_cnt(sts_data0);
1318
1319 opcode = netxen_get_sts_opcode(sts_data0);
1320
1321 switch (opcode) {
1322 case NETXEN_NIC_RXPKT_DESC:
1323 case NETXEN_OLD_RXPKT_DESC:
1324 case NETXEN_NIC_SYN_OFFLOAD:
1325 ring = netxen_get_sts_type(sts_data0);
1326 rxbuf = netxen_process_rcv(adapter, sds_ring,
1327 ring, sts_data0);
1328 break;
1329 case NETXEN_NIC_LRO_DESC:
1330 ring = netxen_get_lro_sts_type(sts_data0);
1331 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1332 rxbuf = netxen_process_lro(adapter, sds_ring,
1333 ring, sts_data0, sts_data1);
1334 break;
1335 case NETXEN_NIC_RESPONSE_DESC:
1336 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1337 default:
1338 goto skip;
1339 }
1340
1341 WARN_ON(desc_cnt > 1);
1342
1343 if (rxbuf)
1344 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1345
1346 skip:
1347 for (; desc_cnt > 0; desc_cnt--) {
1348 desc = &sds_ring->desc_head[consumer];
1349 desc->status_desc_data[0] =
1350 cpu_to_le64(STATUS_OWNER_PHANTOM);
1351 consumer = get_next_index(consumer, sds_ring->num_desc);
1352 }
1353 count++;
1354 }
1355
1356 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1357 struct nx_host_rds_ring *rds_ring =
1358 &adapter->recv_ctx.rds_rings[ring];
1359
1360 if (!list_empty(&sds_ring->free_list[ring])) {
1361 list_for_each(cur, &sds_ring->free_list[ring]) {
1362 rxbuf = list_entry(cur,
1363 struct netxen_rx_buffer, list);
1364 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1365 }
1366 spin_lock(&rds_ring->lock);
1367 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1368 &rds_ring->free_list);
1369 spin_unlock(&rds_ring->lock);
1370 }
1371
1372 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1373 }
1374
1375 if (count) {
1376 sds_ring->consumer = consumer;
1377 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer);
1378 }
1379
1380 return count;
1381 }
1382
1383 /* Process Command status ring */
1384 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1385 {
1386 u32 sw_consumer, hw_consumer;
1387 int count = 0, i;
1388 struct netxen_cmd_buffer *buffer;
1389 struct pci_dev *pdev = adapter->pdev;
1390 struct net_device *netdev = adapter->netdev;
1391 struct netxen_skb_frag *frag;
1392 int done = 0;
1393 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1394
1395 if (!spin_trylock(&adapter->tx_clean_lock))
1396 return 1;
1397
1398 sw_consumer = tx_ring->sw_consumer;
1399 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1400
1401 while (sw_consumer != hw_consumer) {
1402 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1403 if (buffer->skb) {
1404 frag = &buffer->frag_array[0];
1405 pci_unmap_single(pdev, frag->dma, frag->length,
1406 PCI_DMA_TODEVICE);
1407 frag->dma = 0ULL;
1408 for (i = 1; i < buffer->frag_count; i++) {
1409 frag++; /* Get the next frag */
1410 pci_unmap_page(pdev, frag->dma, frag->length,
1411 PCI_DMA_TODEVICE);
1412 frag->dma = 0ULL;
1413 }
1414
1415 adapter->stats.xmitfinished++;
1416 dev_kfree_skb_any(buffer->skb);
1417 buffer->skb = NULL;
1418 }
1419
1420 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1421 if (++count >= MAX_STATUS_HANDLE)
1422 break;
1423 }
1424
1425 if (count && netif_running(netdev)) {
1426 tx_ring->sw_consumer = sw_consumer;
1427
1428 smp_mb();
1429
1430 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) {
1431 __netif_tx_lock(tx_ring->txq, smp_processor_id());
1432 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH) {
1433 netif_wake_queue(netdev);
1434 adapter->tx_timeo_cnt = 0;
1435 }
1436 __netif_tx_unlock(tx_ring->txq);
1437 }
1438 }
1439 /*
1440 * If everything is freed up to consumer then check if the ring is full
1441 * If the ring is full then check if more needs to be freed and
1442 * schedule the call back again.
1443 *
1444 * This happens when there are 2 CPUs. One could be freeing and the
1445 * other filling it. If the ring is full when we get out of here and
1446 * the card has already interrupted the host then the host can miss the
1447 * interrupt.
1448 *
1449 * There is still a possible race condition and the host could miss an
1450 * interrupt. The card has to take care of this.
1451 */
1452 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1453 done = (sw_consumer == hw_consumer);
1454 spin_unlock(&adapter->tx_clean_lock);
1455
1456 return (done);
1457 }
1458
1459 void
1460 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1461 struct nx_host_rds_ring *rds_ring)
1462 {
1463 struct rcv_desc *pdesc;
1464 struct netxen_rx_buffer *buffer;
1465 int producer, count = 0;
1466 netxen_ctx_msg msg = 0;
1467 struct list_head *head;
1468
1469 producer = rds_ring->producer;
1470
1471 spin_lock(&rds_ring->lock);
1472 head = &rds_ring->free_list;
1473 while (!list_empty(head)) {
1474
1475 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1476
1477 if (!buffer->skb) {
1478 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1479 break;
1480 }
1481
1482 count++;
1483 list_del(&buffer->list);
1484
1485 /* make a rcv descriptor */
1486 pdesc = &rds_ring->desc_head[producer];
1487 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1488 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1489 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1490
1491 producer = get_next_index(producer, rds_ring->num_desc);
1492 }
1493 spin_unlock(&rds_ring->lock);
1494
1495 if (count) {
1496 rds_ring->producer = producer;
1497 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1498 (producer-1) & (rds_ring->num_desc-1));
1499
1500 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1501 /*
1502 * Write a doorbell msg to tell phanmon of change in
1503 * receive ring producer
1504 * Only for firmware version < 4.0.0
1505 */
1506 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1507 netxen_set_msg_privid(msg);
1508 netxen_set_msg_count(msg,
1509 ((producer - 1) &
1510 (rds_ring->num_desc - 1)));
1511 netxen_set_msg_ctxid(msg, adapter->portnum);
1512 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1513 read_lock(&adapter->adapter_lock);
1514 writel(msg, DB_NORMALIZE(adapter,
1515 NETXEN_RCV_PRODUCER_OFFSET));
1516 read_unlock(&adapter->adapter_lock);
1517 }
1518 }
1519 }
1520
1521 static void
1522 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1523 struct nx_host_rds_ring *rds_ring)
1524 {
1525 struct rcv_desc *pdesc;
1526 struct netxen_rx_buffer *buffer;
1527 int producer, count = 0;
1528 struct list_head *head;
1529
1530 producer = rds_ring->producer;
1531 if (!spin_trylock(&rds_ring->lock))
1532 return;
1533
1534 head = &rds_ring->free_list;
1535 while (!list_empty(head)) {
1536
1537 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1538
1539 if (!buffer->skb) {
1540 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1541 break;
1542 }
1543
1544 count++;
1545 list_del(&buffer->list);
1546
1547 /* make a rcv descriptor */
1548 pdesc = &rds_ring->desc_head[producer];
1549 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1550 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1551 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1552
1553 producer = get_next_index(producer, rds_ring->num_desc);
1554 }
1555
1556 if (count) {
1557 rds_ring->producer = producer;
1558 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1559 (producer - 1) & (rds_ring->num_desc - 1));
1560 }
1561 spin_unlock(&rds_ring->lock);
1562 }
1563
1564 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1565 {
1566 memset(&adapter->stats, 0, sizeof(adapter->stats));
1567 return;
1568 }
1569
Verdex Pro support