[ARM] pxa: Gumstix Verdex PCMCIA support
[linux-2.6/verdex.git] / drivers / net / wireless / b43 / pio.h
blob7dd649c9ddadcd2a91533395da4f06e9d7fb9c03
1 #ifndef B43_PIO_H_
2 #define B43_PIO_H_
4 #include "b43.h"
6 #include <linux/interrupt.h>
7 #include <linux/io.h>
8 #include <linux/list.h>
9 #include <linux/skbuff.h>
12 /*** Registers for PIO queues up to revision 7. ***/
13 /* TX queue. */
14 #define B43_PIO_TXCTL 0x00
15 #define B43_PIO_TXCTL_WRITELO 0x0001
16 #define B43_PIO_TXCTL_WRITEHI 0x0002
17 #define B43_PIO_TXCTL_EOF 0x0004
18 #define B43_PIO_TXCTL_FREADY 0x0008
19 #define B43_PIO_TXCTL_FLUSHREQ 0x0020
20 #define B43_PIO_TXCTL_FLUSHPEND 0x0040
21 #define B43_PIO_TXCTL_SUSPREQ 0x0080
22 #define B43_PIO_TXCTL_QSUSP 0x0100
23 #define B43_PIO_TXCTL_COMMCNT 0xFC00
24 #define B43_PIO_TXCTL_COMMCNT_SHIFT 10
25 #define B43_PIO_TXDATA 0x02
26 #define B43_PIO_TXQBUFSIZE 0x04
27 /* RX queue. */
28 #define B43_PIO_RXCTL 0x00
29 #define B43_PIO_RXCTL_FRAMERDY 0x0001
30 #define B43_PIO_RXCTL_DATARDY 0x0002
31 #define B43_PIO_RXDATA 0x02
33 /*** Registers for PIO queues revision 8 and later. ***/
34 /* TX queue */
35 #define B43_PIO8_TXCTL 0x00
36 #define B43_PIO8_TXCTL_0_7 0x00000001
37 #define B43_PIO8_TXCTL_8_15 0x00000002
38 #define B43_PIO8_TXCTL_16_23 0x00000004
39 #define B43_PIO8_TXCTL_24_31 0x00000008
40 #define B43_PIO8_TXCTL_EOF 0x00000010
41 #define B43_PIO8_TXCTL_FREADY 0x00000080
42 #define B43_PIO8_TXCTL_SUSPREQ 0x00000100
43 #define B43_PIO8_TXCTL_QSUSP 0x00000200
44 #define B43_PIO8_TXCTL_FLUSHREQ 0x00000400
45 #define B43_PIO8_TXCTL_FLUSHPEND 0x00000800
46 #define B43_PIO8_TXDATA 0x04
47 /* RX queue */
48 #define B43_PIO8_RXCTL 0x00
49 #define B43_PIO8_RXCTL_FRAMERDY 0x00000001
50 #define B43_PIO8_RXCTL_DATARDY 0x00000002
51 #define B43_PIO8_RXDATA 0x04
54 /* The maximum number of TX-packets the HW can handle. */
55 #define B43_PIO_MAX_NR_TXPACKETS 32
58 #ifdef CONFIG_B43_PIO
60 struct b43_pio_txpacket {
61 /* Pointer to the TX queue we belong to. */
62 struct b43_pio_txqueue *queue;
63 /* The TX data packet. */
64 struct sk_buff *skb;
65 /* Index in the (struct b43_pio_txqueue)->packets array. */
66 u8 index;
68 struct list_head list;
71 struct b43_pio_txqueue {
72 struct b43_wldev *dev;
73 u16 mmio_base;
75 /* The device queue buffer size in bytes. */
76 u16 buffer_size;
77 /* The number of used bytes in the device queue buffer. */
78 u16 buffer_used;
79 /* The number of packets that can still get queued.
80 * This is decremented on queueing a packet and incremented
81 * after receiving the transmit status. */
82 u16 free_packet_slots;
84 /* True, if the mac80211 queue was stopped due to overflow at TX. */
85 bool stopped;
86 /* Our b43 queue index number */
87 u8 index;
88 /* The mac80211 QoS queue priority. */
89 u8 queue_prio;
91 /* Buffer for TX packet meta data. */
92 struct b43_pio_txpacket packets[B43_PIO_MAX_NR_TXPACKETS];
93 struct list_head packets_list;
95 /* Total number of transmitted packets. */
96 unsigned int nr_tx_packets;
98 /* Shortcut to the 802.11 core revision. This is to
99 * avoid horrible pointer dereferencing in the fastpaths. */
100 u8 rev;
103 struct b43_pio_rxqueue {
104 struct b43_wldev *dev;
105 u16 mmio_base;
107 /* Shortcut to the 802.11 core revision. This is to
108 * avoid horrible pointer dereferencing in the fastpaths. */
109 u8 rev;
113 static inline u16 b43_piotx_read16(struct b43_pio_txqueue *q, u16 offset)
115 return b43_read16(q->dev, q->mmio_base + offset);
118 static inline u32 b43_piotx_read32(struct b43_pio_txqueue *q, u16 offset)
120 return b43_read32(q->dev, q->mmio_base + offset);
123 static inline void b43_piotx_write16(struct b43_pio_txqueue *q,
124 u16 offset, u16 value)
126 b43_write16(q->dev, q->mmio_base + offset, value);
129 static inline void b43_piotx_write32(struct b43_pio_txqueue *q,
130 u16 offset, u32 value)
132 b43_write32(q->dev, q->mmio_base + offset, value);
136 static inline u16 b43_piorx_read16(struct b43_pio_rxqueue *q, u16 offset)
138 return b43_read16(q->dev, q->mmio_base + offset);
141 static inline u32 b43_piorx_read32(struct b43_pio_rxqueue *q, u16 offset)
143 return b43_read32(q->dev, q->mmio_base + offset);
146 static inline void b43_piorx_write16(struct b43_pio_rxqueue *q,
147 u16 offset, u16 value)
149 b43_write16(q->dev, q->mmio_base + offset, value);
152 static inline void b43_piorx_write32(struct b43_pio_rxqueue *q,
153 u16 offset, u32 value)
155 b43_write32(q->dev, q->mmio_base + offset, value);
159 int b43_pio_init(struct b43_wldev *dev);
160 void b43_pio_free(struct b43_wldev *dev);
162 int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb);
163 void b43_pio_handle_txstatus(struct b43_wldev *dev,
164 const struct b43_txstatus *status);
165 void b43_pio_get_tx_stats(struct b43_wldev *dev,
166 struct ieee80211_tx_queue_stats *stats);
167 void b43_pio_rx(struct b43_pio_rxqueue *q);
169 void b43_pio_tx_suspend(struct b43_wldev *dev);
170 void b43_pio_tx_resume(struct b43_wldev *dev);
173 #else /* CONFIG_B43_PIO */
176 static inline int b43_pio_init(struct b43_wldev *dev)
178 return 0;
180 static inline void b43_pio_free(struct b43_wldev *dev)
183 static inline void b43_pio_stop(struct b43_wldev *dev)
186 static inline int b43_pio_tx(struct b43_wldev *dev,
187 struct sk_buff *skb)
189 return 0;
191 static inline void b43_pio_handle_txstatus(struct b43_wldev *dev,
192 const struct b43_txstatus *status)
195 static inline void b43_pio_get_tx_stats(struct b43_wldev *dev,
196 struct ieee80211_tx_queue_stats *stats)
199 static inline void b43_pio_rx(struct b43_pio_rxqueue *q)
202 static inline void b43_pio_tx_suspend(struct b43_wldev *dev)
205 static inline void b43_pio_tx_resume(struct b43_wldev *dev)
209 #endif /* CONFIG_B43_PIO */
210 #endif /* B43_PIO_H_ */