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[ARM] pxa: Gumstix Verdex PCMCIA support
[linux-2.6/verdex.git] / drivers / net / wireless / rtl818x / rtl8187_dev.c
blob2017ccc001456b66fb539afd767892659f1b745b
1 /*
2 * Linux device driver for RTL8187
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9 *
10 * The driver was extended to the RTL8187B in 2008 by:
11 * Herton Ronaldo Krzesinski <herton@mandriva.com.br>
12 * Hin-Tak Leung <htl10@users.sourceforge.net>
13 * Larry Finger <Larry.Finger@lwfinger.net>
14 *
15 * Magic delays and register offsets below are taken from the original
16 * r8187 driver sources. Thanks to Realtek for their support!
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23 #include <linux/init.h>
24 #include <linux/usb.h>
25 #include <linux/delay.h>
26 #include <linux/etherdevice.h>
27 #include <linux/eeprom_93cx6.h>
28 #include <net/mac80211.h>
29
30 #include "rtl8187.h"
31 #include "rtl8187_rtl8225.h"
32 #ifdef CONFIG_RTL8187_LEDS
33 #include "rtl8187_leds.h"
34 #endif
35 #include "rtl8187_rfkill.h"
36
37 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
38 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
39 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
40 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
41 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
42 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
43 MODULE_LICENSE("GPL");
44
45 static struct usb_device_id rtl8187_table[] __devinitdata = {
46 /* Asus */
47 {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
48 /* Belkin */
49 {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
50 /* Realtek */
51 {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
52 {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
53 {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
54 {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
55 /* Surecom */
56 {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
57 /* Logitech */
58 {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
59 /* Netgear */
60 {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
61 {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
62 {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
63 /* HP */
64 {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
65 /* Sitecom */
66 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
67 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
68 /* Sphairon Access Systems GmbH */
69 {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
70 /* Dick Smith Electronics */
71 {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
72 /* Abocom */
73 {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
74 /* Qcom */
75 {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
76 /* AirLive */
77 {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
78 /* Linksys */
79 {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
80 {}
81 };
82
83 MODULE_DEVICE_TABLE(usb, rtl8187_table);
84
85 static const struct ieee80211_rate rtl818x_rates[] = {
86 { .bitrate = 10, .hw_value = 0, },
87 { .bitrate = 20, .hw_value = 1, },
88 { .bitrate = 55, .hw_value = 2, },
89 { .bitrate = 110, .hw_value = 3, },
90 { .bitrate = 60, .hw_value = 4, },
91 { .bitrate = 90, .hw_value = 5, },
92 { .bitrate = 120, .hw_value = 6, },
93 { .bitrate = 180, .hw_value = 7, },
94 { .bitrate = 240, .hw_value = 8, },
95 { .bitrate = 360, .hw_value = 9, },
96 { .bitrate = 480, .hw_value = 10, },
97 { .bitrate = 540, .hw_value = 11, },
98 };
99
100 static const struct ieee80211_channel rtl818x_channels[] = {
101 { .center_freq = 2412 },
102 { .center_freq = 2417 },
103 { .center_freq = 2422 },
104 { .center_freq = 2427 },
105 { .center_freq = 2432 },
106 { .center_freq = 2437 },
107 { .center_freq = 2442 },
108 { .center_freq = 2447 },
109 { .center_freq = 2452 },
110 { .center_freq = 2457 },
111 { .center_freq = 2462 },
112 { .center_freq = 2467 },
113 { .center_freq = 2472 },
114 { .center_freq = 2484 },
115 };
116
117 static void rtl8187_iowrite_async_cb(struct urb *urb)
118 {
119 kfree(urb->context);
120 }
121
122 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
123 void *data, u16 len)
124 {
125 struct usb_ctrlrequest *dr;
126 struct urb *urb;
127 struct rtl8187_async_write_data {
128 u8 data[4];
129 struct usb_ctrlrequest dr;
130 } *buf;
131 int rc;
132
133 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
134 if (!buf)
135 return;
136
137 urb = usb_alloc_urb(0, GFP_ATOMIC);
138 if (!urb) {
139 kfree(buf);
140 return;
141 }
142
143 dr = &buf->dr;
144
145 dr->bRequestType = RTL8187_REQT_WRITE;
146 dr->bRequest = RTL8187_REQ_SET_REG;
147 dr->wValue = addr;
148 dr->wIndex = 0;
149 dr->wLength = cpu_to_le16(len);
150
151 memcpy(buf, data, len);
152
153 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
154 (unsigned char *)dr, buf, len,
155 rtl8187_iowrite_async_cb, buf);
156 usb_anchor_urb(urb, &priv->anchored);
157 rc = usb_submit_urb(urb, GFP_ATOMIC);
158 if (rc < 0) {
159 kfree(buf);
160 usb_unanchor_urb(urb);
161 }
162 usb_free_urb(urb);
163 }
164
165 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
166 __le32 *addr, u32 val)
167 {
168 __le32 buf = cpu_to_le32(val);
169
170 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
171 &buf, sizeof(buf));
172 }
173
174 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
175 {
176 struct rtl8187_priv *priv = dev->priv;
177
178 data <<= 8;
179 data |= addr | 0x80;
180
181 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
182 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
183 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
184 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
185 }
186
187 static void rtl8187_tx_cb(struct urb *urb)
188 {
189 struct sk_buff *skb = (struct sk_buff *)urb->context;
190 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
191 struct ieee80211_hw *hw = info->rate_driver_data[0];
192 struct rtl8187_priv *priv = hw->priv;
193
194 skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
195 sizeof(struct rtl8187_tx_hdr));
196 ieee80211_tx_info_clear_status(info);
197
198 if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
199 if (priv->is_rtl8187b) {
200 skb_queue_tail(&priv->b_tx_status.queue, skb);
201
202 /* queue is "full", discard last items */
203 while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
204 struct sk_buff *old_skb;
205
206 dev_dbg(&priv->udev->dev,
207 "transmit status queue full\n");
208
209 old_skb = skb_dequeue(&priv->b_tx_status.queue);
210 ieee80211_tx_status_irqsafe(hw, old_skb);
211 }
212 return;
213 } else {
214 info->flags |= IEEE80211_TX_STAT_ACK;
215 }
216 }
217 if (priv->is_rtl8187b)
218 ieee80211_tx_status_irqsafe(hw, skb);
219 else {
220 /* Retry information for the RTI8187 is only available by
221 * reading a register in the device. We are in interrupt mode
222 * here, thus queue the skb and finish on a work queue. */
223 skb_queue_tail(&priv->b_tx_status.queue, skb);
224 ieee80211_queue_delayed_work(hw, &priv->work, 0);
225 }
226 }
227
228 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
229 {
230 struct rtl8187_priv *priv = dev->priv;
231 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
232 unsigned int ep;
233 void *buf;
234 struct urb *urb;
235 __le16 rts_dur = 0;
236 u32 flags;
237 int rc;
238
239 urb = usb_alloc_urb(0, GFP_ATOMIC);
240 if (!urb) {
241 kfree_skb(skb);
242 return NETDEV_TX_OK;
243 }
244
245 flags = skb->len;
246 flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
247
248 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
249 if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
250 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
251 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
252 flags |= RTL818X_TX_DESC_FLAG_RTS;
253 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
254 rts_dur = ieee80211_rts_duration(dev, priv->vif,
255 skb->len, info);
256 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
257 flags |= RTL818X_TX_DESC_FLAG_CTS;
258 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
259 }
260
261 if (!priv->is_rtl8187b) {
262 struct rtl8187_tx_hdr *hdr =
263 (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
264 hdr->flags = cpu_to_le32(flags);
265 hdr->len = 0;
266 hdr->rts_duration = rts_dur;
267 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
268 buf = hdr;
269
270 ep = 2;
271 } else {
272 /* fc needs to be calculated before skb_push() */
273 unsigned int epmap[4] = { 6, 7, 5, 4 };
274 struct ieee80211_hdr *tx_hdr =
275 (struct ieee80211_hdr *)(skb->data);
276 u16 fc = le16_to_cpu(tx_hdr->frame_control);
277
278 struct rtl8187b_tx_hdr *hdr =
279 (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
280 struct ieee80211_rate *txrate =
281 ieee80211_get_tx_rate(dev, info);
282 memset(hdr, 0, sizeof(*hdr));
283 hdr->flags = cpu_to_le32(flags);
284 hdr->rts_duration = rts_dur;
285 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
286 hdr->tx_duration =
287 ieee80211_generic_frame_duration(dev, priv->vif,
288 skb->len, txrate);
289 buf = hdr;
290
291 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
292 ep = 12;
293 else
294 ep = epmap[skb_get_queue_mapping(skb)];
295 }
296
297 info->rate_driver_data[0] = dev;
298 info->rate_driver_data[1] = urb;
299
300 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
301 buf, skb->len, rtl8187_tx_cb, skb);
302 urb->transfer_flags |= URB_ZERO_PACKET;
303 usb_anchor_urb(urb, &priv->anchored);
304 rc = usb_submit_urb(urb, GFP_ATOMIC);
305 if (rc < 0) {
306 usb_unanchor_urb(urb);
307 kfree_skb(skb);
308 }
309 usb_free_urb(urb);
310
311 return NETDEV_TX_OK;
312 }
313
314 static void rtl8187_rx_cb(struct urb *urb)
315 {
316 struct sk_buff *skb = (struct sk_buff *)urb->context;
317 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
318 struct ieee80211_hw *dev = info->dev;
319 struct rtl8187_priv *priv = dev->priv;
320 struct ieee80211_rx_status rx_status = { 0 };
321 int rate, signal;
322 u32 flags;
323 u32 quality;
324 unsigned long f;
325
326 spin_lock_irqsave(&priv->rx_queue.lock, f);
327 __skb_unlink(skb, &priv->rx_queue);
328 spin_unlock_irqrestore(&priv->rx_queue.lock, f);
329 skb_put(skb, urb->actual_length);
330
331 if (unlikely(urb->status)) {
332 dev_kfree_skb_irq(skb);
333 return;
334 }
335
336 if (!priv->is_rtl8187b) {
337 struct rtl8187_rx_hdr *hdr =
338 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
339 flags = le32_to_cpu(hdr->flags);
340 /* As with the RTL8187B below, the AGC is used to calculate
341 * signal strength and quality. In this case, the scaling
342 * constants are derived from the output of p54usb.
343 */
344 quality = 130 - ((41 * hdr->agc) >> 6);
345 signal = -4 - ((27 * hdr->agc) >> 6);
346 rx_status.antenna = (hdr->signal >> 7) & 1;
347 rx_status.mactime = le64_to_cpu(hdr->mac_time);
348 } else {
349 struct rtl8187b_rx_hdr *hdr =
350 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
351 /* The Realtek datasheet for the RTL8187B shows that the RX
352 * header contains the following quantities: signal quality,
353 * RSSI, AGC, the received power in dB, and the measured SNR.
354 * In testing, none of these quantities show qualitative
355 * agreement with AP signal strength, except for the AGC,
356 * which is inversely proportional to the strength of the
357 * signal. In the following, the quality and signal strength
358 * are derived from the AGC. The arbitrary scaling constants
359 * are chosen to make the results close to the values obtained
360 * for a BCM4312 using b43 as the driver. The noise is ignored
361 * for now.
362 */
363 flags = le32_to_cpu(hdr->flags);
364 quality = 170 - hdr->agc;
365 signal = 14 - hdr->agc / 2;
366 rx_status.antenna = (hdr->rssi >> 7) & 1;
367 rx_status.mactime = le64_to_cpu(hdr->mac_time);
368 }
369
370 if (quality > 100)
371 quality = 100;
372 rx_status.qual = quality;
373 priv->quality = quality;
374 rx_status.signal = signal;
375 priv->signal = signal;
376 rate = (flags >> 20) & 0xF;
377 skb_trim(skb, flags & 0x0FFF);
378 rx_status.rate_idx = rate;
379 rx_status.freq = dev->conf.channel->center_freq;
380 rx_status.band = dev->conf.channel->band;
381 rx_status.flag |= RX_FLAG_TSFT;
382 if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
383 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
384 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
385 ieee80211_rx_irqsafe(dev, skb);
386
387 skb = dev_alloc_skb(RTL8187_MAX_RX);
388 if (unlikely(!skb)) {
389 /* TODO check rx queue length and refill *somewhere* */
390 return;
391 }
392
393 info = (struct rtl8187_rx_info *)skb->cb;
394 info->urb = urb;
395 info->dev = dev;
396 urb->transfer_buffer = skb_tail_pointer(skb);
397 urb->context = skb;
398 skb_queue_tail(&priv->rx_queue, skb);
399
400 usb_anchor_urb(urb, &priv->anchored);
401 if (usb_submit_urb(urb, GFP_ATOMIC)) {
402 usb_unanchor_urb(urb);
403 skb_unlink(skb, &priv->rx_queue);
404 dev_kfree_skb_irq(skb);
405 }
406 }
407
408 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
409 {
410 struct rtl8187_priv *priv = dev->priv;
411 struct urb *entry = NULL;
412 struct sk_buff *skb;
413 struct rtl8187_rx_info *info;
414 int ret = 0;
415
416 while (skb_queue_len(&priv->rx_queue) < 16) {
417 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
418 if (!skb) {
419 ret = -ENOMEM;
420 goto err;
421 }
422 entry = usb_alloc_urb(0, GFP_KERNEL);
423 if (!entry) {
424 ret = -ENOMEM;
425 goto err;
426 }
427 usb_fill_bulk_urb(entry, priv->udev,
428 usb_rcvbulkpipe(priv->udev,
429 priv->is_rtl8187b ? 3 : 1),
430 skb_tail_pointer(skb),
431 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
432 info = (struct rtl8187_rx_info *)skb->cb;
433 info->urb = entry;
434 info->dev = dev;
435 skb_queue_tail(&priv->rx_queue, skb);
436 usb_anchor_urb(entry, &priv->anchored);
437 ret = usb_submit_urb(entry, GFP_KERNEL);
438 if (ret) {
439 skb_unlink(skb, &priv->rx_queue);
440 usb_unanchor_urb(entry);
441 goto err;
442 }
443 usb_free_urb(entry);
444 }
445 return ret;
446
447 err:
448 usb_free_urb(entry);
449 kfree_skb(skb);
450 usb_kill_anchored_urbs(&priv->anchored);
451 return ret;
452 }
453
454 static void rtl8187b_status_cb(struct urb *urb)
455 {
456 struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
457 struct rtl8187_priv *priv = hw->priv;
458 u64 val;
459 unsigned int cmd_type;
460
461 if (unlikely(urb->status))
462 return;
463
464 /*
465 * Read from status buffer:
466 *
467 * bits [30:31] = cmd type:
468 * - 0 indicates tx beacon interrupt
469 * - 1 indicates tx close descriptor
470 *
471 * In the case of tx beacon interrupt:
472 * [0:9] = Last Beacon CW
473 * [10:29] = reserved
474 * [30:31] = 00b
475 * [32:63] = Last Beacon TSF
476 *
477 * If it's tx close descriptor:
478 * [0:7] = Packet Retry Count
479 * [8:14] = RTS Retry Count
480 * [15] = TOK
481 * [16:27] = Sequence No
482 * [28] = LS
483 * [29] = FS
484 * [30:31] = 01b
485 * [32:47] = unused (reserved?)
486 * [48:63] = MAC Used Time
487 */
488 val = le64_to_cpu(priv->b_tx_status.buf);
489
490 cmd_type = (val >> 30) & 0x3;
491 if (cmd_type == 1) {
492 unsigned int pkt_rc, seq_no;
493 bool tok;
494 struct sk_buff *skb;
495 struct ieee80211_hdr *ieee80211hdr;
496 unsigned long flags;
497
498 pkt_rc = val & 0xFF;
499 tok = val & (1 << 15);
500 seq_no = (val >> 16) & 0xFFF;
501
502 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
503 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
504 ieee80211hdr = (struct ieee80211_hdr *)skb->data;
505
506 /*
507 * While testing, it was discovered that the seq_no
508 * doesn't actually contains the sequence number.
509 * Instead of returning just the 12 bits of sequence
510 * number, hardware is returning entire sequence control
511 * (fragment number plus sequence number) in a 12 bit
512 * only field overflowing after some time. As a
513 * workaround, just consider the lower bits, and expect
514 * it's unlikely we wrongly ack some sent data
515 */
516 if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
517 & 0xFFF) == seq_no)
518 break;
519 }
520 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
521 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
522
523 __skb_unlink(skb, &priv->b_tx_status.queue);
524 if (tok)
525 info->flags |= IEEE80211_TX_STAT_ACK;
526 info->status.rates[0].count = pkt_rc + 1;
527
528 ieee80211_tx_status_irqsafe(hw, skb);
529 }
530 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
531 }
532
533 usb_anchor_urb(urb, &priv->anchored);
534 if (usb_submit_urb(urb, GFP_ATOMIC))
535 usb_unanchor_urb(urb);
536 }
537
538 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
539 {
540 struct rtl8187_priv *priv = dev->priv;
541 struct urb *entry;
542 int ret = 0;
543
544 entry = usb_alloc_urb(0, GFP_KERNEL);
545 if (!entry)
546 return -ENOMEM;
547
548 usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
549 &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
550 rtl8187b_status_cb, dev);
551
552 usb_anchor_urb(entry, &priv->anchored);
553 ret = usb_submit_urb(entry, GFP_KERNEL);
554 if (ret)
555 usb_unanchor_urb(entry);
556 usb_free_urb(entry);
557
558 return ret;
559 }
560
561 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
562 {
563 struct rtl8187_priv *priv = dev->priv;
564 u8 reg;
565 int i;
566
567 reg = rtl818x_ioread8(priv, &priv->map->CMD);
568 reg &= (1 << 1);
569 reg |= RTL818X_CMD_RESET;
570 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
571
572 i = 10;
573 do {
574 msleep(2);
575 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
576 RTL818X_CMD_RESET))
577 break;
578 } while (--i);
579
580 if (!i) {
581 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
582 return -ETIMEDOUT;
583 }
584
585 /* reload registers from eeprom */
586 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
587
588 i = 10;
589 do {
590 msleep(4);
591 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
592 RTL818X_EEPROM_CMD_CONFIG))
593 break;
594 } while (--i);
595
596 if (!i) {
597 printk(KERN_ERR "%s: eeprom reset timeout!\n",
598 wiphy_name(dev->wiphy));
599 return -ETIMEDOUT;
600 }
601
602 return 0;
603 }
604
605 static int rtl8187_init_hw(struct ieee80211_hw *dev)
606 {
607 struct rtl8187_priv *priv = dev->priv;
608 u8 reg;
609 int res;
610
611 /* reset */
612 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
613 RTL818X_EEPROM_CMD_CONFIG);
614 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
615 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
616 RTL818X_CONFIG3_ANAPARAM_WRITE);
617 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
618 RTL8187_RTL8225_ANAPARAM_ON);
619 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
620 RTL8187_RTL8225_ANAPARAM2_ON);
621 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
622 ~RTL818X_CONFIG3_ANAPARAM_WRITE);
623 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
624 RTL818X_EEPROM_CMD_NORMAL);
625
626 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
627
628 msleep(200);
629 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
630 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
631 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
632 msleep(200);
633
634 res = rtl8187_cmd_reset(dev);
635 if (res)
636 return res;
637
638 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
639 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
640 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
641 reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
642 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
643 RTL8187_RTL8225_ANAPARAM_ON);
644 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
645 RTL8187_RTL8225_ANAPARAM2_ON);
646 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
647 reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
648 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
649
650 /* setup card */
651 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
652 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
653
654 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
655 rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
656 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
657
658 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
659
660 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
661 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
662 reg &= 0x3F;
663 reg |= 0x80;
664 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
665
666 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
667
668 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
669 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
670 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
671
672 // TODO: set RESP_RATE and BRSR properly
673 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
674 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
675
676 /* host_usb_init */
677 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
678 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
679 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
680 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
681 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
682 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
683 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
684 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
685 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
686 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
687 msleep(100);
688
689 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
690 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
691 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
692 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
693 RTL818X_EEPROM_CMD_CONFIG);
694 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
695 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
696 RTL818X_EEPROM_CMD_NORMAL);
697 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
698 msleep(100);
699
700 priv->rf->init(dev);
701
702 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
703 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
704 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
705 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
706 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
707 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
708 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
709
710 return 0;
711 }
712
713 static const u8 rtl8187b_reg_table[][3] = {
714 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
715 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
716 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
717 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
718
719 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
720 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
721 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
722 {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
723 {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
724 {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
725
726 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
727 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
728 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
729 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
730 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
731 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
732 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
733 {0x73, 0x9A, 2},
734
735 {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
736 {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
737 {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
738 {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
739 {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
740
741 {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
742 {0x8F, 0x00, 0}
743 };
744
745 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
746 {
747 struct rtl8187_priv *priv = dev->priv;
748 int res, i;
749 u8 reg;
750
751 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
752 RTL818X_EEPROM_CMD_CONFIG);
753
754 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
755 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
756 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
757 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
758 RTL8187B_RTL8225_ANAPARAM2_ON);
759 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
760 RTL8187B_RTL8225_ANAPARAM_ON);
761 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
762 RTL8187B_RTL8225_ANAPARAM3_ON);
763
764 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
765 reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
766 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
767 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
768
769 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
770 reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
771 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
772
773 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
774 RTL818X_EEPROM_CMD_NORMAL);
775
776 res = rtl8187_cmd_reset(dev);
777 if (res)
778 return res;
779
780 rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
781 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
782 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
783 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
784 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
785 reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
786 RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
787 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
788
789 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
790
791 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
792 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
793 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
794
795 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
796 RTL818X_EEPROM_CMD_CONFIG);
797 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
798 rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
799 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
800 RTL818X_EEPROM_CMD_NORMAL);
801
802 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
803 for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
804 rtl818x_iowrite8_idx(priv,
805 (u8 *)(uintptr_t)
806 (rtl8187b_reg_table[i][0] | 0xFF00),
807 rtl8187b_reg_table[i][1],
808 rtl8187b_reg_table[i][2]);
809 }
810
811 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
812 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
813
814 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
815 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
816 rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
817
818 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
819
820 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
821
822 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
823 RTL818X_EEPROM_CMD_CONFIG);
824 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
825 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
826 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
827 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
828 RTL818X_EEPROM_CMD_NORMAL);
829
830 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
831 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
832 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
833 msleep(100);
834
835 priv->rf->init(dev);
836
837 reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
838 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
839 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
840
841 rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
842 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
843 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
844 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
845 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
846 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
847 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
848
849 reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
850 rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
851 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
852 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
853 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
854 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
855 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
856 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
857 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
858 rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
859 rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
860 rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
861 rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
862
863 rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
864
865 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
866
867 priv->slot_time = 0x9;
868 priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
869 priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
870 priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
871 priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
872 rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
873
874 /* ENEDCA flag must always be set, transmit issues? */
875 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
876
877 return 0;
878 }
879
880 static void rtl8187_work(struct work_struct *work)
881 {
882 /* The RTL8187 returns the retry count through register 0xFFFA. In
883 * addition, it appears to be a cumulative retry count, not the
884 * value for the current TX packet. When multiple TX entries are
885 * queued, the retry count will be valid for the last one in the queue.
886 * The "error" should not matter for purposes of rate setting. */
887 struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
888 work.work);
889 struct ieee80211_tx_info *info;
890 struct ieee80211_hw *dev = priv->dev;
891 static u16 retry;
892 u16 tmp;
893
894 mutex_lock(&priv->conf_mutex);
895 tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
896 while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
897 struct sk_buff *old_skb;
898
899 old_skb = skb_dequeue(&priv->b_tx_status.queue);
900 info = IEEE80211_SKB_CB(old_skb);
901 info->status.rates[0].count = tmp - retry + 1;
902 ieee80211_tx_status_irqsafe(dev, old_skb);
903 }
904 retry = tmp;
905 mutex_unlock(&priv->conf_mutex);
906 }
907
908 static int rtl8187_start(struct ieee80211_hw *dev)
909 {
910 struct rtl8187_priv *priv = dev->priv;
911 u32 reg;
912 int ret;
913
914 mutex_lock(&priv->conf_mutex);
915
916 ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
917 rtl8187b_init_hw(dev);
918 if (ret)
919 goto rtl8187_start_exit;
920
921 init_usb_anchor(&priv->anchored);
922 priv->dev = dev;
923
924 if (priv->is_rtl8187b) {
925 reg = RTL818X_RX_CONF_MGMT |
926 RTL818X_RX_CONF_DATA |
927 RTL818X_RX_CONF_BROADCAST |
928 RTL818X_RX_CONF_NICMAC |
929 RTL818X_RX_CONF_BSSID |
930 (7 << 13 /* RX FIFO threshold NONE */) |
931 (7 << 10 /* MAX RX DMA */) |
932 RTL818X_RX_CONF_RX_AUTORESETPHY |
933 RTL818X_RX_CONF_ONLYERLPKT |
934 RTL818X_RX_CONF_MULTICAST;
935 priv->rx_conf = reg;
936 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
937
938 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
939 RTL818X_TX_CONF_HW_SEQNUM |
940 RTL818X_TX_CONF_DISREQQSIZE |
941 (7 << 8 /* short retry limit */) |
942 (7 << 0 /* long retry limit */) |
943 (7 << 21 /* MAX TX DMA */));
944 rtl8187_init_urbs(dev);
945 rtl8187b_init_status_urb(dev);
946 goto rtl8187_start_exit;
947 }
948
949 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
950
951 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
952 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
953
954 rtl8187_init_urbs(dev);
955
956 reg = RTL818X_RX_CONF_ONLYERLPKT |
957 RTL818X_RX_CONF_RX_AUTORESETPHY |
958 RTL818X_RX_CONF_BSSID |
959 RTL818X_RX_CONF_MGMT |
960 RTL818X_RX_CONF_DATA |
961 (7 << 13 /* RX FIFO threshold NONE */) |
962 (7 << 10 /* MAX RX DMA */) |
963 RTL818X_RX_CONF_BROADCAST |
964 RTL818X_RX_CONF_NICMAC;
965
966 priv->rx_conf = reg;
967 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
968
969 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
970 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
971 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
972 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
973
974 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
975 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
976 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
977 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
978 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
979
980 reg = RTL818X_TX_CONF_CW_MIN |
981 (7 << 21 /* MAX TX DMA */) |
982 RTL818X_TX_CONF_NO_ICV;
983 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
984
985 reg = rtl818x_ioread8(priv, &priv->map->CMD);
986 reg |= RTL818X_CMD_TX_ENABLE;
987 reg |= RTL818X_CMD_RX_ENABLE;
988 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
989 INIT_DELAYED_WORK(&priv->work, rtl8187_work);
990
991 rtl8187_start_exit:
992 mutex_unlock(&priv->conf_mutex);
993 return ret;
994 }
995
996 static void rtl8187_stop(struct ieee80211_hw *dev)
997 {
998 struct rtl8187_priv *priv = dev->priv;
999 struct sk_buff *skb;
1000 u32 reg;
1001
1002 mutex_lock(&priv->conf_mutex);
1003 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1004
1005 reg = rtl818x_ioread8(priv, &priv->map->CMD);
1006 reg &= ~RTL818X_CMD_TX_ENABLE;
1007 reg &= ~RTL818X_CMD_RX_ENABLE;
1008 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1009
1010 priv->rf->stop(dev);
1011
1012 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1013 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1014 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1015 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1016
1017 while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1018 dev_kfree_skb_any(skb);
1019
1020 usb_kill_anchored_urbs(&priv->anchored);
1021 mutex_unlock(&priv->conf_mutex);
1022
1023 if (!priv->is_rtl8187b)
1024 cancel_delayed_work_sync(&priv->work);
1025 }
1026
1027 static int rtl8187_add_interface(struct ieee80211_hw *dev,
1028 struct ieee80211_if_init_conf *conf)
1029 {
1030 struct rtl8187_priv *priv = dev->priv;
1031 int i;
1032 int ret = -EOPNOTSUPP;
1033
1034 mutex_lock(&priv->conf_mutex);
1035 if (priv->mode != NL80211_IFTYPE_MONITOR)
1036 goto exit;
1037
1038 switch (conf->type) {
1039 case NL80211_IFTYPE_STATION:
1040 priv->mode = conf->type;
1041 break;
1042 default:
1043 goto exit;
1044 }
1045
1046 ret = 0;
1047 priv->vif = conf->vif;
1048
1049 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1050 for (i = 0; i < ETH_ALEN; i++)
1051 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1052 ((u8 *)conf->mac_addr)[i]);
1053 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1054
1055 exit:
1056 mutex_unlock(&priv->conf_mutex);
1057 return ret;
1058 }
1059
1060 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1061 struct ieee80211_if_init_conf *conf)
1062 {
1063 struct rtl8187_priv *priv = dev->priv;
1064 mutex_lock(&priv->conf_mutex);
1065 priv->mode = NL80211_IFTYPE_MONITOR;
1066 priv->vif = NULL;
1067 mutex_unlock(&priv->conf_mutex);
1068 }
1069
1070 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1071 {
1072 struct rtl8187_priv *priv = dev->priv;
1073 struct ieee80211_conf *conf = &dev->conf;
1074 u32 reg;
1075
1076 mutex_lock(&priv->conf_mutex);
1077 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1078 /* Enable TX loopback on MAC level to avoid TX during channel
1079 * changes, as this has be seen to causes problems and the
1080 * card will stop work until next reset
1081 */
1082 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1083 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1084 priv->rf->set_chan(dev, conf);
1085 msleep(10);
1086 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1087
1088 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1089 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1090 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1091 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1092 mutex_unlock(&priv->conf_mutex);
1093 return 0;
1094 }
1095
1096 /*
1097 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1098 * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1099 */
1100 static __le32 *rtl8187b_ac_addr[4] = {
1101 (__le32 *) 0xFFF0, /* AC_VO */
1102 (__le32 *) 0xFFF4, /* AC_VI */
1103 (__le32 *) 0xFFFC, /* AC_BK */
1104 (__le32 *) 0xFFF8, /* AC_BE */
1105 };
1106
1107 #define SIFS_TIME 0xa
1108
1109 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1110 bool use_short_preamble)
1111 {
1112 if (priv->is_rtl8187b) {
1113 u8 difs, eifs;
1114 u16 ack_timeout;
1115 int queue;
1116
1117 if (use_short_slot) {
1118 priv->slot_time = 0x9;
1119 difs = 0x1c;
1120 eifs = 0x53;
1121 } else {
1122 priv->slot_time = 0x14;
1123 difs = 0x32;
1124 eifs = 0x5b;
1125 }
1126 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1127 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1128 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1129
1130 /*
1131 * BRSR+1 on 8187B is in fact EIFS register
1132 * Value in units of 4 us
1133 */
1134 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1135
1136 /*
1137 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1138 * register. In units of 4 us like eifs register
1139 * ack_timeout = ack duration + plcp + difs + preamble
1140 */
1141 ack_timeout = 112 + 48 + difs;
1142 if (use_short_preamble)
1143 ack_timeout += 72;
1144 else
1145 ack_timeout += 144;
1146 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1147 DIV_ROUND_UP(ack_timeout, 4));
1148
1149 for (queue = 0; queue < 4; queue++)
1150 rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1151 priv->aifsn[queue] * priv->slot_time +
1152 SIFS_TIME);
1153 } else {
1154 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1155 if (use_short_slot) {
1156 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1157 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1158 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1159 } else {
1160 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1161 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1162 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1163 }
1164 }
1165 }
1166
1167 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1168 struct ieee80211_vif *vif,
1169 struct ieee80211_bss_conf *info,
1170 u32 changed)
1171 {
1172 struct rtl8187_priv *priv = dev->priv;
1173 int i;
1174 u8 reg;
1175
1176 if (changed & BSS_CHANGED_BSSID) {
1177 mutex_lock(&priv->conf_mutex);
1178 for (i = 0; i < ETH_ALEN; i++)
1179 rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1180 info->bssid[i]);
1181
1182 if (priv->is_rtl8187b)
1183 reg = RTL818X_MSR_ENEDCA;
1184 else
1185 reg = 0;
1186
1187 if (is_valid_ether_addr(info->bssid)) {
1188 reg |= RTL818X_MSR_INFRA;
1189 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1190 } else {
1191 reg |= RTL818X_MSR_NO_LINK;
1192 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1193 }
1194
1195 mutex_unlock(&priv->conf_mutex);
1196 }
1197
1198 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1199 rtl8187_conf_erp(priv, info->use_short_slot,
1200 info->use_short_preamble);
1201 }
1202
1203 static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1204 int mc_count, struct dev_addr_list *mc_list)
1205 {
1206 return mc_count;
1207 }
1208
1209 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1210 unsigned int changed_flags,
1211 unsigned int *total_flags,
1212 u64 multicast)
1213 {
1214 struct rtl8187_priv *priv = dev->priv;
1215
1216 if (changed_flags & FIF_FCSFAIL)
1217 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1218 if (changed_flags & FIF_CONTROL)
1219 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1220 if (changed_flags & FIF_OTHER_BSS)
1221 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1222 if (*total_flags & FIF_ALLMULTI || multicast > 0)
1223 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1224 else
1225 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1226
1227 *total_flags = 0;
1228
1229 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1230 *total_flags |= FIF_FCSFAIL;
1231 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1232 *total_flags |= FIF_CONTROL;
1233 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1234 *total_flags |= FIF_OTHER_BSS;
1235 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1236 *total_flags |= FIF_ALLMULTI;
1237
1238 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1239 }
1240
1241 static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1242 const struct ieee80211_tx_queue_params *params)
1243 {
1244 struct rtl8187_priv *priv = dev->priv;
1245 u8 cw_min, cw_max;
1246
1247 if (queue > 3)
1248 return -EINVAL;
1249
1250 cw_min = fls(params->cw_min);
1251 cw_max = fls(params->cw_max);
1252
1253 if (priv->is_rtl8187b) {
1254 priv->aifsn[queue] = params->aifs;
1255
1256 /*
1257 * This is the structure of AC_*_PARAM registers in 8187B:
1258 * - TXOP limit field, bit offset = 16
1259 * - ECWmax, bit offset = 12
1260 * - ECWmin, bit offset = 8
1261 * - AIFS, bit offset = 0
1262 */
1263 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1264 (params->txop << 16) | (cw_max << 12) |
1265 (cw_min << 8) | (params->aifs *
1266 priv->slot_time + SIFS_TIME));
1267 } else {
1268 if (queue != 0)
1269 return -EINVAL;
1270
1271 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1272 cw_min | (cw_max << 4));
1273 }
1274 return 0;
1275 }
1276
1277 static const struct ieee80211_ops rtl8187_ops = {
1278 .tx = rtl8187_tx,
1279 .start = rtl8187_start,
1280 .stop = rtl8187_stop,
1281 .add_interface = rtl8187_add_interface,
1282 .remove_interface = rtl8187_remove_interface,
1283 .config = rtl8187_config,
1284 .bss_info_changed = rtl8187_bss_info_changed,
1285 .prepare_multicast = rtl8187_prepare_multicast,
1286 .configure_filter = rtl8187_configure_filter,
1287 .conf_tx = rtl8187_conf_tx,
1288 .rfkill_poll = rtl8187_rfkill_poll
1289 };
1290
1291 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1292 {
1293 struct ieee80211_hw *dev = eeprom->data;
1294 struct rtl8187_priv *priv = dev->priv;
1295 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1296
1297 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1298 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1299 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1300 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1301 }
1302
1303 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1304 {
1305 struct ieee80211_hw *dev = eeprom->data;
1306 struct rtl8187_priv *priv = dev->priv;
1307 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1308
1309 if (eeprom->reg_data_in)
1310 reg |= RTL818X_EEPROM_CMD_WRITE;
1311 if (eeprom->reg_data_out)
1312 reg |= RTL818X_EEPROM_CMD_READ;
1313 if (eeprom->reg_data_clock)
1314 reg |= RTL818X_EEPROM_CMD_CK;
1315 if (eeprom->reg_chip_select)
1316 reg |= RTL818X_EEPROM_CMD_CS;
1317
1318 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1319 udelay(10);
1320 }
1321
1322 static int __devinit rtl8187_probe(struct usb_interface *intf,
1323 const struct usb_device_id *id)
1324 {
1325 struct usb_device *udev = interface_to_usbdev(intf);
1326 struct ieee80211_hw *dev;
1327 struct rtl8187_priv *priv;
1328 struct eeprom_93cx6 eeprom;
1329 struct ieee80211_channel *channel;
1330 const char *chip_name;
1331 u16 txpwr, reg;
1332 int err, i;
1333
1334 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1335 if (!dev) {
1336 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1337 return -ENOMEM;
1338 }
1339
1340 priv = dev->priv;
1341 priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1342
1343 /* allocate "DMA aware" buffer for register accesses */
1344 priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1345 if (!priv->io_dmabuf) {
1346 err = -ENOMEM;
1347 goto err_free_dev;
1348 }
1349 mutex_init(&priv->io_mutex);
1350
1351 SET_IEEE80211_DEV(dev, &intf->dev);
1352 usb_set_intfdata(intf, dev);
1353 priv->udev = udev;
1354
1355 usb_get_dev(udev);
1356
1357 skb_queue_head_init(&priv->rx_queue);
1358
1359 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1360 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1361
1362 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1363 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1364 priv->map = (struct rtl818x_csr *)0xFF00;
1365
1366 priv->band.band = IEEE80211_BAND_2GHZ;
1367 priv->band.channels = priv->channels;
1368 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1369 priv->band.bitrates = priv->rates;
1370 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1371 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1372
1373
1374 priv->mode = NL80211_IFTYPE_MONITOR;
1375 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1376 IEEE80211_HW_SIGNAL_DBM |
1377 IEEE80211_HW_RX_INCLUDES_FCS;
1378
1379 eeprom.data = dev;
1380 eeprom.register_read = rtl8187_eeprom_register_read;
1381 eeprom.register_write = rtl8187_eeprom_register_write;
1382 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1383 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1384 else
1385 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1386
1387 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1388 udelay(10);
1389
1390 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1391 (__le16 __force *)dev->wiphy->perm_addr, 3);
1392 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1393 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1394 "generated MAC address\n");
1395 random_ether_addr(dev->wiphy->perm_addr);
1396 }
1397
1398 channel = priv->channels;
1399 for (i = 0; i < 3; i++) {
1400 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1401 &txpwr);
1402 (*channel++).hw_value = txpwr & 0xFF;
1403 (*channel++).hw_value = txpwr >> 8;
1404 }
1405 for (i = 0; i < 2; i++) {
1406 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1407 &txpwr);
1408 (*channel++).hw_value = txpwr & 0xFF;
1409 (*channel++).hw_value = txpwr >> 8;
1410 }
1411
1412 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1413 &priv->txpwr_base);
1414
1415 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1416 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1417 /* 0 means asic B-cut, we should use SW 3 wire
1418 * bit-by-bit banging for radio. 1 means we can use
1419 * USB specific request to write radio registers */
1420 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1421 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1422 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1423
1424 if (!priv->is_rtl8187b) {
1425 u32 reg32;
1426 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1427 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1428 switch (reg32) {
1429 case RTL818X_TX_CONF_R8187vD_B:
1430 /* Some RTL8187B devices have a USB ID of 0x8187
1431 * detect them here */
1432 chip_name = "RTL8187BvB(early)";
1433 priv->is_rtl8187b = 1;
1434 priv->hw_rev = RTL8187BvB;
1435 break;
1436 case RTL818X_TX_CONF_R8187vD:
1437 chip_name = "RTL8187vD";
1438 break;
1439 default:
1440 chip_name = "RTL8187vB (default)";
1441 }
1442 } else {
1443 /*
1444 * Force USB request to write radio registers for 8187B, Realtek
1445 * only uses it in their sources
1446 */
1447 /*if (priv->asic_rev == 0) {
1448 printk(KERN_WARNING "rtl8187: Forcing use of USB "
1449 "requests to write to radio registers\n");
1450 priv->asic_rev = 1;
1451 }*/
1452 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1453 case RTL818X_R8187B_B:
1454 chip_name = "RTL8187BvB";
1455 priv->hw_rev = RTL8187BvB;
1456 break;
1457 case RTL818X_R8187B_D:
1458 chip_name = "RTL8187BvD";
1459 priv->hw_rev = RTL8187BvD;
1460 break;
1461 case RTL818X_R8187B_E:
1462 chip_name = "RTL8187BvE";
1463 priv->hw_rev = RTL8187BvE;
1464 break;
1465 default:
1466 chip_name = "RTL8187BvB (default)";
1467 priv->hw_rev = RTL8187BvB;
1468 }
1469 }
1470
1471 if (!priv->is_rtl8187b) {
1472 for (i = 0; i < 2; i++) {
1473 eeprom_93cx6_read(&eeprom,
1474 RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1475 &txpwr);
1476 (*channel++).hw_value = txpwr & 0xFF;
1477 (*channel++).hw_value = txpwr >> 8;
1478 }
1479 } else {
1480 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1481 &txpwr);
1482 (*channel++).hw_value = txpwr & 0xFF;
1483
1484 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1485 (*channel++).hw_value = txpwr & 0xFF;
1486
1487 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1488 (*channel++).hw_value = txpwr & 0xFF;
1489 (*channel++).hw_value = txpwr >> 8;
1490 }
1491
1492 /*
1493 * XXX: Once this driver supports anything that requires
1494 * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1495 */
1496 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1497
1498 if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1499 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1500 " info!\n");
1501
1502 priv->rf = rtl8187_detect_rf(dev);
1503 dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1504 sizeof(struct rtl8187_tx_hdr) :
1505 sizeof(struct rtl8187b_tx_hdr);
1506 if (!priv->is_rtl8187b)
1507 dev->queues = 1;
1508 else
1509 dev->queues = 4;
1510
1511 err = ieee80211_register_hw(dev);
1512 if (err) {
1513 printk(KERN_ERR "rtl8187: Cannot register device\n");
1514 goto err_free_dmabuf;
1515 }
1516 mutex_init(&priv->conf_mutex);
1517 skb_queue_head_init(&priv->b_tx_status.queue);
1518
1519 printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
1520 wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1521 chip_name, priv->asic_rev, priv->rf->name);
1522
1523 #ifdef CONFIG_RTL8187_LEDS
1524 eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1525 reg &= 0xFF;
1526 rtl8187_leds_init(dev, reg);
1527 #endif
1528 rtl8187_rfkill_init(dev);
1529
1530 return 0;
1531
1532 err_free_dmabuf:
1533 kfree(priv->io_dmabuf);
1534 err_free_dev:
1535 ieee80211_free_hw(dev);
1536 usb_set_intfdata(intf, NULL);
1537 usb_put_dev(udev);
1538 return err;
1539 }
1540
1541 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1542 {
1543 struct ieee80211_hw *dev = usb_get_intfdata(intf);
1544 struct rtl8187_priv *priv;
1545
1546 if (!dev)
1547 return;
1548
1549 #ifdef CONFIG_RTL8187_LEDS
1550 rtl8187_leds_exit(dev);
1551 #endif
1552 rtl8187_rfkill_exit(dev);
1553 ieee80211_unregister_hw(dev);
1554
1555 priv = dev->priv;
1556 usb_reset_device(priv->udev);
1557 usb_put_dev(interface_to_usbdev(intf));
1558 kfree(priv->io_dmabuf);
1559 ieee80211_free_hw(dev);
1560 }
1561
1562 static struct usb_driver rtl8187_driver = {
1563 .name = KBUILD_MODNAME,
1564 .id_table = rtl8187_table,
1565 .probe = rtl8187_probe,
1566 .disconnect = __devexit_p(rtl8187_disconnect),
1567 };
1568
1569 static int __init rtl8187_init(void)
1570 {
1571 return usb_register(&rtl8187_driver);
1572 }
1573
1574 static void __exit rtl8187_exit(void)
1575 {
1576 usb_deregister(&rtl8187_driver);
1577 }
1578
1579 module_init(rtl8187_init);
1580 module_exit(rtl8187_exit);
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