drivers/net/wireless/wavelan.h

   1 /*
   2  *      WaveLAN ISA driver
   3  *
   4  *              Jean II - HPLB '96
   5  *
   6  * Reorganisation and extension of the driver.
   7  * Original copyright follows. See wavelan.p.h for details.
   8  *
   9  * This file contains the declarations for the WaveLAN hardware. Note that
  10  * the WaveLAN ISA includes a i82586 controller (see definitions in
  11  * file i82586.h).
  12  *
  13  * The main difference between the ISA hardware and the PCMCIA one is
  14  * the Ethernet controller (i82586 instead of i82593).
  15  * The i82586 allows multiple transmit buffers.  The PSA needs to be accessed
  16  * through the host interface.
  17  */
  18
  19 #ifndef _WAVELAN_H
  20 #define _WAVELAN_H
  21
  22 /************************** MAGIC NUMBERS ***************************/
  23
  24 /* Detection of the WaveLAN card is done by reading the MAC
  25  * address from the card and checking it.  If you have a non-AT&T
  26  * product (OEM, like DEC RoamAbout, Digital Ocean, or Epson),
  27  * you might need to modify this part to accommodate your hardware.
  28  */
  29 static const char       MAC_ADDRESSES[][3] =
  30 {
  31   { 0x08, 0x00, 0x0E },         /* AT&T WaveLAN (standard) & DEC RoamAbout */
  32   { 0x08, 0x00, 0x6A },         /* AT&T WaveLAN (alternate) */
  33   { 0x00, 0x00, 0xE1 },         /* Hitachi Wavelan */
  34   { 0x00, 0x60, 0x1D }          /* Lucent Wavelan (another one) */
  35   /* Add your card here and send me the patch! */
  36 };
  37
  38 #define WAVELAN_ADDR_SIZE       6       /* Size of a MAC address */
  39
  40 #define WAVELAN_MTU             1500    /* Maximum size of WaveLAN packet */
  41
  42 #define MAXDATAZ                (WAVELAN_ADDR_SIZE + WAVELAN_ADDR_SIZE + 2 + WAVELAN_MTU)
  43
  44 /*
  45  * Constants used to convert channels to frequencies
  46  */
  47
  48 /* Frequency available in the 2.0 modem, in units of 250 kHz
  49  * (as read in the offset register of the dac area).
  50  * Used to map channel numbers used by `wfreqsel' to frequencies
  51  */
  52 static const short      channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8,
  53                                     0xD0, 0xF0, 0xF8, 0x150 };
  54
  55 /* Frequencies of the 1.0 modem (fixed frequencies).
  56  * Use to map the PSA `subband' to a frequency
  57  * Note : all frequencies apart from the first one need to be multiplied by 10
  58  */
  59 static const int        fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 };
  60
  61
  62
  63 /*************************** PC INTERFACE ****************************/
  64
  65 /*
  66  * Host Adaptor structure.
  67  * (base is board port address).
  68  */
  69 typedef union hacs_u    hacs_u;
  70 union hacs_u
  71 {
  72         unsigned short  hu_command;             /* Command register */
  73 #define         HACR_RESET              0x0001  /* Reset board */
  74 #define         HACR_CA                 0x0002  /* Set Channel Attention for 82586 */
  75 #define         HACR_16BITS             0x0004  /* 16-bit operation (0 => 8bits) */
  76 #define         HACR_OUT0               0x0008  /* General purpose output pin 0 */
  77                                                 /* not used - must be 1 */
  78 #define         HACR_OUT1               0x0010  /* General purpose output pin 1 */
  79                                                 /* not used - must be 1 */
  80 #define         HACR_82586_INT_ENABLE   0x0020  /* Enable 82586 interrupts */
  81 #define         HACR_MMC_INT_ENABLE     0x0040  /* Enable MMC interrupts */
  82 #define         HACR_INTR_CLR_ENABLE    0x0080  /* Enable interrupt status read/clear */
  83         unsigned short  hu_status;              /* Status Register */
  84 #define         HASR_82586_INTR         0x0001  /* Interrupt request from 82586 */
  85 #define         HASR_MMC_INTR           0x0002  /* Interrupt request from MMC */
  86 #define         HASR_MMC_BUSY           0x0004  /* MMC busy indication */
  87 #define         HASR_PSA_BUSY           0x0008  /* LAN parameter storage area busy */
  88 } __attribute__ ((packed));
  89
  90 typedef struct ha_t     ha_t;
  91 struct ha_t
  92 {
  93         hacs_u          ha_cs;          /* Command and status registers */
  94 #define                 ha_command      ha_cs.hu_command
  95 #define                 ha_status       ha_cs.hu_status
  96         unsigned short  ha_mmcr;        /* Modem Management Ctrl Register */
  97         unsigned short  ha_pior0;       /* Program I/O Address Register Port 0 */
  98         unsigned short  ha_piop0;       /* Program I/O Port 0 */
  99         unsigned short  ha_pior1;       /* Program I/O Address Register Port 1 */
 100         unsigned short  ha_piop1;       /* Program I/O Port 1 */
 101         unsigned short  ha_pior2;       /* Program I/O Address Register Port 2 */
 102         unsigned short  ha_piop2;       /* Program I/O Port 2 */
 103 };
 104
 105 #define HA_SIZE         16
 106
 107 #define hoff(p,f)       (unsigned short)((void *)(&((ha_t *)((void *)0 + (p)))->f) - (void *)0)
 108 #define HACR(p)         hoff(p, ha_command)
 109 #define HASR(p)         hoff(p, ha_status)
 110 #define MMCR(p)         hoff(p, ha_mmcr)
 111 #define PIOR0(p)        hoff(p, ha_pior0)
 112 #define PIOP0(p)        hoff(p, ha_piop0)
 113 #define PIOR1(p)        hoff(p, ha_pior1)
 114 #define PIOP1(p)        hoff(p, ha_piop1)
 115 #define PIOR2(p)        hoff(p, ha_pior2)
 116 #define PIOP2(p)        hoff(p, ha_piop2)
 117
 118 /*
 119  * Program I/O Mode Register values.
 120  */
 121 #define STATIC_PIO              0       /* Mode 1: static mode */
 122                                         /* RAM access ??? */
 123 #define AUTOINCR_PIO            1       /* Mode 2: auto increment mode */
 124                                         /* RAM access ??? */
 125 #define AUTODECR_PIO            2       /* Mode 3: auto decrement mode */
 126                                         /* RAM access ??? */
 127 #define PARAM_ACCESS_PIO        3       /* Mode 4: LAN parameter access mode */
 128                                         /* Parameter access. */
 129 #define PIO_MASK                3       /* register mask */
 130 #define PIOM(cmd,piono)         ((u_short)cmd << 10 << (piono * 2))
 131
 132 #define HACR_DEFAULT            (HACR_OUT0 | HACR_OUT1 | HACR_16BITS | PIOM(STATIC_PIO, 0) | PIOM(AUTOINCR_PIO, 1) | PIOM(PARAM_ACCESS_PIO, 2))
 133 #define HACR_INTRON             (HACR_82586_INT_ENABLE | HACR_MMC_INT_ENABLE | HACR_INTR_CLR_ENABLE)
 134
 135 /************************** MEMORY LAYOUT **************************/
 136
 137 /*
 138  * Onboard 64 k RAM layout.
 139  * (Offsets from 0x0000.)
 140  */
 141 #define OFFSET_RU               0x0000          /* 75% memory */
 142 #define OFFSET_CU               0xC000          /* 25% memory */
 143 #define OFFSET_SCB              (OFFSET_ISCP - sizeof(scb_t))
 144 #define OFFSET_ISCP             (OFFSET_SCP - sizeof(iscp_t))
 145 #define OFFSET_SCP              I82586_SCP_ADDR
 146
 147 #define RXBLOCKZ                (sizeof(fd_t) + sizeof(rbd_t) + MAXDATAZ)
 148 #define TXBLOCKZ                (sizeof(ac_tx_t) + sizeof(ac_nop_t) + sizeof(tbd_t) + MAXDATAZ)
 149
 150 #define NRXBLOCKS               ((OFFSET_CU - OFFSET_RU) / RXBLOCKZ)
 151 #define NTXBLOCKS               ((OFFSET_SCB - OFFSET_CU) / TXBLOCKZ)
 152
 153 /********************** PARAMETER STORAGE AREA **********************/
 154
 155 /*
 156  * Parameter Storage Area (PSA).
 157  */
 158 typedef struct psa_t    psa_t;
 159 struct psa_t
 160 {
 161   unsigned char psa_io_base_addr_1;     /* [0x00] Base address 1 ??? */
 162   unsigned char psa_io_base_addr_2;     /* [0x01] Base address 2 */
 163   unsigned char psa_io_base_addr_3;     /* [0x02] Base address 3 */
 164   unsigned char psa_io_base_addr_4;     /* [0x03] Base address 4 */
 165   unsigned char psa_rem_boot_addr_1;    /* [0x04] Remote Boot Address 1 */
 166   unsigned char psa_rem_boot_addr_2;    /* [0x05] Remote Boot Address 2 */
 167   unsigned char psa_rem_boot_addr_3;    /* [0x06] Remote Boot Address 3 */
 168   unsigned char psa_holi_params;        /* [0x07] HOst Lan Interface (HOLI) Parameters */
 169   unsigned char psa_int_req_no;         /* [0x08] Interrupt Request Line */
 170   unsigned char psa_unused0[7];         /* [0x09-0x0F] unused */
 171
 172   unsigned char psa_univ_mac_addr[WAVELAN_ADDR_SIZE];   /* [0x10-0x15] Universal (factory) MAC Address */
 173   unsigned char psa_local_mac_addr[WAVELAN_ADDR_SIZE];  /* [0x16-1B] Local MAC Address */
 174   unsigned char psa_univ_local_sel;     /* [0x1C] Universal Local Selection */
 175 #define         PSA_UNIVERSAL   0               /* Universal (factory) */
 176 #define         PSA_LOCAL       1               /* Local */
 177   unsigned char psa_comp_number;        /* [0x1D] Compatibility Number:  */
 178 #define         PSA_COMP_PC_AT_915      0       /* PC-AT 915 MHz         */
 179 #define         PSA_COMP_PC_MC_915      1       /* PC-MC 915 MHz         */
 180 #define         PSA_COMP_PC_AT_2400     2       /* PC-AT 2.4 GHz         */
 181 #define         PSA_COMP_PC_MC_2400     3       /* PC-MC 2.4 GHz         */
 182 #define         PSA_COMP_PCMCIA_915     4       /* PCMCIA 915 MHz or 2.0 */
 183   unsigned char psa_thr_pre_set;        /* [0x1E] Modem Threshold Preset */
 184   unsigned char psa_feature_select;     /* [0x1F] Call code required (1=on) */
 185 #define         PSA_FEATURE_CALL_CODE   0x01    /* Call code required (Japan) */
 186   unsigned char psa_subband;            /* [0x20] Subband         */
 187 #define         PSA_SUBBAND_915         0       /* 915 MHz or 2.0 */
 188 #define         PSA_SUBBAND_2425        1       /* 2425 MHz       */
 189 #define         PSA_SUBBAND_2460        2       /* 2460 MHz       */
 190 #define         PSA_SUBBAND_2484        3       /* 2484 MHz       */
 191 #define         PSA_SUBBAND_2430_5      4       /* 2430.5 MHz     */
 192   unsigned char psa_quality_thr;        /* [0x21] Modem Quality Threshold */
 193   unsigned char psa_mod_delay;          /* [0x22] Modem Delay (?) (reserved) */
 194   unsigned char psa_nwid[2];            /* [0x23-0x24] Network ID */
 195   unsigned char psa_nwid_select;        /* [0x25] Network ID Select On/Off */
 196   unsigned char psa_encryption_select;  /* [0x26] Encryption On/Off */
 197   unsigned char psa_encryption_key[8];  /* [0x27-0x2E] Encryption Key */
 198   unsigned char psa_databus_width;      /* [0x2F] AT bus width select 8/16 */
 199   unsigned char psa_call_code[8];       /* [0x30-0x37] (Japan) Call Code */
 200   unsigned char psa_nwid_prefix[2];     /* [0x38-0x39] Roaming domain */
 201   unsigned char psa_reserved[2];        /* [0x3A-0x3B] Reserved - fixed 00 */
 202   unsigned char psa_conf_status;        /* [0x3C] Conf Status, bit 0=1:config*/
 203   unsigned char psa_crc[2];             /* [0x3D] CRC-16 over PSA */
 204   unsigned char psa_crc_status;         /* [0x3F] CRC Valid Flag */
 205 };
 206
 207 #define PSA_SIZE        64
 208
 209 /* Calculate offset of a field in the above structure.
 210  * Warning:  only even addresses are used. */
 211 #define psaoff(p,f)     ((unsigned short) ((void *)(&((psa_t *) ((void *) NULL + (p)))->f) - (void *) NULL))
 212
 213 /******************** MODEM MANAGEMENT INTERFACE ********************/
 214
 215 /*
 216  * Modem Management Controller (MMC) write structure.
 217  */
 218 typedef struct mmw_t    mmw_t;
 219 struct mmw_t
 220 {
 221   unsigned char mmw_encr_key[8];        /* encryption key */
 222   unsigned char mmw_encr_enable;        /* Enable or disable encryption. */
 223 #define MMW_ENCR_ENABLE_MODE    0x02    /* mode of security option */
 224 #define MMW_ENCR_ENABLE_EN      0x01    /* Enable security option. */
 225   unsigned char mmw_unused0[1];         /* unused */
 226   unsigned char mmw_des_io_invert;      /* encryption option */
 227 #define MMW_DES_IO_INVERT_RES   0x0F    /* reserved */
 228 #define MMW_DES_IO_INVERT_CTRL  0xF0    /* control (?) (set to 0) */
 229   unsigned char mmw_unused1[5];         /* unused */
 230   unsigned char mmw_loopt_sel;          /* looptest selection */
 231 #define MMW_LOOPT_SEL_DIS_NWID  0x40    /* Disable NWID filtering. */
 232 #define MMW_LOOPT_SEL_INT       0x20    /* Activate Attention Request. */
 233 #define MMW_LOOPT_SEL_LS        0x10    /* looptest, no collision avoidance */
 234 #define MMW_LOOPT_SEL_LT3A      0x08    /* looptest 3a */
 235 #define MMW_LOOPT_SEL_LT3B      0x04    /* looptest 3b */
 236 #define MMW_LOOPT_SEL_LT3C      0x02    /* looptest 3c */
 237 #define MMW_LOOPT_SEL_LT3D      0x01    /* looptest 3d */
 238   unsigned char mmw_jabber_enable;      /* jabber timer enable */
 239   /* Abort transmissions > 200 ms */
 240   unsigned char mmw_freeze;             /* freeze or unfreeze signal level */
 241   /* 0 : signal level & qual updated for every new message, 1 : frozen */
 242   unsigned char mmw_anten_sel;          /* antenna selection */
 243 #define MMW_ANTEN_SEL_SEL       0x01    /* direct antenna selection */
 244 #define MMW_ANTEN_SEL_ALG_EN    0x02    /* antenna selection algo. enable */
 245   unsigned char mmw_ifs;                /* inter frame spacing */
 246   /* min time between transmission in bit periods (.5 us) - bit 0 ignored */
 247   unsigned char mmw_mod_delay;          /* modem delay (synchro) */
 248   unsigned char mmw_jam_time;           /* jamming time (after collision) */
 249   unsigned char mmw_unused2[1];         /* unused */
 250   unsigned char mmw_thr_pre_set;        /* level threshold preset */
 251   /* Discard all packet with signal < this value (4) */
 252   unsigned char mmw_decay_prm;          /* decay parameters */
 253   unsigned char mmw_decay_updat_prm;    /* decay update parameters */
 254   unsigned char mmw_quality_thr;        /* quality (z-quotient) threshold */
 255   /* Discard all packet with quality < this value (3) */
 256   unsigned char mmw_netw_id_l;          /* NWID low order byte */
 257   unsigned char mmw_netw_id_h;          /* NWID high order byte */
 258   /* Network ID or Domain : create virtual net on the air */
 259
 260   /* 2.0 Hardware extension - frequency selection support */
 261   unsigned char mmw_mode_select;        /* for analog tests (set to 0) */
 262   unsigned char mmw_unused3[1];         /* unused */
 263   unsigned char mmw_fee_ctrl;           /* frequency EEPROM control */
 264 #define MMW_FEE_CTRL_PRE        0x10    /* Enable protected instructions. */
 265 #define MMW_FEE_CTRL_DWLD       0x08    /* Download EEPROM to mmc. */
 266 #define MMW_FEE_CTRL_CMD        0x07    /* EEPROM commands:  */
 267 #define MMW_FEE_CTRL_READ       0x06    /* Read */
 268 #define MMW_FEE_CTRL_WREN       0x04    /* Write enable */
 269 #define MMW_FEE_CTRL_WRITE      0x05    /* Write data to address. */
 270 #define MMW_FEE_CTRL_WRALL      0x04    /* Write data to all addresses. */
 271 #define MMW_FEE_CTRL_WDS        0x04    /* Write disable */
 272 #define MMW_FEE_CTRL_PRREAD     0x16    /* Read addr from protect register */
 273 #define MMW_FEE_CTRL_PREN       0x14    /* Protect register enable */
 274 #define MMW_FEE_CTRL_PRCLEAR    0x17    /* Unprotect all registers. */
 275 #define MMW_FEE_CTRL_PRWRITE    0x15    /* Write address in protect register */
 276 #define MMW_FEE_CTRL_PRDS       0x14    /* Protect register disable */
 277   /* Never issue the PRDS command:  it's irreversible! */
 278
 279   unsigned char mmw_fee_addr;           /* EEPROM address */
 280 #define MMW_FEE_ADDR_CHANNEL    0xF0    /* Select the channel. */
 281 #define MMW_FEE_ADDR_OFFSET     0x0F    /* Offset in channel data */
 282 #define MMW_FEE_ADDR_EN         0xC0    /* FEE_CTRL enable operations */
 283 #define MMW_FEE_ADDR_DS         0x00    /* FEE_CTRL disable operations */
 284 #define MMW_FEE_ADDR_ALL        0x40    /* FEE_CTRL all operations */
 285 #define MMW_FEE_ADDR_CLEAR      0xFF    /* FEE_CTRL clear operations */
 286
 287   unsigned char mmw_fee_data_l;         /* Write data to EEPROM. */
 288   unsigned char mmw_fee_data_h;         /* high octet */
 289   unsigned char mmw_ext_ant;            /* Setting for external antenna */
 290 #define MMW_EXT_ANT_EXTANT      0x01    /* Select external antenna */
 291 #define MMW_EXT_ANT_POL         0x02    /* Polarity of the antenna */
 292 #define MMW_EXT_ANT_INTERNAL    0x00    /* Internal antenna */
 293 #define MMW_EXT_ANT_EXTERNAL    0x03    /* External antenna */
 294 #define MMW_EXT_ANT_IQ_TEST     0x1C    /* IQ test pattern (set to 0) */
 295 } __attribute__ ((packed));
 296
 297 #define MMW_SIZE        37
 298
 299 #define mmwoff(p,f)     (unsigned short)((void *)(&((mmw_t *)((void *)0 + (p)))->f) - (void *)0)
 300
 301 /*
 302  * Modem Management Controller (MMC) read structure.
 303  */
 304 typedef struct mmr_t    mmr_t;
 305 struct mmr_t
 306 {
 307   unsigned char mmr_unused0[8];         /* unused */
 308   unsigned char mmr_des_status;         /* encryption status */
 309   unsigned char mmr_des_avail;          /* encryption available (0x55 read) */
 310 #define MMR_DES_AVAIL_DES       0x55            /* DES available */
 311 #define MMR_DES_AVAIL_AES       0x33            /* AES (AT&T) available */
 312   unsigned char mmr_des_io_invert;      /* des I/O invert register */
 313   unsigned char mmr_unused1[5];         /* unused */
 314   unsigned char mmr_dce_status;         /* DCE status */
 315 #define MMR_DCE_STATUS_RX_BUSY          0x01    /* receiver busy */
 316 #define MMR_DCE_STATUS_LOOPT_IND        0x02    /* loop test indicated */
 317 #define MMR_DCE_STATUS_TX_BUSY          0x04    /* transmitter on */
 318 #define MMR_DCE_STATUS_JBR_EXPIRED      0x08    /* jabber timer expired */
 319 #define MMR_DCE_STATUS                  0x0F    /* mask to get the bits */
 320   unsigned char mmr_dsp_id;             /* DSP ID (AA = Daedalus rev A) */
 321   unsigned char mmr_unused2[2];         /* unused */
 322   unsigned char mmr_correct_nwid_l;     /* # of correct NWIDs rxd (low) */
 323   unsigned char mmr_correct_nwid_h;     /* # of correct NWIDs rxd (high) */
 324   /* Warning:  read high-order octet first! */
 325   unsigned char mmr_wrong_nwid_l;       /* # of wrong NWIDs rxd (low) */
 326   unsigned char mmr_wrong_nwid_h;       /* # of wrong NWIDs rxd (high) */
 327   unsigned char mmr_thr_pre_set;        /* level threshold preset */
 328 #define MMR_THR_PRE_SET         0x3F            /* level threshold preset */
 329 #define MMR_THR_PRE_SET_CUR     0x80            /* Current signal above it */
 330   unsigned char mmr_signal_lvl;         /* signal level */
 331 #define MMR_SIGNAL_LVL          0x3F            /* signal level */
 332 #define MMR_SIGNAL_LVL_VALID    0x80            /* Updated since last read */
 333   unsigned char mmr_silence_lvl;        /* silence level (noise) */
 334 #define MMR_SILENCE_LVL         0x3F            /* silence level */
 335 #define MMR_SILENCE_LVL_VALID   0x80            /* Updated since last read */
 336   unsigned char mmr_sgnl_qual;          /* signal quality */
 337 #define MMR_SGNL_QUAL           0x0F            /* signal quality */
 338 #define MMR_SGNL_QUAL_ANT       0x80            /* current antenna used */
 339   unsigned char mmr_netw_id_l;          /* NWID low order byte (?) */
 340   unsigned char mmr_unused3[3];         /* unused */
 341
 342   /* 2.0 Hardware extension - frequency selection support */
 343   unsigned char mmr_fee_status;         /* Status of frequency EEPROM */
 344 #define MMR_FEE_STATUS_ID       0xF0            /* Modem revision ID */
 345 #define MMR_FEE_STATUS_DWLD     0x08            /* Download in progress */
 346 #define MMR_FEE_STATUS_BUSY     0x04            /* EEPROM busy */
 347   unsigned char mmr_unused4[1];         /* unused */
 348   unsigned char mmr_fee_data_l;         /* Read data from EEPROM (low) */
 349   unsigned char mmr_fee_data_h;         /* Read data from EEPROM (high) */
 350 } __attribute__ ((packed));
 351
 352 #define MMR_SIZE        36
 353
 354 #define mmroff(p,f)     (unsigned short)((void *)(&((mmr_t *)((void *)0 + (p)))->f) - (void *)0)
 355
 356 /* Make the two above structures one */
 357 typedef union mm_t
 358 {
 359   struct mmw_t  w;      /* Write to the mmc */
 360   struct mmr_t  r;      /* Read from the mmc */
 361 } mm_t;
 362
 363 #endif /* _WAVELAN_H */
 364
 365 /*
 366  * This software may only be used and distributed
 367  * according to the terms of the GNU General Public License.
 368  *
 369  * For more details, see wavelan.c.
 370  */