[ARM] pxa: Gumstix Verdex PCMCIA support
[linux-2.6/verdex.git] / drivers / net / wireless / wl12xx / wl1271_rx.c
blobad8b6904c5eb073d010f6ddf675a84b5d9b21cd1
1 /*
2 * This file is part of wl1271
4 * Copyright (C) 2009 Nokia Corporation
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
24 #include "wl1271.h"
25 #include "wl1271_acx.h"
26 #include "wl1271_reg.h"
27 #include "wl1271_rx.h"
28 #include "wl1271_spi.h"
30 static u8 wl1271_rx_get_mem_block(struct wl1271_fw_status *status,
31 u32 drv_rx_counter)
33 return status->rx_pkt_descs[drv_rx_counter] & RX_MEM_BLOCK_MASK;
36 static u32 wl1271_rx_get_buf_size(struct wl1271_fw_status *status,
37 u32 drv_rx_counter)
39 return (status->rx_pkt_descs[drv_rx_counter] & RX_BUF_SIZE_MASK) >>
40 RX_BUF_SIZE_SHIFT_DIV;
43 /* The values of this table must match the wl1271_rates[] array */
44 static u8 wl1271_rx_rate_to_idx[] = {
45 /* MCS rates are used only with 11n */
46 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS7 */
47 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS6 */
48 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS5 */
49 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS4 */
50 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS3 */
51 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS2 */
52 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS1 */
53 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS0 */
55 11, /* WL1271_RATE_54 */
56 10, /* WL1271_RATE_48 */
57 9, /* WL1271_RATE_36 */
58 8, /* WL1271_RATE_24 */
60 /* TI-specific rate */
61 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_22 */
63 7, /* WL1271_RATE_18 */
64 6, /* WL1271_RATE_12 */
65 3, /* WL1271_RATE_11 */
66 5, /* WL1271_RATE_9 */
67 4, /* WL1271_RATE_6 */
68 2, /* WL1271_RATE_5_5 */
69 1, /* WL1271_RATE_2 */
70 0 /* WL1271_RATE_1 */
73 static void wl1271_rx_status(struct wl1271 *wl,
74 struct wl1271_rx_descriptor *desc,
75 struct ieee80211_rx_status *status,
76 u8 beacon)
78 memset(status, 0, sizeof(struct ieee80211_rx_status));
80 if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG)
81 status->band = IEEE80211_BAND_2GHZ;
82 else
83 wl1271_warning("unsupported band 0x%x",
84 desc->flags & WL1271_RX_DESC_BAND_MASK);
87 * FIXME: Add mactime handling. For IBSS (ad-hoc) we need to get the
88 * timestamp from the beacon (acx_tsf_info). In BSS mode (infra) we
89 * only need the mactime for monitor mode. For now the mactime is
90 * not valid, so RX_FLAG_TSFT should not be set
92 status->signal = desc->rssi;
94 /* FIXME: Should this be optimized? */
95 status->qual = (desc->rssi - WL1271_RX_MIN_RSSI) * 100 /
96 (WL1271_RX_MAX_RSSI - WL1271_RX_MIN_RSSI);
97 status->qual = min(status->qual, 100);
98 status->qual = max(status->qual, 0);
101 * FIXME: In wl1251, the SNR should be divided by two. In wl1271 we
102 * need to divide by two for now, but TI has been discussing about
103 * changing it. This needs to be rechecked.
105 status->noise = desc->rssi - (desc->snr >> 1);
107 status->freq = ieee80211_channel_to_frequency(desc->channel);
109 if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) {
110 status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED;
112 if (likely(!(desc->flags & WL1271_RX_DESC_DECRYPT_FAIL)))
113 status->flag |= RX_FLAG_DECRYPTED;
115 if (unlikely(desc->flags & WL1271_RX_DESC_MIC_FAIL))
116 status->flag |= RX_FLAG_MMIC_ERROR;
119 status->rate_idx = wl1271_rx_rate_to_idx[desc->rate];
121 if (status->rate_idx == WL1271_RX_RATE_UNSUPPORTED)
122 wl1271_warning("unsupported rate");
125 static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
127 struct ieee80211_rx_status rx_status;
128 struct wl1271_rx_descriptor *desc;
129 struct sk_buff *skb;
130 u16 *fc;
131 u8 *buf;
132 u8 beacon = 0;
134 skb = dev_alloc_skb(length);
135 if (!skb) {
136 wl1271_error("Couldn't allocate RX frame");
137 return;
140 buf = skb_put(skb, length);
141 wl1271_spi_reg_read(wl, WL1271_SLV_MEM_DATA, buf, length, true);
143 /* the data read starts with the descriptor */
144 desc = (struct wl1271_rx_descriptor *) buf;
146 /* now we pull the descriptor out of the buffer */
147 skb_pull(skb, sizeof(*desc));
149 fc = (u16 *)skb->data;
150 if ((*fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_BEACON)
151 beacon = 1;
153 wl1271_rx_status(wl, desc, &rx_status, beacon);
155 wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s", skb, skb->len,
156 beacon ? "beacon" : "");
158 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
159 ieee80211_rx(wl->hw, skb);
162 void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status)
164 struct wl1271_acx_mem_map *wl_mem_map = wl->target_mem_map;
165 u32 buf_size;
166 u32 fw_rx_counter = status->fw_rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
167 u32 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
168 u32 mem_block;
170 while (drv_rx_counter != fw_rx_counter) {
171 mem_block = wl1271_rx_get_mem_block(status, drv_rx_counter);
172 buf_size = wl1271_rx_get_buf_size(status, drv_rx_counter);
174 if (buf_size == 0) {
175 wl1271_warning("received empty data");
176 break;
179 wl->rx_mem_pool_addr.addr =
180 (mem_block << 8) + wl_mem_map->packet_memory_pool_start;
181 wl->rx_mem_pool_addr.addr_extra =
182 wl->rx_mem_pool_addr.addr + 4;
184 /* Choose the block we want to read */
185 wl1271_spi_reg_write(wl, WL1271_SLV_REG_DATA,
186 &wl->rx_mem_pool_addr,
187 sizeof(wl->rx_mem_pool_addr), false);
189 wl1271_rx_handle_data(wl, buf_size);
191 wl->rx_counter++;
192 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
195 wl1271_reg_write32(wl, RX_DRIVER_COUNTER_ADDRESS, wl->rx_counter);
197 /* This is a workaround for some problems in the chip */
198 wl1271_reg_write32(wl, RX_DRIVER_DUMMY_WRITE_ADDRESS, 0x1);