drivers/pci/pci.h

   1 #ifndef DRIVERS_PCI_H
   2 #define DRIVERS_PCI_H
   3
   4 #include <linux/workqueue.h>
   5
   6 #define PCI_CFG_SPACE_SIZE      256
   7 #define PCI_CFG_SPACE_EXP_SIZE  4096
   8
   9 /* Functions internal to the PCI core code */
  10
  11 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
  12 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
  13 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
  14 extern void pci_cleanup_rom(struct pci_dev *dev);
  15 #ifdef HAVE_PCI_MMAP
  16 extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
  17                          struct vm_area_struct *vma);
  18 #endif
  19 int pci_probe_reset_function(struct pci_dev *dev);
  20
  21 /**
  22  * struct pci_platform_pm_ops - Firmware PM callbacks
  23  *
  24  * @is_manageable: returns 'true' if given device is power manageable by the
  25  *                 platform firmware
  26  *
  27  * @set_state: invokes the platform firmware to set the device's power state
  28  *
  29  * @choose_state: returns PCI power state of given device preferred by the
  30  *                platform; to be used during system-wide transitions from a
  31  *                sleeping state to the working state and vice versa
  32  *
  33  * @can_wakeup: returns 'true' if given device is capable of waking up the
  34  *              system from a sleeping state
  35  *
  36  * @sleep_wake: enables/disables the system wake up capability of given device
  37  *
  38  * If given platform is generally capable of power managing PCI devices, all of
  39  * these callbacks are mandatory.
  40  */
  41 struct pci_platform_pm_ops {
  42         bool (*is_manageable)(struct pci_dev *dev);
  43         int (*set_state)(struct pci_dev *dev, pci_power_t state);
  44         pci_power_t (*choose_state)(struct pci_dev *dev);
  45         bool (*can_wakeup)(struct pci_dev *dev);
  46         int (*sleep_wake)(struct pci_dev *dev, bool enable);
  47 };
  48
  49 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
  50 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
  51 extern void pci_disable_enabled_device(struct pci_dev *dev);
  52 extern void pci_pm_init(struct pci_dev *dev);
  53 extern void platform_pci_wakeup_init(struct pci_dev *dev);
  54 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
  55
  56 static inline bool pci_is_bridge(struct pci_dev *pci_dev)
  57 {
  58         return !!(pci_dev->subordinate);
  59 }
  60
  61 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
  62 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
  63 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
  64 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
  65 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
  66 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
  67
  68 struct pci_vpd_ops {
  69         ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
  70         ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
  71         void (*release)(struct pci_dev *dev);
  72 };
  73
  74 struct pci_vpd {
  75         unsigned int len;
  76         const struct pci_vpd_ops *ops;
  77         struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
  78 };
  79
  80 extern int pci_vpd_pci22_init(struct pci_dev *dev);
  81 static inline void pci_vpd_release(struct pci_dev *dev)
  82 {
  83         if (dev->vpd)
  84                 dev->vpd->ops->release(dev);
  85 }
  86
  87 /* PCI /proc functions */
  88 #ifdef CONFIG_PROC_FS
  89 extern int pci_proc_attach_device(struct pci_dev *dev);
  90 extern int pci_proc_detach_device(struct pci_dev *dev);
  91 extern int pci_proc_detach_bus(struct pci_bus *bus);
  92 #else
  93 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
  94 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
  95 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
  96 #endif
  97
  98 /* Functions for PCI Hotplug drivers to use */
  99 extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
 100
 101 #ifdef HAVE_PCI_LEGACY
 102 extern void pci_create_legacy_files(struct pci_bus *bus);
 103 extern void pci_remove_legacy_files(struct pci_bus *bus);
 104 #else
 105 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
 106 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
 107 #endif
 108
 109 /* Lock for read/write access to pci device and bus lists */
 110 extern struct rw_semaphore pci_bus_sem;
 111
 112 extern unsigned int pci_pm_d3_delay;
 113
 114 #ifdef CONFIG_PCI_MSI
 115 void pci_no_msi(void);
 116 extern void pci_msi_init_pci_dev(struct pci_dev *dev);
 117 #else
 118 static inline void pci_no_msi(void) { }
 119 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
 120 #endif
 121
 122 #ifdef CONFIG_PCIEAER
 123 void pci_no_aer(void);
 124 #else
 125 static inline void pci_no_aer(void) { }
 126 #endif
 127
 128 static inline int pci_no_d1d2(struct pci_dev *dev)
 129 {
 130         unsigned int parent_dstates = 0;
 131
 132         if (dev->bus->self)
 133                 parent_dstates = dev->bus->self->no_d1d2;
 134         return (dev->no_d1d2 || parent_dstates);
 135
 136 }
 137 extern struct device_attribute pci_dev_attrs[];
 138 extern struct device_attribute dev_attr_cpuaffinity;
 139 extern struct device_attribute dev_attr_cpulistaffinity;
 140 #ifdef CONFIG_HOTPLUG
 141 extern struct bus_attribute pci_bus_attrs[];
 142 #else
 143 #define pci_bus_attrs   NULL
 144 #endif
 145
 146
 147 /**
 148  * pci_match_one_device - Tell if a PCI device structure has a matching
 149  *                        PCI device id structure
 150  * @id: single PCI device id structure to match
 151  * @dev: the PCI device structure to match against
 152  *
 153  * Returns the matching pci_device_id structure or %NULL if there is no match.
 154  */
 155 static inline const struct pci_device_id *
 156 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
 157 {
 158         if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
 159             (id->device == PCI_ANY_ID || id->device == dev->device) &&
 160             (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
 161             (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
 162             !((id->class ^ dev->class) & id->class_mask))
 163                 return id;
 164         return NULL;
 165 }
 166
 167 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
 168
 169 /* PCI slot sysfs helper code */
 170 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
 171
 172 extern struct kset *pci_slots_kset;
 173
 174 struct pci_slot_attribute {
 175         struct attribute attr;
 176         ssize_t (*show)(struct pci_slot *, char *);
 177         ssize_t (*store)(struct pci_slot *, const char *, size_t);
 178 };
 179 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
 180
 181 enum pci_bar_type {
 182         pci_bar_unknown,        /* Standard PCI BAR probe */
 183         pci_bar_io,             /* An io port BAR */
 184         pci_bar_mem32,          /* A 32-bit memory BAR */
 185         pci_bar_mem64,          /* A 64-bit memory BAR */
 186 };
 187
 188 extern int pci_setup_device(struct pci_dev *dev);
 189 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 190                                 struct resource *res, unsigned int reg);
 191 extern int pci_resource_bar(struct pci_dev *dev, int resno,
 192                             enum pci_bar_type *type);
 193 extern int pci_bus_add_child(struct pci_bus *bus);
 194 extern void pci_enable_ari(struct pci_dev *dev);
 195 /**
 196  * pci_ari_enabled - query ARI forwarding status
 197  * @bus: the PCI bus
 198  *
 199  * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
 200  */
 201 static inline int pci_ari_enabled(struct pci_bus *bus)
 202 {
 203         return bus->self && bus->self->ari_enabled;
 204 }
 205
 206 #ifdef CONFIG_PCI_QUIRKS
 207 extern int pci_is_reassigndev(struct pci_dev *dev);
 208 resource_size_t pci_specified_resource_alignment(struct pci_dev *dev);
 209 extern void pci_disable_bridge_window(struct pci_dev *dev);
 210 #endif
 211
 212 /* Single Root I/O Virtualization */
 213 struct pci_sriov {
 214         int pos;                /* capability position */
 215         int nres;               /* number of resources */
 216         u32 cap;                /* SR-IOV Capabilities */
 217         u16 ctrl;               /* SR-IOV Control */
 218         u16 total;              /* total VFs associated with the PF */
 219         u16 initial;            /* initial VFs associated with the PF */
 220         u16 nr_virtfn;          /* number of VFs available */
 221         u16 offset;             /* first VF Routing ID offset */
 222         u16 stride;             /* following VF stride */
 223         u32 pgsz;               /* page size for BAR alignment */
 224         u8 link;                /* Function Dependency Link */
 225         struct pci_dev *dev;    /* lowest numbered PF */
 226         struct pci_dev *self;   /* this PF */
 227         struct mutex lock;      /* lock for VF bus */
 228         struct work_struct mtask; /* VF Migration task */
 229         u8 __iomem *mstate;     /* VF Migration State Array */
 230 };
 231
 232 /* Address Translation Service */
 233 struct pci_ats {
 234         int pos;        /* capability position */
 235         int stu;        /* Smallest Translation Unit */
 236         int qdep;       /* Invalidate Queue Depth */
 237         int ref_cnt;    /* Physical Function reference count */
 238         int is_enabled:1;       /* Enable bit is set */
 239 };
 240
 241 #ifdef CONFIG_PCI_IOV
 242 extern int pci_iov_init(struct pci_dev *dev);
 243 extern void pci_iov_release(struct pci_dev *dev);
 244 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 245                                 enum pci_bar_type *type);
 246 extern int pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
 247 extern void pci_restore_iov_state(struct pci_dev *dev);
 248 extern int pci_iov_bus_range(struct pci_bus *bus);
 249
 250 extern int pci_enable_ats(struct pci_dev *dev, int ps);
 251 extern void pci_disable_ats(struct pci_dev *dev);
 252 extern int pci_ats_queue_depth(struct pci_dev *dev);
 253 /**
 254  * pci_ats_enabled - query the ATS status
 255  * @dev: the PCI device
 256  *
 257  * Returns 1 if ATS capability is enabled, or 0 if not.
 258  */
 259 static inline int pci_ats_enabled(struct pci_dev *dev)
 260 {
 261         return dev->ats && dev->ats->is_enabled;
 262 }
 263 #else
 264 static inline int pci_iov_init(struct pci_dev *dev)
 265 {
 266         return -ENODEV;
 267 }
 268 static inline void pci_iov_release(struct pci_dev *dev)
 269
 270 {
 271 }
 272 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 273                                        enum pci_bar_type *type)
 274 {
 275         return 0;
 276 }
 277 static inline void pci_restore_iov_state(struct pci_dev *dev)
 278 {
 279 }
 280 static inline int pci_iov_bus_range(struct pci_bus *bus)
 281 {
 282         return 0;
 283 }
 284
 285 static inline int pci_enable_ats(struct pci_dev *dev, int ps)
 286 {
 287         return -ENODEV;
 288 }
 289 static inline void pci_disable_ats(struct pci_dev *dev)
 290 {
 291 }
 292 static inline int pci_ats_queue_depth(struct pci_dev *dev)
 293 {
 294         return -ENODEV;
 295 }
 296 static inline int pci_ats_enabled(struct pci_dev *dev)
 297 {
 298         return 0;
 299 }
 300 #endif /* CONFIG_PCI_IOV */
 301
 302 static inline int pci_resource_alignment(struct pci_dev *dev,
 303                                          struct resource *res)
 304 {
 305 #ifdef CONFIG_PCI_IOV
 306         int resno = res - dev->resource;
 307
 308         if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
 309                 return pci_sriov_resource_alignment(dev, resno);
 310 #endif
 311         return resource_alignment(res);
 312 }
 313
 314 #endif /* DRIVERS_PCI_H */