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[ARM] pxa: Gumstix Verdex PCMCIA support
[linux-2.6/verdex.git] / drivers / video / vt8623fb.c
blob3df17dc8c3d786f5ff2e66f878a888bc35df71c1
1 /*
2 * linux/drivers/video/vt8623fb.c - fbdev driver for
3 * integrated graphic core in VIA VT8623 [CLE266] chipset
4 *
5 * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 *
11 * Code is based on s3fb, some parts are from David Boucher's viafb
12 * (http://davesdomain.org.uk/viafb/)
13 */
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/errno.h>
18 #include <linux/string.h>
19 #include <linux/mm.h>
20 #include <linux/tty.h>
21 #include <linux/slab.h>
22 #include <linux/delay.h>
23 #include <linux/fb.h>
24 #include <linux/svga.h>
25 #include <linux/init.h>
26 #include <linux/pci.h>
27 #include <linux/console.h> /* Why should fb driver call console functions? because acquire_console_sem() */
28 #include <video/vga.h>
29
30 #ifdef CONFIG_MTRR
31 #include <asm/mtrr.h>
32 #endif
33
34 struct vt8623fb_info {
35 char __iomem *mmio_base;
36 int mtrr_reg;
37 struct vgastate state;
38 struct mutex open_lock;
39 unsigned int ref_count;
40 u32 pseudo_palette[16];
41 };
42
43
44
45 /* ------------------------------------------------------------------------- */
46
47 static const struct svga_fb_format vt8623fb_formats[] = {
48 { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0,
49 FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP8, FB_VISUAL_PSEUDOCOLOR, 16, 16},
50 { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0,
51 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 16, 16},
52 { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1,
53 FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 16, 16},
54 { 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0,
55 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 8},
56 /* {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0,
57 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, */
58 {16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0,
59 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4},
60 {32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0,
61 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 2},
62 SVGA_FORMAT_END
63 };
64
65 static const struct svga_pll vt8623_pll = {2, 127, 2, 7, 0, 3,
66 60000, 300000, 14318};
67
68 /* CRT timing register sets */
69
70 static struct vga_regset vt8623_h_total_regs[] = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END};
71 static struct vga_regset vt8623_h_display_regs[] = {{0x01, 0, 7}, VGA_REGSET_END};
72 static struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END};
73 static struct vga_regset vt8623_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END};
74 static struct vga_regset vt8623_h_sync_start_regs[] = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END};
75 static struct vga_regset vt8623_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END};
76
77 static struct vga_regset vt8623_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END};
78 static struct vga_regset vt8623_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END};
79 static struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END};
80 static struct vga_regset vt8623_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END};
81 static struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END};
82 static struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END};
83
84 static struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END};
85 static struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END};
86 static struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END};
87 static struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END};
88
89 static struct svga_timing_regs vt8623_timing_regs = {
90 vt8623_h_total_regs, vt8623_h_display_regs, vt8623_h_blank_start_regs,
91 vt8623_h_blank_end_regs, vt8623_h_sync_start_regs, vt8623_h_sync_end_regs,
92 vt8623_v_total_regs, vt8623_v_display_regs, vt8623_v_blank_start_regs,
93 vt8623_v_blank_end_regs, vt8623_v_sync_start_regs, vt8623_v_sync_end_regs,
94 };
95
96
97 /* ------------------------------------------------------------------------- */
98
99
100 /* Module parameters */
101
102 static char *mode_option = "640x480-8@60";
103
104 #ifdef CONFIG_MTRR
105 static int mtrr = 1;
106 #endif
107
108 MODULE_AUTHOR("(c) 2006 Ondrej Zajicek <santiago@crfreenet.org>");
109 MODULE_LICENSE("GPL");
110 MODULE_DESCRIPTION("fbdev driver for integrated graphics core in VIA VT8623 [CLE266]");
111
112 module_param(mode_option, charp, 0644);
113 MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)");
114 module_param_named(mode, mode_option, charp, 0);
115 MODULE_PARM_DESC(mode, "Default video mode e.g. '648x480-8@60' (deprecated)");
116
117 #ifdef CONFIG_MTRR
118 module_param(mtrr, int, 0444);
119 MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)");
120 #endif
121
122
123 /* ------------------------------------------------------------------------- */
124
125
126 static struct fb_tile_ops vt8623fb_tile_ops = {
127 .fb_settile = svga_settile,
128 .fb_tilecopy = svga_tilecopy,
129 .fb_tilefill = svga_tilefill,
130 .fb_tileblit = svga_tileblit,
131 .fb_tilecursor = svga_tilecursor,
132 .fb_get_tilemax = svga_get_tilemax,
133 };
134
135
136 /* ------------------------------------------------------------------------- */
137
138
139 /* image data is MSB-first, fb structure is MSB-first too */
140 static inline u32 expand_color(u32 c)
141 {
142 return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF;
143 }
144
145 /* vt8623fb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */
146 static void vt8623fb_iplan_imageblit(struct fb_info *info, const struct fb_image *image)
147 {
148 u32 fg = expand_color(image->fg_color);
149 u32 bg = expand_color(image->bg_color);
150 const u8 *src1, *src;
151 u8 __iomem *dst1;
152 u32 __iomem *dst;
153 u32 val;
154 int x, y;
155
156 src1 = image->data;
157 dst1 = info->screen_base + (image->dy * info->fix.line_length)
158 + ((image->dx / 8) * 4);
159
160 for (y = 0; y < image->height; y++) {
161 src = src1;
162 dst = (u32 __iomem *) dst1;
163 for (x = 0; x < image->width; x += 8) {
164 val = *(src++) * 0x01010101;
165 val = (val & fg) | (~val & bg);
166 fb_writel(val, dst++);
167 }
168 src1 += image->width / 8;
169 dst1 += info->fix.line_length;
170 }
171 }
172
173 /* vt8623fb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */
174 static void vt8623fb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
175 {
176 u32 fg = expand_color(rect->color);
177 u8 __iomem *dst1;
178 u32 __iomem *dst;
179 int x, y;
180
181 dst1 = info->screen_base + (rect->dy * info->fix.line_length)
182 + ((rect->dx / 8) * 4);
183
184 for (y = 0; y < rect->height; y++) {
185 dst = (u32 __iomem *) dst1;
186 for (x = 0; x < rect->width; x += 8) {
187 fb_writel(fg, dst++);
188 }
189 dst1 += info->fix.line_length;
190 }
191 }
192
193
194 /* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */
195 static inline u32 expand_pixel(u32 c)
196 {
197 return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) |
198 ((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF;
199 }
200
201 /* vt8623fb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */
202 static void vt8623fb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image)
203 {
204 u32 fg = image->fg_color * 0x11111111;
205 u32 bg = image->bg_color * 0x11111111;
206 const u8 *src1, *src;
207 u8 __iomem *dst1;
208 u32 __iomem *dst;
209 u32 val;
210 int x, y;
211
212 src1 = image->data;
213 dst1 = info->screen_base + (image->dy * info->fix.line_length)
214 + ((image->dx / 8) * 4);
215
216 for (y = 0; y < image->height; y++) {
217 src = src1;
218 dst = (u32 __iomem *) dst1;
219 for (x = 0; x < image->width; x += 8) {
220 val = expand_pixel(*(src++));
221 val = (val & fg) | (~val & bg);
222 fb_writel(val, dst++);
223 }
224 src1 += image->width / 8;
225 dst1 += info->fix.line_length;
226 }
227 }
228
229 static void vt8623fb_imageblit(struct fb_info *info, const struct fb_image *image)
230 {
231 if ((info->var.bits_per_pixel == 4) && (image->depth == 1)
232 && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) {
233 if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)
234 vt8623fb_iplan_imageblit(info, image);
235 else
236 vt8623fb_cfb4_imageblit(info, image);
237 } else
238 cfb_imageblit(info, image);
239 }
240
241 static void vt8623fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
242 {
243 if ((info->var.bits_per_pixel == 4)
244 && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0)
245 && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES))
246 vt8623fb_iplan_fillrect(info, rect);
247 else
248 cfb_fillrect(info, rect);
249 }
250
251
252 /* ------------------------------------------------------------------------- */
253
254
255 static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock)
256 {
257 u16 m, n, r;
258 u8 regval;
259 int rv;
260
261 rv = svga_compute_pll(&vt8623_pll, 1000000000 / pixclock, &m, &n, &r, info->node);
262 if (rv < 0) {
263 printk(KERN_ERR "fb%d: cannot set requested pixclock, keeping old value\n", info->node);
264 return;
265 }
266
267 /* Set VGA misc register */
268 regval = vga_r(NULL, VGA_MIS_R);
269 vga_w(NULL, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD);
270
271 /* Set clock registers */
272 vga_wseq(NULL, 0x46, (n | (r << 6)));
273 vga_wseq(NULL, 0x47, m);
274
275 udelay(1000);
276
277 /* PLL reset */
278 svga_wseq_mask(0x40, 0x02, 0x02);
279 svga_wseq_mask(0x40, 0x00, 0x02);
280 }
281
282
283 static int vt8623fb_open(struct fb_info *info, int user)
284 {
285 struct vt8623fb_info *par = info->par;
286
287 mutex_lock(&(par->open_lock));
288 if (par->ref_count == 0) {
289 memset(&(par->state), 0, sizeof(struct vgastate));
290 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP;
291 par->state.num_crtc = 0xA2;
292 par->state.num_seq = 0x50;
293 save_vga(&(par->state));
294 }
295
296 par->ref_count++;
297 mutex_unlock(&(par->open_lock));
298
299 return 0;
300 }
301
302 static int vt8623fb_release(struct fb_info *info, int user)
303 {
304 struct vt8623fb_info *par = info->par;
305
306 mutex_lock(&(par->open_lock));
307 if (par->ref_count == 0) {
308 mutex_unlock(&(par->open_lock));
309 return -EINVAL;
310 }
311
312 if (par->ref_count == 1)
313 restore_vga(&(par->state));
314
315 par->ref_count--;
316 mutex_unlock(&(par->open_lock));
317
318 return 0;
319 }
320
321 static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
322 {
323 int rv, mem, step;
324
325 /* Find appropriate format */
326 rv = svga_match_format (vt8623fb_formats, var, NULL);
327 if (rv < 0)
328 {
329 printk(KERN_ERR "fb%d: unsupported mode requested\n", info->node);
330 return rv;
331 }
332
333 /* Do not allow to have real resoulution larger than virtual */
334 if (var->xres > var->xres_virtual)
335 var->xres_virtual = var->xres;
336
337 if (var->yres > var->yres_virtual)
338 var->yres_virtual = var->yres;
339
340 /* Round up xres_virtual to have proper alignment of lines */
341 step = vt8623fb_formats[rv].xresstep - 1;
342 var->xres_virtual = (var->xres_virtual+step) & ~step;
343
344 /* Check whether have enough memory */
345 mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual;
346 if (mem > info->screen_size)
347 {
348 printk(KERN_ERR "fb%d: not enough framebuffer memory (%d kB requested , %d kB available)\n", info->node, mem >> 10, (unsigned int) (info->screen_size >> 10));
349 return -EINVAL;
350 }
351
352 /* Text mode is limited to 256 kB of memory */
353 if ((var->bits_per_pixel == 0) && (mem > (256*1024)))
354 {
355 printk(KERN_ERR "fb%d: text framebuffer size too large (%d kB requested, 256 kB possible)\n", info->node, mem >> 10);
356 return -EINVAL;
357 }
358
359 rv = svga_check_timings (&vt8623_timing_regs, var, info->node);
360 if (rv < 0)
361 {
362 printk(KERN_ERR "fb%d: invalid timings requested\n", info->node);
363 return rv;
364 }
365
366 /* Interlaced mode not supported */
367 if (var->vmode & FB_VMODE_INTERLACED)
368 return -EINVAL;
369
370 return 0;
371 }
372
373
374 static int vt8623fb_set_par(struct fb_info *info)
375 {
376 u32 mode, offset_value, fetch_value, screen_size;
377 u32 bpp = info->var.bits_per_pixel;
378
379 if (bpp != 0) {
380 info->fix.ypanstep = 1;
381 info->fix.line_length = (info->var.xres_virtual * bpp) / 8;
382
383 info->flags &= ~FBINFO_MISC_TILEBLITTING;
384 info->tileops = NULL;
385
386 /* in 4bpp supports 8p wide tiles only, any tiles otherwise */
387 info->pixmap.blit_x = (bpp == 4) ? (1 << (8 - 1)) : (~(u32)0);
388 info->pixmap.blit_y = ~(u32)0;
389
390 offset_value = (info->var.xres_virtual * bpp) / 64;
391 fetch_value = ((info->var.xres * bpp) / 128) + 4;
392
393 if (bpp == 4)
394 fetch_value = (info->var.xres / 8) + 8; /* + 0 is OK */
395
396 screen_size = info->var.yres_virtual * info->fix.line_length;
397 } else {
398 info->fix.ypanstep = 16;
399 info->fix.line_length = 0;
400
401 info->flags |= FBINFO_MISC_TILEBLITTING;
402 info->tileops = &vt8623fb_tile_ops;
403
404 /* supports 8x16 tiles only */
405 info->pixmap.blit_x = 1 << (8 - 1);
406 info->pixmap.blit_y = 1 << (16 - 1);
407
408 offset_value = info->var.xres_virtual / 16;
409 fetch_value = (info->var.xres / 8) + 8;
410 screen_size = (info->var.xres_virtual * info->var.yres_virtual) / 64;
411 }
412
413 info->var.xoffset = 0;
414 info->var.yoffset = 0;
415 info->var.activate = FB_ACTIVATE_NOW;
416
417 /* Unlock registers */
418 svga_wseq_mask(0x10, 0x01, 0x01);
419 svga_wcrt_mask(0x11, 0x00, 0x80);
420 svga_wcrt_mask(0x47, 0x00, 0x01);
421
422 /* Device, screen and sync off */
423 svga_wseq_mask(0x01, 0x20, 0x20);
424 svga_wcrt_mask(0x36, 0x30, 0x30);
425 svga_wcrt_mask(0x17, 0x00, 0x80);
426
427 /* Set default values */
428 svga_set_default_gfx_regs();
429 svga_set_default_atc_regs();
430 svga_set_default_seq_regs();
431 svga_set_default_crt_regs();
432 svga_wcrt_multi(vt8623_line_compare_regs, 0xFFFFFFFF);
433 svga_wcrt_multi(vt8623_start_address_regs, 0);
434
435 svga_wcrt_multi(vt8623_offset_regs, offset_value);
436 svga_wseq_multi(vt8623_fetch_count_regs, fetch_value);
437
438 /* Clear H/V Skew */
439 svga_wcrt_mask(0x03, 0x00, 0x60);
440 svga_wcrt_mask(0x05, 0x00, 0x60);
441
442 if (info->var.vmode & FB_VMODE_DOUBLE)
443 svga_wcrt_mask(0x09, 0x80, 0x80);
444 else
445 svga_wcrt_mask(0x09, 0x00, 0x80);
446
447 svga_wseq_mask(0x1E, 0xF0, 0xF0); // DI/DVP bus
448 svga_wseq_mask(0x2A, 0x0F, 0x0F); // DI/DVP bus
449 svga_wseq_mask(0x16, 0x08, 0xBF); // FIFO read treshold
450 vga_wseq(NULL, 0x17, 0x1F); // FIFO depth
451 vga_wseq(NULL, 0x18, 0x4E);
452 svga_wseq_mask(0x1A, 0x08, 0x08); // enable MMIO ?
453
454 vga_wcrt(NULL, 0x32, 0x00);
455 vga_wcrt(NULL, 0x34, 0x00);
456 vga_wcrt(NULL, 0x6A, 0x80);
457 vga_wcrt(NULL, 0x6A, 0xC0);
458
459 vga_wgfx(NULL, 0x20, 0x00);
460 vga_wgfx(NULL, 0x21, 0x00);
461 vga_wgfx(NULL, 0x22, 0x00);
462
463 /* Set SR15 according to number of bits per pixel */
464 mode = svga_match_format(vt8623fb_formats, &(info->var), &(info->fix));
465 switch (mode) {
466 case 0:
467 pr_debug("fb%d: text mode\n", info->node);
468 svga_set_textmode_vga_regs();
469 svga_wseq_mask(0x15, 0x00, 0xFE);
470 svga_wcrt_mask(0x11, 0x60, 0x70);
471 break;
472 case 1:
473 pr_debug("fb%d: 4 bit pseudocolor\n", info->node);
474 vga_wgfx(NULL, VGA_GFX_MODE, 0x40);
475 svga_wseq_mask(0x15, 0x20, 0xFE);
476 svga_wcrt_mask(0x11, 0x00, 0x70);
477 break;
478 case 2:
479 pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node);
480 svga_wseq_mask(0x15, 0x00, 0xFE);
481 svga_wcrt_mask(0x11, 0x00, 0x70);
482 break;
483 case 3:
484 pr_debug("fb%d: 8 bit pseudocolor\n", info->node);
485 svga_wseq_mask(0x15, 0x22, 0xFE);
486 break;
487 case 4:
488 pr_debug("fb%d: 5/6/5 truecolor\n", info->node);
489 svga_wseq_mask(0x15, 0xB6, 0xFE);
490 break;
491 case 5:
492 pr_debug("fb%d: 8/8/8 truecolor\n", info->node);
493 svga_wseq_mask(0x15, 0xAE, 0xFE);
494 break;
495 default:
496 printk(KERN_ERR "vt8623fb: unsupported mode - bug\n");
497 return (-EINVAL);
498 }
499
500 vt8623_set_pixclock(info, info->var.pixclock);
501 svga_set_timings(&vt8623_timing_regs, &(info->var), 1, 1,
502 (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 1,
503 1, info->node);
504
505 memset_io(info->screen_base, 0x00, screen_size);
506
507 /* Device and screen back on */
508 svga_wcrt_mask(0x17, 0x80, 0x80);
509 svga_wcrt_mask(0x36, 0x00, 0x30);
510 svga_wseq_mask(0x01, 0x00, 0x20);
511
512 return 0;
513 }
514
515
516 static int vt8623fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
517 u_int transp, struct fb_info *fb)
518 {
519 switch (fb->var.bits_per_pixel) {
520 case 0:
521 case 4:
522 if (regno >= 16)
523 return -EINVAL;
524
525 outb(0x0F, VGA_PEL_MSK);
526 outb(regno, VGA_PEL_IW);
527 outb(red >> 10, VGA_PEL_D);
528 outb(green >> 10, VGA_PEL_D);
529 outb(blue >> 10, VGA_PEL_D);
530 break;
531 case 8:
532 if (regno >= 256)
533 return -EINVAL;
534
535 outb(0xFF, VGA_PEL_MSK);
536 outb(regno, VGA_PEL_IW);
537 outb(red >> 10, VGA_PEL_D);
538 outb(green >> 10, VGA_PEL_D);
539 outb(blue >> 10, VGA_PEL_D);
540 break;
541 case 16:
542 if (regno >= 16)
543 return 0;
544
545 if (fb->var.green.length == 5)
546 ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) |
547 ((green & 0xF800) >> 6) | ((blue & 0xF800) >> 11);
548 else if (fb->var.green.length == 6)
549 ((u32*)fb->pseudo_palette)[regno] = (red & 0xF800) |
550 ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11);
551 else
552 return -EINVAL;
553 break;
554 case 24:
555 case 32:
556 if (regno >= 16)
557 return 0;
558
559 /* ((transp & 0xFF00) << 16) */
560 ((u32*)fb->pseudo_palette)[regno] = ((red & 0xFF00) << 8) |
561 (green & 0xFF00) | ((blue & 0xFF00) >> 8);
562 break;
563 default:
564 return -EINVAL;
565 }
566
567 return 0;
568 }
569
570
571 static int vt8623fb_blank(int blank_mode, struct fb_info *info)
572 {
573 switch (blank_mode) {
574 case FB_BLANK_UNBLANK:
575 pr_debug("fb%d: unblank\n", info->node);
576 svga_wcrt_mask(0x36, 0x00, 0x30);
577 svga_wseq_mask(0x01, 0x00, 0x20);
578 break;
579 case FB_BLANK_NORMAL:
580 pr_debug("fb%d: blank\n", info->node);
581 svga_wcrt_mask(0x36, 0x00, 0x30);
582 svga_wseq_mask(0x01, 0x20, 0x20);
583 break;
584 case FB_BLANK_HSYNC_SUSPEND:
585 pr_debug("fb%d: DPMS standby (hsync off)\n", info->node);
586 svga_wcrt_mask(0x36, 0x10, 0x30);
587 svga_wseq_mask(0x01, 0x20, 0x20);
588 break;
589 case FB_BLANK_VSYNC_SUSPEND:
590 pr_debug("fb%d: DPMS suspend (vsync off)\n", info->node);
591 svga_wcrt_mask(0x36, 0x20, 0x30);
592 svga_wseq_mask(0x01, 0x20, 0x20);
593 break;
594 case FB_BLANK_POWERDOWN:
595 pr_debug("fb%d: DPMS off (no sync)\n", info->node);
596 svga_wcrt_mask(0x36, 0x30, 0x30);
597 svga_wseq_mask(0x01, 0x20, 0x20);
598 break;
599 }
600
601 return 0;
602 }
603
604
605 static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
606 {
607 unsigned int offset;
608
609 /* Calculate the offset */
610 if (var->bits_per_pixel == 0) {
611 offset = (var->yoffset / 16) * var->xres_virtual + var->xoffset;
612 offset = offset >> 3;
613 } else {
614 offset = (var->yoffset * info->fix.line_length) +
615 (var->xoffset * var->bits_per_pixel / 8);
616 offset = offset >> ((var->bits_per_pixel == 4) ? 2 : 1);
617 }
618
619 /* Set the offset */
620 svga_wcrt_multi(vt8623_start_address_regs, offset);
621
622 return 0;
623 }
624
625
626 /* ------------------------------------------------------------------------- */
627
628
629 /* Frame buffer operations */
630
631 static struct fb_ops vt8623fb_ops = {
632 .owner = THIS_MODULE,
633 .fb_open = vt8623fb_open,
634 .fb_release = vt8623fb_release,
635 .fb_check_var = vt8623fb_check_var,
636 .fb_set_par = vt8623fb_set_par,
637 .fb_setcolreg = vt8623fb_setcolreg,
638 .fb_blank = vt8623fb_blank,
639 .fb_pan_display = vt8623fb_pan_display,
640 .fb_fillrect = vt8623fb_fillrect,
641 .fb_copyarea = cfb_copyarea,
642 .fb_imageblit = vt8623fb_imageblit,
643 .fb_get_caps = svga_get_caps,
644 };
645
646
647 /* PCI probe */
648
649 static int __devinit vt8623_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
650 {
651 struct fb_info *info;
652 struct vt8623fb_info *par;
653 unsigned int memsize1, memsize2;
654 int rc;
655
656 /* Ignore secondary VGA device because there is no VGA arbitration */
657 if (! svga_primary_device(dev)) {
658 dev_info(&(dev->dev), "ignoring secondary device\n");
659 return -ENODEV;
660 }
661
662 /* Allocate and fill driver data structure */
663 info = framebuffer_alloc(sizeof(struct vt8623fb_info), &(dev->dev));
664 if (! info) {
665 dev_err(&(dev->dev), "cannot allocate memory\n");
666 return -ENOMEM;
667 }
668
669 par = info->par;
670 mutex_init(&par->open_lock);
671
672 info->flags = FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN;
673 info->fbops = &vt8623fb_ops;
674
675 /* Prepare PCI device */
676
677 rc = pci_enable_device(dev);
678 if (rc < 0) {
679 dev_err(info->device, "cannot enable PCI device\n");
680 goto err_enable_device;
681 }
682
683 rc = pci_request_regions(dev, "vt8623fb");
684 if (rc < 0) {
685 dev_err(info->device, "cannot reserve framebuffer region\n");
686 goto err_request_regions;
687 }
688
689 info->fix.smem_start = pci_resource_start(dev, 0);
690 info->fix.smem_len = pci_resource_len(dev, 0);
691 info->fix.mmio_start = pci_resource_start(dev, 1);
692 info->fix.mmio_len = pci_resource_len(dev, 1);
693
694 /* Map physical IO memory address into kernel space */
695 info->screen_base = pci_iomap(dev, 0, 0);
696 if (! info->screen_base) {
697 rc = -ENOMEM;
698 dev_err(info->device, "iomap for framebuffer failed\n");
699 goto err_iomap_1;
700 }
701
702 par->mmio_base = pci_iomap(dev, 1, 0);
703 if (! par->mmio_base) {
704 rc = -ENOMEM;
705 dev_err(info->device, "iomap for MMIO failed\n");
706 goto err_iomap_2;
707 }
708
709 /* Find how many physical memory there is on card */
710 memsize1 = (vga_rseq(NULL, 0x34) + 1) >> 1;
711 memsize2 = vga_rseq(NULL, 0x39) << 2;
712
713 if ((16 <= memsize1) && (memsize1 <= 64) && (memsize1 == memsize2))
714 info->screen_size = memsize1 << 20;
715 else {
716 dev_err(info->device, "memory size detection failed (%x %x), suppose 16 MB\n", memsize1, memsize2);
717 info->screen_size = 16 << 20;
718 }
719
720 info->fix.smem_len = info->screen_size;
721 strcpy(info->fix.id, "VIA VT8623");
722 info->fix.type = FB_TYPE_PACKED_PIXELS;
723 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
724 info->fix.ypanstep = 0;
725 info->fix.accel = FB_ACCEL_NONE;
726 info->pseudo_palette = (void*)par->pseudo_palette;
727
728 /* Prepare startup mode */
729
730 rc = fb_find_mode(&(info->var), info, mode_option, NULL, 0, NULL, 8);
731 if (! ((rc == 1) || (rc == 2))) {
732 rc = -EINVAL;
733 dev_err(info->device, "mode %s not found\n", mode_option);
734 goto err_find_mode;
735 }
736
737 rc = fb_alloc_cmap(&info->cmap, 256, 0);
738 if (rc < 0) {
739 dev_err(info->device, "cannot allocate colormap\n");
740 goto err_alloc_cmap;
741 }
742
743 rc = register_framebuffer(info);
744 if (rc < 0) {
745 dev_err(info->device, "cannot register framebugger\n");
746 goto err_reg_fb;
747 }
748
749 printk(KERN_INFO "fb%d: %s on %s, %d MB RAM\n", info->node, info->fix.id,
750 pci_name(dev), info->fix.smem_len >> 20);
751
752 /* Record a reference to the driver data */
753 pci_set_drvdata(dev, info);
754
755 #ifdef CONFIG_MTRR
756 if (mtrr) {
757 par->mtrr_reg = -1;
758 par->mtrr_reg = mtrr_add(info->fix.smem_start, info->fix.smem_len, MTRR_TYPE_WRCOMB, 1);
759 }
760 #endif
761
762 return 0;
763
764 /* Error handling */
765 err_reg_fb:
766 fb_dealloc_cmap(&info->cmap);
767 err_alloc_cmap:
768 err_find_mode:
769 pci_iounmap(dev, par->mmio_base);
770 err_iomap_2:
771 pci_iounmap(dev, info->screen_base);
772 err_iomap_1:
773 pci_release_regions(dev);
774 err_request_regions:
775 /* pci_disable_device(dev); */
776 err_enable_device:
777 framebuffer_release(info);
778 return rc;
779 }
780
781 /* PCI remove */
782
783 static void __devexit vt8623_pci_remove(struct pci_dev *dev)
784 {
785 struct fb_info *info = pci_get_drvdata(dev);
786
787 if (info) {
788 struct vt8623fb_info *par = info->par;
789
790 #ifdef CONFIG_MTRR
791 if (par->mtrr_reg >= 0) {
792 mtrr_del(par->mtrr_reg, 0, 0);
793 par->mtrr_reg = -1;
794 }
795 #endif
796
797 unregister_framebuffer(info);
798 fb_dealloc_cmap(&info->cmap);
799
800 pci_iounmap(dev, info->screen_base);
801 pci_iounmap(dev, par->mmio_base);
802 pci_release_regions(dev);
803 /* pci_disable_device(dev); */
804
805 pci_set_drvdata(dev, NULL);
806 framebuffer_release(info);
807 }
808 }
809
810
811 #ifdef CONFIG_PM
812 /* PCI suspend */
813
814 static int vt8623_pci_suspend(struct pci_dev* dev, pm_message_t state)
815 {
816 struct fb_info *info = pci_get_drvdata(dev);
817 struct vt8623fb_info *par = info->par;
818
819 dev_info(info->device, "suspend\n");
820
821 acquire_console_sem();
822 mutex_lock(&(par->open_lock));
823
824 if ((state.event == PM_EVENT_FREEZE) || (par->ref_count == 0)) {
825 mutex_unlock(&(par->open_lock));
826 release_console_sem();
827 return 0;
828 }
829
830 fb_set_suspend(info, 1);
831
832 pci_save_state(dev);
833 pci_disable_device(dev);
834 pci_set_power_state(dev, pci_choose_state(dev, state));
835
836 mutex_unlock(&(par->open_lock));
837 release_console_sem();
838
839 return 0;
840 }
841
842
843 /* PCI resume */
844
845 static int vt8623_pci_resume(struct pci_dev* dev)
846 {
847 struct fb_info *info = pci_get_drvdata(dev);
848 struct vt8623fb_info *par = info->par;
849
850 dev_info(info->device, "resume\n");
851
852 acquire_console_sem();
853 mutex_lock(&(par->open_lock));
854
855 if (par->ref_count == 0)
856 goto fail;
857
858 pci_set_power_state(dev, PCI_D0);
859 pci_restore_state(dev);
860
861 if (pci_enable_device(dev))
862 goto fail;
863
864 pci_set_master(dev);
865
866 vt8623fb_set_par(info);
867 fb_set_suspend(info, 0);
868
869 fail:
870 mutex_unlock(&(par->open_lock));
871 release_console_sem();
872
873 return 0;
874 }
875 #else
876 #define vt8623_pci_suspend NULL
877 #define vt8623_pci_resume NULL
878 #endif /* CONFIG_PM */
879
880 /* List of boards that we are trying to support */
881
882 static struct pci_device_id vt8623_devices[] __devinitdata = {
883 {PCI_DEVICE(PCI_VENDOR_ID_VIA, 0x3122)},
884 {0, 0, 0, 0, 0, 0, 0}
885 };
886
887 MODULE_DEVICE_TABLE(pci, vt8623_devices);
888
889 static struct pci_driver vt8623fb_pci_driver = {
890 .name = "vt8623fb",
891 .id_table = vt8623_devices,
892 .probe = vt8623_pci_probe,
893 .remove = __devexit_p(vt8623_pci_remove),
894 .suspend = vt8623_pci_suspend,
895 .resume = vt8623_pci_resume,
896 };
897
898 /* Cleanup */
899
900 static void __exit vt8623fb_cleanup(void)
901 {
902 pr_debug("vt8623fb: cleaning up\n");
903 pci_unregister_driver(&vt8623fb_pci_driver);
904 }
905
906 /* Driver Initialisation */
907
908 static int __init vt8623fb_init(void)
909 {
910
911 #ifndef MODULE
912 char *option = NULL;
913
914 if (fb_get_options("vt8623fb", &option))
915 return -ENODEV;
916
917 if (option && *option)
918 mode_option = option;
919 #endif
920
921 pr_debug("vt8623fb: initializing\n");
922 return pci_register_driver(&vt8623fb_pci_driver);
923 }
924
925 /* ------------------------------------------------------------------------- */
926
927 /* Modularization */
928
929 module_init(vt8623fb_init);
930 module_exit(vt8623fb_cleanup);
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