?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
RDMA/nes: Fix VLAN support
[linux-2.6/verdex.git] / drivers / net / netxen / netxen_nic_init.c
blob9e38bcb3fba9ac7fe1d25f28015cbd231d4a936e
1 /*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34 #include <linux/netdevice.h>
35 #include <linux/delay.h>
36 #include "netxen_nic.h"
37 #include "netxen_nic_hw.h"
38 #include "netxen_nic_phan_reg.h"
39
40 struct crb_addr_pair {
41 u32 addr;
42 u32 data;
43 };
44
45 unsigned long last_schedule_time;
46
47 #define NETXEN_MAX_CRB_XFORM 60
48 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
49 #define NETXEN_ADDR_ERROR (0xffffffff)
50
51 #define crb_addr_transform(name) \
52 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
53 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
54
55 #define NETXEN_NIC_XDMA_RESET 0x8000ff
56
57 static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
58 uint32_t ctx, uint32_t ringid);
59
60 #if 0
61 static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
62 unsigned long off, int *data)
63 {
64 void __iomem *addr = pci_base_offset(adapter, off);
65 writel(*data, addr);
66 }
67 #endif /* 0 */
68
69 static void crb_addr_transform_setup(void)
70 {
71 crb_addr_transform(XDMA);
72 crb_addr_transform(TIMR);
73 crb_addr_transform(SRE);
74 crb_addr_transform(SQN3);
75 crb_addr_transform(SQN2);
76 crb_addr_transform(SQN1);
77 crb_addr_transform(SQN0);
78 crb_addr_transform(SQS3);
79 crb_addr_transform(SQS2);
80 crb_addr_transform(SQS1);
81 crb_addr_transform(SQS0);
82 crb_addr_transform(RPMX7);
83 crb_addr_transform(RPMX6);
84 crb_addr_transform(RPMX5);
85 crb_addr_transform(RPMX4);
86 crb_addr_transform(RPMX3);
87 crb_addr_transform(RPMX2);
88 crb_addr_transform(RPMX1);
89 crb_addr_transform(RPMX0);
90 crb_addr_transform(ROMUSB);
91 crb_addr_transform(SN);
92 crb_addr_transform(QMN);
93 crb_addr_transform(QMS);
94 crb_addr_transform(PGNI);
95 crb_addr_transform(PGND);
96 crb_addr_transform(PGN3);
97 crb_addr_transform(PGN2);
98 crb_addr_transform(PGN1);
99 crb_addr_transform(PGN0);
100 crb_addr_transform(PGSI);
101 crb_addr_transform(PGSD);
102 crb_addr_transform(PGS3);
103 crb_addr_transform(PGS2);
104 crb_addr_transform(PGS1);
105 crb_addr_transform(PGS0);
106 crb_addr_transform(PS);
107 crb_addr_transform(PH);
108 crb_addr_transform(NIU);
109 crb_addr_transform(I2Q);
110 crb_addr_transform(EG);
111 crb_addr_transform(MN);
112 crb_addr_transform(MS);
113 crb_addr_transform(CAS2);
114 crb_addr_transform(CAS1);
115 crb_addr_transform(CAS0);
116 crb_addr_transform(CAM);
117 crb_addr_transform(C2C1);
118 crb_addr_transform(C2C0);
119 crb_addr_transform(SMB);
120 }
121
122 int netxen_init_firmware(struct netxen_adapter *adapter)
123 {
124 u32 state = 0, loops = 0, err = 0;
125
126 /* Window 1 call */
127 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
128
129 if (state == PHAN_INITIALIZE_ACK)
130 return 0;
131
132 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
133 udelay(100);
134 /* Window 1 call */
135 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
136
137 loops++;
138 }
139 if (loops >= 2000) {
140 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
141 state);
142 err = -EIO;
143 return err;
144 }
145 /* Window 1 call */
146 writel(INTR_SCHEME_PERPORT,
147 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
148 writel(MPORT_MULTI_FUNCTION_MODE,
149 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
150 writel(PHAN_INITIALIZE_ACK,
151 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
152
153 return err;
154 }
155
156 #define NETXEN_ADDR_LIMIT 0xffffffffULL
157
158 void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
159 struct pci_dev **used_dev)
160 {
161 void *addr;
162
163 addr = pci_alloc_consistent(pdev, sz, ptr);
164 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
165 *used_dev = pdev;
166 return addr;
167 }
168 pci_free_consistent(pdev, sz, addr, *ptr);
169 addr = pci_alloc_consistent(NULL, sz, ptr);
170 *used_dev = NULL;
171 return addr;
172 }
173
174 void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
175 {
176 int ctxid, ring;
177 u32 i;
178 u32 num_rx_bufs = 0;
179 struct netxen_rcv_desc_ctx *rcv_desc;
180
181 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
182 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
183 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
184 struct netxen_rx_buffer *rx_buf;
185 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
186 rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
187 rcv_desc->begin_alloc = 0;
188 rx_buf = rcv_desc->rx_buf_arr;
189 num_rx_bufs = rcv_desc->max_rx_desc_count;
190 /*
191 * Now go through all of them, set reference handles
192 * and put them in the queues.
193 */
194 for (i = 0; i < num_rx_bufs; i++) {
195 rx_buf->ref_handle = i;
196 rx_buf->state = NETXEN_BUFFER_FREE;
197 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
198 "%p\n", ctxid, i, rx_buf);
199 rx_buf++;
200 }
201 }
202 }
203 }
204
205 void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
206 {
207 int ports = 0;
208 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
209
210 if (netxen_nic_get_board_info(adapter) != 0)
211 printk("%s: Error getting board config info.\n",
212 netxen_nic_driver_name);
213 get_brd_port_by_type(board_info->board_type, &ports);
214 if (ports == 0)
215 printk(KERN_ERR "%s: Unknown board type\n",
216 netxen_nic_driver_name);
217 adapter->ahw.max_ports = ports;
218 }
219
220 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
221 {
222 switch (adapter->ahw.board_type) {
223 case NETXEN_NIC_GBE:
224 adapter->enable_phy_interrupts =
225 netxen_niu_gbe_enable_phy_interrupts;
226 adapter->disable_phy_interrupts =
227 netxen_niu_gbe_disable_phy_interrupts;
228 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
229 adapter->macaddr_set = netxen_niu_macaddr_set;
230 adapter->set_mtu = netxen_nic_set_mtu_gb;
231 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
232 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
233 adapter->phy_read = netxen_niu_gbe_phy_read;
234 adapter->phy_write = netxen_niu_gbe_phy_write;
235 adapter->init_niu = netxen_nic_init_niu_gb;
236 adapter->stop_port = netxen_niu_disable_gbe_port;
237 break;
238
239 case NETXEN_NIC_XGBE:
240 adapter->enable_phy_interrupts =
241 netxen_niu_xgbe_enable_phy_interrupts;
242 adapter->disable_phy_interrupts =
243 netxen_niu_xgbe_disable_phy_interrupts;
244 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
245 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
246 adapter->set_mtu = netxen_nic_set_mtu_xgb;
247 adapter->init_port = netxen_niu_xg_init_port;
248 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
249 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
250 adapter->stop_port = netxen_niu_disable_xg_port;
251 break;
252
253 default:
254 break;
255 }
256 }
257
258 /*
259 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
260 * address to external PCI CRB address.
261 */
262 static u32 netxen_decode_crb_addr(u32 addr)
263 {
264 int i;
265 u32 base_addr, offset, pci_base;
266
267 crb_addr_transform_setup();
268
269 pci_base = NETXEN_ADDR_ERROR;
270 base_addr = addr & 0xfff00000;
271 offset = addr & 0x000fffff;
272
273 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
274 if (crb_addr_xform[i] == base_addr) {
275 pci_base = i << 20;
276 break;
277 }
278 }
279 if (pci_base == NETXEN_ADDR_ERROR)
280 return pci_base;
281 else
282 return (pci_base + offset);
283 }
284
285 static long rom_max_timeout = 100;
286 static long rom_lock_timeout = 10000;
287 static long rom_write_timeout = 700;
288
289 static int rom_lock(struct netxen_adapter *adapter)
290 {
291 int iter;
292 u32 done = 0;
293 int timeout = 0;
294
295 while (!done) {
296 /* acquire semaphore2 from PCI HW block */
297 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
298 &done);
299 if (done == 1)
300 break;
301 if (timeout >= rom_lock_timeout)
302 return -EIO;
303
304 timeout++;
305 /*
306 * Yield CPU
307 */
308 if (!in_atomic())
309 schedule();
310 else {
311 for (iter = 0; iter < 20; iter++)
312 cpu_relax(); /*This a nop instr on i386 */
313 }
314 }
315 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
316 return 0;
317 }
318
319 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
320 {
321 long timeout = 0;
322 long done = 0;
323
324 while (done == 0) {
325 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
326 done &= 2;
327 timeout++;
328 if (timeout >= rom_max_timeout) {
329 printk("Timeout reached waiting for rom done");
330 return -EIO;
331 }
332 }
333 return 0;
334 }
335
336 static int netxen_rom_wren(struct netxen_adapter *adapter)
337 {
338 /* Set write enable latch in ROM status register */
339 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
340 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
341 M25P_INSTR_WREN);
342 if (netxen_wait_rom_done(adapter)) {
343 return -1;
344 }
345 return 0;
346 }
347
348 static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
349 unsigned int addr)
350 {
351 unsigned int data = 0xdeaddead;
352 data = netxen_nic_reg_read(adapter, addr);
353 return data;
354 }
355
356 static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
357 {
358 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
359 M25P_INSTR_RDSR);
360 if (netxen_wait_rom_done(adapter)) {
361 return -1;
362 }
363 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
364 }
365
366 static void netxen_rom_unlock(struct netxen_adapter *adapter)
367 {
368 u32 val;
369
370 /* release semaphore2 */
371 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
372
373 }
374
375 static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
376 {
377 long timeout = 0;
378 long wip = 1;
379 int val;
380 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
381 while (wip != 0) {
382 val = netxen_do_rom_rdsr(adapter);
383 wip = val & 1;
384 timeout++;
385 if (timeout > rom_max_timeout) {
386 return -1;
387 }
388 }
389 return 0;
390 }
391
392 static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
393 int data)
394 {
395 if (netxen_rom_wren(adapter)) {
396 return -1;
397 }
398 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
399 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
400 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
401 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
402 M25P_INSTR_PP);
403 if (netxen_wait_rom_done(adapter)) {
404 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
405 return -1;
406 }
407
408 return netxen_rom_wip_poll(adapter);
409 }
410
411 static int do_rom_fast_read(struct netxen_adapter *adapter,
412 int addr, int *valp)
413 {
414 cond_resched();
415
416 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
417 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
418 udelay(100); /* prevent bursting on CRB */
419 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
420 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
421 if (netxen_wait_rom_done(adapter)) {
422 printk("Error waiting for rom done\n");
423 return -EIO;
424 }
425 /* reset abyte_cnt and dummy_byte_cnt */
426 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
427 udelay(100); /* prevent bursting on CRB */
428 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
429
430 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
431 return 0;
432 }
433
434 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
435 u8 *bytes, size_t size)
436 {
437 int addridx;
438 int ret = 0;
439
440 for (addridx = addr; addridx < (addr + size); addridx += 4) {
441 int v;
442 ret = do_rom_fast_read(adapter, addridx, &v);
443 if (ret != 0)
444 break;
445 *(__le32 *)bytes = cpu_to_le32(v);
446 bytes += 4;
447 }
448
449 return ret;
450 }
451
452 int
453 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
454 u8 *bytes, size_t size)
455 {
456 int ret;
457
458 ret = rom_lock(adapter);
459 if (ret < 0)
460 return ret;
461
462 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
463
464 netxen_rom_unlock(adapter);
465 return ret;
466 }
467
468 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
469 {
470 int ret;
471
472 if (rom_lock(adapter) != 0)
473 return -EIO;
474
475 ret = do_rom_fast_read(adapter, addr, valp);
476 netxen_rom_unlock(adapter);
477 return ret;
478 }
479
480 #if 0
481 int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
482 {
483 int ret = 0;
484
485 if (rom_lock(adapter) != 0) {
486 return -1;
487 }
488 ret = do_rom_fast_write(adapter, addr, data);
489 netxen_rom_unlock(adapter);
490 return ret;
491 }
492 #endif /* 0 */
493
494 static int do_rom_fast_write_words(struct netxen_adapter *adapter,
495 int addr, u8 *bytes, size_t size)
496 {
497 int addridx = addr;
498 int ret = 0;
499
500 while (addridx < (addr + size)) {
501 int last_attempt = 0;
502 int timeout = 0;
503 int data;
504
505 data = le32_to_cpu((*(__le32*)bytes));
506 ret = do_rom_fast_write(adapter, addridx, data);
507 if (ret < 0)
508 return ret;
509
510 while(1) {
511 int data1;
512
513 ret = do_rom_fast_read(adapter, addridx, &data1);
514 if (ret < 0)
515 return ret;
516
517 if (data1 == data)
518 break;
519
520 if (timeout++ >= rom_write_timeout) {
521 if (last_attempt++ < 4) {
522 ret = do_rom_fast_write(adapter,
523 addridx, data);
524 if (ret < 0)
525 return ret;
526 }
527 else {
528 printk(KERN_INFO "Data write did not "
529 "succeed at address 0x%x\n", addridx);
530 break;
531 }
532 }
533 }
534
535 bytes += 4;
536 addridx += 4;
537 }
538
539 return ret;
540 }
541
542 int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
543 u8 *bytes, size_t size)
544 {
545 int ret = 0;
546
547 ret = rom_lock(adapter);
548 if (ret < 0)
549 return ret;
550
551 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
552 netxen_rom_unlock(adapter);
553
554 return ret;
555 }
556
557 static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
558 {
559 int ret;
560
561 ret = netxen_rom_wren(adapter);
562 if (ret < 0)
563 return ret;
564
565 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
566 netxen_crb_writelit_adapter(adapter,
567 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
568
569 ret = netxen_wait_rom_done(adapter);
570 if (ret < 0)
571 return ret;
572
573 return netxen_rom_wip_poll(adapter);
574 }
575
576 static int netxen_rom_rdsr(struct netxen_adapter *adapter)
577 {
578 int ret;
579
580 ret = rom_lock(adapter);
581 if (ret < 0)
582 return ret;
583
584 ret = netxen_do_rom_rdsr(adapter);
585 netxen_rom_unlock(adapter);
586 return ret;
587 }
588
589 int netxen_backup_crbinit(struct netxen_adapter *adapter)
590 {
591 int ret = FLASH_SUCCESS;
592 int val;
593 char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
594
595 if (!buffer)
596 return -ENOMEM;
597 /* unlock sector 63 */
598 val = netxen_rom_rdsr(adapter);
599 val = val & 0xe3;
600 ret = netxen_rom_wrsr(adapter, val);
601 if (ret != FLASH_SUCCESS)
602 goto out_kfree;
603
604 ret = netxen_rom_wip_poll(adapter);
605 if (ret != FLASH_SUCCESS)
606 goto out_kfree;
607
608 /* copy sector 0 to sector 63 */
609 ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
610 buffer, NETXEN_FLASH_SECTOR_SIZE);
611 if (ret != FLASH_SUCCESS)
612 goto out_kfree;
613
614 ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
615 buffer, NETXEN_FLASH_SECTOR_SIZE);
616 if (ret != FLASH_SUCCESS)
617 goto out_kfree;
618
619 /* lock sector 63 */
620 val = netxen_rom_rdsr(adapter);
621 if (!(val & 0x8)) {
622 val |= (0x1 << 2);
623 /* lock sector 63 */
624 if (netxen_rom_wrsr(adapter, val) == 0) {
625 ret = netxen_rom_wip_poll(adapter);
626 if (ret != FLASH_SUCCESS)
627 goto out_kfree;
628
629 /* lock SR writes */
630 ret = netxen_rom_wip_poll(adapter);
631 if (ret != FLASH_SUCCESS)
632 goto out_kfree;
633 }
634 }
635
636 out_kfree:
637 kfree(buffer);
638 return ret;
639 }
640
641 static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
642 {
643 netxen_rom_wren(adapter);
644 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
645 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
646 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
647 M25P_INSTR_SE);
648 if (netxen_wait_rom_done(adapter)) {
649 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
650 return -1;
651 }
652 return netxen_rom_wip_poll(adapter);
653 }
654
655 static void check_erased_flash(struct netxen_adapter *adapter, int addr)
656 {
657 int i;
658 int val;
659 int count = 0, erased_errors = 0;
660 int range;
661
662 range = (addr == NETXEN_USER_START) ?
663 NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
664
665 for (i = addr; i < range; i += 4) {
666 netxen_rom_fast_read(adapter, i, &val);
667 if (val != 0xffffffff)
668 erased_errors++;
669 count++;
670 }
671
672 if (erased_errors)
673 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
674 "for sector address: %x\n", erased_errors, count, addr);
675 }
676
677 int netxen_rom_se(struct netxen_adapter *adapter, int addr)
678 {
679 int ret = 0;
680 if (rom_lock(adapter) != 0) {
681 return -1;
682 }
683 ret = netxen_do_rom_se(adapter, addr);
684 netxen_rom_unlock(adapter);
685 msleep(30);
686 check_erased_flash(adapter, addr);
687
688 return ret;
689 }
690
691 static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
692 int start, int end)
693 {
694 int ret = FLASH_SUCCESS;
695 int i;
696
697 for (i = start; i < end; i++) {
698 ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
699 if (ret)
700 break;
701 ret = netxen_rom_wip_poll(adapter);
702 if (ret < 0)
703 return ret;
704 }
705
706 return ret;
707 }
708
709 int
710 netxen_flash_erase_secondary(struct netxen_adapter *adapter)
711 {
712 int ret = FLASH_SUCCESS;
713 int start, end;
714
715 start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
716 end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
717 ret = netxen_flash_erase_sections(adapter, start, end);
718
719 return ret;
720 }
721
722 int
723 netxen_flash_erase_primary(struct netxen_adapter *adapter)
724 {
725 int ret = FLASH_SUCCESS;
726 int start, end;
727
728 start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
729 end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
730 ret = netxen_flash_erase_sections(adapter, start, end);
731
732 return ret;
733 }
734
735 void netxen_halt_pegs(struct netxen_adapter *adapter)
736 {
737 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
738 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
739 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
740 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
741 }
742
743 int netxen_flash_unlock(struct netxen_adapter *adapter)
744 {
745 int ret = 0;
746
747 ret = netxen_rom_wrsr(adapter, 0);
748 if (ret < 0)
749 return ret;
750
751 ret = netxen_rom_wren(adapter);
752 if (ret < 0)
753 return ret;
754
755 return ret;
756 }
757
758 #define NETXEN_BOARDTYPE 0x4008
759 #define NETXEN_BOARDNUM 0x400c
760 #define NETXEN_CHIPNUM 0x4010
761 #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
762 #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
763 #define NETXEN_ROM_FOUND_INIT 0x400
764
765 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
766 {
767 int addr, val, status;
768 int n, i;
769 int init_delay = 0;
770 struct crb_addr_pair *buf;
771 u32 off;
772
773 /* resetall */
774 status = netxen_nic_get_board_info(adapter);
775 if (status)
776 printk("%s: netxen_pinit_from_rom: Error getting board info\n",
777 netxen_nic_driver_name);
778
779 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
780 NETXEN_ROMBUS_RESET);
781
782 if (verbose) {
783 int val;
784 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
785 printk("P2 ROM board type: 0x%08x\n", val);
786 else
787 printk("Could not read board type\n");
788 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
789 printk("P2 ROM board num: 0x%08x\n", val);
790 else
791 printk("Could not read board number\n");
792 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
793 printk("P2 ROM chip num: 0x%08x\n", val);
794 else
795 printk("Could not read chip number\n");
796 }
797
798 if (netxen_rom_fast_read(adapter, 0, &n) == 0
799 && (n & NETXEN_ROM_FIRST_BARRIER)) {
800 n &= ~NETXEN_ROM_ROUNDUP;
801 if (n < NETXEN_ROM_FOUND_INIT) {
802 if (verbose)
803 printk("%s: %d CRB init values found"
804 " in ROM.\n", netxen_nic_driver_name, n);
805 } else {
806 printk("%s:n=0x%x Error! NetXen card flash not"
807 " initialized.\n", __FUNCTION__, n);
808 return -EIO;
809 }
810 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
811 if (buf == NULL) {
812 printk("%s: netxen_pinit_from_rom: Unable to calloc "
813 "memory.\n", netxen_nic_driver_name);
814 return -ENOMEM;
815 }
816 for (i = 0; i < n; i++) {
817 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
818 || netxen_rom_fast_read(adapter, 8 * i + 8,
819 &addr) != 0)
820 return -EIO;
821
822 buf[i].addr = addr;
823 buf[i].data = val;
824
825 if (verbose)
826 printk("%s: PCI: 0x%08x == 0x%08x\n",
827 netxen_nic_driver_name, (unsigned int)
828 netxen_decode_crb_addr(addr), val);
829 }
830 for (i = 0; i < n; i++) {
831
832 off = netxen_decode_crb_addr(buf[i].addr);
833 if (off == NETXEN_ADDR_ERROR) {
834 printk(KERN_ERR"CRB init value out of range %x\n",
835 buf[i].addr);
836 continue;
837 }
838 off += NETXEN_PCI_CRBSPACE;
839 /* skipping cold reboot MAGIC */
840 if (off == NETXEN_CAM_RAM(0x1fc))
841 continue;
842
843 /* After writing this register, HW needs time for CRB */
844 /* to quiet down (else crb_window returns 0xffffffff) */
845 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
846 init_delay = 1;
847 /* hold xdma in reset also */
848 buf[i].data = NETXEN_NIC_XDMA_RESET;
849 }
850
851 if (ADDR_IN_WINDOW1(off)) {
852 writel(buf[i].data,
853 NETXEN_CRB_NORMALIZE(adapter, off));
854 } else {
855 netxen_nic_pci_change_crbwindow(adapter, 0);
856 writel(buf[i].data,
857 pci_base_offset(adapter, off));
858
859 netxen_nic_pci_change_crbwindow(adapter, 1);
860 }
861 if (init_delay == 1) {
862 msleep(2000);
863 init_delay = 0;
864 }
865 msleep(20);
866 }
867 kfree(buf);
868
869 /* disable_peg_cache_all */
870
871 /* unreset_net_cache */
872 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
873 4);
874 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
875 (val & 0xffffff0f));
876 /* p2dn replyCount */
877 netxen_crb_writelit_adapter(adapter,
878 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
879 /* disable_peg_cache 0 */
880 netxen_crb_writelit_adapter(adapter,
881 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
882 /* disable_peg_cache 1 */
883 netxen_crb_writelit_adapter(adapter,
884 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
885
886 /* peg_clr_all */
887
888 /* peg_clr 0 */
889 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
890 0);
891 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
892 0);
893 /* peg_clr 1 */
894 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
895 0);
896 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
897 0);
898 /* peg_clr 2 */
899 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
900 0);
901 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
902 0);
903 /* peg_clr 3 */
904 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
905 0);
906 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
907 0);
908 }
909 return 0;
910 }
911
912 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
913 {
914 uint64_t addr;
915 uint32_t hi;
916 uint32_t lo;
917
918 adapter->dummy_dma.addr =
919 pci_alloc_consistent(adapter->ahw.pdev,
920 NETXEN_HOST_DUMMY_DMA_SIZE,
921 &adapter->dummy_dma.phys_addr);
922 if (adapter->dummy_dma.addr == NULL) {
923 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
924 __FUNCTION__);
925 return -ENOMEM;
926 }
927
928 addr = (uint64_t) adapter->dummy_dma.phys_addr;
929 hi = (addr >> 32) & 0xffffffff;
930 lo = addr & 0xffffffff;
931
932 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
933 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
934
935 return 0;
936 }
937
938 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
939 {
940 if (adapter->dummy_dma.addr) {
941 pci_free_consistent(adapter->ahw.pdev,
942 NETXEN_HOST_DUMMY_DMA_SIZE,
943 adapter->dummy_dma.addr,
944 adapter->dummy_dma.phys_addr);
945 adapter->dummy_dma.addr = NULL;
946 }
947 }
948
949 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
950 {
951 u32 val = 0;
952 int retries = 30;
953
954 if (!pegtune_val) {
955 do {
956 val = readl(NETXEN_CRB_NORMALIZE
957 (adapter, CRB_CMDPEG_STATE));
958 pegtune_val = readl(NETXEN_CRB_NORMALIZE
959 (adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
960
961 if (val == PHAN_INITIALIZE_COMPLETE ||
962 val == PHAN_INITIALIZE_ACK)
963 return 0;
964
965 msleep(1000);
966 } while (--retries);
967 if (!retries) {
968 printk(KERN_WARNING "netxen_phantom_init: init failed, "
969 "pegtune_val=%x\n", pegtune_val);
970 return -1;
971 }
972 }
973
974 return 0;
975 }
976
977 int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
978 {
979 int ctx;
980
981 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
982 struct netxen_recv_context *recv_ctx =
983 &(adapter->recv_ctx[ctx]);
984 u32 consumer;
985 struct status_desc *desc_head;
986 struct status_desc *desc;
987
988 consumer = recv_ctx->status_rx_consumer;
989 desc_head = recv_ctx->rcv_status_desc_head;
990 desc = &desc_head[consumer];
991
992 if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
993 return 1;
994 }
995
996 return 0;
997 }
998
999 static int netxen_nic_check_temp(struct netxen_adapter *adapter)
1000 {
1001 struct net_device *netdev = adapter->netdev;
1002 uint32_t temp, temp_state, temp_val;
1003 int rv = 0;
1004
1005 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
1006
1007 temp_state = nx_get_temp_state(temp);
1008 temp_val = nx_get_temp_val(temp);
1009
1010 if (temp_state == NX_TEMP_PANIC) {
1011 printk(KERN_ALERT
1012 "%s: Device temperature %d degrees C exceeds"
1013 " maximum allowed. Hardware has been shut down.\n",
1014 netxen_nic_driver_name, temp_val);
1015
1016 netif_carrier_off(netdev);
1017 netif_stop_queue(netdev);
1018 rv = 1;
1019 } else if (temp_state == NX_TEMP_WARN) {
1020 if (adapter->temp == NX_TEMP_NORMAL) {
1021 printk(KERN_ALERT
1022 "%s: Device temperature %d degrees C "
1023 "exceeds operating range."
1024 " Immediate action needed.\n",
1025 netxen_nic_driver_name, temp_val);
1026 }
1027 } else {
1028 if (adapter->temp == NX_TEMP_WARN) {
1029 printk(KERN_INFO
1030 "%s: Device temperature is now %d degrees C"
1031 " in normal range.\n", netxen_nic_driver_name,
1032 temp_val);
1033 }
1034 }
1035 adapter->temp = temp_state;
1036 return rv;
1037 }
1038
1039 void netxen_watchdog_task(struct work_struct *work)
1040 {
1041 struct net_device *netdev;
1042 struct netxen_adapter *adapter =
1043 container_of(work, struct netxen_adapter, watchdog_task);
1044
1045 if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
1046 return;
1047
1048 if (adapter->handle_phy_intr)
1049 adapter->handle_phy_intr(adapter);
1050
1051 netdev = adapter->netdev;
1052 if ((netif_running(netdev)) && !netif_carrier_ok(netdev) &&
1053 netxen_nic_link_ok(adapter) ) {
1054 printk(KERN_INFO "%s %s (port %d), Link is up\n",
1055 netxen_nic_driver_name, netdev->name, adapter->portnum);
1056 netif_carrier_on(netdev);
1057 netif_wake_queue(netdev);
1058 } else if(!(netif_running(netdev)) && netif_carrier_ok(netdev)) {
1059 printk(KERN_ERR "%s %s Link is Down\n",
1060 netxen_nic_driver_name, netdev->name);
1061 netif_carrier_off(netdev);
1062 netif_stop_queue(netdev);
1063 }
1064
1065 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1066 }
1067
1068 /*
1069 * netxen_process_rcv() send the received packet to the protocol stack.
1070 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1071 * invoke the routine to send more rx buffers to the Phantom...
1072 */
1073 static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1074 struct status_desc *desc)
1075 {
1076 struct pci_dev *pdev = adapter->pdev;
1077 struct net_device *netdev = adapter->netdev;
1078 u64 sts_data = le64_to_cpu(desc->status_desc_data);
1079 int index = netxen_get_sts_refhandle(sts_data);
1080 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1081 struct netxen_rx_buffer *buffer;
1082 struct sk_buff *skb;
1083 u32 length = netxen_get_sts_totallength(sts_data);
1084 u32 desc_ctx;
1085 struct netxen_rcv_desc_ctx *rcv_desc;
1086 int ret;
1087
1088 desc_ctx = netxen_get_sts_type(sts_data);
1089 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1090 printk("%s: %s Bad Rcv descriptor ring\n",
1091 netxen_nic_driver_name, netdev->name);
1092 return;
1093 }
1094
1095 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
1096 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
1097 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1098 index, rcv_desc->max_rx_desc_count);
1099 return;
1100 }
1101 buffer = &rcv_desc->rx_buf_arr[index];
1102 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1103 buffer->lro_current_frags++;
1104 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1105 buffer->lro_expected_frags =
1106 netxen_get_sts_desc_lro_cnt(desc);
1107 buffer->lro_length = length;
1108 }
1109 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1110 if (buffer->lro_expected_frags != 0) {
1111 printk("LRO: (refhandle:%x) recv frag. "
1112 "wait for last. flags: %x expected:%d "
1113 "have:%d\n", index,
1114 netxen_get_sts_desc_lro_last_frag(desc),
1115 buffer->lro_expected_frags,
1116 buffer->lro_current_frags);
1117 }
1118 return;
1119 }
1120 }
1121
1122 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
1123 PCI_DMA_FROMDEVICE);
1124
1125 skb = (struct sk_buff *)buffer->skb;
1126
1127 if (likely(adapter->rx_csum &&
1128 netxen_get_sts_status(sts_data) == STATUS_CKSUM_OK)) {
1129 adapter->stats.csummed++;
1130 skb->ip_summed = CHECKSUM_UNNECESSARY;
1131 } else
1132 skb->ip_summed = CHECKSUM_NONE;
1133
1134 skb->dev = netdev;
1135 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1136 /* True length was only available on the last pkt */
1137 skb_put(skb, buffer->lro_length);
1138 } else {
1139 skb_put(skb, length);
1140 }
1141
1142 skb->protocol = eth_type_trans(skb, netdev);
1143
1144 ret = netif_receive_skb(skb);
1145
1146 /*
1147 * RH: Do we need these stats on a regular basis. Can we get it from
1148 * Linux stats.
1149 */
1150 switch (ret) {
1151 case NET_RX_SUCCESS:
1152 adapter->stats.uphappy++;
1153 break;
1154
1155 case NET_RX_CN_LOW:
1156 adapter->stats.uplcong++;
1157 break;
1158
1159 case NET_RX_CN_MOD:
1160 adapter->stats.upmcong++;
1161 break;
1162
1163 case NET_RX_CN_HIGH:
1164 adapter->stats.uphcong++;
1165 break;
1166
1167 case NET_RX_DROP:
1168 adapter->stats.updropped++;
1169 break;
1170
1171 default:
1172 adapter->stats.updunno++;
1173 break;
1174 }
1175
1176 netdev->last_rx = jiffies;
1177
1178 rcv_desc->rcv_free++;
1179 rcv_desc->rcv_pending--;
1180
1181 /*
1182 * We just consumed one buffer so post a buffer.
1183 */
1184 buffer->skb = NULL;
1185 buffer->state = NETXEN_BUFFER_FREE;
1186 buffer->lro_current_frags = 0;
1187 buffer->lro_expected_frags = 0;
1188
1189 adapter->stats.no_rcv++;
1190 adapter->stats.rxbytes += length;
1191 }
1192
1193 /* Process Receive status ring */
1194 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1195 {
1196 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1197 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1198 struct status_desc *desc; /* used to read status desc here */
1199 u32 consumer = recv_ctx->status_rx_consumer;
1200 u32 producer = 0;
1201 int count = 0, ring;
1202
1203 DPRINTK(INFO, "procesing receive\n");
1204 /*
1205 * we assume in this case that there is only one port and that is
1206 * port #1...changes need to be done in firmware to indicate port
1207 * number as part of the descriptor. This way we will be able to get
1208 * the netdev which is associated with that device.
1209 */
1210 while (count < max) {
1211 desc = &desc_head[consumer];
1212 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
1213 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1214 netxen_get_sts_owner(desc));
1215 break;
1216 }
1217 netxen_process_rcv(adapter, ctxid, desc);
1218 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
1219 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
1220 count++;
1221 }
1222 if (count) {
1223 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
1224 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
1225 }
1226 }
1227
1228 /* update the consumer index in phantom */
1229 if (count) {
1230 recv_ctx->status_rx_consumer = consumer;
1231 recv_ctx->status_rx_producer = producer;
1232
1233 /* Window = 1 */
1234 writel(consumer,
1235 NETXEN_CRB_NORMALIZE(adapter,
1236 recv_crb_registers[adapter->portnum].
1237 crb_rcv_status_consumer));
1238 wmb();
1239 }
1240
1241 return count;
1242 }
1243
1244 /* Process Command status ring */
1245 int netxen_process_cmd_ring(unsigned long data)
1246 {
1247 u32 last_consumer;
1248 u32 consumer;
1249 struct netxen_adapter *adapter = (struct netxen_adapter *)data;
1250 int count1 = 0;
1251 int count2 = 0;
1252 struct netxen_cmd_buffer *buffer;
1253 struct pci_dev *pdev;
1254 struct netxen_skb_frag *frag;
1255 u32 i;
1256 int done;
1257
1258 spin_lock(&adapter->tx_lock);
1259 last_consumer = adapter->last_cmd_consumer;
1260 DPRINTK(INFO, "procesing xmit complete\n");
1261 /* we assume in this case that there is only one port and that is
1262 * port #1...changes need to be done in firmware to indicate port
1263 * number as part of the descriptor. This way we will be able to get
1264 * the netdev which is associated with that device.
1265 */
1266
1267 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1268 if (last_consumer == consumer) { /* Ring is empty */
1269 DPRINTK(INFO, "last_consumer %d == consumer %d\n",
1270 last_consumer, consumer);
1271 spin_unlock(&adapter->tx_lock);
1272 return 1;
1273 }
1274
1275 adapter->proc_cmd_buf_counter++;
1276 /*
1277 * Not needed - does not seem to be used anywhere.
1278 * adapter->cmd_consumer = consumer;
1279 */
1280 spin_unlock(&adapter->tx_lock);
1281
1282 while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
1283 buffer = &adapter->cmd_buf_arr[last_consumer];
1284 pdev = adapter->pdev;
1285 if (buffer->skb) {
1286 frag = &buffer->frag_array[0];
1287 pci_unmap_single(pdev, frag->dma, frag->length,
1288 PCI_DMA_TODEVICE);
1289 frag->dma = 0ULL;
1290 for (i = 1; i < buffer->frag_count; i++) {
1291 DPRINTK(INFO, "getting fragment no %d\n", i);
1292 frag++; /* Get the next frag */
1293 pci_unmap_page(pdev, frag->dma, frag->length,
1294 PCI_DMA_TODEVICE);
1295 frag->dma = 0ULL;
1296 }
1297
1298 adapter->stats.skbfreed++;
1299 dev_kfree_skb_any(buffer->skb);
1300 buffer->skb = NULL;
1301 } else if (adapter->proc_cmd_buf_counter == 1) {
1302 adapter->stats.txnullskb++;
1303 }
1304 if (unlikely(netif_queue_stopped(adapter->netdev)
1305 && netif_carrier_ok(adapter->netdev))
1306 && ((jiffies - adapter->netdev->trans_start) >
1307 adapter->netdev->watchdog_timeo)) {
1308 SCHEDULE_WORK(&adapter->tx_timeout_task);
1309 }
1310
1311 last_consumer = get_next_index(last_consumer,
1312 adapter->max_tx_desc_count);
1313 count1++;
1314 }
1315
1316 count2 = 0;
1317 spin_lock(&adapter->tx_lock);
1318 if ((--adapter->proc_cmd_buf_counter) == 0) {
1319 adapter->last_cmd_consumer = last_consumer;
1320 while ((adapter->last_cmd_consumer != consumer)
1321 && (count2 < MAX_STATUS_HANDLE)) {
1322 buffer =
1323 &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
1324 count2++;
1325 if (buffer->skb)
1326 break;
1327 else
1328 adapter->last_cmd_consumer =
1329 get_next_index(adapter->last_cmd_consumer,
1330 adapter->max_tx_desc_count);
1331 }
1332 }
1333 if (count1 || count2) {
1334 if (netif_queue_stopped(adapter->netdev)
1335 && (adapter->flags & NETXEN_NETDEV_STATUS)) {
1336 netif_wake_queue(adapter->netdev);
1337 adapter->flags &= ~NETXEN_NETDEV_STATUS;
1338 }
1339 }
1340 /*
1341 * If everything is freed up to consumer then check if the ring is full
1342 * If the ring is full then check if more needs to be freed and
1343 * schedule the call back again.
1344 *
1345 * This happens when there are 2 CPUs. One could be freeing and the
1346 * other filling it. If the ring is full when we get out of here and
1347 * the card has already interrupted the host then the host can miss the
1348 * interrupt.
1349 *
1350 * There is still a possible race condition and the host could miss an
1351 * interrupt. The card has to take care of this.
1352 */
1353 if (adapter->last_cmd_consumer == consumer &&
1354 (((adapter->cmd_producer + 1) %
1355 adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
1356 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1357 }
1358 done = (adapter->last_cmd_consumer == consumer);
1359
1360 spin_unlock(&adapter->tx_lock);
1361 DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
1362 __FUNCTION__);
1363 return (done);
1364 }
1365
1366 /*
1367 * netxen_post_rx_buffers puts buffer in the Phantom memory
1368 */
1369 void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1370 {
1371 struct pci_dev *pdev = adapter->ahw.pdev;
1372 struct sk_buff *skb;
1373 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1374 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1375 uint producer;
1376 struct rcv_desc *pdesc;
1377 struct netxen_rx_buffer *buffer;
1378 int count = 0;
1379 int index = 0;
1380 netxen_ctx_msg msg = 0;
1381 dma_addr_t dma;
1382
1383 rcv_desc = &recv_ctx->rcv_desc[ringid];
1384
1385 producer = rcv_desc->producer;
1386 index = rcv_desc->begin_alloc;
1387 buffer = &rcv_desc->rx_buf_arr[index];
1388 /* We can start writing rx descriptors into the phantom memory. */
1389 while (buffer->state == NETXEN_BUFFER_FREE) {
1390 skb = dev_alloc_skb(rcv_desc->skb_size);
1391 if (unlikely(!skb)) {
1392 /*
1393 * TODO
1394 * We need to schedule the posting of buffers to the pegs.
1395 */
1396 rcv_desc->begin_alloc = index;
1397 DPRINTK(ERR, "netxen_post_rx_buffers: "
1398 " allocated only %d buffers\n", count);
1399 break;
1400 }
1401
1402 count++; /* now there should be no failure */
1403 pdesc = &rcv_desc->desc_head[producer];
1404
1405 #if defined(XGB_DEBUG)
1406 *(unsigned long *)(skb->head) = 0xc0debabe;
1407 if (skb_is_nonlinear(skb)) {
1408 printk("Allocated SKB @%p is nonlinear\n");
1409 }
1410 #endif
1411 skb_reserve(skb, 2);
1412 /* This will be setup when we receive the
1413 * buffer after it has been filled FSL TBD TBD
1414 * skb->dev = netdev;
1415 */
1416 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1417 PCI_DMA_FROMDEVICE);
1418 pdesc->addr_buffer = cpu_to_le64(dma);
1419 buffer->skb = skb;
1420 buffer->state = NETXEN_BUFFER_BUSY;
1421 buffer->dma = dma;
1422 /* make a rcv descriptor */
1423 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1424 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1425 DPRINTK(INFO, "done writing descripter\n");
1426 producer =
1427 get_next_index(producer, rcv_desc->max_rx_desc_count);
1428 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1429 buffer = &rcv_desc->rx_buf_arr[index];
1430 }
1431 /* if we did allocate buffers, then write the count to Phantom */
1432 if (count) {
1433 rcv_desc->begin_alloc = index;
1434 rcv_desc->rcv_pending += count;
1435 rcv_desc->producer = producer;
1436 if (rcv_desc->rcv_free >= 32) {
1437 rcv_desc->rcv_free = 0;
1438 /* Window = 1 */
1439 writel((producer - 1) &
1440 (rcv_desc->max_rx_desc_count - 1),
1441 NETXEN_CRB_NORMALIZE(adapter,
1442 recv_crb_registers[
1443 adapter->portnum].
1444 rcv_desc_crb[ringid].
1445 crb_rcv_producer_offset));
1446 /*
1447 * Write a doorbell msg to tell phanmon of change in
1448 * receive ring producer
1449 */
1450 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1451 netxen_set_msg_privid(msg);
1452 netxen_set_msg_count(msg,
1453 ((producer -
1454 1) & (rcv_desc->
1455 max_rx_desc_count - 1)));
1456 netxen_set_msg_ctxid(msg, adapter->portnum);
1457 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1458 writel(msg,
1459 DB_NORMALIZE(adapter,
1460 NETXEN_RCV_PRODUCER_OFFSET));
1461 wmb();
1462 }
1463 }
1464 }
1465
1466 static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1467 uint32_t ctx, uint32_t ringid)
1468 {
1469 struct pci_dev *pdev = adapter->ahw.pdev;
1470 struct sk_buff *skb;
1471 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1472 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1473 u32 producer;
1474 struct rcv_desc *pdesc;
1475 struct netxen_rx_buffer *buffer;
1476 int count = 0;
1477 int index = 0;
1478
1479 rcv_desc = &recv_ctx->rcv_desc[ringid];
1480
1481 producer = rcv_desc->producer;
1482 index = rcv_desc->begin_alloc;
1483 buffer = &rcv_desc->rx_buf_arr[index];
1484 /* We can start writing rx descriptors into the phantom memory. */
1485 while (buffer->state == NETXEN_BUFFER_FREE) {
1486 skb = dev_alloc_skb(rcv_desc->skb_size);
1487 if (unlikely(!skb)) {
1488 /*
1489 * We need to schedule the posting of buffers to the pegs.
1490 */
1491 rcv_desc->begin_alloc = index;
1492 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1493 " allocated only %d buffers\n", count);
1494 break;
1495 }
1496 count++; /* now there should be no failure */
1497 pdesc = &rcv_desc->desc_head[producer];
1498 skb_reserve(skb, 2);
1499 /*
1500 * This will be setup when we receive the
1501 * buffer after it has been filled
1502 * skb->dev = netdev;
1503 */
1504 buffer->skb = skb;
1505 buffer->state = NETXEN_BUFFER_BUSY;
1506 buffer->dma = pci_map_single(pdev, skb->data,
1507 rcv_desc->dma_size,
1508 PCI_DMA_FROMDEVICE);
1509
1510 /* make a rcv descriptor */
1511 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1512 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1513 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1514 DPRINTK(INFO, "done writing descripter\n");
1515 producer =
1516 get_next_index(producer, rcv_desc->max_rx_desc_count);
1517 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1518 buffer = &rcv_desc->rx_buf_arr[index];
1519 }
1520
1521 /* if we did allocate buffers, then write the count to Phantom */
1522 if (count) {
1523 rcv_desc->begin_alloc = index;
1524 rcv_desc->rcv_pending += count;
1525 rcv_desc->producer = producer;
1526 if (rcv_desc->rcv_free >= 32) {
1527 rcv_desc->rcv_free = 0;
1528 /* Window = 1 */
1529 writel((producer - 1) &
1530 (rcv_desc->max_rx_desc_count - 1),
1531 NETXEN_CRB_NORMALIZE(adapter,
1532 recv_crb_registers[
1533 adapter->portnum].
1534 rcv_desc_crb[ringid].
1535 crb_rcv_producer_offset));
1536 wmb();
1537 }
1538 }
1539 }
1540
1541 int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
1542 {
1543 if (find_diff_among(adapter->last_cmd_consumer,
1544 adapter->cmd_producer,
1545 adapter->max_tx_desc_count) > 0)
1546 return 1;
1547
1548 return 0;
1549 }
1550
1551
1552 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1553 {
1554 memset(&adapter->stats, 0, sizeof(adapter->stats));
1555 return;
1556 }
1557
Verdex Pro support